CN101577393B - Chip socket and method for detecting horizontal positioning of chip - Google Patents
Chip socket and method for detecting horizontal positioning of chip Download PDFInfo
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- CN101577393B CN101577393B CN2008100969221A CN200810096922A CN101577393B CN 101577393 B CN101577393 B CN 101577393B CN 2008100969221 A CN2008100969221 A CN 2008100969221A CN 200810096922 A CN200810096922 A CN 200810096922A CN 101577393 B CN101577393 B CN 101577393B
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000012360 testing method Methods 0.000 claims abstract description 20
- 230000008569 process Effects 0.000 claims abstract description 5
- 239000000523 sample Substances 0.000 claims description 19
- 230000003287 optical effect Effects 0.000 description 40
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 29
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical group [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 description 7
- 238000001514 detection method Methods 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 5
- 238000013461 design Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000035945 sensitivity Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000002950 deficient Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
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Abstract
The invention relates to a wafer socket and a method for detecting horizontal positioning of a wafer. The purpose of the invention is to ensure that the wafer is placed at the correct position, so as to avoid the damage of the wafer in the testing process and ensure the smooth operation of the test.
Description
Technical field 8
The present invention relates to a kind of wafer socket, particularly relate to a kind of about detecting the whether wafer socket of horizontal location of wafer.
Background technology
The function of wafer socket (IC Socket) is most weld pads (pad) that are electrically connected at circuit board for most the terminals (pin or lead) that wafer is outstanding respectively, to test.Wafer socket belongs to running stores, also can change according to the kind of testing wafer, therefore, designs good wafer socket and must change easily.
Except changing easily, whether the position of wafer placement correctly also is important topic.As shown in Figure 1, a kind of wafer socket of U.S. Pat 5100332 announcements comprises a base 1 and a loam cake 2.Base 1 has a loading end 3 and has groove with ccontaining wafer to be tested (not shown); Loam cake 2 has a button bar 14, and loam cake 2 is fastened by rotating shaft rotation back and base 1.Wafer socket is characterised in that four corners of base 1 have the sunk structure 11 of V-arrangement, and the loam cake relative position has the projective structure 10 of V-arrangement; By the engagement of sunk structure 11, make that being positioned at when testing of wafer is more firm with outstanding structure 10.
Wafer socket can utilize most probes (often claiming pogo-pin) to electrically connect circuit board and wafer to be measured.Shown in second figure, Japanese publication spy opens 2001-267029 and discloses a kind of wafer socket 15 and comprise a probe 16, and probe 16 has a sleeve 17, and certain regional area of sleeve 17 has the expansion section 18 of an expanded outer diameter; One plunger 19, but easy on and off is displaced in the sleeve 17; One spring 20 upwards forces in sleeve 17, forces in plunger 19 downwards; An and ball contact site 21.Wafer socket 15 is connected with the tin ball 23 of wafer 22 by the ball contact site 21 of probe 16, contacts with the weld pad 25 of circuit board 24 by plunger 19 lower ends again, finishes the electric connection of wafer 22 and circuit board 24.
Common wafer to be measured is by a fetching device (pick and place), utilizes the mode of drawing vacuum to obtain wafer to be measured, and moves to the zone that wafer socket is put wafer, removes vacuum and puts wafer.Can have influence on the test quality because whether wafer is connected really with circuit board, even the feasibility of test, therefore, tin ball 23 as shown in Figure 2 must be seated in the ball contact site 21 accurately.
But for some reason, wafer can't accurate in locating.These reasons may comprise that small-sized, the weight of wafer kick the beam.For example, when a wafer is of a size of 3.3 * 3.4 * 0.76mm, its weight approximately only is 50 milligrams.When the size of wafer is littler, want accurately to put also difficulty further of wafer, but unfortunately, when the size of wafer is littler, permissible locating bias amount is also little, allows that side-play amount may have only 0.1mm even littler.
Fig. 2 shows the situation that the wafer of existing known wafer socket can't accurately be located.Wafer socket 15 has the locating surface 26 of a level, the sectional area of locating surface 26 is slightly larger than the sectional area of wafer, for example wafer size is too small, weight kicks the beam based on some reason, wafer 22 surpasses the side-play amount of allowing when being put, causing wafer 22 is not flatly to be placed in the locating surface 26, so cause the tin ball 23 of wafer not to be connected really, so that can't obtain correct test result with probe 16.
In addition,,, can cause wafer 22 to damage when loam cake 2 presses down, improve manufacturing cost when wafer 22 horizontal location accurately if wafer socket is the structure that has loam cake 2 as Fig. 1.
This shows that above-mentioned existing wafer socket obviously still has inconvenience and defective, and demands urgently further being improved in structure, method and use.In order to solve the problem of above-mentioned existence, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate structure to address the above problem, this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of novel wafer socket, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Because the defective that above-mentioned existing wafer socket exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of novel wafer socket and the method that detects the wafer-level location, with guarantee wafer be placed on correct position, avoid wafer in test process, damage, guarantee the test can carry out smoothly, can improve general existing wafer socket, make it have more practicality.Through constantly research, design, and, create the present invention who has practical value finally through after studying sample and improvement repeatedly.
Summary of the invention
Main purpose of the present invention is, overcome the defective that existing wafer socket exists, and a kind of novel wafer socket and the method that detects the wafer-level location, technical problem to be solved are provided is to make it guarantee that wafer is placed on correct position, damages, can carry out smoothly to guarantee test to avoid wafer in test process.
The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of wafer socket that proposes according to the present invention is used to connect a wafer, and comprising: a pedestal, this pedestal comprise a locating surface with ccontaining this wafer, and the profile of this locating surface has two diagonal; And two pairs of optical inductors, detect whether horizontal location of wafer, be a straight line respectively and be arranged on contiguous this two cornerwise zone.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid wafer socket, wherein said two pairs of optical inductors are the zone that a straight line is arranged on positive and negative 15 degree of this two diagonal respectively.
Aforesaid wafer socket, wherein said two pairs of optical inductors are a straight line respectively and are arranged on this two diagonal.
Aforesaid wafer socket, wherein said two pairs of optical inductors are the infrared ray inductor.
Aforesaid wafer socket, wherein said pedestal also comprise a floating type platform, and this locating surface is arranged in this floating type platform, is provided with a plurality of springs between this floating type platform and this pedestal.
Aforesaid wafer socket, wherein said wafer has a first surface and an opposing second surface, and first surface is provided with a plurality of contacts, it is towards this locating surface, this pedestal also comprises a plurality of probes, each these a plurality of probe comprises a location groove surface to this locating surface, and when this wafer is a horizontal positioned, each this this detent of a plurality of contacts and each is connected really.
The object of the invention to solve the technical problems also realizes by the following technical solutions.A kind of wafer socket that proposes according to the present invention is used to connect a wafer, and it comprises: a pedestal, this pedestal comprise a locating surface with ccontaining this wafer, and the profile of this locating surface has two diagonal; Two pairs of optical inductors detect whether horizontal location of wafer, are a straight line respectively and are arranged on contiguous this two cornerwise zone; And an assembly, it is in order to the location of auxiliary wafer, and it has a lower surface, and this lower surface is towards this locating surface during assembling; Two grooves are arranged at this lower surface, and wherein these two pairs of optical inductors are provided with respectively in this two groove.
The object of the invention to solve the technical problems also realizes in addition by the following technical solutions.A kind of method that detects the wafer-level location according to the present invention proposes may further comprise the steps: provide a pedestal to comprise that a locating surface is with a ccontaining wafer; One predeterminated level position is provided; Judge maximum all occurrence positions that exceed height; The adjacent domain of a pair of optical inductor by these all occurrence positions is set respectively; Place this wafer on this locating surface; And judge whether that all the optical receiver of this optical inductor is all received signal, if then test, then stop if not.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The method of aforesaid detection wafer-level location, wherein said wafer has a first surface and a relative second surface, this first surface is provided with towards this locating surface, the predetermined placement location of this second surface is defined as this predeterminated level position, when wafer by non-horizontal positioned, the part that wafer exceeds this predeterminated level position defines the height that exceeds of this maximum.
The method of aforesaid detection wafer-level location, the profile of wherein said wafer is a tetragonal body, these all occurrence positions are positioned on two diagonal of this tetragonal body.
The method of aforesaid detection wafer-level location wherein is provided with the zone of a pair of optical inductor by positive and negative 15 degree of this two diagonal respectively.
The method of aforesaid detection wafer-level location wherein is provided with a pair of optical inductor respectively by on this two diagonal.
The present invention compared with prior art has tangible advantage and beneficial effect.By technique scheme, wafer socket of the present invention has following advantage and beneficial effect at least with the method that detects the wafer-level location:
According to the method for wafer socket provided by the invention and detection level location, can guarantee that wafer is placed on correct position, can avoids wafer to damage, test can carrying out smoothly in test process.
In sum, the invention relates to a kind of wafer socket and the method that detects the wafer-level location, wafer socket comprises a pedestal and an assembly, pedestal has a locating surface with ccontaining wafer, the two pairs of optical inductors are arranged in the assembly respectively and contiguous two cornerwise zones, to detect whether horizontal location of wafer.
The present invention has above-mentioned plurality of advantages and practical value, no matter it all has bigger improvement on product, method structure or function, obvious improvement is arranged technically, and produced handy and practical effect, and more existing wafer socket has the outstanding effect of enhancement, thereby being suitable for practicality more, and having the extensive value of industry, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 and Fig. 2 are for showing the wafer socket that has known technology now.
The situation that Fig. 3 can't accurately locate for the wafer that shows existing known wafer socket.
Fig. 4 is for showing the wafer socket of the embodiment of the invention.
Fig. 5 to Fig. 7 is for showing the wafer socket of another embodiment of the present invention, and wherein Fig. 5, Fig. 6, Fig. 7 present different views.
Fig. 8 A to Fig. 8 B is for showing the schematic diagram of embodiment of the invention r pedestal.
Fig. 9 detects the method for wafer-level location for showing the embodiment of the invention.
1: base 2: loam cake
3: loading end 11: sunk structure
10: projective structure 14: button bar
15: wafer socket 16: probe
17: sleeve 18: expansion section
19: plunger 20: spring
21: ball contact site 22: wafer
23: tin ball 24: circuit board
25: weld pad 26: locating surface
30: wafer socket 31: wafer
32: pedestal 33: locating surface
34: contact 35: probe
36: first surface 37: second surface
38: upper surface 39: edge
40: optical transmitting set 41: optical receiver
42: assembly 43: groove
44: lower surface 45: detent
46: floating type platform 47: lower end
48: a pedestal 49 is provided: a predeterminated level position is provided
50: judge maximum all occurrence positions that exceed height
51: contiguous above-mentioned all occurrence positions of a pair of optical inductor are set respectively
52: place wafer in locating surface
53: all optical receiver is all received signal
54: test 55: stop
P1: predeterminated level position Z1: exceed height
Z2: exceed height
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to foundation the present invention wafer socket that proposes and its embodiment of method, structure, method feature and the effect thereof that detect the wafer-level location, describe in detail as after.
Relevant aforementioned and other technology contents, characteristics and effect of the present invention can clearly present in the following detailed description that cooperates with reference to graphic preferred embodiment.For convenience of description, in following embodiment, components identical is represented with identical numbering.
Fig. 4 shows the wafer socket of the embodiment of the invention.Wafer socket 30 comprises a pedestal 32, and pedestal 32 comprises that a locating surface 33 can a ccontaining wafer 31, and locating surface 33 has the sectional area that the profile identical with wafer 31 and its sectional area are slightly larger than wafer.Wafer 31 has a first surface 36 and an opposing second surface 37, and first surface 36 is towards locating surface 33 assemblings, and first surface 36 has a plurality of contacts 34 (for example tin ball).In addition, pedestal 32 has a plurality of probes 35, and each probe has a location groove 45, and when wafer 31 was put by level, contact 34 can be connected individually really with the detent 45 of probe 35; And when wafer 31 was put by non-level as shown in the figure, contact 34 can't be connected really with the detent 45 of probe 35, and the horizontal level of wafer 31 certain part can come highly than predetermined horizontal level.
In an embodiment, wafer 31 has a predeterminated level position P1, and predeterminated level position P1 is defined as the placement location that second surface 37 is scheduled to.In addition, predeterminated level position P1 has identical level height with a upper surface 38 of pedestal, but in other embodiments, the height of predeterminated level position P1 can be higher or lower than the height of upper surface 38.
When wafer 31 was put by non-level, the second surface 37 of wafer 31 exceeds at locating surface 33 center lines subscribed horizontal level P1, exceeded highly to be Z1; And at an edge 39 of wafer 31, also exceed and subscribe horizontal level P1, exceeding highly is Z2.Obviously exceeding height Z2 can be greater than exceeding height Z1, and exceeds height Z2 in theory and have the maximum height value that exceeds.
Exceed height Z2 or Z1 as whether detecting wafer 31 by horizontal positioned in order to utilize, a pair or more of optical inductor (comprising an optical transmitting set 40 and an optical receiver 41) is arranged on the pedestal 32.Optical receiver 41 receives that it is correct that the signal of optical transmitting set 40 is represented the horizontal level of wafer 31 in theory.For induction sensitivity is preferably arranged, optical transmitting set 40 is linked to be a straight line with optical receiver 41 should because exceed height Z2 for the maximum height that exceeds, be easy to detecting roughly by exceeding the zone at height Z2 place.
Though the profile of wafer 31 is without limits, be example with the wafer of a tetragonal body, the maximum of wafer exceed the diagonal positions that height Z2 can occur in wafer 31, in other words on four of wafer corners.Because unpredictable which corner can have the maximum height Z2 that exceeds, preferred embodiment is that two diagonal at wafer are provided with a pair of optical inductor respectively.
Because pedestal 32 may be provided with other mechanisms on diagonal, hindered the setting of optical inductor, feasible alter mode is that near the zone of optical inductor diagonal is set, and is adjacent to cornerwise angle in other words.Two diagonal of supposing a positive tetragonal body wafer are positioned at 45 degree and 135 degree, and then the angle that is provided with of acceptable optical inductor is approximately 45 ± 15 degree and 135 ± 15 degree, just in the scope of approximately positive and negative 15 degree.In this scope, the height that can detect is slightly less than the maximum highly Z2 that exceeds, and can improve detecting sensitivity this moment by the luminous intensity that improves optical transmitting set 40.The present invention does not approve of unlimited raising luminous intensity, and luminous intensity is crossed and forced to such an extent that optical receiver 41 is easy to just receive signal, cause in fact be not horizontal positioned but the erroneous judgement situation.For example, two diagonal of aforementioned positive tetragonal body wafer are positioned at 45 degree and 135 degree, if two pairs of optical inductors are arranged at 0 degree and 90 positions of spending respectively, then the height that can detect will be to exceed height Z1, because it is a lot of less than exceeding height Z2 to exceed height Z1, must improve luminous intensity to improve sensitivity, still cause erroneous judgement, cause test to carry out or to incur loss through delay because sensitivity is too high.
In the foregoing description, optical inductor is the infrared ray inductor, but also can be other forms of optical inductor.In addition, optical inductor does not limit and is set on the pedestal 32, can be arranged on other members yet, and following embodiment is example.
Fig. 5 to Fig. 7 shows the wafer socket of another embodiment of the present invention, and wherein Fig. 5, Fig. 6, Fig. 7 present different views, and components identical is with identical symbolic representation.
Fig. 5 and Fig. 6 show that a wafer socket 30 comprises a pedestal 32 and an assembly 42, assembly 42 is in order to the location of auxiliary wafer, assembly 42 has a lower surface 44, two grooves 43 are arranged on the lower surface 44, a pair of optical inductor (not shown) is set respectively in two grooves 43 comprises an optical transmitting set and an optical receiver.Pedestal 32 comprises a locating surface 33 with a ccontaining wafer (not shown), and as previously mentioned, locating surface 33 has the profile identical with wafer but bigger sectional area.As shown in Figure 7, when the lower surface 44 of assembly 42 is assembled towards the upper surface 38 of pedestal 32, two grooves 43 roughly pass through two diagonal positions of wafer respectively just, just in the scopes of 45 ± 15 degree and 135 ± 15 degree, and the maximum that being provided with of optical inductor can detect wafer highly just exceed height Z2 or a little less than the height of this value, therefore, the luminous intensity of optical transmitting set did not need strong, can avoid erroneous judgement.According to said mechanism, assembly 42 not only can be assisted wafer orientation, also has concurrently to detect the whether function of horizontal location of wafer.
Fig. 8 A to Fig. 8 B is in the various embodiments described above, comparatively detailed pedestal 32 schematic diagrames, and wherein Fig. 8 B is the profile of Fig. 8 A.
At the upper surface 38 of pedestal 32, can still comprise a floating type platform 46, locating surface 33 then is arranged at floating type platform interior 46; Be provided with a plurality of springs (not shown) between floating type platform 46 and the pedestal 32, make floating type platform 46 to carry out the fine setting of position according to the strength of wafer placement.Pedestal 32 has a plurality of probes 35, every probe 35 has a location groove 45 and a lower end 47, when wafer 31 (as Fig. 4) is put by level, the contact 34 (as Fig. 4) of wafer 31 can be connected individually really with the detent 45 of probe 35, finish electric connection by the lower end 47 and the weld pad of circuit board again, can test.
According to above-mentioned enforcement notion, Fig. 9 shows the method for the detection wafer-level location of the embodiment of the invention.Step 48 provides a pedestal 48, and pedestal 48 can comprise the ccontaining wafer of locating surface as the described structure of preceding each embodiment; Step 49 provides a predeterminated level position 49, and is for example shown in Figure 4; Step 50 is judged maximum all occurrence positions that exceed height, and for example, when wafer is polygon such as tetragonal body, the maximum occurrence positions that exceeds height is at diagonal, for example two diagonal of tetragonal body; Step 51 is provided with contiguous above-mentioned all occurrence positions of a pair of optical inductor respectively; Step 52 is placed wafer in locating surface; Step 53 judges whether that whole optical receivers all receives signal; If then test 54; If not, then stop 55.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (12)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100969221A CN101577393B (en) | 2008-05-07 | 2008-05-07 | Chip socket and method for detecting horizontal positioning of chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100969221A CN101577393B (en) | 2008-05-07 | 2008-05-07 | Chip socket and method for detecting horizontal positioning of chip |
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| CN101577393A CN101577393A (en) | 2009-11-11 |
| CN101577393B true CN101577393B (en) | 2011-01-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2008100969221A Expired - Fee Related CN101577393B (en) | 2008-05-07 | 2008-05-07 | Chip socket and method for detecting horizontal positioning of chip |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102062791B (en) * | 2009-11-12 | 2013-11-27 | 京元电子股份有限公司 | Probe Holder |
| CN104061855B (en) * | 2013-03-22 | 2017-06-16 | 京元电子股份有限公司 | Detecting device |
| CN103604415A (en) * | 2013-10-23 | 2014-02-26 | 上海华力微电子有限公司 | Crystal boat inclination automatic induction apparatus |
| CN105499147A (en) * | 2015-12-31 | 2016-04-20 | 桂林斯壮微电子有限责任公司 | Device positioning base for testing sorting machine |
| CN107860416A (en) * | 2017-11-07 | 2018-03-30 | 北京半导体专用设备研究所（中国电子科技集团公司第四十五研究所） | A kind of method and system for detecting wafer laying state |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000340321A (en) * | 1999-05-25 | 2000-12-08 | Nec Corp | Contactor for ic socket |
| CN1521568A (en) * | 2003-02-14 | 2004-08-18 | Asml荷兰有限公司 | Apparatus and method for wafer alignment with reduced tilt sensitivity |
| US6786760B1 (en) * | 2003-04-21 | 2004-09-07 | Hewlett-Packard Development Company, L.P. | Method and system for sensing IC package orientation in sockets |
| CN2758762Y (en) * | 2004-12-20 | 2006-02-15 | 赵久 | Automation X-ray director |
-
2008
- 2008-05-07 CN CN2008100969221A patent/CN101577393B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000340321A (en) * | 1999-05-25 | 2000-12-08 | Nec Corp | Contactor for ic socket |
| CN1521568A (en) * | 2003-02-14 | 2004-08-18 | Asml荷兰有限公司 | Apparatus and method for wafer alignment with reduced tilt sensitivity |
| US6786760B1 (en) * | 2003-04-21 | 2004-09-07 | Hewlett-Packard Development Company, L.P. | Method and system for sensing IC package orientation in sockets |
| CN2758762Y (en) * | 2004-12-20 | 2006-02-15 | 赵久 | Automation X-ray director |
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Granted publication date: 20110112 Termination date: 20120507 |