CN101567326B - Printed circuit board and method of forming the same - Google Patents
Printed circuit board and method of forming the same Download PDFInfo
- Publication number
- CN101567326B CN101567326B CN 200810095810 CN200810095810A CN101567326B CN 101567326 B CN101567326 B CN 101567326B CN 200810095810 CN200810095810 CN 200810095810 CN 200810095810 A CN200810095810 A CN 200810095810A CN 101567326 B CN101567326 B CN 101567326B
- Authority
- CN
- China
- Prior art keywords
- carrier
- electronic component
- forming
- thin film
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 239000010409 thin film Substances 0.000 claims description 21
- 239000010408 film Substances 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 17
- 230000008569 process Effects 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 8
- 238000007650 screen-printing Methods 0.000 claims description 6
- 238000004544 sputter deposition Methods 0.000 claims description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 3
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 238000009713 electroplating Methods 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 229910005540 GaP Inorganic materials 0.000 claims 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 10
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000007639 printing Methods 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 230000005525 hole transport Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000007521 mechanical polishing technique Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- DGEZNRSVGBDHLK-UHFFFAOYSA-N [1,10]phenanthroline Chemical compound C1=CN=C2C3=NC=CC=C3C=CC2=C1 DGEZNRSVGBDHLK-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000002508 contact lithography Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- WCPAKWJPBJAGKN-UHFFFAOYSA-N oxadiazole Chemical compound C1=CON=N1 WCPAKWJPBJAGKN-UHFFFAOYSA-N 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 150000003852 triazoles Chemical class 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910000570 Cupronickel Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000002841 Lewis acid Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000011358 absorbing material Substances 0.000 description 1
- VVJKKWFAADXIJK-UHFFFAOYSA-N allylamine Natural products NCC=C VVJKKWFAADXIJK-UHFFFAOYSA-N 0.000 description 1
- -1 allylamine compound Chemical class 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- YOCUPQPZWBBYIX-UHFFFAOYSA-N copper nickel Chemical compound [Ni].[Cu] YOCUPQPZWBBYIX-UHFFFAOYSA-N 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000007517 lewis acids Chemical class 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 229920003055 poly(ester-imide) Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 229910001256 stainless steel alloy Inorganic materials 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Images
Landscapes
- Led Devices (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
技术领域 technical field
本发明涉及一种印刷电路板及其形成方法,尤其关于一种埋有电子零件的印刷电路板及其形成方法。The invention relates to a printed circuit board and its forming method, in particular to a printed circuit board embedded with electronic parts and its forming method.
背景技术 Background technique
印刷电路板(printed circuit board)是构成各电子零件间互连的电路图案的一种机构。图1所示为传统印刷电路板10与电子零件如集成电路20及被动元件30互连的示意图。如图所述,已知印刷电路板10与集成电路20的互连系采用表面粘装的方式,其中集成电路20是已封装而具有引脚21的电子零件,透过焊接使引脚21与印刷电路板10的线路11相接而完成互连。A printed circuit board (printed circuit board) is a mechanism that constitutes a circuit pattern interconnected between electronic components. FIG. 1 is a schematic diagram of interconnection between a traditional
现今电子产品轻薄短小的趋势已经使得传统印刷电路板10逐渐不能符合需求。举例而言,由于电子零件装在印刷电路板10的表面上,所以印刷电路板10必需提供足够的表面积供其使用,因而使其尺寸的缩小受到限制。再者,已知装设在印刷电路板10上的集成电路20通常都是已完成封装的产品,所以其体积将比原未封装的裸芯的体积大很多,此点也同样使最终电子产品的尺寸缩小受到限制。因此,需要一种改良的结构及方法来解决已知的问题。The current trend of thin, light and small electronic products has made the traditional printed
发明内容 Contents of the invention
本发明提供一种埋有电子零件的印刷电路板,其作法是在一暂时载板上利用印刷电路板工艺先形成线路,然后直接在暂时载板上建造电子零件,如二极管、晶体管及其它光电半导体等,并使此线路与此电子零件电连接。接着,利用合适的绝缘材料将此线路与此电子零件同时封装。封装完成后再将暂时载板移除。The present invention provides a printed circuit board embedded with electronic parts. The method is to form a circuit on a temporary carrier board using a printed circuit board process, and then directly build electronic parts on the temporary carrier board, such as diodes, transistors and other optoelectronic components. Semiconductors, etc., and electrically connect this circuit to this electronic part. Then, the circuit and the electronic parts are packaged together with a suitable insulating material. After the packaging is completed, the temporary carrier board is removed.
本发明至少有以下助于缩小最终电子产品的尺寸的特点:电子零件埋设在封装绝缘层中;电子零件是直接在载板上制作,其制作完成后将与线路同时封装;线路及电子零件转印到封装绝缘层后,移除暂时载板以降低厚度。The present invention has at least the following characteristics that help reduce the size of the final electronic product: the electronic parts are buried in the packaging insulating layer; After printing onto the package insulation, the temporary carrier is removed to reduce thickness.
依据一实施例,本发明提供一种印刷电路板的形成方法,包含提供一载板;形成一第一线路于载板上;沉积一薄膜于载板上;利用薄膜建造一电子零件于载板上,电子零件电连接第一线路;毯覆式地形成一介电层以包覆电子零件;去除介电层的一部分以使电子零件的一上表面露出;形成一第二线路于介电层上,第二线路电连接电子零件;形成一绝缘层以覆盖第二线路及介电层;及移除载板。According to an embodiment, the present invention provides a method for forming a printed circuit board, including providing a carrier board; forming a first circuit on the carrier board; depositing a film on the carrier board; using the film to construct an electronic component on the carrier board On the top, the electronic parts are electrically connected to the first circuit; a dielectric layer is blanket-formed to cover the electronic parts; a part of the dielectric layer is removed to expose an upper surface of the electronic parts; a second circuit is formed on the dielectric layer On, the second circuit is electrically connected with electronic components; an insulating layer is formed to cover the second circuit and the dielectric layer; and the carrier board is removed.
依据另一实施例,本发明提供一种印刷电路板的形成方法,包含提供一载板;形成一第一线路于载板上;建造一电子零件于载板上,电子零件电连接第一线路;毯覆式地形成一介电层以包覆电子零件;去除介电层的一部分以使电子零件的一上表面露出;形成一第二线路于介电层上,第二线路电连接电子零件;形成一绝缘层以覆盖该第二线路及该介电层;及移除该载板。According to another embodiment, the present invention provides a method for forming a printed circuit board, including providing a carrier board; forming a first circuit on the carrier board; building an electronic component on the carrier board, and the electronic component is electrically connected to the first circuit ; Blanket-type formation of a dielectric layer to cover the electronic components; removing a part of the dielectric layer to expose an upper surface of the electronic components; forming a second circuit on the dielectric layer, the second circuit electrically connected to the electronic components ; forming an insulating layer to cover the second circuit and the dielectric layer; and removing the carrier.
附图说明 Description of drawings
图1显示已知的印刷电路板与电子零件互连的示意图。FIG. 1 shows a schematic diagram of a known interconnection of a printed circuit board and electronic components.
图2A至2I为本发明第一实施例的埋有电子零件的印刷电路板的制作过程示意图。2A to 2I are schematic diagrams of the manufacturing process of the printed circuit board embedded with electronic components according to the first embodiment of the present invention.
图3A至3D为本发明第二实施例的埋有电子零件的印刷电路板的制作过程示意图。3A to 3D are schematic diagrams of the manufacturing process of the printed circuit board embedded with electronic components according to the second embodiment of the present invention.
图4A至4C为本发明第三实施例的埋有电子零件的印刷电路板的制作过程示意图。4A to 4C are schematic diagrams of the manufacturing process of the printed circuit board embedded with electronic components according to the third embodiment of the present invention.
附图标记说明Explanation of reference signs
10 印刷电路板10 printed circuit board
11 线路11 Lines
20 集成电路20 integrated circuits
21 引脚21 pins
30 被动元件30 passive components
200 载板200 carrier board
201 第一线路201 First Line
202 薄膜202 film
202a 一端202a One end
203 发光结构层203 Luminous structure layer
203a 上表面203a upper surface
204 第一电性半导体层204 The first electrical semiconductor layer
205 发光层205 luminous layer
206 第二电性半导体层206 Second electrical semiconductor layer
210 介电层210 Dielectric layer
220 第二线路220 Second Line
230 绝缘层230 insulation layer
300 载板300 carrier board
301 第一线路301 First Line
302 薄膜302 film
302a 一端302a One end
303 晶体管结构303 Transistor structure
303a 上表面303a upper surface
304 源极304 source
305 漏极305 drain
306 栅极绝缘层306 Gate insulating layer
307 栅极307 grid
310 介电层310 Dielectric layer
320 第二线路320 Second Line
330 色缘层330 color edge layer
400 载板400 carrier board
401 第一线路401 first line
403 电致发光体结构403 Electroluminescent structure
403a 上表面403a upper surface
404 电子注入层404 electron injection layer
405 电子传导层405 Electronic conducting layer
406 电致发光层406 electroluminescent layer
407 空穴传输层407 hole transport layer
408 空穴注入层408 hole injection layer
410 介电层410 Dielectric layer
420 第二线路420 Second Line
430 绝缘层430 insulation layer
具体实施方式 Detailed ways
以下将参考所附图示示范本发明的优选实施例。所附图示中相似元件采用相同的元件符号。应注意为清楚呈现本发明,所附图示中的各元件并非按照实物的比例绘制,而且为避免模糊本发明的内容,以下说明亦省略已知的零组件、相关材料、及其相关处理技术。A preferred embodiment of the invention will be exemplified below with reference to the accompanying drawings. Similar elements in the attached figures are provided with the same reference numerals. It should be noted that in order to clearly present the present invention, the components in the accompanying illustrations are not drawn according to the scale of the actual object, and in order to avoid obscuring the content of the present invention, the following description also omits known components, related materials, and related processing techniques .
图2A至2I为本发明的第一实施例,例示具有埋入式发光二极管的印刷电路板的制作流程。参考图2A,提供一载板200并形成一第一线路201于载板200上。载板200可为任何合适的基板,尤以导电金属基板为佳,例如铜箔基板或不锈钢的薄合金板。第一线路201的形成可利用已知印刷电路板工艺。举例而言,可在载板200上涂布干膜;然后将干膜图案化以露出底下的载板200的表面;接着以干膜为掩模电镀导体材料如铜镍等于露出的载板200的表面上;然后再将干膜剥除即可形成第一线路201。2A to 2I are the first embodiment of the present invention, illustrating the fabrication process of a printed circuit board with embedded LEDs. Referring to FIG. 2A , a
参考图2B,沉积一薄膜202于载板200上。优选而言,薄膜202直接形成在载板200的表面上,薄膜202具有一端202a连接第一线路201。薄膜202为后续所要形成的发光二极管的生长基底。以生长发光二极管外延层为例,薄膜202的材料可为砷化镓(GaAs)、磷化铟(InP)、磷化镓(GaP)、蓝宝石(sapphire)、碳化硅(SiC)等。薄膜202可具有图案化外形。薄膜202的形成可采用合适的薄膜沉积与掩模技术,例如已知的溅镀、气相沉积或网板印刷等工艺。Referring to FIG. 2B , a
参考图2C,以薄膜202为基底,利用已知的外延技术及半导体沉积技术形成发光结构层203于载板200上。发光结构层203可包含数个外延层如一第一电性半导体层204、发光层205及一第二电性半导体层206。举例而言,第一电性半导体层204可为n型(AlxGa1-x)0.5In0.5P外延层;发光层205包为未经掺杂的(AlxGa1-x)0.5In0.5P外延层,且第二电性半导体层206可为p型(AlxGa1-x)0.5In0.5P外延层。可控制薄膜202、第一电性半导体层204与第一线路201的相对厚度,以使第一电性半导体层204电性连接第一线路201。应注意,发光层205及一第二电性半导体层206不能接触到第一线路201,否则将使发光结构层203失去功能。除了上述的各外延层外,发光结构层203还可包含其它功能性的结构,例如欧姆接触层、阻障层、及反射层等等。Referring to FIG. 2C , the
参考图2D,毯覆式地形成一介电层210包覆发光结构层203及第一线路201。介电层210优选则可选自旋涂玻璃、硅树脂、环氧树脂(Epoxy)、聚亚酰胺(polyimide)、或过氟环丁烷(prefluorocyclobutane,PFCB)等。可利用已知的精密涂布工艺完成此步骤。应注意在执行此步骤之前,发光结构层203未经封装。Referring to FIG. 2D , a
参考图2E,以合适化学机械抛光技术去除介电层210的一部分,使发光结构层203的一上表面203a露出。接着,参考图2F,形成一第二线路220于介电层210上,并经由适当地控制使第二线路220电连接发光结构层203。举例而言,可先形成图案化的干膜于介电层210及发光结构层203的上表面203a上;然后以此图案化干膜作为掩模,利用溅镀技术注入导电材料晶种;接着,透过此品种执行电镀工艺以形成第二线路220于介电层210的表面上,此第二线路220并同时接触发光结构层203的上表面203a以达成电连接。除此以外,也可使用网板印刷工艺,将导体材料如铜膏银膏等印制于介电层210上以形成第二线路220。Referring to FIG. 2E , a part of the
接着,参考图2G,毯覆式地形成一绝缘层230以连结第二线路220、发光结构层203及介电层210。绝缘层230的材料可为聚酯类、聚亚酰胺(polyimide)类,其中可含合适的有机补强材料。可以涂布的方式形成绝缘层230,或将上述材料压合成片再粘贴至第二线路220及发光结构层203的表面上。可适当地调整绝缘层230的厚度及强度,使其足以作为上述的各元件的支撑层,如此即可将载板200移除,形成如图2H所示的结构。载板200的移除可用已知的蚀刻技术。Next, referring to FIG. 2G , an insulating
图2I显示继图2H之后的选择性步骤。如图所示,可利用蚀刻将薄膜202移除,因薄膜202可能是吸光材料,故将其移除可增加发光二极管的亮度。此外,如图所示,可视需要适当地研磨绝缘层230而使第二线路220露出。Figure 2I shows an optional step following Figure 2H. As shown in the figure, the
经由上述应可了解,本发明并非直接将已制作完成的电子零件(例如是一般已经完成封装的电子零件)整体地粘装于载板上。本发明是提供一种整合印刷电路板工艺与半导体工艺或其它电子零件工艺的方法。简言之,本发明是先利用印刷电路板工艺形成一道外接线路于载板上,然后直接在载板上利用半导体工艺或其它电子零件工艺逐步建立电子零件的主要结构;之后再利用印刷电路板工艺形成另一道外接线路与电子零件电连接。本发明第一实施例的电子零件以发光二极管作示范,然应了解除了发光二极管,第一实施例所揭示的方法也适用于其他二极管,如PN接合二极管、光电二极管(photodiode)、及激光二极管。It should be understood from the above that the present invention does not directly glue the completed electronic components (such as generally packaged electronic components) onto the carrier board as a whole. The present invention provides a method for integrating printed circuit board technology with semiconductor technology or other electronic parts technology. In short, the present invention uses the printed circuit board technology to form an external circuit on the carrier board, and then directly uses the semiconductor technology or other electronic parts technology to gradually build the main structure of the electronic parts on the carrier board; and then uses the printed circuit board The process forms another external connection circuit to be electrically connected with the electronic parts. The electronic components of the first embodiment of the present invention are demonstrated with light-emitting diodes, but it should be understood that in addition to light-emitting diodes, the method disclosed in the first embodiment is also applicable to other diodes, such as PN junction diodes, photodiodes, and laser diodes .
图3A至3D例示本发明的第二实施例。第二实施例与第一实施例的差别在于其所埋入的电子零件为一晶体管。详言之,如图3A所示,提供一载板300并形成一第一线路301于载板300上。接着参考图3B,沉积一薄膜302于载板300上。优选而言,薄膜302直接形成在载板300的表面上,薄膜302具有一端302a连接第一线路301。薄膜302为后续所要形成的半导体晶体管的成长基底。以此为例,薄膜302的材料可为硅(Si)、砷化镓(GaAs)、磷化铟(InP)、磷化镓(GaP)、蓝宝石(sapphire)、碳化硅(SiC)等。薄膜302的形成可采用合适的已知技术,例如溅镀、气相沉积或网板印刷等工艺。3A to 3D illustrate a second embodiment of the present invention. The difference between the second embodiment and the first embodiment is that the embedded electronic component is a transistor. Specifically, as shown in FIG. 3A , a
参考图3C,以薄膜302为基底,利用已知的半导体技术及合适的半导体材料形成晶体管结构303。晶体管结构303包含源极304、漏极305、栅极绝缘层306及栅极307,其中源极304及漏极305分别连接第一线路301。图3C之后续步骤则与第一实施例类似。如图3D所示,毯覆式地形成一介电层310以包覆倒装片体管结构303及第一线路301,应注意在执行此步骤之前,晶体管结构303未经封装。然后,以合适化学机械抛光技术去除介电层310的一部分,使晶体管结构303的一上表面303a露出。接着,形成一第二线路320于介电层310上,并经由适当地控制使第二线路320电连接晶体管结构303。接着,毯覆式地形成一绝缘层330以连结第二线路320、晶体管结构303及介电层310。可适当地调整绝缘层330的厚度及强度,使其足以作为上述的各元件的支撑层,最后再将载板300移除。Referring to FIG. 3C , a
本发明第二实施例的电子零件以MOS晶体管作示范,然应了解MOS晶体管以外的其他晶体管如双极性晶体管、CMOS晶体管等也适用于本发明。The electronic components of the second embodiment of the present invention are exemplified by MOS transistors, but it should be understood that other transistors such as bipolar transistors and CMOS transistors are also applicable to the present invention.
图4A至4C例示本发明的第三实施例。第三实施例与前述两个实施例的差别在于其电子零件的制作方法不含形成薄膜202及302等作为生长基底的步骤。换言之,制作本发明的埋入式电子零件也可用非高温的工艺,例如真空蒸镀法、旋转涂布法或印刷工艺(Printing Process),网印(Screen Printing)、喷墨印(Inkjet Printing)及接触印刷(Contact Printing)等等。第三实施例的电子零件即以电致发光体(Electroluminescence)为例。详言之,如图4A所示,提供一载板400并形成一第一线路401于载板400上。接着参考图4B,利用上述的蒸镀、涂布或印刷技术合并适当的掩模技术形成电致发光体结构403。电致发光体结构403包含电子注入层404、电子传导层405、电致发光层406、空穴传输层407、及空穴注入层408。电子注入层404的材料可为掺杂碱性金属的有机材料;电子传导层405可为恶二唑(Oxadiazole)、三唑(Triazoles)、或邻二氮杂菲(Phenanthroline);电致发光层406可为含各种荧光色素的高分子;空穴传输层407可为烯丙基胺类化合物;空穴注入层408可为掺杂路易士酸的有机材料。图4B之后续步骤则与第一实施例及第二实施例类似。如图4C所示,毯覆式地形成一介电层410以包覆电电致发光体结构403及第一线路401,应注意在执行此步骤之前,电致发光体结构403未经封装。然后,以合适化学机械抛光技术去除介电层410的一部分,使电致发光体结构403的一上表面403a露出。接着,形成一第二线路420于介电层410上,并经由适当地控制使第二线路420电连接电致发光体结构403。接着,毯覆式地形成一绝缘层430连结第二线路420、电致发光体结构403及介电层410。可适当地调整绝缘层430的厚度,使其足以作为上述的各元件的支撑层,最后再将载板400移除。4A to 4C illustrate a third embodiment of the present invention. The difference between the third embodiment and the previous two embodiments is that the manufacturing method of the electronic components does not include the step of forming
本发明的前述各实施例的电子零件以发光二极管、晶体管、电致发光体作示范,然应了解除了这些电子零件外,其它适合上述工艺的电子零件,例如光纤传导零件也在本发明的范围中。The electronic parts of the foregoing embodiments of the present invention are demonstrated with light-emitting diodes, transistors, and electroluminescent bodies. However, it should be understood that in addition to these electronic parts, other electronic parts suitable for the above-mentioned process, such as optical fiber conductive parts, are also within the scope of the present invention. middle.
以上所述仅为本发明的优选实施例而已,并非用以限定本发明的权利要求;凡其它未脱离本发明所揭示的精神下所完成的等效改变或修饰,均应包含在下述的申请厚度专利范围内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the claims of the present invention; all other equivalent changes or modifications that do not deviate from the spirit disclosed in the present invention should be included in the following applications Thickness patent range.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200810095810 CN101567326B (en) | 2008-04-24 | 2008-04-24 | Printed circuit board and method of forming the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200810095810 CN101567326B (en) | 2008-04-24 | 2008-04-24 | Printed circuit board and method of forming the same |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101567326A CN101567326A (en) | 2009-10-28 |
CN101567326B true CN101567326B (en) | 2013-04-17 |
Family
ID=41283427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200810095810 Expired - Fee Related CN101567326B (en) | 2008-04-24 | 2008-04-24 | Printed circuit board and method of forming the same |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101567326B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI551207B (en) * | 2014-09-12 | 2016-09-21 | 矽品精密工業股份有限公司 | Substrate structure and fabrication method thereof |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4635356A (en) * | 1984-12-28 | 1987-01-13 | Kabushiki Kaisha Toshiba | Method of manufacturing a circuit module |
US5497033A (en) * | 1993-02-08 | 1996-03-05 | Martin Marietta Corporation | Embedded substrate for integrated circuit modules |
CN1477688A (en) * | 2002-07-31 | 2004-02-25 | 印芬龙科技股份有限公司 | Semiconductor module and method of manufacturing semiconductor module |
CN101102649A (en) * | 2006-07-06 | 2008-01-09 | 三星电机株式会社 | Buried pattern substrate and manufacturing method thereof |
-
2008
- 2008-04-24 CN CN 200810095810 patent/CN101567326B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4635356A (en) * | 1984-12-28 | 1987-01-13 | Kabushiki Kaisha Toshiba | Method of manufacturing a circuit module |
US5497033A (en) * | 1993-02-08 | 1996-03-05 | Martin Marietta Corporation | Embedded substrate for integrated circuit modules |
CN1477688A (en) * | 2002-07-31 | 2004-02-25 | 印芬龙科技股份有限公司 | Semiconductor module and method of manufacturing semiconductor module |
CN101102649A (en) * | 2006-07-06 | 2008-01-09 | 三星电机株式会社 | Buried pattern substrate and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN101567326A (en) | 2009-10-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10340309B2 (en) | Light emitting device | |
US8598617B2 (en) | Methods of fabricating light emitting diode packages | |
US9049797B2 (en) | Electrically bonded arrays of transfer printed active components | |
CN105977232B (en) | In a substrate the method for installing device, the board structure and electronic device of device are installed | |
US20190326330A1 (en) | Micro led display substrate, method for manufacturing the same, and display device | |
US8791548B2 (en) | Optoelectronic semiconductor chip, optoelectronic component and a method for producing an optoelectronic component | |
US7732233B2 (en) | Method for making light emitting diode chip package | |
CN102804419B (en) | For the carrier of luminescent device | |
US7947993B2 (en) | Light emitting device having isolating insulative layer for isolating light emitting cells from each other and method of fabricating the same | |
CN102412197A (en) | Semiconductor device and method of forming conductive tsv with insulating annular ring | |
CN102194717A (en) | Semiconductor device and method of forming insulating layer around semiconductor die | |
WO2008093880A1 (en) | Semiconductor device and method for manufacturing the same | |
KR101230617B1 (en) | Light emitting diode and Method of manufacturing the same | |
KR20200042215A (en) | Light emitting diode, manufacturing method of light emitting diode | |
TWI759839B (en) | Micro-led display device and manufacturing method of the same | |
US20230238252A1 (en) | Manufacturing method of package structure of electronic device | |
US8516693B2 (en) | Printed circuit board with embedded electronic components and methods for the same | |
CN101567326B (en) | Printed circuit board and method of forming the same | |
CN113629095A (en) | Light emitting display device and method for manufacturing light emitting display device | |
JP5548826B2 (en) | Optoelectronic semiconductor component manufacturing method, and optoelectronic semiconductor component | |
US8624269B2 (en) | Radiation-emitting thin-film semiconductor chip and method of producing a radiation-emitting thin film semiconductor chip | |
US20210336110A1 (en) | Optoelectronic semiconductor device having a support element and an electric contact element, an optoelectronic component and a method of producing the optoelectronic semiconductor device | |
US20230109528A1 (en) | Micro-led display device | |
US20240194652A1 (en) | Light emitting device and manufacturing method thereof | |
US8748312B2 (en) | Method of manufacturing substrate for mounting electronic device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130417 Termination date: 20140424 |