CN101562431B - Phase-locking amplifier - Google Patents
Phase-locking amplifier Download PDFInfo
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- CN101562431B CN101562431B CN2009100515435A CN200910051543A CN101562431B CN 101562431 B CN101562431 B CN 101562431B CN 2009100515435 A CN2009100515435 A CN 2009100515435A CN 200910051543 A CN200910051543 A CN 200910051543A CN 101562431 B CN101562431 B CN 101562431B
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Abstract
The invention provides a phase-locking amplifier, which comprises a signal conditioning unit, a phase demodulation unit and a digital-analog sampling unit, wherein the signal conditioning unit performs phase reversion, filtering and pressure partition on an input signal to be detected; the phase demodulation unit multiplies signals output by the signal conditioning unit and a reference signal phase-shifting unit; and the digital-analog sampling unit performs digital-analog conversion on the signal output by the phase demodulation unit to obtain a digital signal and feeds the digital signal back to the reference signal phase-shifting unit. The phase-locking amplifier also comprises the reference signal phase-shifting unit which is used for adjusting the phase of an input reference signal according to the digital signal fed back by the digital-analog sampling unit. Compared with the prior phase-locking amplifier, the phase-locking amplifier provided by the invention is provided with the reference signal phase-shifting unit to count the input reference signals simultaneously according to different phase clocks, thus the phase resolution is multiplied.
Description
Technical Field
The invention relates to a weak signal detection instrument, in particular to a phase-locked amplifier.
Background
When a weak signal to be detected is detected, useless noise and interference always appear, which affects the accuracy and sensitivity of measurement, and particularly when the noise power exceeds the power of the signal to be detected, weak signal detection instruments and equipment are needed to recover or detect the original signal. The invention of the Lock-in Amplifier (LIA for short) makes the weak signal detection technology get the breakthrough of the sign, and greatly promotes the development of the basic science and engineering technology.
The lock-in amplifier is based on coherent detection technology and mainly comprises a signal channel, a reference channel, a correlator and the like. Early lock-in amplifiers were implemented by analog circuits, and with the development of digital technology, hybrid analog and digital lock-in amplifiers appeared. The digital lock-in amplifier realizes the digital signal processing of a core phase-sensitive detector or a demodulator of the lock-in amplifier, has many outstanding advantages (such as the temperature drift problem of the analog lock-in amplifier) compared with the analog lock-in amplifier, is favored, and becomes a hotspot of weak signal detection research at present.
The lock-in amplifier must ensure that the input signal and the reference signal have the same frequency, zero phase difference (or fixed phase difference), and the amplitude should be a constant, and the output dc signal is proportional to the amplitude of the signal to be measured.
Most of the existing analog phase-locked amplifiers adopt a method of changing the resistance value of a resistor of a reference signal trigger circuit to adjust the phase of a reference signal, which is inconvenient and has larger phase noise; while most reference signal processing units of the digital lock-in amplifier are realized by digital reference phase shift, although the phase resolution can reach milli-degree, the phase precision is mostly 0.01 degree. However, in measurement systems with very high requirements for phase noise, such phase noise is not sufficient.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a lock-in amplifier is provided to improve phase resolution.
To solve the above technical problem, the present invention provides a lock-in amplifier, which includes: a signal conditioning unit, a phase demodulation unit and an analog-digital sampling unit, wherein,
the input end of the signal conditioning unit is connected with an input signal, and the output end of the signal conditioning unit is connected with the input end of the phase demodulation unit and used for carrying out phase inversion, filtering and voltage division on the input signal;
two input ends of the phase demodulation unit are respectively connected with the output ends of the signal conditioning unit and the reference signal phase shifting unit, and the output end of the phase demodulation unit is connected with the input end of the analog-digital sampling unit and is used for multiplying the output signals of the signal conditioning unit and the reference signal phase shifting unit;
the reference signal phase shifting unit comprises three input ends, the three input ends are used for respectively receiving the input of a reference signal, the input of a preset phase and the feedback of the analog-digital sampling unit, and the output end is connected with the phase demodulation unit and used for adjusting the phase of an input reference signal according to a digital signal fed back by the analog-digital sampling unit;
the input end of the analog-digital sampling unit is connected with the phase demodulation unit, and the output end of the analog-digital sampling unit is connected with the reference signal phase shifting unit, so that the signals output by the phase demodulation unit are subjected to analog-digital conversion to obtain digital signals and are fed back to the reference signal phase shifting unit.
Further, the reference signal phase shift unit includes: a feedback signal comparing unit, a preset phase holding unit, a phase shift phase self-adjusting unit, a phase shift counting unit and a phase shift output unit, wherein,
the input end of the feedback signal comparison unit is connected with the output end of the analog-digital sampling unit, and the output end of the feedback signal comparison unit is connected to the phase-shifting phase self-adjusting unit;
the input end of the preset phase holding unit receives a signal of a preset phase, and the output end of the preset phase holding unit is connected with the input end of the phase-shifting phase self-adjusting unit and used for storing the preset phase of an external processor and providing the preset phase to the phase-shifting phase self-adjusting unit;
the input end of the phase-shifting phase self-adjusting unit is respectively connected with the output ends of the preset phase holding unit and the feedback signal comparing unit, and the output end of the phase-shifting phase self-adjusting unit is connected with one input end of the phase-shifting output unit, so that the digital signal output from the analog-digital sampling unit is adjusted and provided for the phase-shifting output unit according to the preset phase held by the preset phase holding unit and the signal output by the feedback signal comparing unit;
the input end of the phase-shifting counting unit receives the input of the reference signal, and the output end of the phase-shifting counting unit is connected with the other input end of the phase-shifting output unit and used for counting the input reference signal;
two input ends of the phase-shifting output unit are respectively connected with output ends of the phase-shifting counting unit and the phase-shifting self-adjusting unit, and an output end of the phase-shifting output unit is connected with an input end of the phase demodulating unit, so that the phase-shifting output unit can shift the phase of the reference signal output by the phase-shifting counting unit according to the phase to be adjusted output by the phase-shifting self-adjusting unit, and the reference signal after phase shifting can be obtained and sent to the phase demodulating unit.
Further, the feedback signal comparing unit includes a register and a comparator, wherein,
the comparator is used for comparing a preset default value with a digital signal fed back by the output of the analog-digital sampling unit to obtain an optimal value, generating a phase adjustment signal according to a comparison result and outputting the phase adjustment signal to the phase-shifting phase self-adjustment unit;
the register is used for storing the optimal value obtained by the comparator.
Further, the phase shift counting unit comprises a clock phase shift unit and a counting unit,
the clock phase shifting unit is used for shifting the phase of the counting clock;
the counting unit counts the input reference signals at the same time by clocks of different phases.
Further, the phase demodulation unit includes a band pass filter, a synchronous demodulator, and a low pass filter. Wherein,
the synchronous demodulator is used for multiplying the signal output by the signal conditioning unit and the in-phase square wave of the frequency output by the reference signal phase shifting unit and outputting the result to the low-pass filter;
the low-pass filter signal is used for attenuating the alternating current component of the signal output by the conditioning unit.
Optionally, the phase demodulation unit is an AD630KN chip.
Optionally, the analog-to-digital sampling unit is an AD677 chip.
Optionally, the signal conditioning unit is composed of an amplifier AD8221BR type chip for the signal instrument, an analog switch ADG451BRUZ type chip, and an operational amplifier AD8672ARZ type chip.
Compared with the existing phase-locked amplifier, the phase-locked amplifier provided by the invention has the advantages that the phase-locked amplifier is provided with the reference signal phase shifting unit, the input reference signals are counted by clocks with different phases, and the phase resolution is improved in a multiplied way.
And when the phase-locked amplifier works normally, the digital signal result output by the phase-shifting output unit is fed back to the feedback comparison unit, and the phase-shifting phase of the reference signal is adjusted in real time.
Drawings
FIG. 1 is a schematic diagram of a lock-in amplifier according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a reference signal phase shift unit according to an embodiment of the present invention.
Detailed Description
The lock-in amplifier of the present invention is described below with reference to the accompanying drawings and specific embodiments.
The reference signal in the present invention may be selected from various signals, such as square wave, sine wave, triangular wave, oblique wave, etc., and in this embodiment, the reference signal is selected as a 4KHZ square wave.
Referring to fig. 1, fig. 1 is a schematic diagram of a lock-in amplifier according to an embodiment of the present invention, the lock-in amplifier includes: a signal conditioning unit 1, a phase demodulation unit 2, an analog-to-digital sampling unit 3 and a reference signal phase shifting unit 4, wherein,
the input end of the signal conditioning unit 1 is connected with the input signal, and the output end of the signal conditioning unit is connected with the input end of the phase demodulation unit 2 and used for carrying out phase inversion, filtering and voltage division on the input signal. The signal conditioning unit 1 can be realized by a signal instrument amplifier AD8221BR, an analog switch ADG451BRUZ, and an operational amplifier AD8672 ARZ.
Two input ends of the phase demodulation unit 2 are respectively connected with output ends of the signal conditioning unit 1 and the reference signal phase shifting unit 4, an output end of the phase demodulation unit 2 is connected with an input end of the analog-to-digital sampling unit 3, and the phase demodulation unit 2 is used for multiplying output signals of the signal conditioning unit 1 and the reference signal phase shifting unit 4, and comprises three main links of a band-pass filter (not marked), a synchronous demodulator (not marked) and a low-pass filter (not marked). The band-pass Filter is realized by a three-order Butterworth Filter (Butterworth Filter) and is used for extracting a signal V to be measured output by the signal conditioning unit 1, which is Acos (2 pi ft + theta), and eliminating interference signals, the synchronous demodulator multiplies the signal V to be measured output by the signal conditioning unit 1, which is Acos (2 pi ft + theta), by an in-phase square wave signal with frequency f output by the reference signal phase shifting unit 4, and the output voltage after passing through a low-pass Filter LPF is as follows: <math><mrow><msub><mi>V</mi><mi>f</mi></msub><mo>=</mo><mfrac><mrow><mn>2</mn><mi>A</mi></mrow><mi>π</mi></mfrac><mo>.</mo></mrow></math> the synchronous demodulator of phase demodulation unit 2 is implemented using AD630 KN. The low pass Filter LPF of the phase demodulation unit 2 attenuates the ac component of the signal output by the signal conditioning unit, and at the same time, a certain bandwidth must be ensured, and a third-order Bessel Filter (Bessel Filter) is used for implementation. Output voltage of phase demodulation unit 2 <math><mrow><msub><mi>V</mi><mi>f</mi></msub><mo>=</mo><mfrac><mrow><mn>2</mn><mi>A</mi></mrow><mi>π</mi></mfrac></mrow></math> As input to an analog-to-digital sampling unit 3。
The input end of the analog-to-digital sampling unit 3 is connected to the phase demodulation unit 2, and the output end is connected to the reference signal phase shift unit 4, so as to perform analog-to-digital conversion (a/D conversion) on the signal output by the phase demodulation unit 2 to obtain an output signal 30, where the output signal 30 is a digital signal, and simultaneously feed back the output digital signal 30 to the reference signal phase shift unit 4. The reference signal phase shift unit 4 dynamically adjusts the phase of the reference signal in real time according to the feedback signal, and reduces the phase noise to the maximum extent. In this embodiment, the analog-to-digital sampling unit 3 is implemented by using AD 677.
Referring to fig. 2, a reference signal phase shift unit according to an embodiment of the invention is shown. The reference signal phase shift unit 4 adjusts the phase of the input reference signal according to the digital signal 30 output from the analog-to-digital sampling unit 3. The reference signal phase shift unit 4 has 3 input signals: the reference signal, the preset signal and the digital signal 30 output by the analog-to-digital sampling unit 3 are adjusted in phase to obtain an output signal: a phase-shifted reference signal. The reference signal phase shift unit of this embodiment mainly includes a phase shift counting unit 43, a preset phase holding unit 42, a feedback signal comparing unit 41, a phase shift self-adjusting unit 44, and a phase shift output unit 45, wherein:
the reference signal is an input signal to the phase shift counting unit 43, triggering the phase shift counting unit 43 and starting counting the reference signal. The phase shift counting unit 43 includes two parts, a clock phase shift unit (not shown) and a counting unit (not shown). The counting unit is provided with a counting clock, wherein the clock phase shifting unit is used for shifting the phase of the counting clock, and the counting unit counts the input reference signals by the clocks with different phases at the same time.
The input end of the phase shift counting unit 43 receives the input of the reference signal, the output end of the phase shift counting unit 43 is connected to the other input end of the phase shift output unit 45, the reference signal output by the phase shift counting unit 43 is used as the input of the phase shift output unit 45, and the phase shift output unit 45 is used for adjusting the reference signal output by the phase shift counting unit 43 and the phase to be adjusted output by the phase shift self-adjusting unit 44, so as to obtain the adjusted reference signal and send the adjusted reference signal to the phase demodulation unit 2.
The input end of the preset phase holding unit 42 receives a signal of a preset phase, the preset phase holding unit 42 uses a register to hold the preset phase of the external processor, and the output of the preset phase holding unit 42 is the input of the phase shifting phase self-adjusting unit 44.
The input end of the feedback signal comparing unit 41 is connected with the output end of the analog-digital sampling unit 3, and the output end is connected to the phase-shifting phase self-adjusting unit 44; the feedback signal comparing unit 41 includes a register (not shown) and a comparator (not shown), wherein the comparator is configured to compare a preset default value with the digital signal fed back from the output of the analog-to-digital sampling unit 3 to obtain a maximum value, generate a phase adjustment signal according to the comparison result, and output the phase adjustment signal to the phase-shifting self-adjusting unit 44, and the register is configured to store the maximum value obtained by the comparator. The specific comparison process is as follows: when the value in the register is larger than the value in the comparator, the value of the register is given to the comparator; when the value in the register is less than or equal to the value in the comparator, the value of the comparator remains unchanged.
The output of the preset phase holding unit 42 and the output of the feedback signal comparing unit 41 are simultaneously input to the phase shift phase self-adjusting circuit 44.
The input end of the phase shift self-adjusting unit 44 is connected to the output ends of the preset phase holding unit 42 and the feedback signal comparing unit 41, respectively, and the output end is connected to an input end of the phase shift output unit 45, so as to adjust the digital signal output from the analog-to-digital sampling unit 3 according to the preset phase held by the preset phase holding unit 42 and the signal output by the feedback signal comparing unit 41, and provide the adjusted digital signal to the phase shift output unit 45.
Two input ends of the phase shift output unit 45 are respectively connected with the output ends of the phase shift counting unit 43 and the phase shift self-adjusting unit 44, and the output end is connected with the input end of the phase demodulating unit 2.
When the counted phase of the phase shift output unit 45 is equal to the phase shift phase output from the phase shift phase self-adjusting unit 44, the phase-shifted reference signal is output to the phase demodulating unit 2. The whole reference signal phase shift unit 4 can be implemented by using EP2C35F484 chip.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are given by way of illustration of the principles of the present invention, and that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (8)
1. A lock-in amplifier, comprising: signal conditioning unit, phase place demodulation unit, modulus sampling unit, its characterized in that: the lock-in amplifier further comprises a reference signal phase shifting unit, wherein,
the input end of the signal conditioning unit is connected with an input signal, and the output end of the signal conditioning unit is connected with the input end of the phase demodulation unit and used for carrying out phase inversion, filtering and voltage division on the input signal;
two input ends of the phase demodulation unit are respectively connected with the output ends of the signal conditioning unit and the reference signal phase shifting unit, and the output end of the phase demodulation unit is connected with the input end of the analog-digital sampling unit and is used for multiplying the output signals of the signal conditioning unit and the reference signal phase shifting unit;
the reference signal phase shifting unit comprises three input ends, the three input ends are used for respectively receiving the input of a reference signal, the input of a preset phase and the feedback of the analog-digital sampling unit, and the output end is connected with the phase demodulation unit and used for adjusting the phase of an input reference signal according to a digital signal fed back by the analog-digital sampling unit;
the input end of the analog-digital sampling unit is connected with the phase demodulation unit, and the output end of the analog-digital sampling unit is connected with the reference signal phase shifting unit, so that the signals output by the phase demodulation unit are subjected to analog-digital conversion to obtain digital signals and are fed back to the reference signal phase shifting unit.
2. The lock-in amplifier of claim 1, wherein: the reference signal phase shift unit includes: a feedback signal comparing unit, a preset phase holding unit, a phase shift phase self-adjusting unit, a phase shift counting unit and a phase shift output unit, wherein,
the input end of the feedback signal comparison unit is connected with the output end of the analog-digital sampling unit, and the output end of the feedback signal comparison unit is connected to the phase-shifting phase self-adjusting unit;
the input end of the preset phase holding unit receives a signal of a preset phase, and the output end of the preset phase holding unit is connected with the input end of the phase-shifting phase self-adjusting unit and used for storing the preset phase of an external processor and providing the preset phase to the phase-shifting phase self-adjusting unit;
the input end of the phase-shifting phase self-adjusting unit is respectively connected with the output ends of the preset phase holding unit and the feedback signal comparing unit, and the output end of the phase-shifting phase self-adjusting unit is connected with one input end of the phase-shifting output unit, so that the digital signal output from the analog-digital sampling unit is adjusted and provided for the phase-shifting output unit according to the preset phase held by the preset phase holding unit and the signal output by the feedback signal comparing unit;
the input end of the phase-shifting counting unit receives the input of the reference signal, and the output end of the phase-shifting counting unit is connected with the other input end of the phase-shifting output unit and used for counting the input reference signal;
two input ends of the phase-shifting output unit are respectively connected with output ends of the phase-shifting counting unit and the phase-shifting self-adjusting unit, and an output end of the phase-shifting output unit is connected with an input end of the phase demodulating unit, so that the phase-shifting output unit can shift the phase of the reference signal output by the phase-shifting counting unit according to the phase to be adjusted output by the phase-shifting self-adjusting unit, and the reference signal after phase shifting can be obtained and sent to the phase demodulating unit.
3. The lock-in amplifier of claim 2, wherein: the feedback signal comparing unit includes a register and a comparator, wherein,
the comparator is used for comparing a preset default value with the digital signal output by the analog-digital sampling unit to obtain a maximum value, generating a phase adjustment signal according to a comparison result and outputting the phase adjustment signal to the phase-shifting phase self-adjustment unit;
the register is used for storing the optimal value obtained by the comparator.
4. The lock-in amplifier of claim 2, wherein: the phase shift counting unit comprises a clock phase shift unit and a counting unit, the counting unit is provided with a counting clock,
the clock phase shifting unit is used for shifting the phase of the counting clock;
the counting unit counts the input reference signals at the same time by clocks of different phases.
5. The lock-in amplifier of claim 1, wherein: the phase demodulation unit includes a band pass filter, a synchronous demodulator, and a low pass filter, wherein,
the band-pass filter is used for extracting the signal output by the signal conditioning unit and eliminating an interference signal;
the synchronous demodulator is used for multiplying the signal output by the signal conditioning unit and the in-phase square wave output by the reference signal phase shifting unit and outputting the result to the low-pass filter;
the low-pass filter is used for attenuating the alternating current component of the signal output by the signal conditioning unit.
6. The lock-in amplifier of claim 1 or 5, wherein: the phase demodulation unit is an AD630KN chip.
7. The lock-in amplifier of claim 1, wherein: the analog-digital sampling unit is an AD677 type chip.
8. The lock-in amplifier of claim 1, wherein: the signal conditioning unit consists of an amplifier AD8221BR type chip for a signal instrument, an analog switch ADG451BRUZ type chip and an operational amplifier AD8672ARZ type chip.
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| CN101964633B (en) * | 2010-10-22 | 2013-09-11 | 天津大学 | Lock-in amplifier circuit for detecting terahertz pulse signals |
| CN103095249B (en) * | 2011-10-28 | 2016-03-30 | 上海微电子装备有限公司 | A kind of Median Filter Circuit and method |
| CN103107788B (en) * | 2012-11-06 | 2016-05-18 | 苏州聚阳环保科技股份有限公司 | A kind of two lock-in amplifiers for water quality monitoring equipment and signal processing method and water quality monitoring equipment |
| CN103344610A (en) * | 2013-07-03 | 2013-10-09 | 邱宁 | CDMA (code division multiple access) forward scatter visibility detector and detection method |
| CN108227541B (en) * | 2016-12-14 | 2020-11-13 | 中国航空工业集团公司西安航空计算技术研究所 | Discontinuous analog differential signal frequency and phase acquisition method |
| CN106685633B (en) * | 2016-12-30 | 2021-02-09 | 重庆邮电大学 | Full digital phase-shift micro signal phase-lock detection method and equipment |
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