CN101556966B - MOS tube capable of reducing damage effect of plasma - Google Patents
MOS tube capable of reducing damage effect of plasma Download PDFInfo
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- CN101556966B CN101556966B CN2008100358980A CN200810035898A CN101556966B CN 101556966 B CN101556966 B CN 101556966B CN 2008100358980 A CN2008100358980 A CN 2008100358980A CN 200810035898 A CN200810035898 A CN 200810035898A CN 101556966 B CN101556966 B CN 101556966B
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- 230000006378 damage Effects 0.000 title claims abstract description 48
- 230000000694 effects Effects 0.000 title claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 177
- 239000000758 substrate Substances 0.000 claims abstract description 56
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 15
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 15
- 239000010703 silicon Substances 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims description 56
- 239000004020 conductor Substances 0.000 claims description 27
- 125000006850 spacer group Chemical group 0.000 claims description 2
- 230000002411 adverse Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000009931 harmful effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 150000001450 anions Chemical class 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
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Abstract
The invention provides an MOS tube capable of reducing damage effect of plasma. The MOS tube is made on a silicon substrate and comprises a grid source drain, a grid metal pad connected with a grid and a substrate metal pad connected with the silicon substrate. In the prior art, only the grid metal pad is provided with a metal jumper. When the minimum characteristic size and grid oxide thickness continuously reduce, adverse effects on the quality and the reliability of the MOS tube by the damage effect of plasma on the substrate metal pad increase gradually. The grid metal pad is divided into an upper part and a lower part from a lead of the first layer divided into a first lead segment and a second lead segment which are respectively connected with the upper part and the lower part; the first metal jumper is arranged between the first lead segment and the second lead segment in a crossing way; the substrate metal pad is divided into an upper part and a lower part from a lead of the first layer divided into a third lead segment and a fourth lead segment which are respectively connected with the upper part and the lower part; and the second metal jumper is arranged between the thirdlead segment and the fourth lead segment in a crossing way. The invention can greatly improve the quality and the reliability of the MOS tube.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of metal-oxide-semiconductor that reduces damage effect of plasma.
Background technology
In field of semiconductor manufacture, all can use plasma in many technologies such as etching technics, ion implantation technology and chemical vapor deposition method, externally electrically should presenting that plasma is total in theory is neutral, that is to say that cation and anion are equivalent, but the negative ions that in fact enters wafer is not an equivalent at regional area, so will produce a large amount of free electric charges.Plain conductor in the wafer or polysilicon conductors such as (polysilicon) is with regard to image antenna, it can collect those free electric charges, those antennas are long more, the electric charge of collecting is many more, when the electric charge of collecting arrives to a certain degree more, will discharge, above-mentioned phenomenon is exactly usually said damage effect of plasma.Along with constantly reducing of semiconductor device minimum feature size, the thickness of mos field effect transistor (abbreviation metal-oxide-semiconductor) gate oxide also constantly reduces.The discharge that those free charge produced easily produces plasma damage on the metal-oxide-semiconductor gate oxide, thereby the electric leakage that has increased metal-oxide-semiconductor can cause scrapping of metal-oxide-semiconductor when serious.
Referring to Fig. 1, it has shown the composition structural representation of the metal-oxide-semiconductor in the prior art one, as shown in the figure, metal-oxide-semiconductor is produced on the silicon substrate 1, and it has grid source-drain electrode G, S and D and the gate metal pad P1 and the substrate metal pad P2 that are arranged among the metal level M and link to each other with silicon substrate 1 with grid G respectively, metal level M has ground floor metal M 1, second layer metal M2, second layer metal M3, ..., top-level metallic TM, this ground floor metal M 1 is connected on grid G or the silicon substrate 1 by the first contact hole plug layer V1, this second layer metal M2 and three-layer metal M3 are respectively by the second and the 3rd contact hole plug layer V2, V3 is connected first, second layer metal M1, on the M2, other metal interlevels also interconnect by its corresponding contact hole plug layer.This gate metal pad P1 has ground floor lead W11, second layer lead W12, the 3rd layer conductor W13, ..., top layer lead TW1, this substrate metal pad P2 has ground floor lead W21, second layer lead W22, the 3rd layer conductor W23, ..., top layer lead TW2, this ground floor lead W11 and W21 all are arranged in the ground floor metal M 1 of metal level M, this top layer lead TW1 and TW2 all are arranged in the top-level metallic TM of metal level M, and the lead that this gate metal pad P1 and substrate metal pad P2 are had is the one plain conductor, in addition, all be connected between this gate metal pad P1 and conductor layer that substrate metal pad P2 is had by the contact hole plug layer.
But when the gate metal pad P1 that makes as shown in Figure 1, can on gate oxide, produce damage and defective because of damage effect of plasma.For reducing the harmful effect of damage effect of plasma to metal-oxide-semiconductor, prior art two has proposed to be provided with the technical scheme of a metal jumper on the ground floor lead W11 of gate metal pad P1, Fig. 2 has shown the composition structure of metal jumper, metal jumper have ground floor lead W1, second layer lead W2 ..., top layer lead TW, be connected with the contact hole plug layer on the ground floor lead W1 and metal jumper be arranged on the position that pre-sets, also connect between each layer conductor of metal jumper by the contact hole plug layer by this contact hole plug layer.
Fig. 3 has shown the composition structure of the metal-oxide-semiconductor in the prior art two, referring to Fig. 3, and combination is referring to Fig. 1 and Fig. 2, gate metal pad P1 is separated into two parts up and down from its ground floor lead W11, and this ground floor lead W11 is separated into respectively and these first and second conducting line segment W111 and W112 of being connected of two parts up and down, the first metal jumper MJ1 is crossed between the first and second conducting line segment W111 and W112, this first metal jumper MJ1 has ground floor lead W31, second layer lead W32, ..., top layer lead TW3, this ground floor lead W31 is arranged in the second layer metal M2 of metal level M, this top layer lead TW3 is arranged in the top-level metallic TM of metal level M, this top layer lead TW3 is an one plain conductor, the lead of remainder layer (comprising leads such as ground floor lead W31 and second layer lead W32) includes to be separated and is separately positioned on two separated wires on the first conducting line segment W111 and the second conducting line segment W112, this gate metal pad P1, all be connected between substrate metal pad P2 and conductor layer that the first metal jumper MJ1 is had by the contact hole plug layer.
But along with constantly reducing of minimum feature size and gate oxide thickness, damage effect of plasma on the substrate metal pad P2 on gate oxide, produce damage and the possibility of defective increasing, and consequent metal-oxide-semiconductor leakage current is excessive and the metal-oxide-semiconductor condition of poor gets more and more.
Therefore, damage effect of plasma when making the substrate metal pad when how to provide a kind of metal-oxide-semiconductor that reduces damage effect of plasma constantly to reduce with reply minimum feature size and gate oxide thickness is to the destruction of gate oxide, and effectively reduce the leakage current of metal-oxide-semiconductor and improve the reliability of metal-oxide-semiconductor, become the technical problem that industry needs to be resolved hurrily.
Summary of the invention
The object of the present invention is to provide a kind of metal-oxide-semiconductor that reduces damage effect of plasma, can effectively reduce damage effect of plasma to the leakage current of metal-oxide-semiconductor and the harmful effect of reliability by described metal-oxide-semiconductor, reduce the reliability of the leakage current and the raising metal-oxide-semiconductor of metal-oxide-semiconductor greatly.
The object of the present invention is achieved like this: a kind of metal-oxide-semiconductor that reduces damage effect of plasma, be produced on the silicon substrate, gate metal pad and substrate metal pad that it has the grid source-drain electrode and is arranged in the metal level and is connected with silicon substrate with grid respectively, this gate metal pad comprises the ground floor lead, second layer lead is to the top layer lead, this gate metal pad is separated into two parts up and down from its ground floor lead, and its ground floor lead is separated into first and second conducting line segments, first metal jumper is crossed between this first and second conducting line segment, this first conducting line segment is connected with the second layer lead of this gate metal pad, this second conducting line segment is connected with this first conducting line segment by this first metal jumper, this substrate metal pad comprises the ground floor lead, second layer lead is to the top layer lead, this substrate metal pad is separated into two parts up and down from its ground floor lead, and its ground floor lead is separated into third and fourth conducting line segment, second metal jumper is crossed between this third and fourth conducting line segment, this privates section is connected with the second layer lead of this substrate metal pad, and this privates section is connected with this privates section by this second metal jumper.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, the ground floor lead of this gate metal pad and substrate metal pad all is arranged in the ground floor metal of metal level, and this gate metal pad and substrate metal spacer have the conductor layer of equal number.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, the ground floor lead of this first, second metal jumper all is arranged in the second layer metal of metal level, and this first, second metal jumper has the conductor layer of equal number.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, the top layer lead of this gate metal pad, substrate metal pad and first, second metal jumper all is arranged in the top layer metallic layer of metal level.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, the top layer lead of this first metal jumper is an one plain conductor, the remainder layer lead be separate and be separately positioned on first conducting line segment and second conducting line segment on two separated wires.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, the top layer lead of this second metal jumper is an one plain conductor, and the remainder layer lead is to be separated and be separately positioned on two separated wires on privates section and the privates section.
In the metal-oxide-semiconductor of above-mentioned reduced damage effect of plasma, all be connected between the conductor layer that this gate metal pad, substrate metal pad, first metal jumper and second metal jumper are had by the contact hole plug layer.
With in the substrate metal pad that links to each other with silicon substrate, metal jumper is not set in the prior art, easily cause the damage effect of plasma damage gate oxide that when making the substrate metal pad, is occurred, the metal-oxide-semiconductor leakage current is excessive to be compared with the metal-oxide-semiconductor reliability is low excessively thereby cause, the ground floor lead of the substrate metal pad of the metal-oxide-semiconductor that reduces damage effect of plasma of the present invention is separated into third and fourth conducting line segment, second metal jumper is crossed between this third and fourth conducting line segment, damage effect of plasma is to the destruction of gate oxide in the time of so can reducing greatly to make the substrate metal pad, greatly reduce the leakage current of metal-oxide-semiconductor, and effectively improve the reliability of metal-oxide-semiconductor.
Description of drawings
The metal-oxide-semiconductor that reduces damage effect of plasma of the present invention is provided by following embodiment and accompanying drawing.
Fig. 1 is the composition structural representation of the metal-oxide-semiconductor of prior art one;
Fig. 2 is the composition structural representation of metal jumper;
Fig. 3 is the composition structural representation of the metal-oxide-semiconductor of prior art two;
Fig. 4 is the composition structural representation that reduces the metal-oxide-semiconductor of damage effect of plasma of the present invention.
Embodiment
Below will be described in further detail the metal-oxide-semiconductor that reduces damage effect of plasma of the present invention
Referring to Fig. 4, in conjunction with referring to Fig. 1 to Fig. 3, Fig. 4 has shown the composition structural representation that reduces the metal-oxide-semiconductor of damage effect of plasma of the present invention, as shown in the figure, metal-oxide-semiconductor is produced on the silicon substrate 1, and it has grid source-drain electrode G, S and D and the gate metal pad P1 and the substrate metal pad P2 that are arranged among the metal level M and link to each other with silicon substrate 1 with grid G respectively, metal level M has ground floor metal M 1, second layer metal M2, three-layer metal M3, ..., top-level metallic TM, described ground floor metal M 1 is connected on grid G or the silicon substrate 1 by the first contact hole plug layer V1, described second layer metal M2 and second layer metal M3 are respectively by the second and the 3rd contact hole plug layer V2, V3 is connected first, second layer metal M1, on the M2, other metal interlevels also interconnect by its corresponding contact hole plug layer.
Described gate metal pad P1 have ground floor lead W11, second layer lead W12, the 3rd layer conductor W13 ..., top layer lead TW1, described substrate metal pad P2 have ground floor lead W21, second layer lead W22, the 3rd layer conductor W23 ..., top layer lead TW2, described ground floor lead W11 and W21 all are arranged in the ground floor metal M 1 of metal level M, described top layer lead TW1 and TW2 all are arranged in the top-level metallic TM of metal level M, in addition, all be connected between described gate metal pad P1 and conductor layer that substrate metal pad P2 is had by the contact hole plug layer.
Gate metal pad P1 is separated into two parts up and down from its ground floor lead W11, described ground floor lead W11 correspondingly is separated into first and second conducting line segment W111 and the W112 that are connected with described two parts up and down respectively, the first metal jumper MJ1 is crossed between the first and second conducting line segment W111 and W112, the described first metal jumper MJ1 has ground floor lead W31, second layer lead W32, ..., top layer lead TW3, described ground floor lead W31 is arranged in the second layer metal M2 of metal level M, described top layer lead TW3 is arranged in the top-level metallic TM of metal level M, described top layer lead TW3 is an one plain conductor, the lead of remainder layer (comprising leads such as ground floor lead W31 and second layer lead W32) is to be separated and is separately positioned on two separated wires on the first conducting line segment W111 and the second conducting line segment W112, all connects by the contact hole plug layer between the conductor layer that the described first metal jumper MJ1 is had.
Substrate metal pad P2 is separated into two parts up and down from its ground floor lead W21, described ground floor lead W21 correspondingly is separated into third and fourth conducting line segment W211 and the W212 that is connected with described two parts up and down respectively, the second metal jumper MJ2 is crossed between the third and fourth conducting line segment W211 and W212, the described second metal jumper MJ2 has ground floor lead W41, second layer lead W42, ..., top layer lead TW4, described ground floor lead W41 is arranged in the second layer metal M2 of metal level M, described top layer lead TW4 is arranged in the top-level metallic TM of metal level M, described top layer lead TW4 is an one plain conductor, the lead of remainder layer (comprising leads such as ground floor lead W41 and second layer lead W42) includes to be separated and is separately positioned on two separated wires on privates section W211 and the privates section W212, all connects by the contact hole plug layer between the conductor layer that the described second metal jumper MJ2 is had.
By the process ionic medium body damage effect of making metal-oxide-semiconductor as shown in Figure 4 the metal-oxide-semiconductor Effect on Performance is set forth principle of the present invention and effect to get off, at first on silicon substrate 1, make grid source-drain electrode G, S and the D of metal-oxide-semiconductor; Medium and photoetching thereon and etch the figure of the first contact hole plug layer V1 before the plated metal then; Fill metal plug afterwards and form the first contact hole plug layer V1; Then deposit the ground floor metal again and form the first conducting line segment W111, the second conducting line segment W112, privates section W211 and privates section W212 by photoetching and etching technics, this moment is because ground floor lead W11 and W21 all are separated into two sections, compare with one section situation in the prior art, the damage effect of plasma that is produced when making ground floor lead W11 and W21 reduces greatly; Deposit inter-level dielectric afterwards again and form the second contact hole plug layer V2 by photoetching, etching and depositing operation; And then deposition second layer metal M2 and form the ground floor lead W41 of ground floor lead W31, the second metal jumper MJ2 of second layer lead W12, the first metal jumper MJ1 of gate metal pad P1 and the second layer lead W22 of substrate metal pad P2 by photoetching and etching technics; Continue to make other contact hole plug layer and conductor layers that gate metal pad P1, the first metal jumper MJ1, the second metal jumper MJ2 and substrate metal pad P2 are had according to above-mentioned technology then, up to the top layer lead that processes gate metal pad P1, the first metal jumper MJ1, the second metal jumper MJ2 and substrate metal pad P2.Before the top layer lead of manufacturing, gate metal pad P1 other parts except that the second conducting line segment W112 do not electrically connect with grid G, substrate metal pad P2 other parts except that privates section W212 do not electrically connect with silicon substrate 1, so avoided the plasma damage of the electric charge of the collection of the lead outside the second conducting line segment W112 in the gate metal pad P1 manufacturing process to gate oxide, also avoided the plasma damage of the electric charge of the collection of the lead outside the privates section W212 in the substrate metal pad P2 manufacturing process, so can reduce the influence of damage effect of plasma greatly the metal-oxide-semiconductor q﹠r to gate oxide.
In sum, the ground floor lead of the substrate metal pad of the metal-oxide-semiconductor that reduces damage effect of plasma of the present invention is separated into third and fourth conducting line segment, second metal jumper is crossed between described third and fourth conducting line segment, damage effect of plasma is to the destruction of gate oxide in the time of so can reducing greatly to make the substrate metal pad, greatly reduce the leakage current of metal-oxide-semiconductor, and effectively improve the reliability of metal-oxide-semiconductor.
Claims (7)
1. metal-oxide-semiconductor that can reduce damage effect of plasma, be produced on the silicon substrate, gate metal pad and substrate metal pad that it has the grid source-drain electrode and is arranged in the metal level and is connected with silicon substrate with grid respectively, this gate metal pad comprises the ground floor lead, second layer lead is to the top layer lead, this gate metal pad is separated into two parts up and down from its ground floor lead, and its ground floor lead is separated into first and second conducting line segments, first metal jumper is crossed between this first and second conducting line segment, this first conducting line segment is connected with the second layer lead of this gate metal pad, this second conducting line segment is connected with this first conducting line segment by this first metal jumper, it is characterized in that, this substrate metal pad comprises the ground floor lead, second layer lead is to the top layer lead, this substrate metal pad is separated into two parts up and down from its ground floor lead, and its ground floor lead is separated into third and fourth conducting line segment, second metal jumper is crossed between this third and fourth conducting line segment, this privates section is connected with the second layer lead of this substrate metal pad, and this privates section is connected with this privates section by this second metal jumper.
2. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1, it is characterized in that, the ground floor lead of this gate metal pad and substrate metal pad all is arranged in the ground floor metal of metal level, and this gate metal pad and substrate metal spacer have the conductor layer of equal number.
3. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1, it is characterized in that, the ground floor lead of this first, second metal jumper all is arranged in the second layer metal of metal level, and this first, second metal jumper has the conductor layer of equal number.
4. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1 is characterized in that, the top layer lead of this gate metal pad, substrate metal pad and first, second metal jumper all is arranged in the top layer metallic layer of metal level.
5. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1, it is characterized in that, the top layer lead of this first metal jumper is an one plain conductor, and the remainder layer lead is to be separated and be separately positioned on two separated wires on first conducting line segment and second conducting line segment.
6. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1, it is characterized in that, the top layer lead of this second metal jumper is an one plain conductor, and the remainder layer lead is to be separated and be separately positioned on two separated wires on privates section and the privates section.
7. the metal-oxide-semiconductor that reduces damage effect of plasma as claimed in claim 1 is characterized in that, all is connected by the contact hole plug layer between the conductor layer that this gate metal pad, substrate metal pad, first metal jumper and second metal jumper are had.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2008100358980A CN101556966B (en) | 2008-04-10 | 2008-04-10 | MOS tube capable of reducing damage effect of plasma |
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| CN2008100358980A CN101556966B (en) | 2008-04-10 | 2008-04-10 | MOS tube capable of reducing damage effect of plasma |
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| CN101556966B true CN101556966B (en) | 2010-12-15 |
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| CN102194794B (en) * | 2010-03-05 | 2013-09-11 | 中芯国际集成电路制造(上海)有限公司 | Plasma damage detection structure as well as detection method and formation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1448987A (en) * | 2002-03-28 | 2003-10-15 | 精工爱普生株式会社 | Semiconductor device and manufacture thereof, electro-optic apparatus and electronic machine |
| EP1453093A1 (en) * | 2001-11-05 | 2004-09-01 | Mitsumasa Koyanagi | Semiconductor device comprising low dielectric material film and its production method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1453093A1 (en) * | 2001-11-05 | 2004-09-01 | Mitsumasa Koyanagi | Semiconductor device comprising low dielectric material film and its production method |
| CN1625808A (en) * | 2001-11-05 | 2005-06-08 | 小柳光正 | Semiconductor device using low dielectric constant material film and manufacturing method thereof |
| CN1448987A (en) * | 2002-03-28 | 2003-10-15 | 精工爱普生株式会社 | Semiconductor device and manufacture thereof, electro-optic apparatus and electronic machine |
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