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CN101556189B - Signal processing circuit based on hada code matrix modulation - Google Patents

Signal processing circuit based on hada code matrix modulation Download PDF

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CN101556189B
CN101556189B CN2009100677548A CN200910067754A CN101556189B CN 101556189 B CN101556189 B CN 101556189B CN 2009100677548 A CN2009100677548 A CN 2009100677548A CN 200910067754 A CN200910067754 A CN 200910067754A CN 101556189 B CN101556189 B CN 101556189B
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array
analog multiplier
converter
signal
detector array
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CN101556189A (en
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李辛毅
赵毅强
姚素英
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Tianjin University
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Tianjin University
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Abstract

本发明公开一种基于哈达码矩阵调制的信号处理电路,包括有探测器阵列和A/D转换器,在探测器阵列和A/D转换器之间还设置有依次连接的预放大器阵列、模拟乘法器阵列和多输入复合加法器,其中,探测器阵列的输出连接预放大器阵列的输入端,多输入复合加法器的输出连接A/D转换器的输入端,还设置有控制电路和编码器,所述的控制电路通过I2C总线接收外部的设定控制信号,并分别连接并控制编码器、A/D转换器和探测器阵列,所述的编码器还通过数据总线连接模拟乘法器阵列。本发明整个系统只需要一个A/D转换器。在消耗少量电路功耗和面积的情况下,提高了读出效率和对探测器阵列输出信号的处理速度。增大焦平面阵列,探测元数量的增多使A/D的速度只跟图像处理的帧频有关。

Figure 200910067754

The invention discloses a signal processing circuit based on Hada code matrix modulation, which includes a detector array and an A/D converter, and a sequentially connected preamplifier array, analog A multiplier array and a multi-input composite adder, wherein the output of the detector array is connected to the input of the pre-amplifier array, the output of the multi-input composite adder is connected to the input of the A/D converter, and a control circuit and an encoder are also provided , the control circuit receives an external setting control signal through the I 2 C bus, and is connected to and controls the encoder, the A/D converter and the detector array respectively, and the encoder is also connected to the analog multiplier through the data bus array. The entire system of the present invention requires only one A/D converter. In the case of consuming a small amount of circuit power consumption and area, the readout efficiency and the processing speed of the output signal of the detector array are improved. Enlarging the focal plane array and increasing the number of detection elements make the speed of A/D only related to the frame rate of image processing.

Figure 200910067754

Description

Signal processing circuit based on the Hadamard matrix modulation
Technical field
The present invention relates to a kind of signal Processing of infrared focal plane array sensing circuit.Particularly relate to a kind of Parallel Simulation voltage signal of detector array output can the modulation and be integrated into the single ended serial analog voltage signal, carry out the signal processing circuit based on the Hadamard matrix modulation of digitizing conversion for A/D.
Background technology
Infrared focal plane array is made up of detector array and sensing circuit.The effect of sensing circuit is that the feeble signal of infrared eye output is carried out integration, is transferred to A/D after amplification, denoising and the parallel/serial conversion and carries out the analog signal digital conversion.The performance of sensing circuit will directly influence the quality of infrared focus plane.Along with infrared focal plane array constantly increases, whole imaging system integrated level constantly improves, and the performance and the size of sensing circuit also had higher requirement.The bottleneck that has become the infrared focus plane technology to further develop is we can say in the design of sensing circuit at present.
The infrared focal plane array playback mode is divided into parallel read-out and series read-out dual mode.For the series read-out circuit, the multi-way switch array of displacement row register that external clock drives and the control of displacement column register scans detector array, becomes single-ended analog voltage signal of going here and there out to offer A/D the multidiameter delay analog signal conversion of detector array output and carries out the digitizing conversion.The series read-out mode is low to the processing speed of detector array read output signal.Along with the continuous increase of focal plane arrays (FPA), survey being on the increase of first quantity, also more and more higher to the rate request of MUX and A/D conversion, thus caused the increase of circuit power consumption and area and the difficulty that realizes.In addition, for the series read-out mode, the clock that also exists the big switch arrays that are made of MOS transistor to cause in CMOS technology is burst logical and channel charge injects the error that causes.Can carry out point-to-point processing to the output signal of surveying unit in the detector array for parallel read-out circuit A/D converter, promptly each surveys unit needs an A/D, and concrete being embodied as adopts Pixel-level A/D to carry out the digitizing conversion.The later digital data transmission of Pixel-level A/D conversion can reduce noise greatly, improve Signal Processing speed, but the area of system and power consumption will be very big, seldom adopts in performance application at present.
Summary of the invention
Technical matters to be solved by this invention is, provide a kind of Parallel Simulation voltage signal of detector array output can the modulation to be integrated into the single ended serial analog voltage signal, carry out the digitizing conversion for A/D, solve under the situation that infrared focal plane array increases day by day, the detection unit of detector array increases day by day, adopt the slow problem of scanning series read-out mode reading speed, and be implemented in the signal processing circuit that reduces under the situation that does not influence picture frame frequency the requirement of A/D treatment circuit operating rate based on the Hadamard matrix modulation.
The technical solution adopted in the present invention is: a kind of signal processing circuit based on the Hadamard matrix modulation, include detector array and A/D converter, between detector array and A/D converter, also be provided with prime amplifier array, the analog multiplier array that connects successively and import compound totalizer more, wherein, the output of detector array connects the input end of prime amplifier array, the output of the compound totalizer of many inputs connects the input end of A/D converter, also be provided with control circuit and scrambler, described control circuit passes through I 2The C bus receives outside setting control signal, and connects respectively and controlled encoder, A/D converter and detector array, and described scrambler also connects the analog multiplier array by data bus.
Described detector array is provided with N detector, the prime amplifier array is provided with N prime amplifier, the analog multiplier array is provided with N analog multiplier, and described N is 2 power, and described detector, prime amplifier and analog multiplier are for being connected successively one to one.
The compound totalizer of described many inputs includes single operational amplifier, and the inverting input of described single operational amplifier connects resistor network or capacitance network, in-phase input end ground connection, and output terminal connects inverting input by resistance, the output terminal output signal.
Described resistor network or capacitance network have resistance or the electric capacity identical with analog multiplier number in the analog multiplier array, the connect one to one output terminal of analog multiplier in the analog multiplier array of the input end of described resistance or electric capacity, the output terminal of described resistance or electric capacity connects the inverting input of single operational amplifier jointly.
Described control circuit includes: respectively with I 2The serial clock signal of C bus and I 2The I that the serial data signal of C bus is connected 2The C slave, described I 2The C slave connects detector array time shutter control module, A/D time-sequence control module and coding unit control module respectively.
Signal processing circuit based on the Hadamard matrix modulation of the present invention does not adopt scan mechanism, eliminates or reduced the use of multiway analog switch array.The signal that the many input summers that insert simple unity gain buffer, phase inverter and is made up of single operational amplifier and resistance or capacitance network in sensing circuit just can make detector array output is by full line (or row), even whole walking abreast read simultaneously.Total system only needs an A/D converter.Under the situation that consumes a small amount of circuit power consumption and area, improved and read efficient and the processing speed of detector array output signal.Adopt the sensing circuit method for designing that this programme proposed, the increase of focal plane arrays (FPA) is surveyed increasing of first quantity and will be not can be again the processing speed of A/D not be impacted, and the speed of A/D is only relevant with the frame frequency of Flame Image Process.In addition, do not use or reduce the multiway analog switch array and can reduce clock to a certain extent and burst logical and channel charge injects the error of being introduced.The present invention also can be used in other read output signal treatment circuits that are similar to infrared focal plane array.
Description of drawings
Fig. 1 is an entire block diagram of the present invention;
Fig. 2 is a data flow diagram of the present invention;
Fig. 3 is the circuit theory diagrams of the compound totalizer of many inputs of the present invention;
Fig. 4 is the formation block diagram of control circuit.
Wherein:
1: detector array 2: the prime amplifier array
3: analog multiplier array 4: import compound totalizer more
5: control circuit 6: scrambler
7:A/D converter 8:I 2The C bus
9: data bus 10: operational amplifier
11: detector 21: prime amplifier
31: analog multiplier
Embodiment
Below in conjunction with the embodiment accompanying drawing signal processing circuit based on the Hadamard matrix modulation of the present invention is made a detailed description.
Hadamard (Hadamard) matrix has important effect in the orthogonal coding theory because this matrix each row (or row) all be one group of orthogonal code.
If the simulating signal X that two cycles are T 1(t) and X 2(t) mutually orthogonal, then have ∫ 0 T x 1 ( t ) · x 2 ( t ) dt = 0 . For the code character x of two quadratures, there is following mutual relationship in y:
If long be the code character x of n, y, code element have only+1 and-1
x=(x 1,x 2,x 3,…,x n)
y=(y 1,y 2,y 3,…,y n)
X wherein i, y 1∈ (+1 ,-1), i=1,2 ..., n then exists ρ ( x , y ) = 1 n Σ i = 1 n x i y i = 0
The Hadamard matrix only is made of element+1 and-1, and 2 rank hadamard matrixes are lowest-order, and its structure is H 2 = + 1 - 1 + 1 - 1 , Exponent number is that the high-order hadamard matrix of 2 power can obtain from following recurrence relation: H N = H N / 2 ⊗ H 2 , Wherein, N=2 m, as 4 rank hadamard matrixes H 4 = H 2 H 2 H 2 - H 2 , In like manner can draw N rank matrix.Hadamard order of matrix number all is 2 power, this with focal plane arrays (FPA) in the exponent number of detector array all be that 2 power is the same.On the angle of mathematics, the signal of the array of detector output also is a special matrix in the focal plane arrays (FPA), and different with the hadamard matrix is that this entry of a matrix element is a simulating signal.So be used as the modulation signal of focal plane array row reading circuit signal with this matrix good matching effect is arranged.
The present invention utilizes above-mentioned principle, adopts N rank hadamard matrix to carry out coded modulation when being listed in design for the focal plane array of a N * N unit.
As shown in Figure 1, signal processing circuit based on the Hadamard matrix modulation of the present invention, include detector array 1 and A/D converter 7, between detector array 1 and A/D converter 7, also be provided with prime amplifier array 2, the analog multiplier array 3 that connects successively and import compound totalizer 4 more, wherein, the output of detector array 1 connects the input end of prime amplifier array 2, the compound totalizer 4 of many inputs goes out to connect the input end of A/D converter 7, also be provided with control circuit 5 and scrambler 6, described control circuit 5 passes through I 2C bus 8 receives outside setting control signal, and connects respectively and controlled encoder 6, A/D converter 7 and detector array 1, and described scrambler 6 also connects analog multiplier array 3 by data bus 9.Be to realize connecting between the described each several part by interconnection line.
Scrambler is a unit of realizing by software algorithm.For example, generate a N=2 mThe hadamard matrix on rank then needs m 2 rank hadamard matrixes to carry out direct product.The N rank matrix stores that generates is used for modulation afterwards in the Ram of coding unit.
As shown in Figure 4, control circuit 5 is a digital integrated circuit, includes: respectively with I 2The serial clock signal 81 and the I of C bus 2The I that the serial data signal 82 of C bus is connected 2 C slave 54, described I 2C slave 54 connects detector array time shutter control module 53, A/D time-sequence control module 51 and coding unit control module 52 respectively.
Control circuit 5 is mainly and of the present inventionly provides sequential control based on analog module in the signal processing circuit of Hadamard matrix modulation, finish simultaneously with outside communication and scrambler in the setting of matrix exponent number.On realizing, circuit mainly comprises register cell, storage unit and frequency counting frequency dividing circuit.
As shown in Figure 2, described detector array 1 is provided with N detector 11, prime amplifier array 2 is provided with N prime amplifier 12, and (prime amplifier requires good low-noise characteristic, as select MAX4475 for use), analog multiplier array 3 is provided with N analog multiplier 13, described N is 2 power, and described detector 11, prime amplifier 12 and analog multiplier 13 are for being connected successively one to one.
Prime amplifier array 2 is given in the output signal parallel transfer of detector array 1, multiply each other by analog multiplier array 3 and the code element that transmits from data bus 9 through amplified analog signal, pass to then in many input composite analogy totalizers 4 and realize parallel/serial conversion.After A/D converter 7 digitizings, store, for future use.
As shown in Figure 3, the compound totalizer 4 of described many inputs includes single operational amplifier 10, and (operational amplifier requires high precision, high-gain, as select LMP7717 for use), the inverting input of described single operational amplifier 10 connects resistor network or capacitance network, in-phase input end ground connection, output terminal passes through resistance R fConnect inverting input, output terminal output signal V o
Described resistor network or capacitance network have with analog multiplier array 3 in identical resistance or the electric capacity of analog multiplier 13 numbers, the connect one to one output terminal of analog multiplier 13 in the analog multiplier array 3 of the input end of described resistance or electric capacity, the output terminal of described resistance or electric capacity connects the inverting input of single operational amplifier 10 jointly.
Signal processing circuit based on the Hadamard matrix modulation of the present invention can be divided into artificial circuit part and digital circuit part.Artificial circuit part carries out integration, pre-amplification, modulation and integration to surveying first output signal, by A/D converter the analog signal conversion of reading is become digital signal then.Numerical portion is used for to the work of entire circuit system and surveys first time shutter and control and produce the hadamard matrix coder, the modulation code that generates is assigned to corresponding analog multiplier unit by data bus under the control circuit scheduling, the modulation of simulating signal is read in realization, simulating signal after the modulation is as the input of composite analogy totalizer, realize parallel/serial conversion, that is to say that the multidiameter delay analog voltage signal that will survey unit's output converts the analog voltage signal of single ended serial to.Then should single-ended simulating signal send A/D converter to and carry out the digitizing conversion.The digital signal of output stores in the memory circuit, for the digital signal processing circuit use of back.
Adopt the hadamard matrix coder to modulate, the analog multiplier in the circuit can realize with unity gain buffer+1 multiply each other, and phase inverter is realized-1 multiply each other, thereby simplifies circuit design, saves circuit area and power consumption.The analog adder that many input composite analogy totalizers can use single amplifier and resistance or capacitance network to form is realized.In addition, N * N unit detector array preferably adopts N rank hadamard matrix to carry out coded modulation, to avoid unnecessary mistake and simplified design.
Treatment circuit of the present invention has two kinds of mode of operations, and a kind of is normal mode of operation, and another kind is the self-checking pattern.
When treatment circuit was in normal mode of operation, each passage treatment circuit was connected with separately detector; When treatment circuit is in the self-checking pattern, only there is a passage to link to each other with the special-purpose detector of test, test separately in order to performance a certain special modality.With before detector array is connected, make treatment circuit work in the self-checking pattern at treatment circuit, in turn the performance of each passage be tested, confirm that the performance of chip is errorless after, be connected with detector again.
The selection of treatment circuit mode of operation is to pass through I 2The C Control on Communication realizes that by writing test pattern control word and channel number to be tested, control system enters the self-checking pattern, and respective via is connected on the special-purpose detector of test.When writing the control word of non-test pattern, system will enter normal mode of operation.
The course of work based on various piece in the signal processing circuit of Hadamard matrix modulation of the present invention is as follows: I is passed through in the outside 2The C bus is provided with the mode of operation of the signal processing circuit based on Hadamard matrix modulation of the present invention, the time shutter and the hadamard order of matrix number of detector array; Control circuit is to the time shutter of detector array, the coded system of scrambler, code element on data bus transmission and the work schedule of A/D converter control; Scrambler is used for producing needed hadamard matrix and is transferred to the analog multiplier array by data bus under the control of control circuit; The analog multiplier array will be read from detector array, multiply each other through analog voltage signal behind pre-amplification the and the modulating-coding that transmits from data bus, and this process can be regarded two N rank matrix multiples as from the mathematics angle.Realize parallel/serial conversion from the signal of analog multiplier array output through the composite analogy of input more than totalizer, the digital signal processing circuit that the single ended serial analog voltage signal that obtains is stored after the A/D converter digitizing for the back uses.
Signal processing circuit based on the Hadamard matrix modulation of the present invention, concrete processing procedure to the signal that reads out from detector array is as follows, if from detector array output is little current signal, in general all be to convert thereof into analog voltage signal and then amplify in advance by integration; If detector array output is analog voltage signal, then can directly amplify in advance.Voltage signal behind pre-the amplification multiplies each other by an analog multiplier and the coded signal that transmits from data bus, and then multichannel analog signals is integrated into single-ended simulating signal of going here and there out by the compound totalizer of the many inputs of a simulation, be transferred to A/D converter and carry out the digitizing conversion.
Adopt the hadamard matrix coder design simplification of analog multiplier can be become the design of unity gain buffer and phase inverter.Many input composite analogy totalizers can adopt operational amplifier and resistance or capacitance network to realize.Adopt this design can eliminate or reduce the use of analog multichannel switch array.Because the hadamard matrix element is+1 and-1, adopts this matrix modulation can not introduce extra electronic noise, and can farthest simplify circuit design.The orthogonal property of code element can make analog voltage signal be unlikely to overflow when integrating addition, causes the mistake of image acquisition.

Claims (5)

1. signal processing circuit based on Hadamard matrix modulation, include detector array (1) and A/D converter (7), it is characterized in that, between detector array (1) and A/D converter (7), also be provided with the prime amplifier array (2) that connects successively, analog multiplier array (3) and many input compound totalizers (4), wherein, the output of detector array (1) connects the input end of prime amplifier array (2), the output of many compound totalizers of input (4) connects the input end of A/D converter (7), also be provided with control circuit (5) and scrambler (6), described control circuit (5) passes through I 2C bus (8) receives outside setting control signal, and connects respectively and controlled encoder (6), A/D converter (7) and detector array (1), and described scrambler (6) also connects analog multiplier array (3) by data bus (9).
2. the signal processing circuit based on the Hadamard matrix modulation according to claim 1, it is characterized in that, described detector array (1) is provided with N detector (11), prime amplifier array (2) is provided with N prime amplifier (12), analog multiplier array (3) is provided with N analog multiplier (13), described N is 2 power, and described detector (11), prime amplifier (12) and analog multiplier (13) are for being connected successively one to one.
3. the signal processing circuit based on the Hadamard matrix modulation according to claim 1, it is characterized in that, described many compound totalizers of input (4) include single operational amplifier (10), the inverting input of described single operational amplifier (10) connects resistor network or capacitance network, in-phase input end ground connection, output terminal is by resistance (R r) the connection inverting input, output terminal output signal (V 0).
4. the signal processing circuit based on the Hadamard matrix modulation according to claim 3, it is characterized in that, described resistor network or capacitance network have and middle identical resistance or the electric capacity of analog multiplier (13) number of analog multiplier array (3), the connect one to one output terminal of analog multiplier (13) in the analog multiplier array (3) of the input end of described resistance or electric capacity, the output terminal of described resistance or electric capacity connects the inverting input of single operational amplifier (10) jointly.
5. the signal processing circuit based on the Hadamard matrix modulation according to claim 1 is characterized in that described control circuit (5) includes: respectively with I 2Serial clock signal of C bus (81) and I 2The I that the serial data signal of C bus (82) is connected 2C slave (54), described I 2C slave (54) connects detector array time shutter control module (53), A/D time-sequence control module (51) and coding unit control module (52) respectively.
CN2009100677548A 2009-01-20 2009-01-20 Signal processing circuit based on hada code matrix modulation Expired - Fee Related CN101556189B (en)

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