CN101483971B - Circuit board and manufacturing method thereof - Google Patents

Abstract

The invention discloses a circuit board and a manufacturing method thereof. The circuit board comprises a dielectric layer, a main circuit and two shielding circuits. The dielectric layer has an active surface. The main circuit is embedded in the dielectric layer, and the main circuit below the active surface is covered by the dielectric layer. The shielding circuits are arranged on the dielectric layer and are respectively positioned on two sides of the main circuit, and each shielding circuit is a continuous metal circuit. Wherein the thickness of the shielding circuit is greater than that of the main circuit.

Description

Circuit board and its manufacturing method

technical field

The invention relates to a circuit board and a manufacturing method thereof, in particular to a circuit board with electromagnetic shielding effect and a manufacturing method thereof. the

Background technique

Generally speaking, a circuit board for carrying or electrically connecting multiple electronic components is composed of multiple patterned conductive layers and multiple dielectric layers stacked alternately. Wherein, these patterned conductive layers are defined and formed by copper foil layer (copper foil) through photolithographic etching. The dielectric layers are respectively disposed between two adjacent patterned conductive layers to isolate the patterned conductive layers. In addition, various electronic components (such as active components or passive components) can also be arranged on the surface of the circuit board, and the purpose of electrical signal propagation can be achieved through the internal circuit of the circuit board. the

It is worth mentioning that as the frequency of the electrical signals transmitted between these electronic components becomes higher and higher, the electromagnetic interference and noise between the main lines will become more and more serious. FIG. 1 is a schematic diagram of a known circuit board for preventing electromagnetic interference. Please refer to FIG. 1. In the known circuit board 100, in order to solve the problem that the main circuit 110 is easily affected by electromagnetic interference or noise from adjacent circuits or electronic components, the known technology is to add an additional circuit board above and below the main circuit 110. A laminated layer 120 for shielding electromagnetic interference and noise (the laminated layer 120 is a combination of a metal layer 122 and a dielectric layer 124 with shielding effect). However, additionally adding laminated layers 120 above and below the main circuit 110 will make the overall thickness of the circuit board 100 thicker, which is not in line with the development trend of thinner and lighter electronic products. the

Contents of the invention

The invention provides a circuit board and a manufacturing method thereof, so that the main circuit inside the circuit board has a good signal transmission effect and can meet the development trend of lightness and thinness. the

The invention provides a circuit board, which includes a dielectric layer, a main circuit and two shielding circuits. The dielectric layer has an active surface. The main circuit is embedded in the dielectric layer, and the main circuit located below the active surface is covered by the dielectric layer. The shielding lines are arranged on the dielectric layer and are respectively located on two sides of the main line, and each of the shielding lines is a continuous metal line. Wherein, the main circuit has a first thickness, the shielded circuit has a second thickness, and the second thickness is greater than the first thickness. the

In an embodiment of the present invention, the shielded circuit includes a first shielding part and a second shielding part, the first shielding part is buried in the dielectric layer and is coplanar with the active surface, and the second shielding part is the same as the first shielding part The parts are connected, and the thickness of the first shielding part is substantially equal to the first thickness. the

In an embodiment of the present invention, the second shielding portion is disposed on the active surface and is in contact with the first shielding portion. the

In an embodiment of the invention, the second shielding portion is embedded in the dielectric layer. the

In an embodiment of the present invention, the shielded circuit further includes a third shielding portion disposed on the active surface and connected to the first shielding portion. the

The present invention further proposes a method for manufacturing a circuit board, which includes the following steps. First, a dielectric layer is provided, which has an active surface. Next, a carrier board is provided, and a main circuit and a shielded circuit are formed on the carrier board, wherein the shielded circuits are respectively located on two sides of the main circuit, and the thickness of the shielded circuit is greater than that of the main circuit. Then, press-bond the carrier board with the main lines and the shielding lines on the active surface of the dielectric layer. Afterwards, the carrier board is removed, and the main traces, as well as these shielded traces, are coplanar with the active surface. the

In an embodiment of the present invention, the method of forming the main lines and the shielding lines is electroplating. the

In an embodiment of the present invention, a method for forming main circuits and the shielded circuits on a carrier includes the following steps. Firstly, a first patterned photoresist layer is formed on the carrier board. The first patterned photoresist layer has a plurality of openings, wherein the openings expose part of the carrier board. Then, a main line and two first shielding parts are formed in the openings, the first shielding parts are formed in the openings on both sides of the main line, and the thickness of the first shielding part is substantially equal to the thickness of the main line. Then, cover the second patterned photoresist layer on the main circuit. Next, a second shielding portion is formed on each first shielding portion, wherein each shielding line includes the first shielding portion and a corresponding second shielding portion. Afterwards, the first patterned photoresist layer and the second patterned photoresist layer are removed. the

In an embodiment of the present invention, before forming the first patterned photoresist layer on the carrier, it further includes forming a plating seed layer on the carrier. the

In an embodiment of the present invention, after removing the carrier board, it also includes forming two third shielding parts on the active surface, each third shielding part is respectively connected to the first shielding part, and each shielding line includes The first shielding part corresponds to the second shielding part and the third shielding part. the

In an embodiment of the present invention, the method of forming the main circuit, the first shielding parts and the second shielding parts is an electroplating process, and the method of forming the third shielding part is ink-jet printing. the

In one embodiment of the present invention, the method for embedding a main circuit in a dielectric layer and disposing two shielding circuits in the dielectric layer includes the following steps. First, a carrier is provided, and a first patterned photoresist layer is formed on the carrier. The first patterned photoresist layer has a plurality of openings, wherein the openings expose part of the carrier. Then, a main line and two first shielding parts are formed in the openings, the first shielding parts are formed in the openings on both sides of the main line, and the thickness of the first shielding part is substantially equal to the thickness of the main line. Next, the first patterned photoresist layer is removed. Then, press-bond the carrier board with the main lines and the first shielding parts on the active surface of the dielectric layer. Next, the carrier plate is removed, and the main lines and these first shielding portions are coplanar with the active surface. Afterwards, two second shielding parts are formed on the active surface, and these second shielding parts are connected to each first shielding part respectively, and each shielding line includes the first shielding part and the corresponding second shielding part. the

In the circuit board of the present invention, shielding circuits are provided on both sides of each main circuit, and the thickness of the shielding circuit is greater than that of the main circuit. Therefore, shielded lines can effectively improve the electromagnetic interference between main lines, and the main lines have good signal transmission quality. It is worth mentioning that the present invention can not only effectively improve the electromagnetic interference problem between the main circuits, but also make the circuit board comply with the development trend of thinner and lighter electronic products. the

In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings. the

Description of drawings

FIG. 1 is a schematic diagram of a known circuit board for preventing electromagnetic interference. the

FIG. 2 shows a flow chart of manufacturing a circuit board according to an embodiment of the present invention. the

FIG. 3A to FIG. 3H are perspective views illustrating the manufacturing process of the circuit board according to an embodiment of the present invention. the

Fig. 4 depicts the perspective view of the circuit board of another embodiment of the present invention

FIG. 5A to FIG. 5E are perspective views showing the manufacturing process of the circuit board according to another embodiment of the present invention. the

Explanation of reference signs

100: circuit board 110: main circuit

120: Lamination 122: Metal layer

300, 300’, 300”: circuit board 310: dielectric layer

312: Active surface 320: Main line

330, 330’, 300”: shielded line 332: first shielded part

334, 334': the second shielding part 336: the third shielding part

340: Plating seed layer 350: First patterned photoresist layer

352: Opening 360: Second patterned photoresist layer

370: carrier board X1: first thickness

X2: second thickness S1, S2: each step

Detailed ways

FIG. 2 shows a flow chart of manufacturing a circuit board according to an embodiment of the present invention. Please refer to FIG. 2 , the manufacturing method of the circuit board in this embodiment includes the following steps: First, as described in step S1 , a dielectric layer is provided, which has an active surface. Next, as described in step S2 , a main circuit is buried in the dielectric layer and two shielded circuits are arranged in the dielectric layer, wherein the shielded circuits are respectively located on two sides of the main circuit, and the thickness of the shielded circuit is greater than that of the main circuit. In order to understand more clearly the manufacturing method of the circuit board shown in FIG. 2 , this embodiment will be described below with a detailed three-dimensional flow chart. the

FIG. 3A to FIG. 3H are perspective views illustrating the manufacturing process of the circuit board according to an embodiment of the present invention. First, as shown in FIG. 3A , a dielectric layer 310 having an active surface 312 is provided. Next, as shown in FIG. 3B to FIG. 3E , the main circuit 320 and the two shielded circuits 330 located on both sides of the main circuit 320 are prefabricated on the carrier board 370 . Wherein, in this embodiment, for example, the electroplating seed layer 340 is first formed on the carrier 370, and the first patterned photoresist layer 350 (as shown in FIG. 3B ) is formed on the electroplating seed layer 340, so as to facilitate subsequent The manufacturing process of the circuit 320 and the shielded circuit 330. In this embodiment, the first patterned photoresist layer 350 is formed on the carrier 370 by using a photolithography process, for example. The first patterned photoresist layer 350 has a plurality of openings 352 , and these openings 352 expose part of the electroplating seed layer 340 on the carrier 370 . the

After the electroplating seed layer 340 and the first patterned photoresist layer 350 are formed on the carrier 370, the main lines 320 and two first shielding parts 332 are formed in the openings 352 by, for example, an electroplating process (as shown in FIG. 3C shown). In this embodiment, the first shielding portions 332 are formed in the openings 352 on both sides of the main circuit 320 , and the main circuit 320 has a first thickness X1 substantially equal to the thickness of the first shielding portions 332 . Then, cover the second patterned photoresist layer 360 on the main circuit 320 (the second patterned photoresist layer 360 is also, for example, formed on the main circuit 320 by photolithography process), and apply again The electroplating process forms a second shielding portion 334 on the first shielding portion 332 in the opening (as shown in FIG. 3D ), and each first shielding portion 332 and the corresponding second shielding portion 334 constitute a shielding circuit 330, and The shielding line 330 has a second thickness X2 which is greater than the thickness X1 of the main line. Of course, in other preferred embodiments, other suitable processes can also be used to form the main circuit 320 , the first shielding portion 332 and the second shielding portion 334 in the opening, which is not limited by the present invention. the

After the electroplating process is applied again to form the second shielding portion 334 on each of the first shielding portions 332, then the first patterned photoresist layer, the second patterned photoresist layer and the first pattern are removed. Part of the electroplating seed layer covered by the photoresist layer (as shown in FIG. 3E ). In this way, this embodiment completes the process of fabricating the main circuit 320 and the shielding circuit 330 on the carrier board 370 . the

After the main circuit 320 and the shielded circuit 330 are fabricated on the carrier board 370, as shown in FIG. 3F to FIG. carrier plate 370 . Wherein, the main circuit 320 and the shielded circuits 330 are, for example, pressed and bonded between the dielectric layer 310 and the carrier 370 . In addition, since the two shielded lines 330 on the carrier board 370 are located on both sides of the main line 320 respectively, when the carrier board 370 with the main line 320 and these shielded lines 330 is pressed on the active surface 312 of the dielectric layer 310, The shielding trace 330 embedded in the dielectric layer 310 is still located on both sides of the main trace 320 . Afterwards, as shown in FIG. 3H , the carrier 370 is removed, and the main lines 320 and the shielded lines 330 are buried in the dielectric layer 310 , and the main lines 320 and the shielded lines 330 are shared with the active surface 312 , for example. flat. In this way, the fabrication of the circuit board 300 is completed in this embodiment. the

It is worth mentioning that since there are shielded lines 330 on both sides of the main line 320, and the second thickness X2 of the shielded line 330 is greater than the thickness X1 of the main line, other main lines (not shown) adjacent to the main line 320 Shown) or electromagnetic effects generated by electronic components (not shown) are less likely to interfere with the main circuit 320 . In other words, the circuit board 300 of this embodiment has better signal transmission quality. In addition, because in this embodiment, the shielding circuit 330 is disposed on both sides of the main circuit 320 , the overall circuit board 300 has a relatively thin thickness. the

In addition, after removing the carrier 370 (as shown in FIG. 3H ), two third shielding portions 336 corresponding to the first shielding portions 332 (as shown in FIG. 4 ) can also be formed on the active surface 312 of the dielectric layer 310. , which shows a perspective view of a circuit board in another embodiment of the present invention), to complete the fabrication of a circuit board 300' in another embodiment. In the circuit board 300', the third shielding portions 336 are in contact with the two first shielding portions 332 embedded in the dielectric layer 310 and coplanar with the active surface 312, respectively. Wherein, each shielding line 330' includes a first shielding part 332 and a corresponding second shielding part 334 and a third shielding part 336. In this embodiment, for example, the aforementioned third shielding portion 336 is formed by a jet printing process. Of course, in other preferred embodiments, the third shielding portion 336 can also be fabricated through the electroplating process described in the above embodiments. the

FIG. 5A to FIG. 5E are perspective views showing the manufacturing process of the circuit board according to another embodiment of the present invention. Please refer to FIG. 5A first. After completing the step in FIG. 3C (forming the main line 320 and the first shielding portion 332 in the opening), the first patterned photoresist on the carrier 370 can be removed first in this embodiment. layer and the plating seed layer covered by the first patterned photoresist layer. Next, as shown in FIGS. 5B to 5C , the carrier 370 having the main lines 320 and the first shielding portions 332 is bonded on the active surface 312 of the dielectric layer 310 . Wherein, the main circuit 320 and the first shielding parts 332 are pressed between the dielectric layer 310 and the carrier 370 , for example. In addition, since the two first shielding parts 332 on the carrier board 370 are located on both sides of the main circuit 320 respectively, when the carrier board 370 with the main circuit 320 and these first shielding parts 332 is pressed to the active part of the dielectric layer 310 The two first shielding portions 332 embedded in the dielectric layer 310 are still located on both sides of the main circuit 320 when the surface 312 is exposed. the

Next, as shown in FIG. 5D , the carrier 370 is removed, and the main lines 320 embedded in the dielectric layer 310 and the first shielding portions 332 are coplanar with the active surface 312 . Afterwards, as shown in FIG. 5E , for example, two second shielding portions 334 ′ can be formed on the active surface 312 by a spray printing process to complete the production of the circuit board 300 ″ of this embodiment. Wherein, these are, for example, copper paste The second shielding portion 334' is connected to each first shielding portion 332 respectively, and each first shielding portion 332 and the corresponding second shielding portion 334' constitute the shielded circuit 330" of this embodiment. the

In summary, the present invention sets shielding lines with a thickness greater than the thickness of the main lines on both sides of each main line, so that the electromagnetic effects generated by the electronic components adjacent to the main lines or other main lines are not easy to respond. The signal transmission quality of the main line is affected. That is, the main line has better signal transmission quality. In addition, since the present invention sets shielding lines on both sides of the main lines, and the main lines and the shielding lines are mainly embedded in the dielectric layer, compared with the known technology, additional shielding lines are added above and below the main lines. Lamination of electromagnetic interference and noise, the circuit board of the present invention has a thinner overall thickness. In other words, the circuit board of the present invention not only has good signal transmission efficiency, but also conforms to the development trend of thinner and lighter electronic products. the

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope is to be determined as defined by the appended claims. the

Claims (12)

1. wiring board comprises:

Dielectric layer has active surface;

Main line, in be embedded in this dielectric layer, and with this active surperficial copline, wherein this main line has first thickness, and is positioned at this following main line of this active surface and is coated by this dielectric layer; And

Two shielded lines are disposed at this dielectric layer, and lay respectively at the both sides of this main line, and wherein respectively this shielded line has second thickness, and this second thickness is greater than this first thickness, and respectively this shielded line is continuous metallic circuit.

2. wiring board as claimed in claim 1, wherein respectively this shielded line comprises first masked segment and secondary shielding part, be embedded in this dielectric layer in this first masked segment, and with this active surperficial copline, and this secondary shielding part is joined with this first masked segment, and the thickness of this first masked segment equals this first thickness in fact.

3. wiring board as claimed in claim 2, wherein this secondary shielding partly is disposed on this active surface, and joins with this first masked segment.

4. wiring board as claimed in claim 2 wherein is embedded in this dielectric layer in this secondary shielding part.

5. wiring board as claimed in claim 4, wherein respectively this shielded line also comprises the 3rd masked segment, it is disposed on this active surface, and joins with this first masked segment.

6. the manufacture method of a wiring board comprises:

Dielectric layer is provided, and it has active surface;

Support plate is provided, and forms a main line and this shielded line on this support plate, wherein this shielded line lays respectively at the both sides of this main line, and the thickness of this shielded line is greater than the thickness of this main line;

Pressing has this support plate of this main line and this shielded line on this active surface of this dielectric layer; And

Remove this support plate, and this main line and this shielded line and this active surperficial copline.

7. the manufacture method of wiring board as claimed in claim 6, the method that wherein forms this main line and this shielded line is an electroplating technology.

8. the manufacture method of wiring board as claimed in claim 6, the method that wherein forms this main line and this shielded line on this support plate comprises:

Form the first patterning photoresist layer on this support plate, this first patterning photoresist layer has a plurality of openings, and wherein this opening exposes this support plate of part;

Form this main line and 2 first masked segments in this opening, this first masked segment is formed in this opening of these main line both sides, and the thickness of this first masked segment equals the thickness of this main line in fact;

On this main line, cover the second patterning photoresist layer;

In respectively forming the secondary shielding part on this first masked segment, wherein respectively this shielded line comprises respectively this first masked segment and pairing this secondary shielding part; And

Remove this first patterning photoresist layer and this second patterning photoresist layer.

9. the manufacture method of wiring board as claimed in claim 8 wherein also was included on this support plate before this support plate forms this first patterning photoresist layer and forms plating seed layer.

10. the manufacture method of wiring board as claimed in claim 8, also be included in formation 2 the 3rd masked segments on this active surface after wherein removing this support plate, the 3rd masked segment joins with this first masked segment respectively, and respectively this shielded line comprises respectively this first masked segment and pairing this secondary shielding part, the 3rd masked segment.

11. the manufacture method of wiring board as claimed in claim 10, the method that wherein forms this main line, this first masked segment and this secondary shielding part is an electroplating technology, and the method that forms the 3rd masked segment is a jet printing technique.

12. the manufacture method of wiring board as claimed in claim 6 is wherein buried this main line and is comprised in the method that this dielectric layer disposes two shielded lines in this dielectric layer:

Support plate is provided, and forms the first patterning photoresist layer in this support plate, this first patterning photoresist layer has a plurality of openings, and wherein this opening exposes this support plate of part;

Form this main line and 2 first masked segments in this opening, this first masked segment is formed in this opening of these main line both sides, and the thickness of this first masked segment equals the thickness of this main line in fact;

Remove this first patterning photoresist layer;

Pressing has this support plate of this main line and this first masked segment on this active surface of this dielectric layer;

Remove this support plate, this main line and this first masked segment and this active surperficial copline; And

Form two secondary shielding parts on this active surface, this secondary shielding part is joined with this first masked segment respectively, and respectively this shielded line comprises respectively this first masked segment and pairing this secondary shielding part.

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