CN101477918A - Enforced time-delay shutdown circuit - Google Patents
Enforced time-delay shutdown circuit Download PDFInfo
- Publication number
- CN101477918A CN101477918A CNA2009101050187A CN200910105018A CN101477918A CN 101477918 A CN101477918 A CN 101477918A CN A2009101050187 A CNA2009101050187 A CN A2009101050187A CN 200910105018 A CN200910105018 A CN 200910105018A CN 101477918 A CN101477918 A CN 101477918A
- Authority
- CN
- China
- Prior art keywords
- circuit
- delay
- switching circuit
- shutdown
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000003990 capacitor Substances 0.000 claims description 12
- 230000001934 delay Effects 0.000 abstract 1
- 230000000875 corresponding effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007600 charging Methods 0.000 description 1
- 238000010892 electric spark Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Images
Landscapes
- Electronic Switches (AREA)
Abstract
The invention discloses a compulsory delay shutdown circuit, which comprises a mechanical switch, at least one switching circuit and a delay circuit; the mechanical switch is connected with the delay circuit; and the other end of the delay circuit is connected with the switching circuit. The embodiment of the invention adopts a hard-switching mode, and delays reasonable time to turn off the power supply after the switch is poked to the shutdown position; and the system can conduct corresponding movements during the time delay. The circuit needs no hardware control, only adopts hardware discrete components, and realizes compulsory delay shutdown.
Description
Technical field
The present invention relates to shutdown circuit, particularly a kind of enforced time-delay shutdown circuit.
Background technology
In the present consumer electronics product, adopt the general employing hard switching of internal battery, after mains switch pulls out the shutdown position, power-supply system can be turn-offed immediately, and the shortcoming of sort circuit is: corresponding action can not be done by system before shutdown, as can not be before shutdown earlier quiet, POP sound when preventing to shut down, in addition, can not system deposit final state in EEPROM before shutdown, such circuit can not satisfy requirement of client sometimes.Have some electronic products to adopt soft switch in addition, it can realize above-mentioned function, but adopts the shortcoming of soft switch to be: when off-mode, MCU has electricity, so the meeting power consumption; In addition, when MCU crashed, system then can not the normal switch machine.
Summary of the invention
The invention provides a kind of enforced time-delay shutdown circuit, with solve hard switching Circuits System of the prior art can not before shutdown, do corresponding action and can not be before shutdown system when earlier final state being deposited in MCU crashes in EEPROM and the soft switch circuit, the problem that system then can not the normal switch machine.
The technical solution used in the present invention is: a kind of enforced time-delay shutdown circuit, comprise mechanical switch, at least one switching circuit and delay circuit, and described mechanical switch links to each other with delay circuit, and the described delay circuit other end links to each other with switching circuit.
The technical solution used in the present invention also comprises: described delay circuit is the RC delay circuit.
The technical solution used in the present invention also comprises: described RC delay circuit comprises first resistance, second resistance and power capacitor, and described first resistance, second resistance are connected successively with power capacitor.
The technical solution used in the present invention also comprises: described switching circuit is the semiconductor discrete component switching circuit.
The technical solution used in the present invention also comprises: described switching circuit comprises first switching circuit and second switch circuit, mechanical switch links to each other with the RC delay circuit with micro-control unit MCU respectively, the RC delay circuit other end connects first switching circuit, and the second switch circuit links to each other with MCU with first switching circuit respectively.
The technical solution used in the present invention also comprises: described switching circuit comprises first switching circuit, second switch circuit and the 3rd switching circuit, mechanical switch links to each other with MCU with the RC delay circuit respectively, the RC delay circuit links to each other with first switching circuit, MCU connects the 3rd switching circuit, and the 3rd switching circuit links to each other with the second switch circuit.
The beneficial effect of the technical scheme that the embodiment of the invention provides is: the embodiment of the invention adopts the mode of hard switching, after switch pulls out the shutdown position, can delay the reasonable time power cutoff, corresponding action can be done by system in this time-delay, this invention does not need software control, what adopt all is the hardware discrete component, realizes enforced time-delay shutdown.
Description of drawings
Fig. 1 is the structure chart of the enforced time-delay shutdown circuit of the embodiment of the invention;
Fig. 2 is the circuit diagram of the enforced time-delay shutdown circuit of the embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
For making the purpose, technical solutions and advantages of the present invention clearer, embodiment of the present invention is described further in detail below in conjunction with accompanying drawing.
Seeing also Fig. 1, is the structure chart of the enforced time-delay shutdown circuit of the embodiment of the invention.The enforced time-delay shutdown circuit of the embodiment of the invention comprises mechanical switch, RC delay circuit and switching circuit.Wherein, in the present embodiment, switching circuit is the semiconductor discrete component switching circuit, and switching circuit also can be the switching circuit of other kinds.Switching circuit can be one or more.In the present embodiment, adopt two switching circuits, i.e. first switching circuit and second switch circuit.Mechanical switch links to each other with the RC delay circuit with MCU respectively, and the RC delay circuit other end connects first switching circuit, and the second switch circuit links to each other with MCU with first switching circuit respectively.
The general work principle of the enforced time-delay shutdown circuit of the embodiment of the invention is: after mechanical switch is pulling out the shutdown position, the RC delay circuit charges to inside, when voltage is charged to certain value, first switching circuit turn-offs, system power supply is closed, between the RC delay circuit is to inner charge period, MCU is output as low level by detecting mechanical switch, just can carry out relevant in-situ processing and shut down, and is for example earlier quiet, POP sound when preventing to shut down, the system that reinforms deposits final state in EEPROM, and the second switch circuit ends, and system power supply is turn-offed, if MCU crashes during the shutdown, then when RC delay circuit builtin voltage was charged to certain value, first switching circuit turn-offed, and system power supply is closed, can not produce the problem that to shut down, and the time of time-delay can be followed the RC parameter of regulating the RC delay circuit according to demand.
Seeing also Fig. 2, is the circuit diagram of the enforced time-delay shutdown circuit of the embodiment of the invention.In Fig. 2, the enforced time-delay shutdown circuit of the embodiment of the invention comprises RC delay circuit, three semiconductor discrete component switching circuit Q7, Q8, Q9 and biasing element resistance R 30, resistance R 28 and resistance R 43 that mechanical switch SW1, first resistance R 28, second resistance R 37, power capacitor CE39 form.Mechanical switch SW1 respectively with first resistance R 28, second resistance R 37, the RC delay circuit that power capacitor CE39 forms links to each other with MCU, the RC delay circuit links to each other with the first semiconductor discrete component switching circuit Q8, the first semiconductor discrete component switching circuit Q8 other end connects the input power supply by diode D6, MCU connects the 3rd semiconductor discrete component switching circuit Q9 by resistance R 42, the 3rd semiconductor discrete component switching circuit Q9 links to each other with the second semiconductor discrete component switching circuit Q7 by resistance R 38, and the second semiconductor discrete component switching circuit Q7 other end connects capacitor C 19.
The operation principle of the enforced time-delay shutdown circuit of the embodiment of the invention is: when 1, the 3 pin conductings of mechanical switch SW1, the first semiconductor discrete component switching circuit Q8 conducting, draw in the SW_DET design being, because of the 2nd pin of mechanical switch SW1 unsettled, so SW_DET is a high level, MCU is output as high level with SYS_EN, the 3rd semiconductor discrete component switching circuit Q9 conducting, the required power supply of the second semiconductor discrete component switching circuit Q7 conducting output system.Wherein R231 is the discharge resistance of power capacitor CE39, has the moment electric spark when preventing mechanical switch SW1 action.
As 1 of mechanical switch SW1, during 2 pin conductings, the 3rd pin of mechanical switch SW1 is unsettled, BAT_OUT is by resistance R 28,37 pairs of power capacitor CE39 chargings of resistance R, when the voltage of power capacitor CE39 is charged near BAT_OUT, the first semiconductor discrete component switching circuit Q8 turn-offs, system power supply is closed, between power capacitor CE39 charge period, MCU is a low level by detecting SW_DET, just can carry out relevant in-situ processing and shut down, and is for example earlier quiet, POP sound when preventing to shut down, the system that reinforms deposits final state in EEPROM, SYS_EN is dragged down again, and the 3rd semiconductor discrete component switching circuit Q9 ends, the second semiconductor discrete component switching circuit Q7 ends, system power supply is turn-offed, if MCU crashes during the shutdown, then when the voltage of power capacitor CE39 is charged near BAT_OUT, the first semiconductor discrete component switching circuit Q8 turn-offs, system power supply is closed, and can not produce the problem that can not shut down, and the time of time-delay can follow the parameter of regulating RC according to demand to adjust.
The above only is preferred embodiment of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, any modification of being done, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1, a kind of enforced time-delay shutdown circuit comprises mechanical switch and at least one switching circuit, it is characterized in that, also comprise delay circuit, described mechanical switch links to each other with delay circuit, and the described delay circuit other end links to each other with described switching circuit.
2, enforced time-delay shutdown circuit as claimed in claim 1 is characterized in that, described delay circuit is the RC delay circuit.
3, enforced time-delay shutdown circuit as claimed in claim 2 is characterized in that, described RC delay circuit comprises first resistance, second resistance and power capacitor, and described first resistance, second resistance are connected successively with power capacitor.
4, enforced time-delay shutdown circuit as claimed in claim 1 is characterized in that, described switching circuit is the semiconductor discrete component switching circuit.
5, as claim 1 or 4 described enforced time-delay shutdown circuits, it is characterized in that, described switching circuit comprises first switching circuit and second switch circuit, described mechanical switch links to each other with the RC delay circuit with micro-control unit MCU respectively, the described RC delay circuit other end connects first switching circuit, and described second switch circuit links to each other with MCU with first switching circuit respectively.
6, as claim 1 or 4 described enforced time-delay shutdown circuits, it is characterized in that, described switching circuit comprises first switching circuit, second switch circuit and the 3rd switching circuit, described mechanical switch links to each other with MCU with the RC delay circuit respectively, described RC delay circuit links to each other with first switching circuit, described MCU connects the 3rd switching circuit, and described the 3rd switching circuit links to each other with the second switch circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101050187A CN101477918B (en) | 2009-01-13 | 2009-01-13 | Enforced time-delay shutdown circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101050187A CN101477918B (en) | 2009-01-13 | 2009-01-13 | Enforced time-delay shutdown circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101477918A true CN101477918A (en) | 2009-07-08 |
CN101477918B CN101477918B (en) | 2012-06-27 |
Family
ID=40838601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101050187A Expired - Fee Related CN101477918B (en) | 2009-01-13 | 2009-01-13 | Enforced time-delay shutdown circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101477918B (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102981425A (en) * | 2012-11-27 | 2013-03-20 | 广东威创视讯科技股份有限公司 | Startup and shutdown circuit |
CN103592861A (en) * | 2013-11-06 | 2014-02-19 | 福建三元达软件有限公司 | Multifunctional single switch power source management system |
CN104168006A (en) * | 2014-08-15 | 2014-11-26 | 常州工学院 | Delayed power-on and power-off circuit |
CN114466577A (en) * | 2022-04-11 | 2022-05-10 | 浙江德塔森特数据技术有限公司 | Multifunctional data machine room acquisition and control method and equipment |
-
2009
- 2009-01-13 CN CN2009101050187A patent/CN101477918B/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102981425A (en) * | 2012-11-27 | 2013-03-20 | 广东威创视讯科技股份有限公司 | Startup and shutdown circuit |
CN102981425B (en) * | 2012-11-27 | 2014-12-03 | 广东威创视讯科技股份有限公司 | Startup and shutdown circuit |
CN103592861A (en) * | 2013-11-06 | 2014-02-19 | 福建三元达软件有限公司 | Multifunctional single switch power source management system |
CN104168006A (en) * | 2014-08-15 | 2014-11-26 | 常州工学院 | Delayed power-on and power-off circuit |
CN114466577A (en) * | 2022-04-11 | 2022-05-10 | 浙江德塔森特数据技术有限公司 | Multifunctional data machine room acquisition and control method and equipment |
CN114466577B (en) * | 2022-04-11 | 2022-07-15 | 浙江德塔森特数据技术有限公司 | Multifunctional data machine room acquisition and control method and equipment |
Also Published As
Publication number | Publication date |
---|---|
CN101477918B (en) | 2012-06-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10788903B2 (en) | Signal generating circuit of active pen, active pen and signal driving method | |
CN100362724C (en) | Apparatus and method for multi function products effectively utilizing battery electricity quantity | |
CN201608557U (en) | Power supply circuit for mobile phone | |
CN202798027U (en) | Bidirectional power supply circuit of single USB interface | |
CN101477918B (en) | Enforced time-delay shutdown circuit | |
CN102006039B (en) | Reset circuit | |
CN100412762C (en) | Computer system and power supplying method thereof | |
US20110316471A1 (en) | Battery control system | |
CN207801891U (en) | A kind of timesharing start-up circuit of multiple video cards | |
CN105656176A (en) | High-reliability power switching circuit and electronic device | |
CN209232673U (en) | Relay control circuit | |
CN201122942Y (en) | Reset circuit | |
CN107040250B (en) | A kind of voltage mode driving circuit | |
CN201039316Y (en) | A reset circuit and TV set with above reset circuit | |
CN102332899A (en) | Delay circuit and switching power controller with delay circuit | |
CN210225248U (en) | Time delay switch driving circuit and system | |
CN110535336A (en) | Delay switch driving circuit and system | |
CN106410871B (en) | Power-supply management system and method | |
CN207926553U (en) | A kind of multifunction switch controller | |
CN202649916U (en) | +3.3V and +5V time sequence control circuit for computer mainboard | |
CN202334470U (en) | Delay circuit and switch power supply controller with same | |
CN206759084U (en) | A kind of output circuit of portable power source | |
CN101106367A (en) | Frequency multiplier generator | |
CN202496004U (en) | Reset circuit and television | |
CN104600797B (en) | Battery management circuit and terminal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120627 Termination date: 20200113 |