CN101459642B - Method and device suitable for detecting synchronization signal in communication system - Google Patents

Abstract

The method and the device are suitable for detecting the synchronous signal in the communication system and are suitable for the OFDM system with wide area application. The method and the device can eliminate the influence of transmission channels, noise and the like between external environments and accurately detect synchronous information. The method comprises the steps of carrying out autocorrelation operation on a received signal containing a synchronization signal and then inputting the received signal into the synchronization signal identification device provided by the invention. The identification device is formed by connecting three groups of sliding windows in series, and the output value of the middle (second) group of sliding windows is the sum of signals in the windows; the sliding windows on both sides (first and third) respectively calculate the sum of the signals in the window, and then calculate the difference. And subtracting the difference value from the output value of the middle window to obtain the output signal of the identification device. The peak position of the output signal is identified and the delay due to the length of the third sliding window is compensated for the peak position, which is the edge of the synchronization signal.

Description

Method and device suitable for detecting synchronization signal in communication system

technical field

The invention relates to a synchronization signal detection method and device.

Background technique

In the 1960s, Orthogonal Frequency Division Multiplexing (OFDM), which uses the concept of parallel data transmission and frequency division multiplexing, was proposed. The research focus of OFDM mainly lies in the modulation and demodulation technology for high-speed transmission and the application of digital mobile communication system. Inter-Symbol Interference ("ISI") and Inter-Carrier Interference ("ICI") are often caused by errors in channel impulse response, timing synchronization, and frequency synchronization.

Therefore, in an Orthogonal Frequency Division Multiplexing (OFDM) system, an important task is timing synchronization and estimation, especially for the receiver. Traditionally, a synchronization signal (Synchronization Signal) is formed by repeatedly transmitting a specific signal. Generally, an autocorrelator is used for estimation. Auto-correlator provides a well-known and simple timing estimation method. The device can detect the relevant characteristics of any signal with repetitive characteristics about the time sequence, therefore, the detection of the time sequence information can be obtained through the detection of the device. However, if the synchronization signal repeats more than twice in time sequence, the calculation result obtained by this device may produce a so-called Plateau Region. The generation time of the plateau region usually occurs at the symbol edge of the synchronization signal. Such phenomena usually come from the cyclic prefix (Cyclic Prefix, CP) added at the front end of the OFDM symbol, or the synchronization signal is composed of signals that are repeatedly transmitted more than twice. This plateau region will cause uncertainty in timing estimates.

From the perspective of existing systems (such as IEEE 802.11(a)), this plateau does not seem to have a great impact, and the High Peak Region (High Peak Region) will be used for timing synchronization estimation. As long as a specific detection criterion (Detection Criterion) is added to the design, then these timing information can also be obtained. However, the above method has a prerequisite, that is, the communication environment must be in a stable state, and the noise (Noise) or channel effect (Channel Effect) must be very low or very slight, so that the obtained results have plateau characteristics , can be quite clear and predictable, so that the above-mentioned detection method can get correct results.

However, from the perspective of next-generation communication systems, the OFDM system will be applied to wider areas, such as outdoor communication systems, or communication architectures that must support high-speed mobility, and the like. At this time, the result of timing detection will be blurred due to the influence of noise in the external environment. In this way, it will be difficult to correctly detect timing-related information. Existing detection architectures are very unsuitable for next-generation communication systems.

In U.S. Patent No. 7012881 published on March 14, 2006, a "Timing and Frequency offset Estimaion Scheme for OFDM Systems by usingan Analytic Tone" is proposed. In this patent, timing synchronization is used to sum up all the autocorrelation results (CorrelationOutput) output by the autocorrelator (Auto-correlator) through a sliding window (Sliding Window) to avoid the plateau phenomenon.

In the US Patent Application No. 200600018143 published on January 26, 2006, a "Coarse Timing Estimaion System and Methodology for WirelessSymbols" was proposed. This synchronization signal is a general OFDM symbol. The timing information can be estimated by cyclic prefix (Cyclic Prefix, CP). Such synchronization signals do not produce the so-called plateau effect. And because the length of the cyclic prefix is short, when the communication environment is extremely poor, the peak value generated by its autocorrelation is easily overwhelmed by the channel environment or noise.

In the U.S. Patent No. 7218691 published on May 15, 2007, a "Method and Apparatus for Estimation of Orthogonal Frequency Division Multiplexing Symbol Timing and C

In the U.S. Patent No. 7039000 published on May 2, 2006, a "Timing Synchronization for OFDM-Based Wireless Network" was proposed. This patent proposed a two-stage autocorrelation circuit (Two-stage Correlation Circuit) to obtain better timing information. The first stage is an auto-correlator that uses a coarse timing synchronization (Coarse Timing Synchronization) operation, while the second stage is an auto-correlator that uses a finer timing synchronization (Fine Timing Synchronization) operation . This more sophisticated synchronous operation uses an up-sampler (Up-Sampler) and an interpolator (Interpolator) to increase the accuracy of detection.

In the U.S. Patent No. 7039000 published on May 2, 2006, a "Apparatus and Associated Method of Symbol Timing Recovery Using Coarseand Fine Symbol Time Acquisition" was proposed. This patent mainly proposed a method in the time domain (TimeDomain) Estimate the profile of the Channel Impulse Response (Channel Impulse Response) in order to estimate the timing information. The method proposed in this patent needs to know the pilot signal (Pilot Signal) in the frequency domain (Frequency Domain) in advance to obtain the channel impulse response. This detection method requires the use of Fast Fourier Transformation (FFT) and Inverse Fast Fourier Transformation (IFFT) operations, and is usually suitable for timing adjustments after the receiving end has completed Coarse Synchronization .

In the U.S. Patent No. 7136438 published on November 14, 2006, a "Receiving method and receiver" was proposed, using the concept of maximum likelihood (Maximum Likelihood) to match the received signal with the known synchronization signal Detection (Match Detection).

In U.S. Patent Application No. 20060146962 published on July 6, 2006, a "Method and device for frame detection and synchronizer" was proposed. This patent uses a differentiator to detect the edge of the plateau.

Contents of the invention

An embodiment of the present invention provides a method for detecting a synchronization signal in a communication system, which includes receiving a received signal containing a synchronization signal at the receiving end, and generating an input signal after an autocorrelation operation, and inputting it to the method proposed in the present invention Synchronization signal detection device. The detection device includes three groups of sliding windows (Sliding windows), corresponding to the input signal to obtain a corresponding first sliding window value, a second sliding window value and a third sliding window value, wherein the length of the second sliding window is greater than that of the first The length of the sliding window and the third sliding window. The output value of the second sliding window is the sum of the signals in the window; and the first and third sliding windows respectively calculate the sum of the signals in the window, and then calculate the difference. The difference is then subtracted from the output value of the second sliding window, which is the output signal of the identification device. The peak position of the output signal is identified, and the delay caused by the length of the third sliding window is compensated for the peak position, and this position is the symbol edge of the synchronization signal. The length of the compensation is the length of the third window.

An embodiment of the present invention provides a device suitable for detecting synchronization signals in a communication system, including an autocorrelation generator, a plurality of registers, and a plurality of adders. The autocorrelation generator receives a received signal containing a synchronization signal, and sequentially undergoes an autocorrelation operation to generate a plurality of input signals. The above-mentioned registers are connected in series for sequentially receiving the input signals generated by the self-correlation generator, and sequentially shifting and storing from the serially connected registers in a shifting manner. The above-mentioned adder sequentially obtains the input signal values stored in the registers of a first quantity, a second quantity and a third quantity respectively for the serially connected registers from the end receiving the input signal, and adds them up to obtain a A first window value, a second window value and a third window value. The above-mentioned first quantity, second quantity and third quantity correspond to the quantity of registers of a first window, a second window and a third window respectively, and the second quantity is greater than the first quantity and the third quantity, and the The second window value judges whether the above-mentioned synchronous signal appears, and if the above-mentioned synchronous signal appears, a peak value will appear in the second window. A balance value is obtained from the absolute value of the difference between the first window value and the third window value, and the balance value is subtracted from the second window value to obtain the output of the synchronous signal detection device. The peak position of the output signal is identified, and the delay caused by the third window length is compensated for the peak position, which is the edge of the synchronization signal. The length of the compensation is the length of the third window.

In the above method and device, the length of the second window is the plateau length caused by the synchronization signal passing through the autocorrelator.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

Description of drawings

FIG. 1A is a diagram illustrating the standard structure of a synchronization signal within an OFDM symbol signal.

FIG. 1B is a schematic diagram illustrating a signal structure proposed according to the IEEE 802.11(a) standard.

FIG. 1C is a schematic structural diagram of the entire data packet (Data Packet), including ten short training symbols, two long training symbols, a signal field, and a data field.

FIG. 2A is a schematic circuit block diagram illustrating an auto-correlator.

The output of the autocorrelation calculator shown in FIG. 2B when it receives the signal shown in FIG. 1A is further illustrated by the corresponding regions drawn in time.

Figure 2C is a schematic diagram illustrating how the output of an autocorrelation calculator produces plateau regions.

FIG. 3A is a schematic circuit diagram illustrating a synchronization signal detection method with high precision proposed in an embodiment of the present invention.

FIG. 3B is a schematic diagram when the plateau signal obtained by the synchronization signal through the autocorrelator has partially passed through the circuit shown in FIG. 3A .

FIG. 3C is a schematic diagram when the plateau signal obtained by the synchronization signal through the autocorrelator completely enters the circuit as in FIG. 3A .

FIG. 3D is a schematic diagram when the plateau signal obtained by the synchronization signal through the autocorrelator has not completely entered the circuit shown in FIG. 3A .

FIG. 4 is a schematic diagram illustrating the time detection result shown in the present invention and the result obtained by the conventional circuit.

FIG. 5A and FIG. 5B are comparison diagrams of the results obtained by the synchronization signal detection method proposed in US Pat. No. 7,012,881 and the present invention, respectively.

[Description of main component symbols]

110: Synchronization signal

112, 114: signal part

116: Cyclic Prefix part

120: Time domain signal

132: short training code unit

134: Long training code unit

136: Signal field

138: Data field

200: Autocorrelation Calculator

202: Delay device

204: Circuit for calculating conjugate complex numbers

208: Multiplier

210: Moving average calculation device

214: Moving average calculation device

216: circuit

210: curve

212: Plateau area

230: curve

300: circuit

310: register

312, 314, 316, 318: adders

410, 420: time curve

Detailed ways

An embodiment of the present invention provides a high-precision synchronous signal detection method and device, which are suitable for wide-area OFDM systems. The synchronous signal detection method and device can eliminate the influence of noise in the external environment and correctly detect synchronous information.

An embodiment of the present invention provides a high-precision synchronous signal detection method and device, which are suitable for wide-area OFDM systems. The synchronous signal detection method and device can eliminate the influence of noise in the external environment and correctly detect synchronous information. The method for detecting a synchronous signal includes receiving a received signal containing a synchronous signal, and sequentially performing an autocorrelation (antocorrelation) operation to generate a plurality of input signals. Sequentially according to a plurality of windows, the corresponding multiple window values are obtained from the corresponding registers of the above-mentioned input signals, and the peak signal for judging whether the synchronous signal appears is obtained from one of these window values, and the other window value operations are obtained and subtracting the balance value from the peak signal to obtain the output of the synchronous signal detection device. The peak position of the output signal is identified, and the delay caused by the third window length is compensated for the peak position, which is the symbol edge of the synchronization signal. The length of the compensation is the length of the third window, wherein the first, second and third windows are respectively composed of different numbers of registers with different lengths.

In the above method for detecting a synchronous signal, the length of the window for obtaining the peak signal is the plateau length caused by the synchronous signal passing through the autocorrelator.

In the above-mentioned method for detecting a synchronous signal, obtaining a plurality of window values corresponding to the above-mentioned input signal is obtained by summing up the values of the corresponding input signal.

The above-mentioned method for detecting a synchronization signal is applicable to applications such as Wireless Local Area Network (WLAN), Worldwide Interoperability for Microwave Access (WiMAX) or Wideband Code Division Multiple Access (WCDMA).

Firstly, the synchronization signal detection method proposed by the present invention is aimed at a group of multiple repeated synchronization signals used for similar time detection. Please refer to FIG. 1A , which illustrates a standard structure of a synchronization signal in an OFDM symbol signal. The synchronization signal 110 structure of this OFDM symbol includes two symmetrical and repeated signal parts 112 and 114 ("D" in the figure), and a Cyclic Prefix (Cyclic Prefix) part 116 ("CP" in the figure). ”), wherein the length of the signal part “D” is D′, and the CP part is located at the front end of the OFDM symbol (Symbol) 110. Figure 1B illustrates the composition of an OFDM signal in the time domain, including multiple short training symbols (Short Training Symbol "S"), as shown in the figure, a total of K from S ₀ , S ₁ to S _K-1 synchronization signal.

FIG. 1A is a synchronous signal structure of an OFDM symbol, which includes a signal part (that is, two "D" parts) and a cyclic prefix part "CP". This synchronous signal is generated by using down-sampling of the frequency domain signal to make the time domain signal repetitive.

The signal structure proposed in FIG. 1B has been defined in standards such as IEEE 802.11(a). The time-domain signal 120 shown in the figure includes K short training symbols (Short TrainingSymbol) in total from S ₀ to S _K-1 . The length of each short training symbol is S'. If taking K=10 as an example, the whole data packet (DataPacket) as shown in Figure 1C, includes ten short training symbols 132 (S ₀ to S ₉ in the figure), two long training symbols 134 (shown L ₀ and L ₁ ), a signal field 136 , and a data field 138 .

Please refer to FIG. 2A . FIG. 2A is a circuit block diagram illustrating an auto-correlator. In the autocorrelation calculator 200, the referenced N may be the length D' of the signal portions 112 and 114 in FIG. 1A, or N may be the length S' of the short training symbols in FIG. 1B. The received signal undergoes two parallel operations. The first operation is through the delay device 202 that delays N clocks, the circuit 204 for calculating the conjugate complex number, and then the output value and the received signal are multiplied by the multiplier 208 and then output to the moving average calculation device 210, which is output after calculation After reaching the circuit 212 for calculating the absolute value, x _k is output. In addition, the second operation is to first calculate the absolute value of the received signal, and then output it to the circuit 216 to calculate the value after the calculation by the moving average calculation device 214, and output y _k . And the output of the autocorrelation calculator 200 may be r _k =x _k /y _k .

The output timing and calculation results obtained by the autocorrelation calculator 200 from detecting the synchronization signal shown in FIG. 1A are shown in the curve 220 in FIG. 2B . From this result, it can be clearly understood that the autocorrelation calculator 200 detects the synchronization signal as shown in FIG. 1A to generate the plateau region 224 . The autocorrelation calculator 200 detects the synchronous signal as shown in Figure 1A and produces the output of the plateau phenomenon and draws the corresponding area diagram in time, which is illustrated by a schematic diagram of a trapezoid, including the one shown in the figure Regions A, B (reference number 222) and C (reference number 226). The length of the area A is the length of the plateau area 224 , and the areas B and C are on both sides of the area A respectively.

As for how to generate this plateau region, please refer to FIG. 2C. The synchronous signal structure of the OFDM symbol mentioned in FIG. 1A includes a signal part (two "D") and a cyclic prefix part "CP" as an example for illustration. After the synchronization passes through the autocorrelator, the time point at which the peak value is generated due to the detected repetitive signal is t2, and the peak value generated by the autocorrelator will continue until the time point t4 when the synchronization signal ends. By using a sliding window (Sliding Window), and summing up the average values corresponding to this window (as shown in 210 in Figure 2A). Assume that the moving average is calculated from t1, and at t2, area B begins to form, and then at t3, it begins to enter the plateau area, gradually forming area A, and then at t4, the moving average begins to decline and area C is formed. According to the results generated by the autocorrelation calculator 200 along with the time series, the length of the area A, that is, the plateau area 224 is equal to the length of the CP signal + 1.

An embodiment of the present invention proposes a high-precision synchronous signal detection method, which can eliminate the above-mentioned plateau region generated by the autocorrelation calculator to detect the synchronous signal, so as to obtain a correct detection result. For the convenience of describing the features of this invention, it will be further described with reference to the output of the synchronous signal detected by the autocorrelation calculator 200 shown in FIGS. 3B-3D and the corresponding area drawn in time, and the trapezoid The schematic diagram includes the middle area A and the two sides B and C, where the length of the area A is the length of the plateau area 224, and the areas B and C are respectively on both sides of the area A, and the values of these areas can be determined by different Sliding Window (Sliding Window), and according to these different sliding windows to obtain different total values. The high-precision synchronous signal detection method proposed by the present invention can detect the correct peak time point as long as it uses the combination of different sliding window output values obtained and judges the generated peak position.

As shown at 230 in FIG. 2B , if a sliding window is simply used to calculate the output of A' to remove the plateau signal, its peak area is gentle and not sharp enough, and it is easy to make it more blurred by the channel environment or noise. If the output obtained by the sliding window can be used, and the relationship such as A'-|C'-B'| Represent the sum of the signals in regions B and C, respectively. After integrating the total output of the sliding window into A'-|C'-B'|, the obtained result is a curve 410 as shown in FIG. 4 . It can be seen from the figure that after setting the total output of the sliding window to A'-|C'-B'|, the phenomenon of this plateau area will be removed from the result figure.

长度，而M代表代表区域B与C的滑动窗

与

长度，在此假设区域B与C的长度值应该相同，而上列字母上方盖冒形状的标示主要说明滑动窗的名称。因此，第L+M+1到L+2M个寄存器所存储的值经过加法器312相加后可以取得滑动窗

的值B’，而第M+1到L+M个寄存器所存储的值经过加法器314相加后可以取得滑动窗

的值A’，而第1到M个寄存器所存储的值经过加法器316相加后可以取得滑动窗

的值C’。The synchronous signal detection method with high precision proposed by an embodiment of the present invention is applied to the actual circuit diagram, as shown in FIGS. 3A-3D , so as to obtain an appropriate width of the sliding window. In FIG. 3A , the output r _k =x _k /y _k of the autocorrelation calculator 200 is sequentially transmitted to the register of the circuit 300 according to time. This circuit 300 requires L+2M registers 310 connected in series, where L represents the sliding window of region A

length, and M represents the sliding window representing regions B and C

and

Length, it is assumed that the length values of areas B and C should be the same, and the cap-shaped mark above the letters above mainly explains the name of the sliding window. Therefore, the values stored in the L+M+1 to L+2M registers can be added by the adder 312 to obtain the sliding window

value B', and the values stored in the M+1 to L+M registers are added by the adder 314 to obtain the sliding window

value A', and the values stored in the 1st to M registers are added by the adder 316 to obtain the sliding window

The value of C'.

After B' and C' are operated by C'-B' (C' is input to the positive terminal of the adder 318, and B' is input to the negative terminal of the adder 318) through the adder 318, the absolute value is taken by the circuit 320 and output to the adder 322 to calculate the output value of A'-|C'-B'|, and this output value can be used to judge whether the circuit 300 generates a peak value (Peak) due to the detected synchronous signal. Therefore, the relationship between the signal input and output of the circuit 300 can be expressed as follows:

${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; =</span>\underset{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; m</span>}}{\overset{\mathrm{<span\; class="notranslate">\; L</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; r</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>\underset{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; r</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; -</span>\underset{{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; L</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; m</span>}}{\overset{\mathrm{<span\; class="notranslate">\; L</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; r</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}}<span\; class="notranslate">\; |</span>$

in $\underset{{\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout>}}_1=m}{\overset{L+m-1}{\mathrm{\&Sigma;}}}{r}_{k-{\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout>}}_1}=A^{\&prime;},$ $\underset{{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout>}}_2=0}{\overset{m-1}{\mathrm{\&Sigma;}}}{r}_{k-{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="S2007101998443E00011.png,S2007101998443E00031.png"\; state="\{\{state\}\}">k</figure-callout>}}_2}=C^{\&prime;},$ $\underset{k_3=L+m}{\overset{L+2m-1}{\mathrm{\&Sigma;}}}{r}_{k-k_3}=B^{\&prime;}.$

As mentioned above, the high-precision synchronous signal detection method proposed by the present invention includes receiving the received signal containing the synchronous signal at the receiving end, and the input signal generated after autocorrelation (antocorrelation) operation, and input to the synchronous signal detection device. The detection device includes three sets of sliding windows, wherein the first, second and third sliding windows are respectively composed of registers of different lengths. The above-mentioned first, second and third sliding windows correspond to the input signals to obtain the corresponding first sliding window value, second sliding window value and third sliding window value, and the output value of each sliding window is determined by the value in the corresponding register The sum indicates that the register length of the second sliding window is greater than the register lengths of the first sliding window and the third sliding window. The output value of the second sliding window is the sum of the signals in the window; and the first and third sliding windows respectively calculate the sum of the signals in the window, and then calculate the difference. The difference is then subtracted from the output value of the second sliding window, which is the output signal of the identification device. The peak position of the output signal is identified, and the delay caused by the third sliding window length is compensated for the peak position, and this position is the symbol edge of the synchronization signal.

The first sliding window value, the second sliding window value, and the third sliding window value mentioned above are the adder 316, the adder 314, and the adder 312 described in this figure. The output value after summing the values. The first and third sliding windows calculate their difference, which is the output of the adder 318 . The output of the adder 322 is obtained by subtracting the difference from the output value of the second sliding window.

以求得接收端接收到同步信号时，此同步信号经自相关检测器之后，所产生的高原信号(即图3B～3D的A部分面积)的总和。并且，于此滑动窗之前、后各自附加长度为M的滑动窗(

及

)，以求得接收端接收到同步信号时，此同步信号经自相关检测器之后，产生的高原两侧斜坡部分(即图3B～3D的B及C部分)的信号总和。当同步信号经自相关运算所得的高原部份完全进入电路300中间滑动窗

(图3C)，此滑动窗的总和输出A’应得一峰值，同时两边的滑动窗(

及

)的输出(B’及C’)值应十分相近(|C’-B’|≌0)。The principle of this circuit 300 mainly utilizes a group of sliding windows with length L

In order to obtain the sum of plateau signals (that is, the area of part A in FIGS. 3B-3D ) generated after the synchronization signal passes through the autocorrelation detector when the receiving end receives the synchronization signal. And, here the sliding window Sliding windows of length M are attached to the front and back respectively (

and

), to obtain the sum of the signals of the slope parts on both sides of the plateau (ie, parts B and C in Fig. 3B-3D) generated after the synchronous signal passes through the autocorrelation detector when the receiving end receives the synchronous signal. When the plateau part obtained by the autocorrelation operation of the synchronous signal completely enters the sliding window in the middle of the circuit 300

(Fig. 3C), the sum output A' of this sliding window should have a peak value, while the sliding windows on both sides (

and

) output (B' and C') should be very similar (|C'-B'|≌0).

的输出值(A’)将降低，同时两边的滑动窗(

及

)的输出(B’及C’)值差距将变大(|C’-B’|＞0)。因此，利用三组滑动窗取得A’-|C’-B’|的输出信号可同时检测得高原信号的峰值，并且依B’与C’之间的平衡关系(|C’-B’|)来加强接收端对于同步信号识别能力。如此，本实施例所提的方法可有效地估计出同步信号的码元位置。并且，以信号总和的概念进行估计可达到抗干扰的功能。If the plateau part obtained by the autocorrelation operation of the synchronous signal leaves or does not fully enter the L addition registers in the middle of the circuit 300 (Fig. 3B or (Fig. 3D), then the sliding window

The output value (A') will decrease, while the sliding window on both sides (

and

) output (B' and C') value gap will become larger (|C'-B'|>0). Therefore, using three sets of sliding windows to obtain the output signal of A'-|C'-B'| ) to enhance the ability of the receiving end to identify synchronous signals. In this way, the method proposed in this embodiment can effectively estimate the symbol position of the synchronization signal. Moreover, the function of anti-jamming can be achieved by estimating with the concept of signal summation.

FIG. 4 is a schematic diagram illustrating the simulation results of the time detection shown in the present invention and the results obtained by the conventional circuit. The synchronous signal detection method proposed by the present invention, the obtained time curve is shown as the solid line part shown in label 410, while the result obtained by the traditional method is shown as the part shown in dotted line 420, it can be clearly known that the proposed method of the present invention The detection method has a considerable improvement and effect in the plateau area, and has a relatively high accuracy.

Figure 5A and Figure 5B are mainly for comparison with the "Timing and Frequency offset Estimation Scheme for OFDM Systems by using an Analytic Tone" proposed in the aforementioned known US Patent No. 7012881. FIG. 5A shows the results obtained by the synchronization signal detection method proposed in the No. 7012881 patent and the present invention, respectively denoted by reference numerals 510 and 520, which can detect the peak positions respectively. In addition, please refer to Figure 5B. If it is transmitted in a typical urban channel (Typical Urban Channel, that is, the TU Channel shown in the figure), because there is quite a lot of noise, the result obtained by the No. 7012881 patent is the same as that obtained by the present invention. The results are indicated at 530 and 540 respectively, ie non-discrepancies are produced.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection of the invention should be defined by the claims.

Claims (11)

1. A method suitable for a communication system to detect a synchronization signal, comprising: Receive a received signal containing a synchronous signal, and sequentially generate a plurality of input signals after autocorrelation operations; According to the first window, the second window and the third window in sequence, the corresponding first window value, the second window value and the third window value are obtained corresponding to the input signal, wherein the length of the second window is greater than the length of the first window and the The length of the third window, the first window value, the second window value and the third window value are respectively the first quantity, the second quantity and the third quantity corresponding to the lengths of the first window, the second window and the third window The values of these input signals are summed and obtained separately; Using the second window value to determine whether a peak is generated due to receiving the synchronization signal in the autocorrelation operation; and The absolute value of the difference between the first window value and the third window value is obtained as a balance value, where Subtracting the balance value from the second window value is the output signal of the detection method, and identifying the peak position of the output signal and compensating for the delay caused by the length of the third window is the symbol of the synchronization signal edge. 2. The method for detecting a synchronous signal as claimed in claim 1, wherein compensating the delay caused by the length of the third window is by using the length of the third window to compensate the delay. 3. The method for detecting a synchronous signal as claimed in claim 1, wherein the length of the second window is a length of a plateau caused by the autocorrelation operation of the synchronous signal. 4. The method for detecting a synchronous signal as claimed in claim 1, wherein the lengths of the first window, the second window and the third window correspond to the register numbers of the first, second and third windows respectively. 5. The method for detecting a synchronous signal as claimed in claim 4, wherein the first number and the third number are a quarter of the second number. 6. The method for detecting a synchronization signal as claimed in claim 1, which is applicable to wireless local area network, global interoperability for microwave access or wideband code division multiple access applications. 7. A device suitable for detecting synchronization signals in a communication system, the device comprising: The autocorrelation generator receives multiple synchronous signals and sequentially generates multiple input signals after autocorrelation operations; A plurality of registers connected in series for sequentially receiving the input signals generated by the autocorrelation generator, and sequentially shifting and storing from these serially connected registers in a shifting manner; A plurality of adders respectively obtains the input signal values stored in the registers of the first quantity, the second quantity and the third quantity sequentially from the end receiving the input signal for the registers connected in series, and sums them up Obtaining the first window value, the second window value and the third window value, wherein the first quantity, the second quantity and the third quantity respectively correspond to the quantity of registers of a first window, a second window and a third window , and the second number is greater than the first number and the third number, and the second window value is used to judge whether a peak value is generated due to the autocorrelation generator receiving the synchronization signal, and the first window value and the third window value The absolute value of the difference of the values is balanced, and the balanced value is subtracted from the second window value, which is the output signal of the detection device, and the peak position of the output signal is identified and compensated for by the length of the third window. The delay of is the symbol edge of the synchronization signal. 8. The apparatus of claim 7, wherein compensating the delay caused by the length of the third window is by using the length of the third window to compensate the delay. 9. The device of claim 7, wherein the length of the second window is the length of a plateau formed by the synchronization signal passing through the autocorrelation generator. 10. The apparatus of claim 7, the first number and the third number are a quarter of the second number. 11. The device according to claim 7, applicable to wireless local area network, global interoperability for microwave access or wideband code division multiple access applications.

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