CN101420810B - Lighting device and illumination apparatus - Google Patents

Abstract

The invention relates to a lighting apparatus and an illuminating appliance. The lighting apparatus comprises: an inverter circuit for converting direct current voltage into high frequency voltage and outputting for lighting the lamp; a state detecting unit for detecting the lamp state; a calculating unit for calculating the cycle of the PWM signal which actuates the inverter circuit at least according to the lamp lighting state detected by the detecting unit and a defined action clock; a signal generating unit which is constructed to be able to generate PWM signal corresponding to the non-integral number of times period of the defined action clock and PWM signal corresponding to the period calculated by the calculating unit; and a control unit for controlling the driving of the inverter circuit according to the PWM signal generated by the signal generating unit. The illuminating appliance comprises: a main body equipped with a lamp; and a lighting apparatus of the invention for controlling the lamp lighting. In the invention, fine modulated light control is enabled without stopping other processing regardless of operation clocks.

Description

Lighting devices and lighting fixtures

technical field

The present invention relates to a lighting device for lighting a lamp through an inverter circuit (Inverter Circuit), and a lighting fixture provided with the lighting device.

Background technique

In general, a lighting device including an inverter circuit is configured to adjust the switching cycle of the switching unit or the duty ratio of the switch according to the lighting state of the lamp or the power supply voltage. ) is controlled, whereby the lamp can be turned on at a constant brightness.

In recent years, with the development of various digital devices, digital control of the lighting device has been added so that the lighting device can be controlled from a digitized external device. In this case, generally, a control device that controls the drive of the inverter circuit is digitized. By digitizing the control device in this way, desired control characteristics can be easily obtained, and responsive control can be expected.

A digital signal processor (DSP), which is a digitized control device, uses digital arithmetic processing to generate a pulse-width modulation (Pulse-Width Modulation, PWM) signal to be supplied to an inverter circuit. When performing such digital calculation processing, the power supply voltage or the lighting state of the lamp is detected, and a PWM signal is generated based on the detection, and this PWM signal is input to the inverter circuit, thereby controlling, for example, the lighting of the lamp. The lighting frequency and the on duty of the output voltage are controlled to stably light the lamp.

However, when a PWM signal is generated by digital arithmetic processing in this way, there is a problem that the cycle of the PWM signal depends on the operation clock of the digital signal processing device. That is, when the operating clock of the digital signal processing device is relatively small, in other words, in the case of a low-speed control unit, it is difficult to perform fine frequency control.

On the other hand, if the operation clock of the digital signal processing device is increased, there is a problem of increasing power consumption and cost.

Therefore, for example, a method shown in Japanese Patent Application Laid-Open No. 2000-150180 is known, that is, a digital signal processing device is stopped for a predetermined period by interrupt handling (interrupt handling), thereby controlling the PWM signal during the stop period. Periodic adjustments are made.

However, in the lighting device described above, the digital signal processing device is stopped when the cycle of the PWM signal is adjusted, so there is a problem that other processing cannot be performed by the digital signal processing device during this adjustment period.

Contents of the invention

The present invention was made in view of the above problems, and an object of the present invention is to provide a lighting device capable of extremely fine dimming control without being limited by an operating clock and without stopping other processes, and a lighting fixture provided with the lighting device.

The lighting device of the present invention includes: an inverter circuit, which converts DC voltage into a high-frequency voltage and outputs it to light the lamp; a state detection unit, which detects the lighting state of the lamp; The detected lighting state of the lamp and the prescribed operating clock are used to calculate the cycle of the PWM signal that operates the inverter circuit; the signal generating unit is configured to generate a cycle corresponding to a non-integer multiple of the prescribed operating clock PWM signal, and generate a periodic PWM signal calculated by the calculation unit; and a control unit, based on the PWM signal generated by the signal generation unit, to drive and control the inverter circuit.

As the lamp, a low-pressure mercury discharge lamp such as a fluorescent lamp or a light-emitting diode (Light-Emitting Diode, LED) can be used, but is not limited to these.

As the inverter circuit, for example, an inverter circuit of a half bridge type or the like including a pair of switching elements can be used, but the present invention is not limited thereto.

The state detecting means can detect the lighting state of the lamp by detecting, for example, the lamp current or the lamp voltage of the lamp.

The arithmetic unit is, for example, an A/D (Analog/Digital, analog/digital) converter that converts the lamp current or lamp voltage that is an analog signal (analog signal) of the lamp into a discrete digital signal to obtain the period of the PWM signal. .

The signal generating unit is, for example, a microprocessor (microprocessor, MPU) (computing element) such as a personal computer, and is a digital part, and the digital part operates at a timing corresponding to the operating clock generated by the operating clock generating part to generate A PWM signal whose period is a non-integer multiple of the operating clock, corresponding to the state of the lamp, etc.

The control unit is, for example, a highside driver or the like connected to switching elements of the inverter circuit.

Furthermore, the cycle of the PWM signal is calculated based on the lighting state of the lamp detected by the state detection unit and a predetermined operating clock, and the PWM signal that can generate a cycle corresponding to a non-integer multiple of the predetermined operating clock is used. A signal generation unit to generate the calculated cycle PWM signal, so that the cycle number of the PWM signal can be continuously and finely changed without being limited by the operating clock and without stopping other processing, so that extremely fine dimming control can be performed .

Furthermore, in the lighting device of the present invention, the signal generating means alternately generates a first edge (edge) and a second edge, and the first edge is operated corresponding to either rising or falling of a predetermined operating clock, The second edge is output corresponding to any one of rising and falling, and between falling and rising, of a predetermined operating clock.

Either one of the first edge and the second edge is a rising edge, and the other is a falling edge.

In addition, the signal generating unit alternately generates a first edge corresponding to either rising or falling of a predetermined operation clock and a second edge corresponding to a predetermined operation. Between the rise and fall of the clock, and between the fall and the rise, it is output correspondingly, so that the period of the PWM signal can be controlled between the second edges, and the cycle of the PWM signal can be controlled between the first edges. The duty ratio is set to an arbitrary fixed value.

Furthermore, in the lighting device of the present invention, the inverter circuit includes a switching element, and the DC voltage is converted into a high-frequency voltage by switching operation of the switching element corresponding to the cycle of the PWM signal generated by the signal generating unit, so that The lamp is turned on so that the output voltage variation range (variation range) corresponding to the minimum decomposition width of the PWM signal cycle is less than 2V.

The period minimum resolution width refers to the width from the rise to the fall of the minimum pulse of the PWM signal.

Furthermore, the inverter circuit lights up the discharge lamp so that the output voltage variation range corresponding to the minimum resolution width of the PWM signal cycle is less than 2V, so that even a discharge lamp with a relatively high output voltage can be stably Dimming is performed.

Furthermore, in the lighting device of the present invention, the signal generating means sets a predetermined target value based on the lighting state of the lamp detected by the state detecting means, thereby performing feedback control on the inverter circuit.

Furthermore, according to the lighting state of the discharge lamp detected by the state detecting means, a predetermined target value of the signal generating means is set to feedback control the inverter circuit, thereby making it possible to efficiently to drive the inverter circuit.

Furthermore, in the lighting device of the present invention, the signal generator sets the cycle of the PWM signal to 20 μsec (microsecond) or less, and sets the cycle of the feedback control of the inverter circuit to 100 μsec (microsecond) or less.

Furthermore, by setting the cycle of the PWM signal to 20 μsec or less and setting the cycle of the feedback control of the inverter circuit to 100 μsec or less, the responsiveness of the inverter circuit can be further improved.

In addition, in the lighting device of the present invention, the feedback control of the inverter circuit by the signal generating means is performed every cycle.

Furthermore, the feedback control of the inverter circuit by the signal generation unit is performed every cycle, whereby the responsiveness of the inverter circuit can be further improved.

In addition, the lighting fixture of the present invention includes a fixture main body to which a lamp is attached, and any one of the lighting devices described above that controls lighting of the lamp.

The lighting fixture may be any lighting fixture for outdoor lighting, indoor lighting, general lighting, display, etc., and may have various shapes. Also, the lighting device may be integrated with or separated from the device main body.

Furthermore, various effects can be achieved by providing any one of the lighting devices described above.

To sum up, the present invention provides a lighting device that is not limited by the operating clock and can perform extremely fine dimming control without stopping other processes. The dimming signal generation unit calculates the period of the PWM signal based on the lighting state of the lamp detected by the state detection unit, a predetermined operation clock, and the like. The PWM signal of the period calculated by the dimming signal generating unit is generated by the dimming signal generating unit capable of generating a PWM signal corresponding to a cycle that is a non-integer multiple of the operating clock. The cycle of the PWM signal can be continuously and finely changed without being limited by the operating clock and without stopping other processing, so that extremely fine dimming control can be performed.

The above description is only an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable , the following preferred embodiments are specifically cited below, and are described in detail as follows in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a circuit diagram showing a lighting device according to an embodiment of the present invention.

Fig. 2 is a bottom view showing a section of a part of a lighting fixture including a lighting device.

Fig. 3A is a timing chart showing the relationship between an operating clock and a PWM signal of the lighting device.

FIG. 3B is an explanatory diagram showing an enlarged part of the timing chart in FIG. 3A .

Fig. 4 is a timing chart showing the operation of a power supply unit of the lighting device.

Fig. 5 is a graph showing the relationship between the operating cycle of the inverter circuit and the lamp voltage in a general lighting device.

Fig. 6 is a table showing differences in lamp voltage by output resolution of the lighting device.

FIG. 7 is a graph corresponding to each minimum resolution in the table shown in FIG. 6 .

11: Lighting fixtures 12: Lamps

13: Four sides 14: Corner

15: Light-emitting tube 16: Lamp port

21: Appliance main body 23: Top plate

23a: Lighting device installation part 24: Side plate part

25: frame part 26: opening part

31: Ceiling with equipment installation body 33: Side part

37: Light storage part 40: Power input side

41: Lamp output side 42: Discharge lamp lighting device

43: Power wiring board 44: Light socket

51: Power supply unit 52: Inverter circuit

53: Resonant circuit 55: Preheating circuit

56: Digital signal processing device 57: Lighting circuit

58: Main circuit 59: Boost chopper circuit

61: Trigger 63: Analog Comparator

64: Chopper control unit 65: High-end driver

71: Voltage setting part 72: Preheating circuit control part

73: State detection unit 74: Dimming signal generation unit

76: Clock Generation Section BD: Diode

C1～C7: Electrolytic capacitors CLK: Action clock

D1, D2: diodes e: commercial AC power supply

FLa, FLb: Filament I: Current

I0: Input current IQ: Switching current

IL: lamp current IP: preheating current

I1: output current L1: chopper choke

L2: Coil for resonance L3: Transformer for preheating

L1a, L1b: Primary Coil L3a: Primary Coil

L3b: The first secondary coil L3c: The second secondary coil

P, PP, P1, P2: PWM signal Q1, Q2, Q3, Q4: field effect transistor

R1, R2, R3, R4: Resistance SP: Switching pulse

V: voltage V0, V1: input voltage

VL: lamp voltage VQ: voltage

VR: reset voltage VTH: reference voltage

a: width

Detailed ways

As shown in FIG. 2 , the ceiling-mounted lighting fixture 11 as a lighting fixture is, for example, a ceiling-mounted lighting fixture installed on a system ceiling in which T bars are combined in a grid. The appliance uses a quadrangular ring-shaped (square ring-shaped) lamp 12 as a lamp (discharge lamp) as a light source serving as a load, that is, a polygonal ring-shaped lamp. The lamp 12 is, for example, a lamp with a tube diameter of 15 mm to 18 mm, and includes: a light emitting tube 15 formed in a quadrangular ring shape, and has four straight sides 13 and the ends of these four sides 13 are spaced approximately Four corners 14 that are connected at right angles; Connecting pins (not shown) protrude from the peripheral surface side, and the connecting pins are connected to electrodes (not shown) provided on both ends of the arc tube 15 .

Furthermore, the ceiling-embedded lighting fixture 11 has a fixture main body 21. The fixture main body 21 is formed in a quadrangular box shape with an open lower surface, and has a quadrangular top plate 23, which is formed by bending downward from the peripheral edge of the top plate 23. The side plate portion 24 and the frame portion 25 are formed by bending in a substantially L-shape around the lower end of the side plate portion 24 . The external dimensions of the frame portion 25 of the instrument body 21 are formed to be smaller than the internal dimensions of the embedded opening surrounded by the T-frame of the suspended ceiling.

A quadrangular opening 26 is formed in the central area of the top plate 23, and on the lower surface side of the opening 26, the ceiling attached equipment mounting body 31 is detachably attached to the top plate 23 by using screw clamps or the like. the lower surface.

Between the top plate portion 23 of the appliance main body 21, the side plate portion 24, and the side portion 33 of the ceiling-attached equipment mounting body 31, a quadrangular ring-shaped lamp receiving portion 37 with an open lower surface is formed, and inside the lamp receiving portion 37 The lamp 12 is accommodated and arranged.

In addition, on the lower surface of the top plate portion 23 of the appliance main body 21, a lighting device as a load control device, that is, a discharge lamp lighting device 42 (hereinafter referred to as a discharge lamp lighting device 42 ), is mounted on a lighting device mounting part 23a that is an edge of one side of the opening 26. Lighting device 42), this discharge lamp lighting device 42 is equipped with a power input side 40 on one end along the edge of the opening 26, and a lamp output side 41 is disposed on the other end, the power supply of the lighting device 42 On the input side 40, a power supply terminal block (terminal block) 43 is installed on the edge of the side intersecting with the side of the opening 26 where the lighting device 42 is installed, and on the lamp output side 41 of the lighting device 42, a power supply A lamp socket (lamp socket) 44 is attached to the edge of the side opposite to the side of the opening 26 of the terminal block 43. This lamp socket 44 is connected to the lamp socket 16 of the lamp 12 and also serves as a lamp socket for detachably holding the lamp 12. 16 lamp holders. The lighting device 42 and the power terminal block 43 are disposed inside the ceiling-attached equipment mounting body 31 and are covered together with the opening 26 .

Moreover, as shown in FIG. 1, in the lighting device 42, an inverter circuit 52 is connected to a power supply unit 51 that rectifies and smoothes the commercial AC power supply e, and the output terminal of the inverter circuit 52 is connected via a resonant circuit (resonant circuit). The filaments (filament) FLa, FLb of the lamp 12 are connected to the circuit 53 . Further, a preheat circuit 55 for the filaments FLa, FLb of the lamp 12 is connected to a connection portion between the inverter circuit 52 and the resonant circuit 53 . Furthermore, a digital signal processing device 56 (hereinafter referred to as DSP 56 ), which is a circuit control unit as a control device, is connected to the power supply unit 51 , the inverter circuit 52 , and the preheating circuit 55 . Furthermore, a lighting circuit 57 as an operating circuit (operating circuit) is constituted by a commercial AC power supply e, a power supply unit 51, an inverter circuit 52, a resonant circuit 53, a preheating circuit 55, and a DSP 56. 57 is connected to lamp 12 to form a main circuit (main circuit) 58.

The power supply unit 51 is a step-up chopper having a so-called critical mode (discontinuous mode) power factor improvement (power factor correction, PFC) function that makes the phase (phase) of the input current I0 and the input voltage V0 match. (chopper) power supply, a bridge diode BD (bridge diode) as a full-wave rectification unit is connected to the commercial AC power supply e, and a boost chopper circuit 59 is connected to the output side of the bridge diode BD. On the output side of the bridge diode BD, between the step-up chopper circuit 59 and the inverter circuit 52, a chopper choke coil (chopper choke) L1 and a step-up transformer (transformer) are connected. A series circuit of a diode D1 for reverse blocking, and a first switching element as a switching element, that is, a switching element for chopping, is connected in parallel to the connection point of the chopper choke coil L1 and the anode of the diode D1 A field effect transistor (Field Effect Transistor, FET) Q1, and an electrolytic capacitor (electrolytic capacitor) C1 as a capacitor for smoothing is connected in parallel to the connection point between the cathode of the diode D1 and the inverter circuit 52.

The chopper choke coil L1 has a primary winding L1a and a secondary winding L1b, the primary winding L1a is connected between the output side of the bridge diode BD and the anode of the diode D1, and the secondary winding L1b One end side is connected to the ground wire (earth), and the other end side is connected to the set terminal (set terminal) of the flipflop (flipflop) 61 which is a sequence circuit (sequence circuit) as a control signal generation part via the resistance R1 for detection. . Therefore, the choke voltage V generated in the resistor R1 by the choke current I is input to the set terminal of the flip-flop 61 from the secondary coil L1b of the chopper choke L1.

In the field effect transistor Q1, the drain terminal is connected to the connection point between the chopper choke coil L1 and the anode of the diode D1, and the source terminal is connected to the ground via the resistor R2. A gate terminal of the control terminal is connected to an output terminal of the flip-flop 61 .

Here, the flip-flop (flip-flop) 61 is a so-called reset-set (RS) type flip-flop, and is an output of an analog comparator (analog comparator) 63 which is a comparator of an operational amplifier (operational amplifier). The terminal is connected to a reset terminal (reset terminal). In this analog comparator 63, one of the input terminals is connected to the connection point between the drain terminal of the field effect transistor Q1 and the resistor R2, and the voltage VQ generated in the resistor R2 by the switching current IQ of the field effect transistor Q1 is inputted, And the other input terminal is connected to DSP56 via the resistance R3, and the connection point with the said resistance R3 is connected to the ground line via the capacitor C2.

Furthermore, these flip-flops 61, analog comparators 63, etc. constitute a step-up chopper circuit control unit as a switching pulse (switching pulse) generating circuit, that is, a chopper control unit 64. The operation of the step-up chopper circuit 59 is controlled by using the zero-current phase of the coil current I and the switching current IQ.

In addition, the inverter circuit 52 is a so-called half-bridge type inverter, and field effect transistors Q2 and Q3 , which are switching elements for an inverter as second switching elements, are connected in series to the power supply unit 51 .

In the field effect transistors Q2 and Q3, gate terminals serving as control terminals are connected to the DSP 56 via a high-side driver 65 serving as control means, and are turned on and off in accordance with a signal supplied from the high-side driver 65. )control.

The high-side driver 65 drives the field effect transistor Q2, When Q3 is turned on and off alternately (switching is driven), a predetermined high-frequency alternating current (high-frequency alternating current) is generated between the drain and the source of the field effect transistor Q3.

In the resonant circuit 53 , a DC component blocking capacitor C3 and a resonant coil (resonant inductor) L2 are connected in series between both ends of the field effect transistor Q3 , and a resonant capacitor C4 is connected in parallel.

The preheating circuit 55 includes a series circuit of a transformer L3 for preheating, a capacitor C5, a field effect transistor Q4 as a switching element for preheating, and a resistor R4 for current detection. A diode D2 is connected between the source terminals of the transistor Q2.

In the preheating transformer L3, the primary coil L3a, the first secondary coil L3b, and the second secondary coil L3c are arranged facing each other, and the primary coil L3a is connected between the connection point of the field effect transistors Q2 and Q3 and the resonance capacitor C4. The secondary coils L3b, L3c are connected to the filaments FLa, FLb of the lamp 12 via capacitors C6, C7, respectively.

In the field effect transistor Q4, the gate terminal which is a control terminal is connected to DSP56, and switching control is performed based on the PWM signal for warm-up supplied from the said DSP56.

Furthermore, the DSP 56 is an MPU (computing unit) such as a so-called personal computer that performs digital signal processing, and is integrally equipped with a reference voltage (reference voltage) setting unit as a reference waveform setting unit, that is, a voltage setting unit 71, and an analog voltage setting unit. The input terminal of comparator 63 is connected; Preheating circuit control part 72, in order to the switch of the field effect transistor Q4 of preheating circuit 55 is controlled; At least one of the lamp current IL and the discharge voltage, that is, the lamp voltage VL is detected to detect the operating state of the lighting circuit 57 and the lamp 12 (the operating state of the main circuit 58); and an inverter circuit as a signal generating unit The control part, that is, the dimming signal generation part 74 etc., the dimming signal generation part 74 generates the operation control of the field effect transistors Q2 and Q3 of the inverter circuit 52 according to the operation state detected by the state detection part 73. PWM signal P; and respectively have read only memory (read only memory, ROM), random access memory (random access memory, RAM) as the storage unit not shown in the figure, I/O (Input/Output, input/output) as the interface ) ports, etc. In addition, each part of the said DSP56 operates with the timing which depends on the operation clock CLK generated by the clock generation part 76 which is an operation clock generation means.

Note that the DSP 56 integrally includes the voltage setting unit 71 , the preheating circuit control unit 72 , and the dimming signal generation unit 74 , etc., means that these units share a software processing unit in the DSP 56 .

The voltage setting unit 71 is a software unit having the function of a power supply voltage detection unit, which detects at least one of the input voltage V0 and the output voltage V1 of the power supply unit 51, and performs At least one of them is used to set a reference voltage for comparison by the analog comparator 63 , that is, a reference voltage VTH as a PWM signal.

Specifically, in the present embodiment, as shown in FIG. 1 and FIG. 3A , the reference voltage VTH is set as follows: the voltage VQ input to the analog comparator 63 is disconnected from the reference voltage VTH by using As the rectified power supply voltage waveform of the reference waveform SW, a control signal for performing feedback control so that the output voltage V1 approaches a desired target value, that is, a switching pulse SP of the field effect transistor Q1 as a PWM control signal is generated. In addition, the reference waveform SW may change corresponding to at least any one of the output voltage V1 (output current I1 ) from the inverter circuit 52 and the power supply voltage, for example.

In other words, the lighting device 42 generates the reference voltage VTH for the PFC control switch of the power supply unit 51 through the DSP 56, and generates it for the chopper control unit 64 constituted by hardware such as the flip-flop 61 and the analog comparator 63. The switching pulse SP for switching the field effect transistor Q1.

The preheating circuit control part 72 is a software part having the function of a preheating current detection unit that detects the preheating current IP of the preheating circuit 55, and follows the state while monitoring the preheating current IP of the preheating circuit 55. The change in at least one of the lamp current IL and the lamp voltage VL detected by the detection unit 73 is set in such a way that the optimal preheating condition is a target value, and the preheating current IP is set so that the target value is close to the target value. The preheating PWM signal PP is generated to be supplied to the gate terminal of the field effect transistor Q4 of the preheating circuit 55 . In addition, the preheating circuit control unit 72 may set a target value following, for example, a change in lamp power which is the product of the lamp current IL and the lamp voltage VL, or a change in ambient temperature. Furthermore, for this target value, it is preferable to set an upper limit value that is set based on energy that does not cause problems even at the end of the life of the filaments FLa, FLb, for example.

The state detection unit 73 has a function of an A/D converter, that is, converts at least one of the lamp current IL and the lamp voltage VL which are analog signals into a digital frequency corresponding to the lamp current IL or the lamp voltage VL. data, and output at least one of the A/D-converted lamp current IL and lamp voltage VL to the preheating circuit control unit 72 or the dimming signal generation unit 74 . The detection timing of the lamp current IL or the lamp voltage VL in the state detection unit 73 is based on at least any analog signal in the main circuit 58 such as the waveform of the power supply voltage or the voltage across the resonant capacitor C4, or Determined as the peak phase (peak phase) of the lamp current IL or the lamp voltage VL based on predetermined frequency data calculated as a digital signal based on the lamp current IL or the lamp voltage VL detected by the state detecting unit 73 synchronous timing. In this embodiment, for example, the state detection unit 73 has the function of an A/D converter, so the detection timing of the lamp current IL or the lamp voltage VL is determined based on predetermined frequency data as a digital signal, wherein the digital signal The predetermined frequency data is data calculated from the lamp current IL, the lamp voltage VL, and the like.

Furthermore, the dimming signal generation unit 74 is a software unit that has the function of an arithmetic unit that generates the PWM signal P of the calculated period based on the light signal detected by the state detection unit 73 . The lighting state of 12 is at least one of the lamp current IL and the lamp voltage VL, and the period of the PWM signal P is calculated based on the lighting state and the operation clock CLK.

Here, for the PWM signal P generated by the dimming signal generator 74, the duty of the PWM signal P is set between the first edges by alternately outputting the first edge and the second edge. , and the period of the PWM signal P is set between the second edges, wherein the first edge refers to the duty cycle of the PWM signal P depending on the action clock CLK, that is, corresponding to the rising or falling of the action clock CLK Either one acts, in other words it is an integer multiple of the action clock CLK, and the second edge refers to that the duty cycle of the PWM signal P does not depend on the action clock CLK, that is, between the rise and fall of the action clock CLK, or Any one between falling and rising corresponds, in other words, it is a non-integer multiple of the operation clock CLK.

Specifically, as shown in FIGS. 3A and 3B , the dimming signal generator 74 divides the period Ti of the calculated PWM signal P by the operation clock CLK (width a) (Ti=a·ni+bi, ni, i is a natural number, a>bi), and interrupt processing is performed at the timing corresponding to the rising edge of the operating clock CLK, and the second edge of the PWM signal P is generated with a delay of ci-1 relative to the rising edge of the operating clock CLK , wherein the delay amount ci-1 is the action of the decimal bi-1 generated from the division operation of the previous period Ti-1 (Ti-1=a·ni-1+bi-1, ni-1 is a natural number) The amount delayed by the rise of the clock CLK, and the difference between the decimal bi generated by the division operation of the current cycle Ti and the decimal di generated between the second edge and the falling edge of the action clock CLK due to the delay amount ci-1 , becomes the delay ci delayed from the rise of the operation clock CLK in the next period Ti+1. That is, bi-di=ci, ci-1+di=a. The first edge is obtained from the duty of the PWM signal P.

In addition, some dead areas (not shown) are formed between the edge of the PWM signal P1 for the field effect transistor Q2 and the edge of the PWM signal P2 for the field effect transistor Q3. In addition, the first edge of the PWM signal P1 (PWM signal P2 ) becomes a falling edge, and the second edge becomes a rising edge, even if the first edge and the second edge are opposite to the above.

That is to say, the dimming signal generation unit 74 has the function of a duty setting unit, that is, it sets the duty ratio of the PWM signal P in the current cycle substantially constant according to the following decimal number di. The amount of delay ci, wherein the fraction di is the time sequence at which the edge of the pulse of the PWM signal P is reversed relative to the edge of the action clock CLK by using the duty (duty or non-duty) of the PWM signal P in the previous cycle (pulse width of PWM signal P), the cycle control of the PWM signal P is performed every cycle, or every several cycles within a predetermined cycle, for example, within a 100 μsec cycle.

Therefore, for the dimming signal generator 74, although the timing of the first edge of the PWM signal P depends on the operating clock CLK in this embodiment, the timing of the second edge does not depend on the operating clock CLK and can be Change, thus, the duty (non-duty) can be changed at a timing independent of the operation clock CLK, and the cycle of the PWM signal P can be controlled to be able to correspond to integer multiples and non-integer multiples of the operation clock CLK (PFM control). In other words, the dimming signal generation unit 74 is a converting unit capable of converting a duty change of the PWM signal P into a period change (frequency change).

Here, in the lighting device 42 using the resonant action of the resonant circuit 53, as shown in FIG. 5, the variation of the lamp voltage VL increases with respect to the period of the PWM signal P (the switching period of the field effect transistors Q2 and Q3). Therefore, when the inverter circuit 52 is digitally controlled, the output becomes stepped, making it difficult to perform stable lighting. Furthermore, it is also difficult to perform stable lighting when the cycle is delayed or feedback control is performed. Specifically, for example, when the inductance of the resonant coil L2 is set to 1.4 mH and the capacitance of the resonant capacitor C4 is set to 3300 pF as shown in the table of FIG. 6 and FIG. 7 , when compared with the PWM signal P When the variation range ΔVL of the lamp voltage VL corresponding to the minimum resolution width (minimum resolution) of the cycle is 2V or more, the lamp 12 will flicker, etc., and the lighting state will become unstable (Table 6 of FIG. 6 the shaded part in ). Therefore, in this embodiment, the inverter circuit 52 is set so that the variation range ΔVL of the lamp voltage VL corresponding to the minimum resolution width of the cycle of the PWM signal P is smaller than 2V (ΔVL<2[V]).

In addition, the period minimum resolution width refers to the width from the rising edge to the falling edge of the smallest pulse of the PWM signal P.

The ROM stores in advance various programs executed by each part of the DSP 56 , for example, the voltage setting part 71 , the preheating circuit control part 72 , and the dimming signal generating part 74 .

In the RAM, various digital values detected by the state detection unit 73 and the like are stored in allocated areas.

Furthermore, in the lighting device 42, in the power supply unit 51, the switching pulse SP is generated by the operation of the flip-flop 61 to perform the switching operation of the field effect transistor Q1, and the phases of the input voltage V0 and the input current I0 are matched to improve power factor.

Specifically, as shown in FIG. 1 and FIG. 4 , when the field effect transistor Q1 is turned on by an unillustrated starting circuit or the like, a linearly increasing current flows into the chopper choke coil L1 (diode D1 ). In this way, the choke coil current I flows into the secondary coil L1b of the chopper choke coil L1, and electromagnetic energy is accumulated in the chopper choke coil L1. At the same time, when the voltage VQ (≧reference voltage VTH) generated by the resistor R2 is input into the analog comparator 63 by using the switch current IQ generated by the turn-on of the field effect transistor Q1, the trigger 61 is supplied from the analog comparator 63 The reset terminal of the flip-flop 61 inputs a reset voltage VR (=voltage VQ), and supplies an off switching pulse SP from the output terminal of the flip-flop 61 to the gate terminal of the field effect transistor Q1, thereby turning on the field effect transistor Q1 , thereby releasing the electromagnetic energy accumulated in the chopper choke coil L1, and a linearly reduced current flows into the chopper choke coil L1 (diode D1).

By repeating the above operations, the output current I1 is formed by using the waveform of the input voltage V0, that is, the full-wave rectified sinusoidal (sign) waveform, that is, the reference waveform SW as an envelope curve.

The output voltage V1 generated by the power supply unit 51 turns on and off the field effect transistors Q2 and Q3 of the inverter circuit 52 at a predetermined frequency such as 50 kHz and a predetermined duty, thereby switching to a high voltage. frequency AC voltage.

With this high-frequency AC voltage, the resonant circuit 53 resonates so that the resonant current flows, and the preheating current IP flows into the secondary coils L3b and L3c of the preheating transformer L3 of the preheating circuit 55, respectively, so as to control the temperature of the lamp 12. The filaments FLa, FLb are preheated, and the preheating circuit 55 switches the field effect transistor Q4 according to the PWM signal PP for preheating with a predetermined cycle generated by the preheating circuit control unit 72 .

Then, by preheating the filaments FLa and FLb, a predetermined starting voltage (starting voltage) is applied between the filaments FLa and FLb to light (start) the lamp 12 and stably light the lamp 12 .

At this time, in the lighting device 42, feedback control is performed based on at least one of the lamp current IL and the lamp voltage VL detected by the state detection unit 73 so that the lamp current IL, the lamp voltage VL, or their product The lamp power reaches the specified target value.

When dimming the lamp 12 that is turned on as described above, the PWM signal P is input from the dimming signal generator 74 of the DSP 56 to the high-side driver 65 of the lighting device 42 to change the driving frequency of the inverter circuit 52 . By increasing or decreasing the driving frequency of the inverter circuit 52 , the high-frequency power from the inverter circuit 52 can be suppressed or increased, thereby suppressing or increasing the lamp current IL to dim the lamp 12 .

In the dimming signal generation unit 74, based on at least one of the lamp current IL and the lamp voltage VL detected by the state detection unit 73, a PWM having a period dependent on the operation clock CLK generated by the clock generation unit 76 is generated. signal P, and then in the dimming signal generator 74, according to any one of the duty and non-duty of the PWM signal P in the previous cycle, the duty ratio of the PWM signal P in the next cycle is fixed. In this way, the falling edge of the PWM signal P is set, and the falling edge of the PWM signal P is reversed at a timing independent of the operation clock CLK, so that the driving of the inverter circuit 52 The frequency, that is, the period of the PWM signal P changes independently of the operating clock CLK.

The cycle control of the PWM signal P is performed every cycle, or every several cycles within a predetermined cycle, for example, within a 100 μsec cycle, and the lighting state of the lamp 12 is immediately reflected within the cycle of the PWM signal P.

Here, the inverter circuit 52 controls so that the variation range ΔVL of the lamp voltage VL corresponding to the minimum resolution width of the cycle of the PWM signal P is smaller than 2V.

In addition, in the preheating circuit 55, the field effect transistor Q4 is switched by using the PWM signal PP for preheating generated so that the preheating current IP approaches the target value, thereby making it possible to optimize the temperature of the lamp 12 depending on the type of the lamp 12. or variations in the manufacturing process, wherein the target value is to follow changes in the lamp current IL, lamp voltage VL, lamp power, or ambient temperature detected by the state detection unit 73 etc., are set by the preheating circuit control unit 72.

As described above, based on the lighting state of the lamp 12 detected by the state detection unit 73, the predetermined operation clock CLK, the dimming signal, etc., the period of the PWM signal P is calculated by the dimming signal generating unit 74, and is obtained by The dimming signal generator 74 that can generate a PWM signal corresponding to a cycle that is a non-integer multiple of the predetermined operating clock CLK can generate the PWM signal P of the calculated cycle, so that it is not limited by the operating clock and does not need to be stopped. Other processing can make the period of the PWM signal P continuously and finely changed, so that extremely fine dimming control can be performed.

Specifically, the dimming signal generator 74 alternately generates the first edge and the second edge, so that the cycle of the PWM signal P can be controlled between the second edges, and the duty cycle of the PWM signal P can be adjusted between the first edges. The duty ratio is set to an arbitrary fixed value, wherein the first edge acts corresponding to either the rising or falling of the specified operating clock CLK, and the second edge corresponds to the rising and falling of the specified operating clock CLK. It is output between falling, or between falling and rising.

That is, since the operation clock CLK is relatively small, in other words, a low-speed and low-cost DSP 56 can be used, the cost of the lighting device 42 can also be reduced.

In particular, since the resonant circuit 53 is used in the lighting device 42 of the present embodiment, fine frequency (period) control becomes important, and the PWM signal P capable of corresponding to a non-integer multiple period can be generated by including the above-mentioned The dimming signal generator 74 can perform extremely fine dimming control.

In addition, the dimming signal generation unit 74 inverts the second edge of the PWM signal P at a timing independent of the operating clock CLK to set the duty ratio, thereby easily changing the duty ratio of the PWM signal P to Set to be shorter than the operation clock CLK.

The lighting frequency of the lamp 12 is set by setting the period of the PWM signal P by the dimming signal generator 74 at a predetermined timing such as a timing synchronized with the peak phase of the lamp current IL or the lamp voltage VL. , so that the lighting state of the lamp 12 can be set at an appropriate timing, wherein the peak phase of the lamp current IL or the lamp voltage VL is based on at least any signal in the main circuit 58, or based on the lamp current IL or the lamp voltage VL It is determined by calculating the predetermined frequency data. As a result, even when the lamp 12 is in an unstable state between being turned off and turned on, the lighting of the lamp 12 can be maintained, and therefore deeper dimming can be performed.

The dimming signal generator 74 sets the cycle of the PWM signal P to 20 μsec or less, and feeds back the operating frequency of the inverter circuit 52 within a cycle of 100 μsec, specifically, every cycle, according to the lighting state of the lamp 12. control, thereby further improving the responsiveness of the inverter circuit 52 .

Furthermore, conventionally, the combination of the lighting device and high-frequency lighting using the resonant action of the resonant circuit can further improve the efficiency of the discharge lamp or the system, but as a result, the diameter of the lamp becomes smaller and the voltage of the lamp increases. . Furthermore, since the resonance action is used, the variation of the output voltage, that is, the lamp voltage will increase with respect to the period of the PWM signal (the switching period of the switching element). Therefore, when the inverter circuit is digitally controlled, the output becomes stepped, making it difficult to perform stable lighting. Also, when the control cycle is delayed or feedback control is performed, it is also difficult to perform stable lighting.

Therefore, the inverter circuit 52 turns on the lamp 12 so that the variation range ΔVL of the lamp voltage VL corresponding to the minimum resolution width of the cycle of the PWM signal P is smaller than 2V, thereby enabling even a lamp with a relatively high lamp voltage VL to be turned on. 12. Dimming can also be performed stably, thereby providing an energy-saving system.

According to the lighting state of the lamp 12 detected by the state detecting part 73, a predetermined target value of the dimming signal generating part 74 is set, thereby performing feedback control on the inverter circuit 52, and it is possible to respond to the lighting of the lamp 12. state to drive the inverter circuit 52 efficiently.

Only the voltage setting unit 71 and the dimming signal generating unit 74 for setting the reference waveform SW based on the power supply voltage waveform are integrally provided in the DSP 56, and the chopper control unit 64 is configured with hardware different from that of the DSP 56. Compared with the case where the control signal of the step-up chopper circuit 59 is generated by the DSP, the processing load of the software in the DSP 56 can be reduced, and the control of the inverter circuit 52 will not be burdened, so that the step-up can be realized at the same time. The control of the chopper circuit 59 and the control of the inverter circuit 52, wherein the chopper control section 64 generates the switching pulse SP according to the switching current IQ in such a manner that the switching current IQ corresponds to the reference waveform SW IQ and the choke coil current on the side of the secondary coil L1b of the chopper choke coil L1 perform switching control on the field effect transistor Q1.

Specifically, the analog comparator 63 is used to compare the reference voltage VTH which is boosted by the voltage setting part 71 according to the detected voltage VQ with the voltage VQ generated by the switching current IQ of the field effect transistor Q1. The input voltage V0 and output voltage V1 of the chopper circuit are set, and are set by the flip-flop 61 according to the output voltage of the analog comparator 63 and the choke coil on the secondary coil L1b side of the chopper choke coil L1 The voltage V is used to generate the switching pulse SP of the field effect transistor Q1, thereby reducing the processing load of software in the DSP 56 and easily generating the switching pulse SP of the field effect transistor Q1.

Furthermore, since the processing load of the software in the DSP 56 can be reduced, the processing load of the software can be suppressed even if another control is added to the DSP 56 .

The reference waveform SW of the switching current IQ of the field effect transistor Q1 is made to correspond to the output of the inverter circuit 52, or to correspond to the power supply voltage and to be variable by the voltage setting unit 71, so that even at the output of the inverter circuit 52 When it is low, or when the power supply voltage is low, etc., the load of this step-up chopper circuit 59 can be lightened and operated.

By judging the optimum preheating values of the filaments FLa and FLb during lighting of the lamp 12, it is possible to set the optimum preheating amounts of the filaments depending on the type of lamp or the difference in the manufacturing process of the lamp. Therefore, excessive preheating or insufficient preheating is eliminated, and short life or early blackening of the lamp 12 does not occur.

Furthermore, the step-up chopper circuit 59, the inverter circuit 52, the preheating circuit 55, and the like are digitally controlled by a single DSP 56, thereby simplifying the structure compared to the case where a dedicated DSP for each control is provided. , and not only makes it easy to control while reflecting each other's operating states, but also can be combined with sensors, etc. to adjust the light that is useless, thereby saving energy.

In addition, in the above-mentioned one embodiment, the respective configurations of the power supply unit 51 and the preheating circuit 55, their control, and the like are not limited to the configurations and controls described above.

In addition, the inverter circuit 52 can also be configured to start the lamp 12 so that the variation range ΔVL of the lamp voltage VL corresponding to the minimum resolution width of the cycle of the PWM signal P is smaller than 2V. In this case, even the lamp 12 having a relatively high lamp voltage VL can be stably started.

Claims (6)

1. ignition device is characterized in that comprising:

Inverter circuit converts direct voltage output behind the high frequency voltage into and lamp is lit a lamp;

State detection unit detects the state of lighting a lamp of lamp;

Arithmetic element, at least according to by the state of lighting a lamp and the specified action clock of the detected lamp of said state detection unit, and computing is sent as an envoy to cycle of pwm signal of inverter circuit action;

The signal generation unit constitutes the corresponding pwm signal of non-integral multiple cycle that can generate with the specified action clock, and generates the pwm signal in the cycle that is calculated by arithmetic element; And

Control unit, the pwm signal according to being generated by said signal generation unit comes inverter circuit is carried out drive controlling;

Wherein said signal generation unit alternately produces first edge and second edge; Said first edge is that with the rising of specified action clock and in descending any is corresponding and move, and said second edge is between the rise and fall with the specified action clock, and descend with rising between in any is corresponding and export.

2. ignition device according to claim 1; It is characterized in that wherein said inverter circuit comprises switch element; Utilize the switch motion of the corresponding switch element of cycle of the pwm signal that is generated with the signal generation unit; And convert direct voltage into high frequency voltage, so that less than the mode of 2V lamp is lit a lamp with the excursion of the cycle minimal decomposition width corresponding output voltage of pwm signal.

3. ignition device according to claim 1 is characterized in that wherein said signal generation unit according to the desired value of being set regulation by the state of lighting a lamp of the detected lamp of state detection unit, comes inverter circuit is carried out FEEDBACK CONTROL thus.

4. ignition device according to claim 3 is characterized in that wherein said signal generation unit is set at the cycle of pwm signal below 20 microseconds, and the cycle of the FEEDBACK CONTROL of inverter circuit is set at below 100 microseconds.

5. ignition device according to claim 4 is characterized in that wherein said signal generation unit is in each cycle, to carry out to the FEEDBACK CONTROL of inverter circuit.

6. ligthing paraphernalia is characterized in that comprising:

Appliance body is installed with lamp; And

Like the described ignition device of arbitrary claim in the claim 1 to 5, to the lamp control of lighting a lamp.

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