CN101394132B - Pulse Width Modulation Control Circuit Applied to Capacitor Charging - Google Patents
Pulse Width Modulation Control Circuit Applied to Capacitor Charging Download PDFInfo
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- CN101394132B CN101394132B CN2007101541870A CN200710154187A CN101394132B CN 101394132 B CN101394132 B CN 101394132B CN 2007101541870 A CN2007101541870 A CN 2007101541870A CN 200710154187 A CN200710154187 A CN 200710154187A CN 101394132 B CN101394132 B CN 101394132B
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Abstract
一种脉宽调变控制电路，应用于一电容充电的电源转换器，而脉宽调变控制电路包含：脉宽调变信号产生器，用以产生一脉宽调变信号以控制电源转换器的功率开关；第一比较器，其第一输入端接收第一参考电压，第二输入端接收一个与电源转换器的变压器一次侧电流成正比的感测电压，当功率开关导通且感测电压达到第一参考电压的电位时，由第一比较器输出第一控制信号至脉宽调变信号产生器，脉宽调变信号产生器输出使功率开关截止的信号；以及参考电压调整器，根据一个与电源转换器的输出电压相关的反馈电压，输出第一参考电压。
A pulse width modulation control circuit is applied to a power converter for charging a capacitor, and the pulse width modulation control circuit includes: a pulse width modulation signal generator, which is used to generate a pulse width modulation signal to control a power switch of the power converter; a first comparator, whose first input terminal receives a first reference voltage, and whose second input terminal receives a sensing voltage proportional to the primary side current of the transformer of the power converter. When the power switch is turned on and the sensing voltage reaches the potential of the first reference voltage, the first comparator outputs a first control signal to the pulse width modulation signal generator, and the pulse width modulation signal generator outputs a signal to turn off the power switch; and a reference voltage regulator, which outputs the first reference voltage according to a feedback voltage related to the output voltage of the power converter.
Description
Technical field
The present invention relates to a kind of pulse width modulating control circuit, particularly a kind of pulse width modulating control circuit that is applied to the electric capacity charging.
Background technology
In the field of digital camera, when sometimes the user used camera, the insufficient light of locating of its filmed image need provide extra light by photoflash lamp, to obtain preferable photographic effects.Yet the lamp works voltage of photoflash lamp (generally about 300V) is far above the voltage (for example: the about 3V to 4.2V of lithium battery operating voltage, 2 about 2V to 3V of AA operating voltage battery) of camera internal cell.
At this moment, camera inside is provided with the high-voltage charging circuit, uses flyback (Flyback) framework; And the transformer that utilizes high number of turns ratio is (because camera is compact; The number of turns is than about 10 times), charge to high-voltage capacitance, to be promoted to high pressure (generally about 300V); When the voltage of treating high-voltage capacitance satisfies the operating voltage of photoflash lamp, required energy when then the photoflash lamp instantaneous flash being provided by high-voltage capacitance.
Please, be the circuit diagram of present flyback charge construction with reference to Fig. 1.Like Fig. 1; Mean charging current Iin is by the primary side current Ip of transformer 40; Through producing after the input capacitor Cin filtering; When power switch SW conducting; The slope of the primary side current Ip of transformer 40 with
rises; When primary side current Ip rose to
, then power switch SW ended, and wherein Lp is the primary side inductance value of transformer 40; The energy that be stored on the transformer 40 primary side inductance this moment is transferred on the secondary side inductance, and through Schottky diode Do output capacitor Co is charged.
Then; Secondary side current Is can drop to zero gradually with the slope of
; Wherein Lsec is the secondary side inductance value of transformer 40; The drain voltage Vsw of power switch SW receives primary side inductance and the stray capacitance resonance of transformer 40 and falls down; When drain voltage Vsw drops to second reference voltage Vref 2 (for example, second reference voltage Vref 2 is 1.2 volts), then power switch SW conducting once more; So go round and begin again, accomplish up to output capacitor Co is charged.
Please with reference to Fig. 2, be the sequential chart of the drain voltage waveform of transformer primary side current, Circuit Fault on Secondary Transformer electric current and power switch.As shown in Figure 2, after power switch SW ended, the secondary side current Is of transformer 40 dropped to zero gradually; But when the drain voltage Vsw of power switch SW drops to second reference voltage Vref 2 because of resonance; Power switch SW is conducting once more, so, will produce blank time Tb; And blank time Tb account for power switch SW deadline Toff the ratio regular meeting high more and longer (drain voltage Vsw is proportional to output voltage V out approximately) along with drain voltage Vsw; Because this section blank time primary side current Ip is negative value, so mean charging current Iin is along with output voltage V out rising and successively decrease, so when the voltage of output capacitor Co during more near desired value; Mean charging current Iin is low more, so will cause the charging interval lengthening of output capacitor Co.
Therefore, how a kind of pulse width modulating control circuit of adaptability adjustment mean charging current is provided, becomes one of researcher's problem to be solved.
Summary of the invention
In view of above problem; The present invention provides a kind of pulse width modulating control circuit, through the charged state of detection capacitor or the variation of input voltage, the electric current of accommodation transformer primary side; So that mean charging current maintains near steady state, and then the charging rate of quickening capacitor.
The pulse width modulating control circuit that the present invention disclosed be applied to the power supply changeover device that an electric capacity charges, and pulse width modulating control circuit includes: the PWM signal generator, in order to produce the power switch of a PWM signal with the control power supply changeover device; First comparator; Have the first input end and second input; First input end receives first reference voltage, and second input receives the sensing voltage be directly proportional with the transformer primary side current of power supply changeover device, when power switch conducting and sensing voltage reach the current potential of first reference voltage; Control signal to the PWM signal generator by first comparator output first, and the signal that the output of PWM signal generator ends power switch; And reference voltage adjuster, according to a feedback voltage relevant, export first reference voltage with the output voltage of power supply changeover device.
In addition; The pulse width modulating control circuit that the present invention disclosed; Be applied to the power supply changeover device of electric capacity charging, and pulse width modulating control circuit includes: the PWM signal generator, in order to produce the power switch of a PWM signal with the control power supply changeover device; First comparator; Have the first input end and second input; First input end receives first reference voltage, and second input receives a sensing voltage that is directly proportional with the transformer primary side current of power supply changeover device, when power switch conducting and sensing voltage reach the current potential of first reference voltage; Control signal to the PWM signal generator by first comparator output first, the signal that the output of PWM signal generator ends power switch; And reference voltage adjuster, according to the input voltage of power supply changeover device, export first reference voltage.
By this pulse width modulating control circuit, through detecting the charged state of capacitor, make the electric current of transformer primary side do adjustment relatively, in other words, make mean charging current maintain, and then accelerate the charging rate of capacitor near steady state.In addition,, make the electric current of transformer primary side do adjustment relatively, to reach the purpose that the charging interval does not prolong with the reduction of input voltage through detecting the variation of input voltage.
Describe the present invention below in conjunction with accompanying drawing and specific embodiment, but not as to qualification of the present invention.
Description of drawings
Fig. 1 is the circuit diagram of the flyback charge construction of prior art;
Fig. 2 is the sequential chart of drain voltage waveform of transformer primary side current, Circuit Fault on Secondary Transformer electric current and the power switch of prior art;
Fig. 3 A is the circuit diagram of first embodiment of the invention;
Fig. 3 B is the circuit diagram of second embodiment of the invention;
Fig. 3 C is the circuit diagram of third embodiment of the invention;
Fig. 4 is the circuit box sketch map of the reference voltage adjuster of third embodiment of the invention; And
Fig. 5 is the thin portion circuit diagram of the reference voltage adjuster of third embodiment of the invention.
Wherein, Reference numeral
10 PWM signal generators
20 first comparators
21 second comparators
22 the 3rd comparators
23 the 4th comparators
24 the 5th comparators
30 reference voltage adjuster
31 first current/charge-voltage convertors
32 second current/charge-voltage convertors
33 nodes
40 transformers
50 pulse width modulating control circuits
The Cds parasitic capacitance
The Cin input capacitor
The Co output capacitor
The Do Schottky diode
The MOS1 the first transistor
The MOS2 transistor seconds
MOS3 the 3rd transistor
MOS4 the 4th transistor
MOS5 the 5th transistor
MOS6 the 6th transistor
MOS7 the 7th transistor
MOS8 the 8th transistor
I1 first electric current
I2 second electric current
I3 the 3rd electric current
I4 the 4th electric current
I5 the 5th electric current
I6 the 6th electric current
The Iin mean charging current
The Ip primary side current
The Is secondary side current
R1 first resistance
R2 second resistance
R3 the 3rd resistance
R42 resistance
The SW power switch
The Ton ON time
Toff deadline
The Vcs sensing voltage
The Vin input voltage
The Vfb feedback voltage
The Vout output voltage
Vref1 first reference voltage
Vref2 second reference voltage
Vref3 the 3rd reference voltage
The Vsw drain voltage
Embodiment
Please, be the circuit diagram of first embodiment of the invention with reference to Fig. 3 A.Shown in Fig. 3 A; Pulse width modulating control circuit 50 of the present invention includes PWM signal generator 10, first comparator 20, second comparator 21, the 3rd comparator 22 and reference voltage adjuster 30; Wherein pulse width modulating control circuit 50 can for example be to be made up of integrated circuit (IC), and pulse width modulating control circuit 50 also can comprise power switch SW and resistance R 42.
The 3rd comparator 22; Have first input end (being inverting input) and second input (and non-inverting input); First input end receives the 3rd reference voltage Vref 3; Second input receives the feedback voltage Vfb relevant with output voltage V out; When if feedback voltage Vfb reaches the current potential of the 3rd reference voltage Vref 3, control signal to PWM signal generator 10 by 22 outputs the 3rd of the 3rd comparator, and PWM signal generator 10 stops the output pulse width modulating signal to power switch SW according to the 3rd control signal.
The circuit operation principle below is described; In order to prevent that mean charging current Iin is along with output voltage V out change; Must control PWM signal generator 10 through detecting output voltage V out, make mean charging current Iin in whole charging process, can keep definite value.
When power switch SW by and drain voltage Vsw when being lower than the current potential of second reference voltage Vref 2; Then control signal to PWM signal generator 10 by 21 outputs second of second comparator; And PWM signal generator 10 makes the signal of power switch SW conducting according to potential state (for example, the high voltage potential) output of second control signal.
When power switch SW conducting and sensing voltage Vcs reach the current potential of first reference voltage Vref 1; Then control signal to PWM signal generator 10 by 20 outputs first of first comparator; And PWM signal generator 10 is exported the signal that power switch SW is ended according to the potential state (for example, high voltage potential) of first control signal.
So; Reference voltage adjuster 30 can be according to the charged state of output capacitor Co; The magnitude of voltage of accommodation first reference voltage Vref 1; Make the action of PWM signal generator 10 power controlling switch SW, and then make mean charging current Iin in whole charging process, can keep definite value.
Please, be the circuit diagram of second embodiment of the invention with reference to Fig. 3 B.Shown in Fig. 3 B; Pulse width modulating control circuit 50 of the present invention includes PWM signal generator 10, first comparator 20, second comparator 21, the 3rd comparator 22 and reference voltage adjuster 30; Wherein pulse width modulating control circuit 50 can for example be to be made up of integrated circuit (IC), and pulse width modulating control circuit 50 also can comprise power switch SW and resistance R 42.
The 3rd comparator 22; Have first input end (being inverting input) and second input (and non-inverting input); First input end receives the 3rd reference voltage Vref 3; Second input receives the feedback voltage Vfb relevant with output voltage V out; If feedback voltage Vfb is when reaching the current potential of the 3rd reference voltage Vref 3, control signal to PWM signal generator 10 by 22 outputs the 3rd of the 3rd comparator, and PWM signal generator 10 stops the output pulse width modulating signal to power switch SW according to the potential state of the 3rd control signal.
The circuit operation principle below is described; In order to prevent that the charging interval is along with input voltage vin changes; With input voltage vin is that battery supply is an example, because cell voltage can be elongated and reduce gradually along with service time, and input voltage vin is descended; So must control PWM signal generator 10 through detecting input voltage vin, make the charging interval in whole charging process, can keep definite value.
When power switch SW by and drain voltage Vsw when being lower than the current potential to second reference voltage Vref 2; Then control signal to PWM signal generator 10 by 21 outputs second of second comparator; And PWM signal generator 10 makes the signal of power switch SW conducting according to potential state (for example, the high voltage potential) output of second control signal.
When power switch SW conducting and sensing voltage Vcs reach the current potential of first reference voltage Vref 1; Then control signal to PWM signal generator 10 by 20 outputs first of first comparator; And PWM signal generator 10 is exported the signal that power switch SW is ended according to the potential state (for example, high voltage potential) of first control signal.
So; Reference voltage adjuster 30 can be according to the voltage status of input voltage vin; The magnitude of voltage of accommodation first reference voltage Vref 1 makes the action of PWM signal generator 10 power controlling switch SW, and then makes the charging interval in whole charging process, can keep definite value.
Please, be the circuit diagram of third embodiment of the invention with reference to Fig. 3 C.Shown in Fig. 3 C; Pulse width modulating control circuit 50 of the present invention includes PWM signal generator 10, first comparator 20, second comparator 21, the 3rd comparator 22 and reference voltage adjuster 30; Wherein pulse width modulating control circuit 50 can for example be to be made up of integrated circuit (IC), and pulse width modulating control circuit 50 also can comprise power switch SW and resistance R 42.
The 3rd comparator 22; Have first input end (being inverting input) and second input (and non-inverting input); First input end receives the 3rd reference voltage Vref 3; Second input receives the feedback voltage Vfb relevant with output voltage V out; When if feedback voltage Vfb reaches the current potential of the 3rd reference voltage Vref 3, control signal to PWM signal generator 10 by 22 outputs the 3rd of the 3rd comparator, and PWM signal generator 10 stops the output pulse width modulating signal to power switch SW according to the 3rd control signal.
The circuit operation principle below is described; For prevent mean charging current Iin along with output voltage V out change or charging interval along with input voltage vin changes; At first; Control PWM signal generator 10 through detecting output voltage V out, make mean charging current Iin in whole charging process, can keep definite value.Same; With input voltage vin is that battery supply is an example; Because cell voltage can be elongated and reduce gradually along with service time; And input voltage vin is descended, so must control PWM signal generator 10, make the charging interval in whole charging process, can keep definite value through detecting input voltage vin.
When power switch SW by and drain voltage Vsw when being lower than the current potential of second reference voltage Vref 2; Then control signal to PWM signal generator 10 by 21 outputs second of second comparator; And PWM signal generator 10 makes the signal of power switch SW conducting according to potential state (for example, the high voltage potential) output of second control signal.
When power switch SW conducting and sensing voltage Vcs reach the current potential of first reference voltage Vref 1; Then control signal to PWM signal generator 10 by 20 outputs first of first comparator; And PWM signal generator 10 is exported the signal that power switch SW is ended according to the potential state (for example, high voltage potential) of first control signal.
So; Reference voltage adjuster 30 can be according to the voltage status of input voltage vin or output voltage V out; The magnitude of voltage of accommodation first reference voltage Vref 1; Make the action of PWM signal generator 10 power controlling switch SW, and then make mean charging current Iin and charging interval in whole charging process, can keep definite value.
It please is the circuit box sketch map of the reference voltage adjuster of third embodiment of the invention with reference to Fig. 4.As shown in Figure 4, reference voltage adjuster of the present invention includes first current/charge-voltage convertor 31, second current/charge-voltage convertor 32, current source Ibias and first resistance R 1.
First current/charge-voltage convertor 31 receives feedback voltage Vfb, is first electric current I 1 in order to the conversion feedback voltage Vfb, and exports first electric current I 1 to the node 33.
Second current/charge-voltage convertor 32 receives input voltage vin, is second electric current I 2 in order to the conversion input voltage vin, and exports second electric current I 2 to the node 33.
Current source Ibias; Electrically connect with node 33; In order to a constant current signal to be provided, and the current value of current source Ibias can be adjusted according to design requirement, and wherein first electric current I 1, second electric current I 2 equal the 3rd electric current I 3 with the summation of the electric current of current source Ibias.
In addition, reference voltage adjuster viewable design demand selectivity of the present invention is designed to a current/charge-voltage convertor or two current/charge-voltage convertors, the scope that it does not break away from the present invention is protected.
It please is the thin portion circuit diagram of the reference voltage adjuster of third embodiment of the invention with reference to Fig. 5.As shown in Figure 5, reference voltage adjuster circuit of the present invention includes the 4th comparator 23, second resistance R 2, the first transistor MOS1, transistor seconds MOS2, the 3rd transistor MOS3, the 5th comparator 24, the 3rd resistance R 3, the 4th transistor MOS4, the 5th transistor MOS5, the 6th transistor MOS6, the 7th transistor MOS7 and the 8th transistor MOS8.
The 4th comparator 23 has first input end (being inverting input), second input (being non-inverting input) and output, and its second input receives feedback voltage Vfb.
The first transistor MOS1, the output of its grid and the 4th comparator 23 electrically connects, and the first input end of its source electrode and the 4th comparator 23 electrically connects, and wherein the first transistor MOS1 can for example be the N type metal oxide semiconductor, but not as limit.
Second resistance R 2, the source electrode of its first end and the first transistor MOS1 electrically connects, and second end of second resistance R 2 is electrically connected to earth terminal.
Transistor seconds MOS2, the drain electrode of its drain electrode, grid and the first transistor MOS1 electrically connects, and the source electrode of transistor seconds MOS2 is electrically connected to power end, and wherein transistor seconds MOS2 can for example be a P-type mos, but not as limit.
The 3rd transistor MOS3; The grid of its grid and transistor seconds MOS2 electrically connects, and its drain electrode is electrically connected to power end, and its source electrode is electrically connected to node 33; Wherein the 3rd transistor MOS3 can for example be a P-type mos, but not as limit.
The 5th comparator 24 has first input end (being inverting input), second input (being non-inverting input) and output, and its second input receives input voltage vin.
The 4th transistor MOS4; The output of its grid and the 5th comparator 24 electrically connects; The first input end of the drain electrode of the 4th transistor MOS4 and the 5th comparator 24 electrically connects, and wherein the 4th transistor MOS4 can for example be the N type metal oxide semiconductor, but not as limit.
The 3rd resistance R 3, the source electrode of its first end and the 4th transistor MOS4 electrically connects, and second end of the 3rd resistance R 3 is electrically connected to earth terminal.
The 5th transistor MOS5, the drain electrode of its drain electrode, grid and the 4th transistor MOS4 electrically connects, and the source electrode of the 5th transistor MOS5 is electrically connected to power end, and wherein the 5th transistor MOS5 can for example be a P-type mos, but not as limit.
The 6th transistor MOS6, the grid of its grid and the 5th transistor MOS5 electrically connects, and its source electrode is electrically connected to power end, and wherein the 6th transistor MOS6 can for example be a P-type mos, but not as limit.
The 7th transistor MOS7, the drain electrode of its drain electrode, grid and the 6th transistor MOS6 electrically connects, and the source electrode of the 7th transistor MOS7 is electrically connected to earth terminal, and wherein the 7th transistor MOS7 can for example be the N type metal oxide semiconductor, but not as limit.
The 8th transistor MOS8; The grid of its grid and the 7th transistor MOS7 electrically connects, and its source electrode is electrically connected to earth terminal, and the drain electrode of the 8th transistor MOS8 is electrically connected to node 33; Wherein the 8th transistor MOS8 can for example be the N type metal oxide semiconductor, but not as limit.
The circuit operation principle below is described, at first, transistor seconds MOS2 and the 3rd transistor MOS3 constitute first current mirroring circuit.The 5th transistor MOS5 and the 6th transistor MOS6 constitute second current mirroring circuit.The 7th transistor MOS7 and the 8th transistor MOS8 constitute the 3rd current mirroring circuit.
First current/charge-voltage convertor 31 includes first current mirroring circuit, and first current mirroring circuit produces second electric current I 2 that is same as first electric current I 1 according to first electric current I 1.Wherein the current value of first electric current I 1 is
Second current/charge-voltage convertor 32 includes second current mirroring circuit and the 3rd current mirroring circuit; Second current mirroring circuit produces the 4th electric current I 4, the three current mirroring circuits that are same as the 3rd electric current I 3 and produces the 5th electric current I 5 that is same as the 4th electric current I 4 according to the 4th electric current I 4 according to the 3rd electric current I 3.Wherein second current mirroring circuit produce the 3rd electric current I 3 current value is
Because the 6th electric current I 6=Ibias+I2-I5; And the first reference voltage Vref 1=I6*R1; So first reference voltage Vref 1 can become big and become big along with feedback voltage Vfb, and diminish and become big, therefore with input voltage vin; Value by adjustment first resistance R 1, second resistance R 2, the 3rd resistance R 3 and current source Ibias; Just can obtain the first suitable reference voltage Vref 1, make mean charging current Iin and charging interval in charging process not along with output voltage V out or input voltage vin and change, and then the preferable charge efficiency that obtains.
Comprehensive the above; Pulse width modulating control circuit of the present invention through detecting the charged state of capacitor, makes the electric current of transformer primary side do adjustment relatively; Can make that so mean charging current maintains near steady state, and then accelerate the charging rate of capacitor.In addition, through detecting the variation of input voltage, make mean charging current do adjustment relatively, to reach the purpose that the charging interval can not prolong because of the reduction of input voltage.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101541870A CN101394132B (en) | 2007-09-19 | 2007-09-19 | Pulse Width Modulation Control Circuit Applied to Capacitor Charging |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101541870A CN101394132B (en) | 2007-09-19 | 2007-09-19 | Pulse Width Modulation Control Circuit Applied to Capacitor Charging |
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| CN101394132A CN101394132A (en) | 2009-03-25 |
| CN101394132B true CN101394132B (en) | 2012-02-08 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103595390B (en) * | 2012-08-14 | 2017-05-03 | 通嘉科技股份有限公司 | Circuit and method for controlling latch mode of pulse width modulation circuit |
| US9866134B2 (en) | 2014-01-10 | 2018-01-09 | Astec International Limited | Control circuits and methods for regulating output voltages using multiple and/or adjustable reference voltages |
| CN104919689B (en) * | 2014-01-10 | 2017-11-10 | 雅达电子国际有限公司 | Control circuit and method for adjusting output voltage based on adjustable reference voltage |
| CN110535362B (en) * | 2018-05-24 | 2021-07-16 | 产晶积体电路股份有限公司 | Current detection method |
| CN111786548B (en) * | 2019-11-28 | 2021-11-09 | 西门子电动汽车动力总成系统(上海)有限公司 | Discharge control circuit suitable for high-voltage electronic equipment |
| US11223289B2 (en) | 2020-01-17 | 2022-01-11 | Astec International Limited | Regulated switched mode power supplies having adjustable output voltages |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5455757A (en) * | 1994-01-28 | 1995-10-03 | Compaq Computer Corp. | Power converter having regeneration circuit for reducing oscillations |
| CN1271205A (en) * | 1999-04-21 | 2000-10-25 | 因芬尼昂技术股份公司 | Switch power source and method for controlling a switch in a switch power source |
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2007
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5455757A (en) * | 1994-01-28 | 1995-10-03 | Compaq Computer Corp. | Power converter having regeneration circuit for reducing oscillations |
| CN1271205A (en) * | 1999-04-21 | 2000-10-25 | 因芬尼昂技术股份公司 | Switch power source and method for controlling a switch in a switch power source |
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