CN101335201A - Method for making ohmic contact of n-type SiC semiconductor device - Google Patents

Abstract

The invention discloses an ohmic contact manufacturing method of an n-type SiC semiconductor device, which mainly solves the problems of high ohmic contact annealing temperature and poor interface matching of n-type SiC materials. The process is: pretreat the n-type SiC substrate, and form an n well on the SiC substrate by two P ⁺ ion implantations; form a SiC:Ge intermediate layer on the n well by four Ge ⁺ ion implantations; The SiC:Ge intermediate layer is subjected to annealing treatment under the protection of the C film; metal is deposited on the SiC:Ge intermediate layer after the annealing treatment, and the electrode area is determined and the electrode is fabricated. The invention has the advantages of low annealing temperature, low specific contact resistance and sheet resistance, and can be applied to the manufacture of ohmic contacts of n-type SiC semiconductor devices.

Description

Method for making ohmic contact of n-type SiC semiconductor device

technical field

The invention belongs to the technical field of microelectronics and relates to the manufacture of semiconductor materials, in particular to a method for manufacturing ohmic contacts of n-type SiC semiconductor materials.

Background technique

At present, the development of SiC devices has become a research hotspot in the field of semiconductor device circuits. Ohmic contact is an important process in the preparation of SiC devices. In high temperature and high power applications, the low specific contact resistance and high stability of ohmic contact are two important factors that determine the performance of the device. In the working state of high current density, small resistance will cause a large voltage drop, and the thermal stability of the ohmic contact ratio contact resistance at high temperature is an inevitable factor to be considered, otherwise the degradation of the ohmic contact will lead to changes in the performance of the entire device Bad or even ineffective. So far, good ohmic contact preparation is still one of the most important and active aspects for the process research of SiC materials.

However, it is more difficult to fabricate low ohmic contact ratio contact resistance of SiC devices than other semiconductor devices. The results of the specific contact resistance are highly dependent on the carrier concentration of the wafer surface, the choice of metal, the pretreatment of the wafer surface, and the conditions of the thermal annealing of the metallization, etc. In order to obtain a good ohmic contact, the use of ion implantation to increase the carrier concentration on the wafer surface, high temperature alloy annealing, the use of alloys and other compounds are widely used. In terms of SiC ohmic contact metals, there are a wide range of options, such as Cr, Ni, TiN, TiW, NiCr, W, TiW, Ti, TiAl, Mo, WMo, AuTa, TiAu, Ta, WTiNi, TiC and other metals. or alloy.

The energy band diagram of the ohmic contact of the metal/interlayer/semiconductor structure is shown in Fig. 1 . Figure 1 takes n-type semiconductor as an example, where E _C represents the conduction band bottom position of n-type SiC semiconductor material, E _F represents the Fermi level of metal, intermediate layer and n-type SiC material, and E _V represents n-type SiC The position of the valence band top of the material. It can be known from Figure 1 that there are two potential barriers φ _B1 and φ _B2 at the interfaces of the metal/intermediate layer and the intermediate layer/semiconductor. The φ _B1 is the Schottky barrier between the metal and the intermediate layer; the φ _B2 is the potential barrier between the intermediate layer and the semiconductor, and if φ _B1 and φ _B2 are narrow enough or small enough, an ohmic contact can be formed. In addition, if the intermediate layer itself is a graded composition material, it is more conducive to the formation of ohmic contacts, because a large part of the potential difference between the metal and the semiconductor falls in the graded composition region.

In the wide-bandgap semiconductor ohmic contact theory, the intermediate layer is used to form a gradient barrier at the ohmic contact interface, that is, the original high potential barrier is divided into two or more potential barriers through the existence of the intermediate layer. Epitaxial deposition or alloying annealing reaction to obtain the intermediate layer alloy. If the interlayer alloy has a suitable affinity, the bandgap width and the surface state density will be conducive to the formation of ohmic contacts.

At present, there are four main methods for forming ohmic contacts in SiC semiconductor materials: (1) find a suitable metal to form an anti-barrier layer or make the barrier drop low enough. At present, there is no work function of a metal It is more than 6eV, so it is impossible to form SiC ohmic contact by this method, (2) Make the doping concentration of the semiconductor contact region high enough, and the space charge region at the contact interface becomes thin enough to form a tunnel, carry current The electrons are transported in the field emission (FE) mode, and experiments have proved that due to the low diffusion coefficient of common impurities in SiC, it is not feasible to achieve high doping concentration of SiC by this method, (3) in some semiconductor materials, in After the semiconductor surface under the metal is annealed, many sharp small pits are formed, which can play an important role in the formation of ohmic contacts. Experiments have proved that this method is beneficial to the formation of SiC ohmic contacts, but the process conditions are complicated, (4 ) through epitaxial deposition or reaction in the alloying annealing process to obtain the intermediate layer alloy, the intermediate layer alloy needs to have a suitable affinity, forbidden band width and surface state density, this method has a pivotal role in the formation of SiC material ohmic contact effect. Under the guidance of this intermediate layer theory, Ge ⁺ ion implantation is used to form the SiC:Ge intermediate layer, which not only avoids the problem of poor matching between the intermediate layer and the semiconductor material interface, but also reduces the annealing temperature in the ohmic contact fabrication, and at the same time makes SiC The ohmic contact has the characteristics of reproducible low specific contact resistance, uniform and uniform contact interface, thermal stability under high temperature working conditions, anti-oxidation, good adhesion, and easy realization in technology.

content of the invention

The purpose of the present invention is to propose a method for making ohmic contacts of n-type SiC materials, to overcome the problems of high annealing temperature for making ohmic contacts and poor matching of ohmic contact interfaces, and to improve the uniformity and uniformity of the intermediate layer and the semiconductor contact surface , and it is easy to realize in the process.

The technical idea to realize the purpose of the present invention is to abandon the metal, heavy doping and high-temperature annealing to form the ohmic contact manufacturing method of the small pit on the semiconductor surface: to realize the modification of the SiC material by ion implanting Ge ⁺ to the SiC material to form a SiC:Ge intermediate layer. Due to the large atomic volume of Ge, which can increase the lattice constant of SiC, it is often used to compensate for stress to obtain a better match with materials with larger lattice constants, such as GaN. Adding Ge to SiC can reduce the band gap by hundreds of meV. Based on this consideration, the present invention adopts Ge ⁺ implanted into SiC material to form SiC:Ge to obtain the intermediate layer of ohmic contact. This SiC:Ge interlayer is a compositionally graded material capable of forming a good ohmic contact.

The specific plan is as follows:

(1) Pretreat the n-type SiC substrate, and implant P ⁺ ions with a concentration of 1×10 ²⁰ cm ^-3 on the substrate to form an n well;

(2) Implanting Ge ⁺ ions with a concentration of at least 10 ²¹ cm ^-3 on the SiC material forming the n well to form a SiC:Ge intermediate layer with a thickness of 180-250 nm;

(3) Carry out annealing treatment under C film protection to the intermediate layer of SiC:Ge;

(4) Deposit metal on the SiC:Ge intermediate layer after the annealing treatment, determine the electrode area and make the electrode.

In the present invention, a layer of SiC:Ge transition layer is epitaxially formed between the semi-insulating SiC and the metal to form a material with a gradual change in composition, which not only avoids the matching problem of the ohmic contact, but also effectively reduces the contact barrier, and realizes that the temperature is relatively low. The annealing treatment is performed at a low temperature of 800±5°C, which is at least 150°C lower than the conventional annealing temperature. Tests show that the average square resistance R _sh of the 4H-SiC ohmic contact made by the method of the present invention is 1.5kΩ/□, and the average value of the specific contact resistance ρ _C is 4.23×10 ^-5 Ωcm ² , which is higher than that made by conventional methods in China. The ohmic contact parameters are nearly an order of magnitude lower.

Description of drawings

The energy band schematic diagram of metal/intermediate layer/semiconductor structure ohmic contact of Fig. 1n-type 4H-SiC;

Fig. 2 is a schematic diagram of the ohmic contact manufacturing process of the present invention;

Fig. 3 is the crystal structure diagram of the ohmic contact of the present invention;

Fig. 4 is the scanning electron microscope test result figure of the present invention to ohmic contact structure;

Fig. 5 is a test diagram of the relationship between the total ohmic contact resistance and the electrode distance according to the present invention.

Detailed ways

Referring to Fig. 2, the substrate used in the present invention is an n-type 4H-SiC substrate, and there is a p-type 4H-SiC epitaxial layer with a thickness of 5 μm and a doping concentration Na=7.4×10 ¹⁶ cm ^-3 on the substrate. The ohmic contact fabrication process is as follows:

Step 1, pretreat the n-type 4H-SiC substrate, and implant P ⁺ ions with a concentration of 1×10 ²⁰ cm ^-3 on the epitaxial layer to form an n well.

First, at a temperature of 550±5°C, implant P ⁺ ions with an energy of 100keV and a dose of 8.3×10 ¹⁴ cm ^-2 into the epitaxial layer of the n-type 4H-SiC substrate.

Then, when the temperature is 550±5°C, the energy is 50keV, and the dose is 2.5×10 ¹⁵ cm ^-2 . P ⁺ ions were implanted on the epitaxial layer of the n-type 4H-SiC substrate to form an n well with a concentration of 1×10 ²⁰ cm ^-3 .

Step 2, implanting Ge ⁺ ions with a concentration of at least 10 ²¹ cm ⁻³ on the 4H-SiC material forming the n-well to form a 4H-SiC:Ge intermediate layer with a thickness of at least 250 nm.

Firstly, at a temperature of 550±5°C, perform the first Ge ⁺ ion implantation with an implantation energy of 300keV and a dose of 7.63×10 ¹⁵ cm ^-2 ;

Next, at a temperature of 550±5°C, perform a second Ge ⁺ ion implantation with an implantation energy of 183keV and a dose of 2.66×10 ¹⁵ cm ^-2 ;

Then, at a temperature of 550±5°C, perform the third Ge ⁺ ion implantation with an implantation energy of 107keV and a dose of 2.01×10 ¹⁵ cm ^-2 ;

Finally, at a temperature of 550±5°C, perform the fourth Ge+ ion implantation with an implantation energy of 50keV and a dose of 1.66×10 ¹⁵ cm ^-2 to form a Ge ⁺ ion concentration of at least 10 ²¹ cm ^-3 and a thickness of at least 250nm 4H-SiC:Ge interlayer.

Step 3, annealing the intermediate layer of 4H-SiC:Ge under the protection of C film according to the following process;

(3a) Coating a photoresist on the 4H-SiC:Ge intermediate layer, and continuing at a temperature of 350±5° C. for 90 minutes to form a C film;

(3b) Put the 4H-SiC:Ge intermediate layer material after forming the C film into a polycrystalline SiC-lined high-purity graphite crucible to evacuate, and anneal for 30 minutes at a temperature of 1700±5°C;

(3c) Dry oxygen oxidation of the annealed 4H-SiC:Ge intermediate layer material at a temperature of 950±5°C for 15 minutes to remove the C film, followed by RCA cleaning and acetone cleaning in sequence.

Step 4, deposit metal on the 4H-SiC:Ge intermediate layer after the annealing treatment, determine the electrode area and make the electrode.

First, the Ti/Ni structure is formed by electron beam evaporation of Ti with a thickness of 3nm and Ni with a thickness of 200nm;

Secondly, anneal the 4H-SiC:Ge intermediate layer forming the Ti/Ni structure at a temperature of 800±5°C for 3 minutes;

Finally, use a photolithography plate to determine the position of the electrode on the Ti/Ni structure, and use the lift-off process to peel off the alloy layer between the electrodes for the redundant metal area, leaving the electrode position and welding the lead.

The crystal structure of the ohmic contact fabricated through the above steps is shown in Figure 3, in which Ge atoms occupy the positions of Si atoms in 4H-SiC, forming a 4H-SiC:Ge crystal structure.

Referring to Fig. 2, the present invention can also use n-type 3C-SiC as the substrate material, and the steps of making ohmic contacts are basically the same as the above-mentioned process, the only difference is that the optimal thickness of Ge ⁺ ions is 180nm.

Referring to Fig. 2, the present invention can also use n-type 6H-SiC as the substrate material, and the steps of making ohmic contacts are basically the same as the above process, the only difference is that the optimal thickness of Ge ⁺ ions is 234nm.

Effect of the present invention can be further illustrated by measured result:

Measured content: 1) The ohmic contact of the n-type 4H-SiC semiconductor material produced by the method of the present invention is tested at room temperature for its sheet resistance and specific contact resistance. 2) The scanning electron microscopy of the interlayer 4H-SiC:Ge was tested.

The measured results are shown in Figure 4 and Figure 5.

Referring to FIG. 4 , the bright white area represents the ohmic contact metal area, the black area represents the 4H-SiC:Ge intermediate layer after the n-well is formed, and the gray area represents the p-type epitaxial layer area. The 180 times magnified scanning electron microscope result shows that the composition of the 4H-SiC:Ge intermediate layer formed after ion implantation is uniform, the surface is flat, and there is no crystal defect.

Referring to Figure 5, the relationship between the total ohmic contact resistance and the electrode distance shows that the sheet resistance R _sh of the 4H-SiC:Ge interlayer on the 4H-SiC surface is 1.5kΩ/□, and the specific contact resistance ρ _C is 4.23×10 ^-5 Ωcm ² .

Measured experiments show that under the same doping level, the square resistance and specific contact resistance of the n-type 4H-SiC semiconductor material ohmic contact made by the method of the present invention are higher than those of the n-type 4H-SiC semiconductor material ohmic contact made by the conventional method. The resistance of 10kΩ/□ is nearly an order of magnitude lower than the contact resistance of 2.07×10 ^-4 Ωcm ² , and the alloying annealing temperature of the ohmic contact is reduced by 150°C by using the invention, which simplifies the preparation conditions of the n-type 4H-SiC ohmic contact.

Claims (5)

1. the manufacture method of a n type SiC semiconductor ohmic contact comprises following process:

(1) n type SiC substrate is carried out preliminary treatment, and implantation concentration is 1 * 10 on substrate ²⁰Cm ^-3P ⁺Ion forms the n trap;

(2) implantation concentration is at least 10 on the SiC material that forms the n trap ²¹Cm ^-3Ge ⁺Ion, forming thickness is the SiC:Ge intermediate layer of 180-250nm;

(3) annealing in process under C film protection is carried out in the intermediate layer of SiC:Ge;

(4) the intermediate layer depositing metal of the SiC:Ge after annealing in process is determined electrode district and is made electrode.

2. the manufacture method of ohmic contact according to claim 1, wherein step (1) is carried out according to the following procedure:

(1a) when temperature is 550 ± 5 ℃, carry out the P first time ⁺Ion injects, and the injection energy is 100keV, and dosage is 8.3 * 10 ¹⁴Cm ^-2

(1b) when temperature is 550 ± 5 ℃, carry out the P+ ion injection second time, the injection energy is 50keV, dosage is 2.5 * 10 ¹⁵Cm ^-2

3. the manufacture method of ohmic contact according to claim 1, wherein step (2) is carried out according to the following procedure:

(2a) when temperature is 550 ± 5 ℃, carry out the Ge first time ⁺Ion injects, and the injection energy is 300keV, and dosage is 7.63 * 10 ¹⁵Cm ^-2

(2b) when temperature is 550 ± 5 ℃, carry out the Ge second time ⁺Ion injects, and the injection energy is 183keV, and dosage is 2.66 * 10 ¹⁵Cm ^-2

(2c) when temperature is 550 ± 5 ℃, carry out Ge for the third time ⁺Ion injects, and the injection energy is 107keV, and dosage is 2.01 * 10 ¹⁵Cm ^-2

(2d) when temperature is 550 ± 5 ℃, carry out the 4th Ge+ ion and inject, the injection energy is 50keV, dosage is 1.66 * 10 ¹⁵Cm ^-2

4. the manufacture method of ohmic contact according to claim 1, step (3) wherein, carry out according to the following procedure:

(3a) coat photoresist, and under 350 ± 5 ℃ of temperature, continue 90 minutes, form the C film in the SiC:Ge intermediate layer;

(3b) intermediate layer material that will form the SiC:Ge behind the C film places the high purity graphite crucible of polycrystalline Si C liner to vacuumize, and under 1700 ± 5 ℃ of temperature, anneals 30 minutes;

(3c) to the intermediate layer material of SiC:Ge after the annealing under 950 ± 5 ℃ of temperature, dry-oxygen oxidation 15 minutes carries out the removal of C film, and carries out successively that RCA cleans and the acetone cleaning.

5. the manufacture method of ohmic contact according to claim 1, wherein step (4) is carried out according to the following procedure:

(4a) steaming thickness by electron beam is that Ti and the thickness of 3nm is the Ni of 200nm, forms the Ti/Ni structure;

(4b) will form the intermediate layer of the SiC:Ge of Ti/Ni structure, under 800 ± 5 ℃ temperature, anneal duration 3min;

(4c) use photolithography plate on the Ti/Ni structure, to determine the position of electrode, and unnecessary metal area is peeled off, reserve electrode position, welding lead.

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