CN101320177A - Liquid crystal display panel and black picture inserting method thereof - Google Patents

Abstract

The invention discloses a liquid crystal display panel and a black picture inserting method thereof.A plurality of coupling scanning lines are additionally arranged in a plurality of scanning lines and data lines which are originally vertical to each other, the coupling scanning lines are connected to a storage capacitor in each pixel, the switch of each pixel can be controlled by the scanning lines so as to selectively transmit a data signal from the data lines to the liquid crystal capacitor and the storage capacitor, and the coupling scanning lines can couple the storage capacitor to a pixel electrode by using voltage difference to present the effect of inserting black pictures. Therefore, the effect of inserting the black picture can be achieved under the condition of not increasing the clock frequency and not changing the design of the backlight module, and the dynamic quality of the display picture is further improved.

Description

Liquid crystal display panel and black screen insertion method thereof

field of invention

The invention relates to a display panel and a driving method, and in particular to a liquid crystal display panel capable of reducing motion blur and a black picture insertion method thereof.

technical background

In the known active matrix thin film transistor liquid crystal display panel, please refer to FIG. 1, each pixel 10 has a thin film transistor (TFT) 12 as a control switch, its gate is connected to the horizontal scanning line 14, and the drain is connected to to the vertical data line 16, and the source is connected to the liquid crystal electrode.

As shown in the figure, the display panel activates one scanning line 14 at a time to turn on all the thin film transistors 12 on the line, and send data signals to the corresponding pixels 10 through the data lines 16 . Then turn off the thin film transistor 12 until the signal is written again next time, during which the charge is stored on the pixel capacitor 18 and its parallel storage capacitor 20 to maintain the voltage; at this time, the next scan line 14 is started again, through the data line 16 Input the data signal to the corresponding pixel 10; in this way, the data signal of the entire screen is written in order, so that each pixel 10 in the active matrix display panel can be controlled to act according to the input data signal to display the image on the display panel superior.

However, since the thin film transistor liquid crystal display is a holding type display, compared with the CRT pulse display, there will be a slower response time in terms of the quality of the display panel. The phenomenon of smearing on the screen can also be called motion blur. In order to reduce motion blur and improve the display quality of liquid crystal displays in the prior art, in addition to using technologies such as fast liquid crystal and over-drive (over-drive) to speed up the response time, another effective way is to use black screen insertion (Black image insertion) technology to make the visual effect of the liquid crystal display better. The black picture insertion technology inserts a black picture between adjacent picture frames (frame) to achieve the impulse type display (impulse type display), thereby improving Picture dynamic quality.

The current method of inserting a black picture is usually either to turn off the backlight module (Blacklight) in a timely manner to display a black picture, or to insert a black picture by adjusting the signal; the former requires an additional control circuit by adjusting the backlight module; The way to adjust the signal is the main axis, which doubles the frequency, for example, from the original 60Hz to 120Hz, half of the time is fed to the original pixel data signal, and the other half of the time makes the pixel black. However, to insert a black picture between adjacent picture frames, the clock frequency of the data driver responsible for writing the data signal must be doubled, and the high-frequency operating frequency will reduce the charging time of the normal picture. , the problem of insufficient writing time to the liquid crystal pixels will easily occur, and the increase of the operating frequency will also cause the problem of electromagnetic interference (EMI).

In view of this, the present invention proposes a liquid crystal display panel and a method for inserting black frames thereof without changing the circuit structure of the backlight module and without sacrificing charging time, so as to improve the deficiencies in the prior art.

Contents of the invention

The main purpose of the present invention is to provide a liquid crystal display panel and a black picture insertion method thereof, which utilizes newly added scanning lines to change the voltage of the pixel electrodes in a coupling manner, so that it presents a black picture, so that when not increasing Under the premise of improving the pulse frequency and without changing the design of the backlight module, the black screen insertion effect can be achieved, and the dynamic quality of the display screen can be improved.

Another object of the present invention is to provide a liquid crystal display panel and a black frame insertion method thereof, which can control the ratio of inserted black frames by controlling the time length between two scan lines of a pixel when they are turned on.

The present invention proposes a structure of a liquid crystal display panel, which adds a plurality of coupling scanning lines among the plurality of scanning lines and data lines perpendicular to each other, and has a plurality of pixels, and each pixel includes a switch, a liquid crystal capacitor and a storage capacitor , the switch can be controlled by the scan line to selectively transmit a data signal from the data line to the liquid crystal capacitor and the storage capacitor, and the storage capacitor is connected to the coupling scan line, so that the storage capacitor can be coupled to the pixel electrode to present a black screen insertion Effect.

Cooperating with the above liquid crystal display panel structure, the present invention also proposes a black screen insertion method, which first enables the first scanning line, inputs a data signal to the first data line, makes the data signal input to the pixel, and disables the first scanning line. Scanning line; after a predetermined time, the first coupled scanning line is enabled, and the voltage signal of the pixel is pulled from the first level to the second level, for example, the pixel electrode is negative, and is pulled down from a high voltage level to a low voltage Positive level, the pixel electrode is positive, the low voltage level is pulled up to the high voltage level, the voltage difference between the two levels enables the storage capacitor to be coupled to the pixel electrode, and then the pixel presents a black screen.

In the following, a detailed description will be given through specific embodiments in conjunction with the attached drawings, and it will be easier to understand the purpose, technical content, characteristics and effects of the present invention.

Description of drawings

1 is a schematic diagram of a known thin film transistor liquid crystal display panel;

2 is a schematic circuit diagram of a display panel of the present invention;

FIG. 3 is a timing diagram for driving pixels on a liquid crystal display panel according to an embodiment of the present invention;

4 is a timing diagram for driving pixels on a liquid crystal display panel according to another embodiment of the present invention;

Fig. 5 is a schematic diagram of voltage before and after positive and negative polarity coupling in the present invention.

[Description of main component symbols]

10 pixels 12 thin film transistors (TFT)

14 scan lines 16 data lines

18 pixel capacitors 20 storage capacitors

30 first pixel 301 switch

302 liquid crystal capacitor 303 storage capacitor

32 second pixels 321 switches

322 liquid crystal capacitor 323 storage capacitor

34 third pixel 341 switch

342 liquid crystal capacitor 343 storage capacitor

36 fourth pixels 361 switches

362 liquid crystal capacitor 363 storage capacitor

Detailed ways

The present invention utilizes the newly added coupling scan line (coupling scan line) to cooperate with the original signal scan line to change the voltage of the pixel electrode, and uses the coupling voltage to make the pixels in the liquid crystal display panel present a black picture, so that the And under the premise of not changing the design of the backlight module, the black screen insertion effect can be achieved, so as to improve the dynamic quality of the display screen.

Please refer to FIG. 2, which shows a partial schematic diagram of the driving circuit of the liquid crystal display panel of the present invention. The liquid crystal display panel is provided with a plurality of signal scanning lines S1～Sm and a plurality of coupling scanning lines C0～Cm, and a plurality of The data lines D1 ˜ Dm, and the data lines D1 ˜ Dm are perpendicular to the scan lines S1 ˜ Sm and the coupled scan lines C0 ˜ Cm. Below are the first data line D1 and the second data line D2, the first scan line S1 and the second scan line S2, the first coupled scan line C0, the second coupled scan line C1 and the third coupled scan line C2, and the Pixels 30, 32, 34, 36 are taken as an example to describe the spirit of the present invention in detail.

As shown in FIG. 2 , in this liquid crystal display panel, the characteristics of the present invention are described in detail by taking the polarity inversion driving mode of point inversion as an example. A first pixel 30 is of positive polarity and is connected to the first scanning line S1, The first data line D1 and the second coupled scan line C1, and the first pixel 30 includes a switch 301, a liquid crystal capacitor 302 and a storage capacitor 303, the gate of the switch 301 is connected to the first scan line S1, the first source/drain The electrode and the second source/drain are respectively connected to the first data line D1 and the liquid crystal capacitor 302 and the storage capacitor 303, so as to be controlled by the first scan line S1, and selectively transmit a data signal from the first data line D1 to The liquid crystal capacitor 302 and the storage capacitor 303, and the storage capacitor 303 is connected to the second coupling scanning line C1, so that the storage capacitor 303 can be coupled to the pixel electrode to present a black screen. A second pixel 32 adjacent to the first pixel 30 is of negative polarity, connected to the first scanning line S1, the second data line D2 and the first coupling scanning line C0, and the second pixel 32 includes a switch 321, a liquid crystal Capacitor 322 and storage capacitor 323, the gate of this switch 321 is also connected to the first scan line S1, the first source/drain and the second source/drain are respectively connected to the second data line D2 and the liquid crystal capacitor 322 and storage The capacitor 323 is controlled by the first scan line S1, and selectively transmits a data signal from the first data line D2 to the liquid crystal capacitor 322 and the storage capacitor 323, and the storage capacitor 323 is connected to the first coupling scan line C0, so that The storage capacitor 323 can be coupled to the pixel electrode to present a black picture. Similarly, a negative third pixel 34 is connected to the second scan line S2, the first data line D1 and the third coupling scan line C2, and includes a switch 341, a liquid crystal capacitor 342 and a storage capacitor 343; and a positive polarity The characteristic fourth pixel 36 is connected to the second scan line S2, the second data line D2 and the second coupling scan line C1, and includes a switch 361, a liquid crystal capacitor 362 and a storage capacitor 363; 30 is the same as the second pixel 32 , and will not be repeated here.

Wherein, the above-mentioned switches 301, 321, 341, 361, etc. adopt thin film transistors, usually P-type field effect transistors or N-type field effect transistors.

After explaining the circuit structure in Fig. 2, the actuation sequence diagram is described below, please refer to Fig. 3 at the same time, t shown in the figure represents the time of one scanning line, and the predetermined time T can be any length of time, such as half frame time, and the predetermined time T satisfies the equation: 2t≤T≤(Y-2)t, where Y is Vtotal(active+blanking), so as to control the proportion of inserted black screen by controlling the length of the predetermined time.

As shown in FIG. 2 and FIG. 3, since the voltage polarity of the first pixel 30 is positive, at this time, the first scan line S1 is first enabled, and the data signal is input to the first data line D1, so that the first data line D1 The voltage signal on the first pixel 30 can be written into the first pixel 30; when the writing is completed, the first scanning line S1 is disabled, and all the pixels connected on the first scanning line S1 are until the first scanning of the next frame (frame) Before the line is enabled, it is in a floating state. After a predetermined time T, the second coupled scanning line C1 is enabled, so that the voltage signal of the second coupled scanning line C1 changes from a low level to a high level, and the voltage signal of the first pixel 30 changes from a low level to a high level. Pulled to a high level, the voltage difference (ΔV) makes the storage capacitor 303 coupled to the pixel electrode, so that the first pixel 30 presents a black picture; and so on, when all the pixels present a black picture due to the coupling scan line , the black screen will continue to be maintained until the first scanning line S1 is enabled in the next frame and data is written again. When the second scanning line S2 is enabled, the voltage signal on the first data line D1 can be written into the third pixel 34; when the writing is completed, the second scanning line S2 is disabled, and the voltage signal on the second scanning line S2 All the connected pixels 34 are in a floating state until the second scan line of the next frame is enabled. After a predetermined time T, the third coupled scanning line C2 is enabled, and since the voltage polarity of the third pixel 34 is negative, the voltage signal of the third coupled scanning line C2 changes from a high level to a low level, The voltage signal of the third pixel 34 is pulled down from the high level to the low level, and the voltage difference (ΔV) makes the storage capacitor 343 coupled to the pixel electrode, so that the third pixel 34 presents a black screen; and so on, when all pixels After the black picture appears due to the action of the coupling scan line, the black picture will continue to be maintained until the second scan line S2 is enabled in the next frame to write data again. By repeating the above process in sequence, the actions of all the pixels in the entire liquid crystal display panel can be completed.

The circuit structure shown in FIG. 2 can drive pixels not only with the actuation timing diagram shown in FIG. 3 but also with the actuation timing diagram shown in FIG. 4 . Please refer to Figure 2 and Figure 4 at the same time, t shown in the figure represents the time of one scanning line, the predetermined time T can be any length of time, such as the time of half a frame, and this predetermined time T satisfies the equation: 2t≤ T≤(Y-2)t, wherein Y is Vtotal(active+blanking), so as to control the length of the predetermined time T to control the ratio of the inserted black picture.

First, the first scan line S1 is enabled, and the first data signal is input to the first data line D1, so that the voltage value on the first data line D1 can be written into the first pixel 30. When the writing is completed, the first pixel 30 is disabled. One scan line S1, all the pixels connected to the first scan line S1 are in a floating state until the first scan line of the next frame is enabled. Next, enable the second scanning line S2, input the second data signal to the first data line D1, so that the voltage value on the first data line D1 can be written into the third pixel 34, when the writing is completed, disable the first For the second scan line S2, all the pixels connected to the second scan line S2 are in a floating state until the second scan line of the next frame is enabled. After a predetermined time T elapses after disabling the first scan line S1, enable the second coupled scan line C1 to pull up the voltage signal of the first pixel 30 from a low level to a high level, and the voltage difference makes the storage capacitor 303 Coupled to the pixel electrode, then the pixel voltage value coupled by the second coupling line C1 will become higher at this time, and this coupling amount can be controlled so that such pixels (first pixels 30) all present a black screen; at the same time, The third coupling line C2 pulls down the voltage signal of the third pixel 34 from a high level to a low level, and the voltage difference makes the storage capacitor 343 coupled to the pixel electrode, then the pixel voltage coupled by the third coupling line C2 will be will go low so that this pixel (the third pixel 34) appears a black picture. Wherein, the second coupled scan line C1 and the third coupled scan line C2 transition at the same time, and the time difference between the second coupled scan line C3 and the fifth coupled scan line C4 of the next group is two scan lines. . By analogy, when all pixels display a black screen due to the coupling effect of the second and third coupled scan lines C1 and C2, they will continue to maintain a black screen until the first and second scan lines S1 and S2 of the next frame are enabled and rewrite the data.

Among them, the method of the present invention to make the pixel display a black picture can refer to Figure 5, which is a schematic diagram of the voltage before and after the positive and negative polarity coupling of the present invention. As shown in the figure, after coupling, the positive polarity voltage value increases and the voltage difference with Vcom If it is large enough, a black picture will appear; the negative polarity voltage value will drop more, and the voltage difference with Vcom will increase to show a black picture, so all pixels can show the effect of a black picture by controlling the coupling amount. Of course, the present invention can be applied to liquid crystal display panels driven by dot inversion polarity inversion, for other polarity inversion methods, such as picture frame inversion, two-line inversion, four-line inversion, Both row inversion and column inversion are applicable, and the principle of operation is the same as that described above.

To sum up, through the circuit structure design of the present invention and its driving method, the voltage value of the pixel electrode can be changed in a coupling manner by using the newly added scanning line, so that the pixel presents a black picture, so that the clock frequency does not need to be increased and the Under the premise of changing the design of the backlight module, the effect of black screen insertion can be achieved, and the dynamic quality of the display screen can be improved.

The above-described embodiments are only to illustrate the technical ideas and characteristics of the present invention, and its purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly, but it does not limit the scope of patent application of the present invention, that is, according to The equivalent changes or modifications made to the spirit disclosed in the present invention should still be covered within the scope of the patent application of the present invention.

Claims (19)

1, a kind of display panels comprises:

A plurality of sweep traces comprise one first sweep trace and one second sweep trace;

A plurality of sweep traces that are coupled comprise the one first coupling sweep trace and the second coupling sweep trace;

A plurality of data lines, orthogonal with described sweep trace with the coupling sweep trace, and described data line comprises one first data line; And

A plurality of pixels, each described pixel comprises a switch, a liquid crystal capacitance and storage capacitors, described switch is subjected to the control of described first sweep trace or second sweep trace, optionally to transmit a data-signal to described liquid crystal capacitance and described storage capacitors from described first data line, and described storage capacitors is connected to described first coupling sweep trace or the described second coupling sweep trace, makes described storage capacitors be coupled to pixel electrode and presents black picture.

2, display panels as claimed in claim 1, the wherein said first coupling sweep trace is pulled to high levle with signal by low level, and the described second coupling sweep trace is pulled down to low level with signal by high levle.

3, display panels as claimed in claim 2, the reversal of poles mode of wherein said pixel is selected from picture frame counter-rotating, two wires counter-rotating, the counter-rotating of four lines, row counter-rotating, row counter-rotating or some counter-rotating, being positive polarity or negative polarity, and optionally be connected to described first coupling sweep trace or the described second coupling sweep trace according to described liquid crystal capacitance and the stored polarity of voltage of described storage capacitors.

4, display panels as claimed in claim 1, wherein said switch also comprises a grid, one first source/drain electrode and one second source/drain electrode, described grid connects described first sweep trace, and described first source/drain electrode and described second source/drain electrode then connect described first data line and described liquid crystal capacitance and described storage capacitors respectively.

5, display panels as claimed in claim 1, wherein said switch are thin film transistor (TFT).

6, display panels as claimed in claim 5, wherein said thin film transistor (TFT) are P type field-effect transistor or N type field-effect transistor.

7, display panels as claimed in claim 3, when the polarity of voltage of wherein said pixel was positive polarity, the black picture method of the insertion of described display panel comprised:

Described first sweep trace of activation is imported described data-signal to described first data line, makes described data-signal input to described pixel;

Described first sweep trace of anergy; And

After a schedule time, the described first coupling sweep trace of activation is pulled to high levle with the voltage signal of described pixel by low level, and its pressure reduction makes described storage capacitors be coupled to described pixel electrode, and then makes described pixel present black picture.

8, display panels as claimed in claim 3, when the polarity of voltage of wherein said pixel was negative polarity, the black picture method of the insertion of described display panel comprised:

Described second sweep trace of activation is imported described data-signal to described first data line, makes described data-signal input to described pixel;

Described first sweep trace of anergy; And

After a schedule time, the described second coupling sweep trace of activation is pulled down to low level with the voltage signal of described pixel by high levle, and its pressure reduction makes described storage capacitors be coupled to described pixel electrode, and then makes described pixel present black picture.

9, as claim 7 or the 8th described display panels, the be coupled phase place of sweep trace of the wherein said first coupling sweep trace and described second is opposite and differ from time of a sweep trace.

10, as claim 7 or the 8th described display panels, wherein said schedule time T satisfies equation: the t of 2t≤T≤(Y-2), wherein said t is the time of a sweep trace, and described Y is Vtotal, controls with the length of utilizing the described schedule time of control and inserts black aspect ratio.

11, display panels as claimed in claim 3, wherein being subjected to the described pixel of described first sweep trace control is first pixel, and being subjected to the described pixel of described second sweep trace control is second pixel, and the black picture method of the insertion of described display panel comprises:

Described first sweep trace of activation is imported first data-signal to described first data line, makes described first data-signal input to described first pixel;

Described first sweep trace of anergy;

Described second sweep trace of activation is imported second data-signal to described first data line, makes described second data-signal input to described second pixel;

Described second sweep trace of anergy; And

Behind described first sweep trace of anergy through a schedule time:

The described first coupling sweep trace of activation is pulled to high levle with the voltage signal of described first pixel by low level, and its pressure reduction makes described storage capacitors be coupled to described pixel electrode, and then makes described first pixel present black picture; And

At one time, the voltage signal of described second pixel is pulled down to low level by high levle, its pressure reduction makes described storage capacitors be coupled to described pixel electrode, and then makes described second pixel present black picture.

12, display panels as claimed in claim 11, wherein said first coupling sweep trace and the described second coupling sweep trace transition at one time, itself and next are organized the time that differs two sweep traces between the first new coupling sweep trace and the second coupling sweep trace.

13, display panels as claimed in claim 11, wherein said schedule time T satisfies equation: the t of 2t≤T≤(Y-2), wherein said t is the time of a sweep trace, and described Y is Vtotal, controls with the length of utilizing the described schedule time of control and inserts black aspect ratio.

14, a kind of black picture insertion method of display panels, described display panels comprises a plurality of pixels, each described pixel comprises a switch, a liquid crystal capacitance and storage capacitors, described switch is subjected to the control of one first sweep trace or second sweep trace, optionally to transmit a data-signal to described liquid crystal capacitance and described storage capacitors from one first data line, and described storage capacitors is connected to the one first coupling sweep trace or the second coupling sweep trace, makes described storage capacitors be coupled to pixel electrode and presents black picture; The black picture insertion method of described display panels comprises the following steps:

Described first sweep trace of activation is imported described data-signal to described first data line, makes described data-signal input to described pixel;

Described first sweep trace of anergy; And

After a schedule time, the described first coupling sweep trace of activation is pulled to the second accurate position with the voltage signal of described pixel by the first accurate position, and the pressure reduction of described two accurate positions makes described storage capacitors be coupled to described pixel electrode, and then makes described pixel present black picture.

15, the black picture insertion method of display panels as claimed in claim 14, when the polarity of voltage of wherein said pixel was negative polarity, the first accurate position be a high levle, and described second accurate be low level, made described pressure reduction be pulled down to low level by high levle.

16, the black picture insertion method of display panels as claimed in claim 14, when the polarity of voltage of wherein said pixel was positive polarity, the first accurate position be a low level, and described second accurate be high levle, made described pressure reduction be pulled to high levle by low level.

17, the black picture insertion method of display panels as claimed in claim 14, the reversal of poles mode of wherein said pixel is selected from picture frame counter-rotating, two wires counter-rotating, the counter-rotating of four lines, row counter-rotating, row counter-rotating or some counter-rotating, being positive voltage or negative voltage, and optionally be connected to described first coupling sweep trace or the described second coupling sweep trace according to described liquid crystal capacitance and the stored polarity of voltage of described storage capacitors.

18, the be coupled phase place of sweep trace of the black picture insertion method of display panels as claimed in claim 14, the wherein said first coupling sweep trace and described second is opposite and differ from time of a sweep trace.

19, the black picture insertion method of display panels as claimed in claim 14, wherein said schedule time T satisfies equation: the t of 2t≤T≤(Y-2), wherein said t is the time of a sweep trace, described Y is Vtotal, controls with the length of utilizing the described schedule time of control and inserts black aspect ratio.

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