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CN101297305B - A system for mapping defective printed circuits - Google Patents

A system for mapping defective printed circuits Download PDF

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Publication number
CN101297305B
CN101297305B CN2005800248665A CN200580024866A CN101297305B CN 101297305 B CN101297305 B CN 101297305B CN 2005800248665 A CN2005800248665 A CN 2005800248665A CN 200580024866 A CN200580024866 A CN 200580024866A CN 101297305 B CN101297305 B CN 101297305B
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Prior art keywords
pcb
layer
unit
discarded
layers
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Expired - Lifetime
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CN2005800248665A
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CN101297305A (en
Inventor
尼尔·德里
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Kang Dai image technology program Limited Hong Kong Co.
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Camtek Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/161—Using chemical substances, e.g. colored or fluorescent, for facilitating optical or visual inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/163—Monitoring a manufacturing process

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

公开了一种废弃单元映像系统。该系统是尤其针对对一块包含多块PCB的多层PCB的映像而设计的。所公开的系统包括一个光检查系统，其扫描旨在创建一块具体PCB的被标识层的每一层(两面)，并且在一个层映像上标记缺陷废弃单元；一个存储机制，其使用任何用于存储层信息的方法存储层映像；以及一个组合软件，其把层映像加以组合，以创建一个PCB映像，其中，标记每一个其层之一具有缺陷的废弃单元。而且，该系统还可包括一个优化软件，其匹配所述PCB的每一阶层的多个层映像，并确定被标识层的集合，以结合成具有最少废弃单元的一块PCB，使能够汇集每一所述确定的集合，以结合成一块PCB。

Figure 200580024866

An obsolete unit mapping system is disclosed. The system is especially designed for mapping a multi-layer PCB consisting of several PCBs. The disclosed system includes an optical inspection system that scans each layer (both sides) of marked layers intended to create a specific PCB, and marks defective reject cells on a layer map; a storage mechanism that uses any A method of storing layer information stores layer images; and a combining software that combines the layer images to create a PCB image in which each obsolete cell having a defect in one of its layers is marked. Furthermore, the system may also include an optimization software that matches multiple layer maps for each layer of the PCB and determines the set of identified layers to combine into a PCB with the fewest discarded cells, enabling the aggregation of each The determined sets are combined into one PCB.

Figure 200580024866

Description

The system that is used for mapping defective printed circuits
Technical field
The present invention relates to automatic ray inspection system and method field.More particularly, the present invention relates to the System and method for of a kind of PCB of reflection.
Background technology
Automatically ray inspection system uses Flame Image Process and special-purpose algorithm to check the surface of PCB or wafer, to discern this lip-deep defective.
Usually make PCB by making a mode that comprises the veneer of polylith PCB.On said veneer, produce, and accomplish the whole machining process process, cut into PCB to said veneer then.
Can on a veneer, produce a large amount of unit (PCB), wherein, defective may appear in the unit of any number, they is called " discarded unit ".A single defective in one of elementary layer is enough to cause this unit defective.Because process (is not) to carry out on cell level on the plate level, therefore sign is discarded the unit in process, thereby prevents to be very important to any processing of discarded unit and the input on the material.
The present invention both can be used for using the PCB of " superimposed " method to make, and also can be used for using the PCB of " lamination " method to make." superimposed " is a kind ofly wherein to be built directly in each layer than the method in the lower floor, and " lamination " is a kind of each layer of wherein producing respectively, and then through pressure, or lamination compiles these layers and is combined into a PCB.
Therefore, having a kind of method and system that uses the inspection platform to create a discarded unit reflection of each concrete plate, will be useful.
Co-pending, October in 2003 international publication on the 2nd publication No. be the patent " a method for storing layer ' s information of alayers-made object (a kind of method that is used for the layer information of the object that storage of hierarchically makes) " of WO 03/081535 A1; In a preferred embodiment, utilized the present invention.This suggestion relates to a kind of by the mode that makes up, stores and submit the multi-layer information that is used for its combined information form to, " method of the layer information of the object that storage of hierarchically is made ".
To the use that the layer of combination is videoed, the summary information of the discarded unit of defective of whole concrete PCB is provided.The invention of being mentioned " a kind of method that is used for the layer information of the object that storage of hierarchically makes " is defined as the formal representation of multidimensional information (X, Y, J (i)).The invention of being mentioned has also utilized the every (X to whole concrete multidimensional structure; Y) expression of the combined information of position and explanation; Wherein, combined information as a value J who combines by the value J (i) of given layer (because J be to N layer J1, J2 .., Ji ... the combination of Jn).
Summary of the invention
The present invention is a kind of discarded unit image system and method, is specifically designed to multilayer board that comprises polylith PCB of reflection.
Tell about according to of the present invention, a kind of discarded unit image system is provided, this discarded unit image system comprises:
A) ray inspection system, its scanning be intended to create a concrete PCB by each layer (two sides) of label layer, and at a discarded unit of layer reflection marked;
B) memory storage, it uses any method that is used for accumulation layer information, the accumulation layer reflection; And
C) integration software, its layer reflection makes up, to create a PCB reflection, wherein, mark one of each its layer discarded unit with defective.
According to the further characteristic in this described preferred embodiment of the present invention, a kind of discarded unit image system is provided, this discarded unit image system also comprises:
D) Optimization Software, it matees a plurality of layers of reflection of each stratum of said PCB, and confirms can be compiled each said definite set to be combined into a PCB with minimum discarded unit, to make, to be combined into a PCB by the set of label layer.
E) a kind of mechanism of compiling, it compiles by the label layer set, to be combined into PCB according to Optimization result.
According to a further advantageous embodiment of the invention, said discarded unit image system is provided, this discarded unit image system also comprises a display that is used to show the PCB reflection.
In a further advantageous embodiment, discarded unit image system is provided, wherein, with the discarded unit on the different colours mark PCB reflection, wherein, each definitions of color defective the layer position.
In another preferred embodiment of the present invention, discarded unit image system is provided, wherein, the method that is used for accumulation layer information is the defined method of international publication WO 03/081535 A1.
According to a further aspect of the invention, a kind of discarded unit mapping method is provided, this discarded unit mapping method is specifically designed to multilayer board that comprises polylith PCB of reflection, and this method comprises the following steps:
A) scanning of ray inspection system be intended to create a concrete PCB by each layer (two sides) of label layer, and at a discarded unit of layer reflection marked;
B) use any method that is used for accumulation layer information, the accumulation layer reflection; And
C) the said layer reflection of combination, to create a PCB reflection, wherein, mark one of each its layer discarded unit with defective.
According to the present invention, said method also is furnished with following additional step:
D) use an Optimization Software, it matees a plurality of layers of reflection of each stratum of said PCB, and confirms by the set of label layer, to be combined into a PCB with minimum discarded unit; And
E), compile by the label layer set, to be combined into PCB according to Optimization result.
According to the present invention, a kind of method also is provided, comprise by different colours the discarded unit on the PCB reflection carried out painted step, wherein, each definitions of color defect layer.
According to the present invention, a kind of method also is provided, wherein, used the method for defined accumulation layer information among international publication WO 03/081535 A1.
The present invention has successfully overcome the shortcoming of existing technologies through being provided for the System and method for of the discarded unit of reflection on PCB.
Description of drawings
Here, with reference to accompanying drawing, only by way of example mode is described the present invention.Now; At length, targetedly with reference to each accompanying drawing; Should be emphasized that said detail is merely illustrative, and only is intended to the discussion to describing property of the preferred embodiments of the present invention; And the introduction of these details, aim to provide and be regarded as content the most useful and that understand the most easily the description of principle of the present invention and notion.Therefore, except necessary, do not attempt to describe in more detail the structural details of the present invention here to basic comprehension of the present invention.With reference to the description that accompanying drawing carried out, the those of skill in the art in this technical field are obviously recognized, how can be presented as various ways to the present invention in practice.
In said figure:
Fig. 1 has explained the process flow diagram of a preferred embodiment of the present invention, and the preferred embodiment has been used " lamination " working method.
Fig. 2 has used one to have the two sides of 25 PCB, the example of three ply board, has explained according to mapping method of the present invention.
Embodiment
The present invention is a kind of discarded unit image system and method, is specifically designed to multilayer board that comprises polylith PCB of reflection.
According to the present invention, this system has used the image that is scanned of each layer of a concrete PCB.On each layer, exist the discarded unit that possibly identified.In fact, the image that is scanned is a reflection of one single discarded unit of a simple layer.
This system makes up these reflections; To create a reflection; This reflection has been explained the position of the discarded unit on the PCB that will use these layers production, when having accomplished the production of PCB, can be used for this reflection the further process (for example boring) of this PCB.
When " lamination " method of use is produced PCB, can use an Optimization Software, this Optimization Software is selected a specific layer, to produce a PCB with minimum discarded unit to each layer from a plurality of layers of same type.
With reference to accompanying drawing and appended description, can understand principle and operation better according to system of the present invention.
Now, with reference to accompanying drawing, Fig. 1 has explained the process flow diagram of a preferred embodiment of the present invention, and the preferred embodiment has been used " lamination " working method.Three layer groups " A " 17 that input will scan in scanning element 18, L1, L2 and L3.Be sent to unit map 19 to image, unit map 19 is that each layer is created reflection.Be sent to an outgoing position " B " to layer 20, and be sent to optimization unit 21 to these reflections.Optimize unit and software 21 decisions (in order to obtain a PCB) the 3rd layer of ground floor that is chosen as PCB of L1, be chosen as the second layer to the ground floor of L2, and be chosen as last one deck of PCB to the second layer of L3 with minimum discarded unit.Optimize unit 21 and compile these layers, and create a PCB 22, create a compatible reflection that will be used for the discarded unit of mark of next process then with minimum discarded unit according to its decision.
Fig. 2 has used one to have the two sides of 25 PCB, the example of three ply board, has explained according to mapping method of the present invention.
Scan each layer in three layers of said plate, obtain the face 1 of each layer L1, L2 and L3 and the image of face 2.Discarded unit 11 is carried out mark (in this explanation, by " D " mark in addition).This system is the synthetic reflection 12 of said image sets, and reflection 12 uses the position of the discarded unit of shades of colour mark of sign defect layer position, the defective 13 of L1, the defective 14 of L2, defective 15 and the multilayer defective 16 of L3.
As in this instructions and employed in the following claim part, term " discarded unit " etc. refers to the underproof PCB unit on the veneer that comprises polylith PCB.
Although invention has been described to have combined its specific embodiment; But the skilled personnel in this technical field will obviously recognize many selections of the present invention, modification and variant; Therefore, the present invention is intended to comprise design and interior all such selections, modification and the variant of wide region that falls into accompanying claims.

Claims (6)

1.一种废弃单元映像系统，用于映像一块包含多个废弃单元的多层PCB，所述系统包括：1. A waste unit imaging system for mapping a multilayer PCB comprising a plurality of waste units, said system comprising: a)一个光检查系统，其扫描旨在创建一块具体PCB的被标识层的每一层-两面，并且在一个层映像上标记缺陷废弃单元；a) an optical inspection system that scans each layer-both sides of the marked layer to create a specific PCB, and marks defective reject units on a layer map; b)一个存储装置，用于存储所述层映像，其中，所述系统把所述层映像加以组合，以创建一个PCB映像，其中每一个其层之一具有缺陷的废弃单元被标记；以及b) a storage device for storing said layer maps, wherein said system combines said layer maps to create a PCB map in which each obsolete cell having a defect in one of its layers is marked; and c)一个优化单元，其匹配所述PCB的每一层的多个层映像，并确定被标识层的集合以结合成具有最少缺陷废弃单元的一块PCB，使能够汇集每一所述确定的集合以结合成一块PCB。c) an optimization unit that matches multiple layer maps for each layer of said PCB and determines the set of identified layers to be combined into a PCB with the fewest defective discarded units, enabling each of said determined sets to be assembled to be combined into one PCB. 2.根据权利要求1所述的废弃单元映像系统，其中所述系统还根据所述优化单元得到的结果，汇集所述被标识层集合，以结合成PCB。2. The discarded unit mapping system according to claim 1, wherein said system further assembles said set of identified layers to combine into a PCB according to the results obtained by said optimization unit. 3.根据权利要求1所述的废弃单元映像系统，还包括一个用于显示所述PCB映像的显示器。3. The waste unit mapping system of claim 1, further comprising a display for displaying said PCB mapping. 4.根据权利要求1所述的废弃单元映像系统，其中，以不同颜色标记所述PCB映像上的缺陷废弃单元，其中，每一种颜色定义所述缺陷的层位置。4. The reject unit mapping system of claim 1, wherein defective reject units on the PCB map are marked with different colors, wherein each color defines a layer position of the defect. 5.一种废弃单元映像方法，用于映像一块包含多个废弃单元的多层PCB，所述方法包括：5. A method for mapping a discarded unit, used to map a multilayer PCB comprising a plurality of discarded units, the method comprising: a)一个光检查系统扫描旨在创建一块具体PCB的被标识层的每一层-两面，并且在一个层映像上标记缺陷废弃单元；a) an optical inspection system scans each layer-both sides of the marked layer intended to create a specific PCB, and marks defective reject units on a layer map; b)存储所述层映像；b) storing said layer image; c)组合所述层映像，以创建一个PCB映像，其中，标记每一个其层之一具有缺陷的废弃单元；以及c) combining the layer maps to create a PCB map in which each obsolete cell having a defect in one of its layers is marked; and d)使用一个优化软件，其匹配所述PCB的每一层的多个层映像，并确定被标识层的集合，以结合成具有最少缺陷废弃单元的一块PCB；以及d) using an optimization software that matches multiple layer maps for each layer of the PCB and determines the set of identified layers to combine into a PCB with the fewest defective discarded cells; and e)根据所述优化软件得到的结果，汇集所述被标识层集合，以结合成一个PCB。e) According to the results obtained by the optimization software, assemble the set of marked layers to combine into a PCB. 6.根据权利要求5所述的方法，还按不同颜色对所述PCB映像上的缺陷废弃单元进行着色，其中，每一颜色定义缺陷层。6. The method of claim 5, further coloring the defective reject units on the PCB map in different colors, wherein each color defines a defective layer.
CN2005800248665A 2004-06-21 2005-06-19 A system for mapping defective printed circuits Expired - Lifetime CN101297305B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
IL162650 2004-06-21
IL162650A IL162650A (en) 2004-06-21 2004-06-21 Scrap-units- mapping system for mapping multiple layers of a single board and method therefor
PCT/IL2005/000650 WO2005122695A2 (en) 2004-06-21 2005-06-19 A system for mapping defective printed circuits

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WO2005122695A3 (en) 2007-05-18
IL162650A0 (en) 2005-11-20
WO2005122695A2 (en) 2005-12-29
IL162650A (en) 2014-09-30
TWI275335B (en) 2007-03-01
JP2008504521A (en) 2008-02-14
CN101297305A (en) 2008-10-29
JP4923180B2 (en) 2012-04-25
TW200601927A (en) 2006-01-01

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Effective date of registration: 20180907

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Granted publication date: 20120822