CN101277094A - Operational amplifier capable of compensating offset voltage - Google Patents
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Abstract
可补偿偏移电压的运算放大器,包含有一输入级电路,包含有一正输入端、一负输入端、一第一电流输出端及一第二电流输出端,用来根据该正输入端与该负输入端所接收的电压,由该第一电流输出端及该第二电流输出端输出对应的电流;一输出级电路,耦接于该输入级电路的该第一电流输出端及该第二电流输出端,用来根据该第一电流输出端及该第二电流输出端的电流,输出电压;以及一调整装置,耦接于该输入级电路与该输出级电路之间,用来调整该第一电流输出端及该第二电流输出端的电流,以补偿偏移电压的影响。
An operational amplifier capable of compensating for offset voltage comprises an input stage circuit, comprising a positive input terminal, a negative input terminal, a first current output terminal and a second current output terminal, for outputting corresponding currents from the first current output terminal and the second current output terminal according to the voltages received by the positive input terminal and the negative input terminal; an output stage circuit, coupled to the first current output terminal and the second current output terminal of the input stage circuit, for outputting voltages according to the currents of the first current output terminal and the second current output terminal; and an adjustment device, coupled between the input stage circuit and the output stage circuit, for adjusting the currents of the first current output terminal and the second current output terminal to compensate for the influence of the offset voltage.
Description
技术领域 technical field
本发明涉及一种可补偿偏移电压的运算放大器,特别是涉及一种通过调整运算放大器中输入级电路与输出级电路间的电流大小,以补偿偏移电压所造成的影响的运算放大器。The invention relates to an operational amplifier capable of compensating offset voltage, in particular to an operational amplifier capable of compensating the influence caused by offset voltage by adjusting the magnitude of the current between the input stage circuit and the output stage circuit in the operational amplifier.
背景技术 Background technique
运算放大器是各种电子装置中一个重要的电路组成组件,其广泛地应用于家电、工业及科学仪器等领域。电路设计者常可使用运算放大器来实现许多不同的运作功能,如缓冲器、滤波器、模拟至数字转换器等。An operational amplifier is an important circuit component in various electronic devices, and it is widely used in home appliances, industrial and scientific instruments and other fields. Circuit designers can often use operational amplifiers to implement many different operational functions such as buffers, filters, analog-to-digital converters, and more.
理想的运算放大器具备下列特性:输入阻抗无限大、输出阻抗等于零、开回路增益无限大、共模互斥比(Common Mode Rejection Ratio)无限大、频宽无限大。然而,由于半导体工艺及集成电路技术的限制,实际上,理想运算放大器的实现有其困难度。为了表示真实运算放大器的特性,已知技术是以一偏移电压(Offset Voltage)代表运算放大器的非理想性。An ideal operational amplifier has the following characteristics: infinite input impedance, zero output impedance, infinite open-loop gain, infinite Common Mode Rejection Ratio, and infinite bandwidth. However, due to the limitations of semiconductor technology and integrated circuit technology, in practice, it is difficult to realize an ideal operational amplifier. In order to represent the characteristics of a real operational amplifier, known techniques use an offset voltage (Offset Voltage) to represent the non-ideality of the operational amplifier.
请参考图1,图1为一已知运算放大器10的示意图。运算放大器10包含一输入级电路100、一输出级电路102及一等效电压源104。运算放大器10由一正输入端Vp及一负输入端Vn接收差动讯号,并由一输出端Vo输出放大后的结果。等效电压源104用来表示运算放大器10的非理想性(不存在于实际电路上),其所产生的电压Vos表示输出端Vo耦接于负输入端Vn(形成单位增益回授架构)时,输出端Vo与正输入端Vp间的电压差,即运算放大器10偏移电压。偏移电压产生的原因有许多,如半导体物理特性、工艺瑕疵、组件不匹配等。Please refer to FIG. 1 , which is a schematic diagram of a known
请参考图2,图2为图1中输入级电路100的示意图。输入级电路100用以根据正输入端Vp及负输入端Vn的电压,产生电流Id1、Id2至输出级电路102,其包含有输入晶体管P1、P2及一电流源200。输入晶体管P1、P2皆为P型金属氧化半导体晶体管,形成一共源差动对,其共模电压为Vc。在理想情形下,输入晶体管P1、P2的信道长度、信道宽度等特性完全相同,则电流源200所产生的电流Ib会平均地流至输入晶体管P1、P2的源极,使得输入晶体管P1、P2的源极至栅极的电压完全相同,即电压Vos为0,且电流Id1与Id2相等。然而,实际上,当输入晶体管P1、P2因工艺上的某些特性未完全匹配时,会造成输入晶体管P1、P2的阈值电压(ThresholdVoltage)不相等,使得输入晶体管P1、P2的源极至栅极的电压不相等,则偏移电压Vos不等于0,且电流Id1与Id2不相等。Please refer to FIG. 2 , which is a schematic diagram of the
简言之,由于半导体物理特性、工艺瑕疵、组件不匹配等因素,造成已知运算放大器的偏移电压不等于0,影响其性能。因此,如何减少运算放大器偏移电压的影响即成为业界所努力的课题之一。In short, due to factors such as semiconductor physical characteristics, process defects, and component mismatches, the offset voltage of known operational amplifiers is not equal to 0, which affects its performance. Therefore, how to reduce the influence of the offset voltage of the operational amplifier has become one of the subjects that the industry strives for.
发明内容 Contents of the invention
因此,本发明的主要目的即在于提供一种可补偿偏移电压的运算放大器。Therefore, the main objective of the present invention is to provide an operational amplifier capable of compensating offset voltage.
本发明披露一种可补偿偏移电压的运算放大器,包含有一输入级电路,包含有一正输入端、一负输入端、一第一电流输出端及一第二电流输出端,用来根据该正输入端与该负输入端所接收的电压,由该第一电流输出端及该第二电流输出端输出对应的电流;一输出级电路,耦接于该输入级电路的该第一电流输出端及该第二电流输出端,用来根据该第一电流输出端及该第二电流输出端的电流,输出电压;以及一调整装置,耦接于该输入级电路与该输出级电路之间,用来调整该第一电流输出端及该第二电流输出端的电流,以补偿偏移电压的影响。The present invention discloses an operational amplifier capable of compensating offset voltage, which includes an input stage circuit, including a positive input terminal, a negative input terminal, a first current output terminal and a second current output terminal, which are used according to the positive input terminal. The voltage received by the input terminal and the negative input terminal outputs a corresponding current from the first current output terminal and the second current output terminal; an output stage circuit is coupled to the first current output terminal of the input stage circuit and the second current output terminal, used to output a voltage according to the currents of the first current output terminal and the second current output terminal; and an adjustment device, coupled between the input stage circuit and the output stage circuit, for to adjust the currents of the first current output terminal and the second current output terminal to compensate the influence of the offset voltage.
本发明还披露一种可补偿偏移电压的轨对轨式运算放大器,包含有一输入级电路,包含有一正输入端、一负输入端、一第一电流输出端、一第二电流输出端、一第一电流接收端及一第二电流接收端,用来根据该正输入端与该负输入端所接收的电压,由该第一电流输出端及该第二电流输出端输出电流,并由该第一电流接收端及该第二电流接收端接收电流;一输出级电路,耦接于该第一电流输出端、该第二电流输出端、该第一电流接收端及该第二电流接收端,用来根据该第一电流输出端、该第二电流输出端、该第一电流接收端及该第二电流接收端的电流,产生对应的电压;以及一调整装置,耦接于该输入级电路与该输出级电路之间,用来调整该第一电流输出端及该第二电流输出端所输出的电流及该第一电流接收端及该第二电流接收端所接收的电流,以补偿偏移电压的影响。The present invention also discloses a rail-to-rail operational amplifier capable of compensating offset voltage, which includes an input stage circuit, including a positive input terminal, a negative input terminal, a first current output terminal, a second current output terminal, A first current receiving end and a second current receiving end, used to output current from the first current output end and the second current output end according to the voltage received by the positive input end and the negative input end, and by The first current receiving end and the second current receiving end receive current; an output stage circuit is coupled to the first current output end, the second current output end, the first current receiving end and the second current receiving end end, used to generate a corresponding voltage according to the currents of the first current output end, the second current output end, the first current receiving end and the second current receiving end; and an adjusting device, coupled to the input stage Between the circuit and the output stage circuit, it is used to adjust the current output by the first current output terminal and the second current output terminal and the current received by the first current receiving terminal and the second current receiving terminal to compensate Effect of Offset Voltage.
附图说明 Description of drawings
图1为一已知运算放大器10的示意图。FIG. 1 is a schematic diagram of a known
图2为图1中输入级电路100的示意图。FIG. 2 is a schematic diagram of the
图3为本发明一实施例可补偿偏移电压的运算放大器30的示意图。FIG. 3 is a schematic diagram of an
图4显示图3中调整装置304的功能方块图。FIG. 4 shows a functional block diagram of the
图5为图4中第一电流模式数字至模拟转换器的示意图。FIG. 5 is a schematic diagram of the first current mode digital-to-analog converter in FIG. 4 .
图6及图7分别显示本发明实施例运算放大器60及70的示意图。6 and 7 are schematic diagrams of
图8为本发明一实施例可补偿偏移电压的轨对轨式运算放大器80的示意图。FIG. 8 is a schematic diagram of a rail-to-rail operational amplifier 80 capable of compensating offset voltages according to an embodiment of the present invention.
图9为图8中输入级电路800的示意图。FIG. 9 is a schematic diagram of the
图10显示图8中调整装置804的功能方块图。FIG. 10 shows a functional block diagram of the
图11为图10中第一电流模式数字至模拟转换器的示意图。FIG. 11 is a schematic diagram of the first current mode digital-to-analog converter in FIG. 10 .
附图符号说明Description of reference symbols
10、30、60、70、80 运算放大器10, 30, 60, 70, 80 operational amplifiers
100、300、600、700、800输入级电路100, 300, 600, 700, 800 input stage circuit
102、302、802 输出级电路102, 302, 802 output stage circuit
104、310、814 等效电压源104, 310, 814 equivalent voltage source
Vp 正输入端Vp Positive input terminal
Vn 负输入端Vn Negative input terminal
Vo 输出端Vo output terminal
Id1、Id2、Id3、Id4 电流Id1, Id2, Id3, Id4 Current
Vos 偏移电压Vos Offset Voltage
Vc 共模电压Vc Common Mode Voltage
P1、P2、N1、N2 晶体管P1, P2, N1, N2 Transistors
200 电流源200 Current Source
304、606、706、804 调整装置304, 606, 706, 804 adjustment device
306、806 第一电流输出端306, 806 The first current output terminal
308、808 第二电流输出端308, 808 Second current output terminal
Vctrl 控制讯号Vctrl control signal
400、900 第一电流模式数字至模拟转换器400, 900 First current mode digital to analog converter
402、902 第二电流模式数字至模拟转换器402, 902 Second current mode digital to analog converter
404、904 控制单元404, 904 control unit
SW1~SWn、SWU1~SWUn、SWD1~SWDn 开关SW1~SWn, SWU1~SWUn, SWD1~SWDn switch
CS1~CSn、CSU1~CSUn、CSD1~CSDn 电流源CS1~CSn, CSU1~CSUn, CSD1~CSDn current source
810 第一电流接收端810 The first current receiving end
812 第二电流接收端812 Second current receiving terminal
具体实施方式 Detailed ways
请参考图3,图3为本发明一实施例可补偿偏移电压的运算放大器30的示意图。运算放大器30包含有一输入级电路300、一输出级电路302及一调整装置304。输入级电路300由一正输入端Vp及一负输入端Vn接收电压讯号后,通过一第一电流输出端306及一第二电流输出端308输出对应的电流Id1、Id2至输出级电路302。输出级电路302则根据第一电流输出端306及第二电流输出端308的电流Id1、Id2,由一输出端Vo输出电压放大结果。另外,在图3中,一等效电压源310用来表示运算放大器30的非理想性(不存在于实际电路上),其所产生的电压Vos表示运算放大器30的偏移电压。调整装置304则用来调整第一电流输出端306及第二电流输出端308所输出的电流Id1、Id2,以补偿偏移电压的影响。Please refer to FIG. 3 . FIG. 3 is a schematic diagram of an
因此,在运算放大器30中,调整装置304可通过调整电流Id1、Id2,补偿因半导体物理特性、工艺瑕疵、组件不匹配等因素所产生的偏移电压的影响。举例来说,若电流Id1大于电流Id2时,调整装置304可由第一电流输出端306汲取电流或输出电流至第二电流输出端308,使得电流Id1约等于电流Id2。相反地,当电流Id1小于电流Id2时,调整装置304可输出电流至第一电流输出端306或由第二电流输出端308汲取电流,以使电流Id1约等于电流Id2。在此情形下,即使运算放大器30因半导体物理特性、工艺瑕疵、组件不匹配等因素而产生偏移电压时,本发明不需改变输入级电路300及输出级电路302的设计,即可通过调整装置304补偿偏移电压的影响。Therefore, in the
请参考图4,图4显示图3中调整装置304的功能方块图。调整装置304包含一第一电流模式数字至模拟转换器400、一第二电流模式数字至模拟转换器402及一控制单元404。第一电流模式数字至模拟转换器400与第二电流模式数字至模拟转换器402分别耦接于第一电流输出端306及第二电流输出端308,用来根据控制单元404所输出的控制讯号Vctrl,通过第一电流输出端306及第二电流输出端308输出或接收电流。控制单元404可根据第一电流输出端306与第二电流输出端308的电流差,输出控制讯号Vctrl,以控制第一电流模式数字至模拟转换器400通过第一电流输出端306所输出或接收的电流大小与第二电流模式数字至模拟转换器402通过第二电流输出端308所输出或接收的电流大小。因此,当运算放大器30因偏移电压导致电流Id1与Id2不相等时,控制单元404可通过控制讯号Vctrl控制第一电流模式数字至模拟转换器400及第二电流模式数字至模拟转换器402,以调整输入至输出级电路302的电流,使得电流(Id1±dI)与(Id2±dI)相等。如此一来,偏移电压所造成的影响得以有效地被补偿。Please refer to FIG. 4 , which shows a functional block diagram of the adjusting
特别注意的是,图4仅为调整装置304的功能方块图,本领域的技术人员可配合其它组件,设计出具有相同功能的电路。举例来说,如图5所示,第一电流模式数字至模拟转换器400可由开关SW1~SWn及电流源CS1~CSn所组成。开关SW1~SWn可根据控制讯号Vctrl,导通第一电流输出端306与对应的电流源的连结,从而调整通过第一电流输出端306汲取或输出的电流大小。因此,当电流Id1与Id2不相等时,控制单元404可控制开关SW1~SWn,导通电流源CS1~CSn中特定电流源与第一电流输出端306的连结,以使电流Id1与Id2相等。It should be noted that FIG. 4 is only a functional block diagram of the adjusting
因此,在运算放大器30中,调整装置304可调整电流Id1与Id2,使得流入输出级电路302的电流相等,以补偿偏移电压的影响。当然,本领域的技术人员可根据所需的输入级电路,设计适当的调整装置304。举例来说,请参考图6及图7,图6及图7分别显示本发明实施例运算放大器60及70的示意图。运算放大器60及70皆为运算放大器30的衍生,其中,运算放大器60的输入级电路600是由P型金属氧化半导体晶体管P1、P2所组成,而运算放大器70的输入级电路700则由N型金属氧化半导体晶体管N1、N2所组成,两者的调整单元606及706则根据图5的第一电流模式数字至模拟转换器400所设计,其运作原理如前所述。举例来说,以运算放大器60为例,当晶体管P1、P2的某些特性未完全匹配时,会造成晶体管P1、P2的阈值电压不相等,因而导致电流Id1与Id2不相等。在此情形下,调整单元606可通过开启电流源,以使电流Id1与Id2趋近于相等。Therefore, in the
图6及图7所示的运算放大器60及70为根据运算放大器30所衍生的实施例,而非用以限制本发明的涵盖范围,设计者可作适当的变化。例如,调整单元606及706中的电流源数目可根据所需精确度调整,而每一电流源所产生的电流可设为一致或步阶式递减等。The
此外,对于轨对轨式运算放大器,本发明另提供一实施例,用以补偿偏移电压的影响。请参考图8,图8为本发明实施例可补偿偏移电压的轨对轨式运算放大器80的示意图。轨对轨式运算放大器80包含有一输入级电路800、一输出级电路802及一调整装置804。输入级电路800由一正输入端Vp及一负输入端Vn接收电压讯号后,通过一第一电流输出端806及一第二电流输出端808输出对应的电流Id1、Id2至输出级电路802,并由一第一电流接收端810及一第二电流接收端812接收输出级电路302所输出的电流Id3、Id4。输出级电路802则根据第一电流输出端806、第二电流输出端808、第一电流接收端810或第二电流接收端812的电流Id1、Id2、Id3、Id4,由一输出端Vo输出电压放大结果。另外,在图8中,一等效电压源814用来表示轨对轨式运算放大器80的非理想性(不存在于实际电路上),其所产生的电压Vos表示轨对轨式运算放大器80的偏移电压。调整装置804用来调整第一电流输出端806、第二电流输出端808所输出的电流Id1、Id2或第一电流接收端810、第二电流接收端812所接收的电流Id3、Id4,以补偿偏移电压的影响。In addition, for the rail-to-rail operational amplifier, the present invention provides another embodiment for compensating the influence of the offset voltage. Please refer to FIG. 8 , which is a schematic diagram of a rail-to-rail operational amplifier 80 capable of compensating offset voltages according to an embodiment of the present invention. The rail-to-rail operational amplifier 80 includes an
轨对轨式运算放大器80运作方式与运算放大器30相似,不同之处在于轨对轨式运算放大器80较运算放大器30多了第一电流接收端810及第二电流接收端812,用来接收输出级电路802所输出的电流Id3、Id4。因此,只要将运算放大器30适当修改后,即可补偿轨对轨式运算放大器80的偏移电压。The operation mode of the rail-to-rail operational amplifier 80 is similar to that of the
首先,请参考图9,图9为输入级电路800的示意图。输入级电路800包含P型金属氧化半导体晶体管P1、P2所组成的差动对及N型金属氧化半导体晶体管N1、N2所组成的差动对。晶体管P1、P2所组成的差动对可通过第一电流输出端806及第二电流输出端808输出电流Id1、Id2至输出级电路802,而晶体管N1、N2所组成的差动对则通过第一电流接收端810及第二电流接收端812接收输出级电路802所输出的电流Id3、Id4。First, please refer to FIG. 9 , which is a schematic diagram of an
请继续参考图10,图10为调整装置804的示意图。如同图4所示的调整装置304,调整装置804亦包含一第一电流模式数字至模拟转换器900、一第二电流模式数字至模拟转换器902及一控制单元904。第一电流模式数字至模拟转换器900耦接于第一电流输出端806与第一电流接收端810之间,用以根据控制单元904所输出的控制讯号Vctrl,通过第一电流输出端806输出电流及通过第一电流接收端810接收电流。第二电流模式数字至模拟转换器902则耦接于第二电流输出端808与第二电流接收端812之间,用以根据控制单元904所输出的控制讯号Vctrl,通过第二电流输出端808输出电流及通过第二电流接收端812接收电流。因此,当轨对轨式运算放大器80因偏移电压导致电流Id1与Id2及Id3与Id4不相等时,控制单元904可通过控制讯号Vctrl控制第一电流模式数字至模拟转换器900及第二电流模式数字至模拟转换器902,以调整输入至输出级电路802的电流,及输入至输入级电路800的电流。如此一来,偏移电压所造成的影响得以有效地被补偿。Please continue to refer to FIG. 10 , which is a schematic diagram of the adjusting
当然,调整装置804可以是任何具有相同功能的电路,本领域的技术人员可配合其它组件,设计出具相同功能的电路。举例来说,如图11所示,第一电流模式数字至模拟转换器900可由开关SWU1~SWUn、SWD1~SWDn及电流源CSU1~CSUn、CSD1~CSDn所组成。开关SWU1~SWUn可根据控制讯号Vctrl,导通第一电流输出端806与对应的电流源的连结,从而调整输入级电路800通过第一电流输出端806所输出的电流大小;而开关SWD1~SWDn则可根据控制讯号Vctrl,导通第一电流接收端810与对应的电流源的连结,从而调整输入级电路800通过第一电流接收端810所接收的电流大小。同样地,第二电流模式数字至模拟转换器902亦可以图11所示的架构实现。如此一来,控制单元904可通过输出控制讯号Vctrl,使Id1等于或趋近于Id2,Id3等于或趋近于Id4,则偏移电压所造成的影响得以有效地被补偿。当然,电流源CSU1~CSUn、CSD1~CSDn的数目可根据所需精确度调整,而每一电流源所产生的电流可设为一致或步阶式递减等。Of course, the
综上所述,本发明通过调整运算放大器中输入级电路与输出级电路间的电流大小,以补偿偏移电压所造成的影响。因此,不需改变输入级电路与输出级电路,本发明即可补偿偏移电压所造成的影响,从而改善电路性能。To sum up, the present invention compensates the influence caused by the offset voltage by adjusting the current between the input stage circuit and the output stage circuit in the operational amplifier. Therefore, without changing the input stage circuit and the output stage circuit, the present invention can compensate the influence caused by the offset voltage, thereby improving the circuit performance.
以上所述仅为本发明的较佳实施例,凡依本发明的权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.
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CN102053195A (en) * | 2010-10-15 | 2011-05-11 | 艾默生网络能源有限公司 | Current sampling system and method for calculating offset voltage of operational amplifier |
CN101840724B (en) * | 2009-03-18 | 2013-05-08 | 南亚科技股份有限公司 | Signal receiver and related voltage compensation method thereof |
CN106571785A (en) * | 2015-10-08 | 2017-04-19 | 九旸电子股份有限公司 | Gain circuit of power over Ethernet equipment |
CN107547052A (en) * | 2017-08-23 | 2018-01-05 | 刘欣亮 | Embedded multiplier and operational amplifier |
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FR2793087B1 (en) * | 1999-04-28 | 2001-06-29 | St Microelectronics Sa | CIRCUIT AND METHOD FOR COMPENSATING OFFSET VOLTAGE IN AN OPERATIONAL AMPLIFIER |
JP2002232271A (en) * | 2001-02-01 | 2002-08-16 | Fujitsu Ltd | DC offset cancel circuit, optical-electric pulse conversion circuit, and pulse shaping circuit |
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CN101840724B (en) * | 2009-03-18 | 2013-05-08 | 南亚科技股份有限公司 | Signal receiver and related voltage compensation method thereof |
CN102053195A (en) * | 2010-10-15 | 2011-05-11 | 艾默生网络能源有限公司 | Current sampling system and method for calculating offset voltage of operational amplifier |
CN102053195B (en) * | 2010-10-15 | 2013-04-24 | 艾默生网络能源有限公司 | Current sampling system and method for calculating offset voltage of operational amplifier |
CN106571785A (en) * | 2015-10-08 | 2017-04-19 | 九旸电子股份有限公司 | Gain circuit of power over Ethernet equipment |
CN106571785B (en) * | 2015-10-08 | 2018-11-20 | 九旸电子股份有限公司 | Gain circuit of power over Ethernet equipment |
CN107547052A (en) * | 2017-08-23 | 2018-01-05 | 刘欣亮 | Embedded multiplier and operational amplifier |
CN107547052B (en) * | 2017-08-23 | 2024-04-19 | 刘欣亮 | Embedded multiplier and operational amplifier |
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