CN101242174B - Semiconductor switch - Google Patents

Abstract

A challenge in outputting a voltage near the midpoint potential in a semiconductor switch which operates based on a low voltage power supply is to avoid a decrease in operation speed and a deterioration in accuracy of the output voltage which would be caused due to an increase in ON-resistance or occurrence of current leakage. Thus, a structure including a gray level generation circuit (100), an analog switch circuit (111) and a backgate voltage control circuit (122) is provided wherein the backgate voltage of each of an N-channel MOS transistor (112) and a P-channel MOS transistor (113) of the analog switch circuit (111) to which the voltage of the gray level generation circuit (100) is input is supplied from the backgate voltage control circuit (122) which has an equal structure as that of the gray level generation circuit(100).

Description

semiconductor switch

technical field

The present invention relates to a semiconductor switch, and more particularly to a semiconductor switch with low on-state resistance, small size, low cost, and excellent switching responsiveness.

Background technique

A prior art semiconductor switch will be described with reference to FIG. 6 . The semiconductor switch shown in Fig. 6 is made up of the gray level generation circuit 400 that produces gray level voltage, analog switch circuit 410 and switch control circuit 420, the arbitrary gray level of gray level generation circuit 400 is controlled by analog switch circuit 410. The stage voltage VM is delivered to the output terminal.

As shown in Figure 6, the analog switch circuit 410 is generally composed of a P-channel MOS transistor 412 and an N-channel MOS transistor 411 connected in parallel, and the sources and drains of the P-channel MOS transistor 412 and the N-channel MOS transistor 411 are connected to each other respectively. connect. In addition, the switch control circuit 420 provides a voltage for turning on/off the analog switch circuit 410, and the signal of HIGH level or LOW level connected to the gate terminal of the P-channel MOS transistor 412 is Φ, and the signal of the N-channel MOS transistor 412 is Φ. The signal _NΦ to which the gate terminal of the MOS transistor 411 is connected is a signal obtained by inverting the HIGH level and the LOW level of the signal Φ. In addition, the back gate terminal of the N-channel MOS transistor 411, that is, the P well is connected to the lowest potential L-side power supply, and the back gate terminal of the P-channel MOS transistor 412, that is, the N well is connected to the highest potential H-side power supply.

In the analog switch circuit 410 of this existing CMOS structure, when the HIGH level voltage of the signal _NΦ is applied to the gate terminal of the N-channel MOS transistor 411, the N-channel MOS transistor 411 is in a conducting state, and at the same time When the LOW level voltage of the signal Φ is applied to the gate terminal of the P-channel MOS transistor 412, the P-channel MOS transistor 412 is also turned on. Accordingly, the analog switch circuit 410 is turned into an ON state, so that the gray scale voltage VM is transmitted to the output terminal.

Then, when the LOW level voltage of the signal _NΦ is applied to the gate terminal of the N-channel MOS transistor 411, the N-channel MOS transistor 411 is turned off, and at the same time, the HIGH level voltage of the signal Φ is applied to the P At the gate terminal of the channel MOS transistor 412, the P channel MOS transistor 412 is also turned off. Accordingly, the analog switch circuit 410 is in an OFF state, so that the gray scale voltage VM is not transmitted to the output terminal.

Among them, in the voltage supplied to the P-channel MOS transistor 412, when the back-gate voltage is lower than the source voltage, because the P-well as the source of the P-channel MOS transistor 412 and the N-well as the back-gate Leakage current is generated in the PN junction existing between them, so it is desirable that the back gate voltage of the P-channel MOS transistor 412 is a voltage above the source voltage. In the prior art, the back-gate voltage of the P-channel MOS transistor 412 is related to the highest potential H-side power connection. Likewise, in the voltage supplied to the N-channel MOS transistor 411, when the back gate voltage is higher than the source voltage, because a PN junction existing between the N well as the source and the P well as the back gate is generated Therefore, it is desirable that the back gate voltage of the N-channel MOS transistor 411 is a voltage lower than the source voltage. In the prior art, the back-gate voltage of the N-channel MOS transistor 411 is connected to the lowest potential L-side power supply.

However, in the related art, a potential difference is generated between the potential of the source electrode and the potential of the back gate electrode of each of the MOS transistors 411 , 412 in the analog switch circuit 410 . Therefore, the threshold voltages of the MOS transistors 411, 412 increase due to the substrate bias effect. Then, when the input voltage VM of the analog switch circuit 410 is an analog voltage near the intermediate potential, the influence of the substrate bias effect is particularly large, and the on-state resistance of the analog switch circuit 410 becomes high. In addition, in the vicinity of the intermediate potential, the gate-to-source voltage itself that drives the gate terminal of the analog switch circuit 410 becomes small.

Normally, a MOS transistor is turned on when the potential difference between the gate and the source is larger than the threshold voltage, and the voltage between the gate and the source is small. When the threshold voltage is high, the on-state resistance becomes high, making it difficult to transmit signals. As a result, the operating speed is lowered, and the accuracy error of the voltage output from the output terminal of the analog switch circuit 410 is increased. Furthermore, when the potential difference between the gate and the source of the MOS transistors 411 and 412 does not exceed the threshold voltage, the analog switch circuit 410 is turned off.

In order to avoid the above problems, methods of changing the size of MOS transistors, lowering the threshold voltage, and employing depletion-type MOS transistors are available, but these methods cause increased leakage current and increased chip cost (see Patent Document 1).

[Patent Document 1] US Patent No. 7,038,525

Contents of the invention

[Problem to be solved by the invention]

In a MOS transistor formed by processing a plurality of wells in the depth direction, such as a triple well structure, by connecting the source terminal and the back gate terminal of the MOS transistor to make the two equipotential, the chip area will increase, but the Substrate bias effects can be avoided.

However, even if the source terminal and the back gate terminal of the MOS transistor in the triple well structure are connected as shown in FIG. The reverse bias of the junction produces a reverse bias leakage current I3 in this PN junction. For the P-channel MOS transistor 412 not shown in the figure, the N well constituting the back gate of the P-channel MOS transistor and the P well located outside the N well also form a reverse bias voltage of the PN junction, generating a reverse bias leakage current . These reverse bias leakage currents increase as the inter-junction potential difference of the PN junction becomes higher. In recent microfabrication, leakage current has become more significant due to the influence of substrate current and heat carrier.

The reverse bias leakage current I3 is supplied by the gray scale generating circuit 400 connected to the analog switch circuit 410, although it is originally desired that the current flowing in the gray scale generating circuit 400 is not shunted from the H side power supply to the L side power supply (I2 =I1), but because the reverse bias leakage current I3 is shunted from the gray level generating circuit 400 to the analog switch circuit 410, so that I2=I1-I3, the result is that due to the resistor division in the gray level generating circuit 400, in An error occurs in the gray scale voltage, so that the precision of the voltage output from the output terminal of the analog switch circuit 410 is reduced.

Therefore, the object of the present invention is: even under the situation that needs the processing of high threshold voltage of MOS transistor and the circuit design of low voltage, the on-state resistance of semiconductor switch is also low, also can prevent leak current, realizing high-speed operation and high precision of output voltage.

[means to solve the problem]

In order to achieve the above object, the semiconductor switch of the present invention keeps the voltage between the source and the back gate of the MOS transistor constituting the analog switch circuit low, so that the semiconductor switch is difficult to be affected by the substrate bias effect, and the on-state resistance can be realized. Low semiconductor switches enable high precision operation of the output voltage.

It will be described in detail below. The semiconductor switch according to the present invention includes: a gray-scale generation circuit for generating a plurality of gray-scale voltages, a plurality of analog circuits with a plurality of gray-scale voltages for respectively selecting one of the plurality of gray-scale voltages. A grayscale selector circuit of a switch circuit, and a switch control circuit for controlling the operation of the grayscale selector circuit, wherein the plurality of analog switch circuits respectively include The MOS transistor connected to the source of the gray scale voltage that should be selected, the switch control circuit includes: a timing control circuit that provides the gate voltage of the MOS transistor in order to control the on/off of the MOS transistor, provides A backgate voltage control circuit for setting a voltage substantially equal to a source voltage of the MOS transistor as a backgate voltage of the MOS transistor.

[Invention effect]

According to the present invention, in the semiconductor switch, the on-state resistance is low, leakage current can be prevented, and high-speed operation and operation with high output voltage accuracy can be performed.

Description of drawings

FIG. 1 is a block diagram showing the general structure of a semiconductor switch according to the present invention.

FIG. 2 is a detailed configuration diagram of the semiconductor switch according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view of a case where a triple well structure is used in the N-channel MOS transistor in FIG. 2 .

4 is a detailed configuration diagram of a semiconductor switch according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a specific example of the bias circuit in FIG. 4 .

FIG. 6 is a circuit diagram showing a structural example of a conventional semiconductor switch.

FIG. 7 is a cross-sectional view of a case where a triple well structure is used in the N-channel MOS transistor in FIG. 6 .

[Description of Reference Signs]

100, 200, 400 gray scale generation circuit

110 gray level selector circuit

111, 211, 410 Analog switch circuit

112, 212, 411 N-channel MOS transistors

113, 213, 412 P-channel MOS transistors

120, 220, 420 switch control circuit

121, 421 timing control circuit

122, 222 back gate voltage control circuit

223,300 Bias circuit

D0, D1, D2, D3 Diodes

M1, M2, M301, M302 P-channel MOS transistors

M303, M304 N-channel MOS transistor

R, R1 Resistive element

VR(1)～VR(N), VL(1)～VL(N) gray level voltage

φ, Nφ ON/OFF control signal of analog switch circuit

Detailed ways

first embodiment

A semiconductor switch according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2 . The semiconductor switch according to the first embodiment of the present invention is composed of a grayscale generation circuit 100 , a grayscale selector circuit 110 , and a switch control circuit 120 , and the switch control circuit 120 is composed of a timing control circuit 121 and a backgate voltage control circuit 122 .

Among them, the grayscale generation circuit 100 is composed of a resistor string circuit in which a plurality of resistor elements R are connected in series between the H-side power supply and the L-side power supply. The number of resistive elements R is N, and the number of grayscale voltages generated at the connection points between the resistors is N−1. The voltages of the H-side power supply and the L-side power supply, and the size and number of the resistance elements R are determined by design based on the application of the semiconductor switch. The gray scale selector circuit 110 is composed of a plurality of analog switch circuits 111. The input sides of the multiple analog switch circuits 111 are respectively connected to the connection points between the resistance elements R of the gray scale generating circuit 100, and the output sides are connected to the gray scale generation circuit 100. on the output terminal of the degree selector circuit 110.

In FIG. 2 , only one analog switch circuit 111 is shown, and the back gate voltage control circuit 122 is formed by the same resistor string circuit as the gray scale generation circuit 100 . In FIG. 2, the analog switch circuit 111 is formed by connecting an N-channel MOS transistor 112 and a P-channel MOS transistor 113 in parallel. The gate signal φ of the P-channel MOS transistor 113 is LOW level, and the N-channel MOS transistor 113 is connected in parallel. When the gate signal N _φ of the transistor 112 is at HIGH level, a voltage supplied from one connection point of the string resistor, for example, VR(M), is transmitted to the output terminal. Conversely, when the gate signal φ of the P-channel MOS transistor 113 is at the HIGH level and the gate signal _Nφ of the N-channel MOS transistor 112 is at the LOW level, the input-side voltage VR(M) is not transmitted to the output terminals. The gate signal φ connected to the gate terminals of the MOS transistors 112 and 113 and its inverted signal N _φ are supplied from the timing control circuit 121 of the switch control circuit 120 .

The back gate voltage control circuit 122 is composed of series resistors connecting resistor elements R in series between the H side power supply and the L side power supply. The number of resistor elements is N, and the grayscale voltage generated at the connection point between the resistors The number of is N-1. Among them, the grayscale voltages generated at the connection point between the resistors of the back gate voltage control circuit 122 are VL(1), VL(2), ... VL(N) in order from the low voltage side, and counted from the low voltage side The arbitrary Mth grayscale voltage is VL(M), the M−1th grayscale voltage is VL(M−1), and the M+1th grayscale voltage is VL(M+1). Likewise, the gray scale voltages generated at the connecting points between the resistors of the gray scale generation circuit 100 are VR(1), VR(2), ... VR(N) in order from the low voltage side, counting from the low voltage side The arbitrary Mth grayscale voltage is VR(M), the M−1th grayscale voltage is VR(M−1), and the M+1th grayscale voltage is VR(M+1).

Assuming that the respective resistance values and resistance numbers of the back gate voltage control circuit 122 and the gray scale generation circuit 100 are equal, the Mth voltages VR(M) and VL(M) from the low potential numbers of both are equal voltages. In the analog switch circuit 111 whose input is the gray level voltage VR(M), the VL(M+1) potential of the back gate voltage control circuit 122 is connected to the back gate voltage of the P-channel MOS transistor 113 constituting the analog switch circuit 111. The gate terminal is connected to connect the VL(M−1) potential of the back gate voltage control circuit 122 to the back gate terminal of the N-channel MOS transistor 112 constituting the analog switch circuit 111 .

As described above, by making the gray scale generation circuit 100 and the back gate voltage control circuit 122 have the same structure, even in the case of a manufacturing variation in the semiconductor manufacturing process, since the gray scale generation circuit 100 and the back gate voltage control circuit 122 have the same structure, The respective grayscale voltages VL(M) and VR(M) of the electrode voltage control circuit 122 are determined by the resistance voltage division of the voltages of the H-side power supply and the L-side power supply, so VL(M) and VR(M) are approximately equal. value, the back gate voltage VL(M+1) of the P-channel MOS transistor 113 is a voltage higher than the source potential VR(M) of the P-channel MOS transistor 113, and the back gate voltage of the N-channel MOS transistor 112 Voltage VL(M−1) is a voltage lower than the source terminal of N-channel MOS transistor 112 . Therefore, it is possible to reliably prevent the forward leakage of the PN junction between the source and back gate of the N-channel MOS transistor 112 and the P-channel MOS transistor 113, and at the same time be less affected by the effect of the substrate bias, and have a small on-state resistance. semiconductor switch.

At this time, in the case where the resistance manufacturing variation is small, the back gate of the N-channel MOS transistor 112 may be connected to VL(M), or the back gate of the P-channel MOS transistor 113 may be connected to VL(M). connect.

In addition, as shown in FIG. 3 , the current flowing from the back gate of the MOS transistor into the peripheral well of the back gate, for example, in the case of the N-channel MOS transistor 112, flows from the P well into the PN junction in the N well. The reverse bias leakage current is not provided by the gray level generation circuit 100, but by the back gate voltage control circuit 122, so I2=I1, and the result is that the gray level voltage can be delivered to the output terminal without A voltage deviation of the gray scale generating circuit 100 is caused. In addition, in the case of the P-channel MOS transistor 113 , the reverse bias leakage current flowing from the N well to the P well is also supplied by the back gate voltage control circuit 122 , but the illustration is omitted.

"Second Embodiment"

A semiconductor switch according to a second embodiment of the present invention will be described with reference to FIG. 4 . The semiconductor switch of the second embodiment is composed of an analog switch circuit 211 , a switch control circuit 220 , and a gray scale generation circuit 200 . In addition, the switch control circuit 220 is composed of a timing control circuit 121 , a back gate voltage control circuit 222 and a bias circuit 223 .

Here, since the timing control circuit 121 has the same configuration as that of the first embodiment, the same components as those in FIGS. 1 and 2 are assigned the same symbols, and detailed description thereof will be omitted.

The grayscale generation circuit 200 has a structure in which a P-channel MOS transistor M2, a plurality of resistance elements R, and a diode D0 are connected in series between an H-side power supply and an L-side power supply. In addition, the back gate voltage control circuit 222 has a structure in which a P-channel MOS transistor M1, a plurality of resistance elements R, and a diode D1 are connected in series between the H-side power supply and the L-side power supply. In addition, the diode D0 is composed of F diodes connected in parallel, and the diode D1 is also composed of F diodes connected in parallel. The gate voltages of the P-channel MOS transistor M1 and the P-channel MOS transistor M2 are connected in common, and are connected to the bias circuit 223 .

The above configuration is the bandgap reference circuit using the semiconductor switch described in the first embodiment, and a reference voltage independent of the power supply voltage and ambient temperature is output to the output terminal of the analog switch circuit 211 .

FIG. 5 shows a specific circuit structure of the bias circuit 223 in FIG. 4 . The bias circuit 300 of FIG. 5 is composed of P-channel MOS transistors M301 and M302 constituting the first current mirror circuit, N-channel MOS transistors M303 and M304 constituting the second current mirror circuit, and the N-channel MOS transistor M303. Diode D3 whose source is connected to the L-side power supply, resistor element R1 and diode D2 connected in series between the source of N-channel MOS transistor M304 and the L-side power supply.

In addition, the diode D2 is composed of F diodes connected in parallel. The total joining areas of the diode D3 and the diode D2 are S1 and S2, respectively, and the area ratio S2/S1 thereof is F. Next, the operation of the bandgap reference circuit configured as above will be described, and a voltage formula for a reference voltage serving as an output voltage of the bandgap reference circuit will be established.

Here, as a premise, the P-channel MOS transistors M301 and M302 of the first current mirror circuit constituting the bias circuit 300 have the same gate length and gate width, and the N-channel MOS transistors constituting the second current mirror circuit The gate length and gate width of the transistors M303 and M304 are equal in size.

Assuming that k is the Boltzmann constant, the absolute temperature is T, and the electron charge is q, the source-drain current I2 of the P-channel MOS transistor M302 is

I2＝(kT/q)·LN(F)/R1 …(1)

express. Among them, the operation symbol LN is the natural logarithm with e as the base. This current I2 does not depend on the power supply voltage, but is determined by physical constants, the resistance value R1, and the junction total area ratio F of the diode D3 and the diode D2.

The bias voltage output of the bias voltage circuit 223 (300) is connected to the gate terminal of the P channel MOS transistor M1 of the back gate voltage control circuit 222 and the P channel MOS transistor M2 of the gray scale generation circuit 200, and the bias voltage circuit 223 The P-channel MOS transistor M302 of (300), the P-channel MOS transistor M2 of the gray scale generation circuit 200, and the P-channel MOS transistor M1 of the back gate voltage control circuit 222 constitute a current mirror.

Therefore, assuming that the gate lengths and gate widths of the P-channel MOS transistor M302, the P-channel MOS transistor M1, and the P-channel MOS transistor M2 are respectively equal, they are equal to the current I2 flowing in the P-channel MOS transistor M302 A current flows through the P-channel MOS transistor M1 and the P-channel MOS transistor M2.

Wherein, it is assumed that the resistance value of the plurality of resistive elements of the gray scale generation circuit 200 is R, and the number is N, and the Mth gray scale voltage counted from the L-side power supply is VR(M), and the positive voltage of the diode D0 To the voltage VD0, for VR(M)

VR(M)＝(M·R/R1)·(kT/q)·LN(F)+VD0 ...(2)

express.

In addition, assuming that the resistance value of the plurality of resistance elements of the back gate voltage control circuit 222 is R, the number is N, and the Mth grayscale voltage counted from the L-side power supply is VL(M), the diode D1 The forward voltage is VD1, for VL(M)

VL(M)＝(M·R/R1)·(kT/q)·LN(F)+VD1 …(3)

express.

In addition, in the back gate voltage control circuit 222, the M-1th gray scale output counted from the L-side power supply is for VL(M-1).

VL(M-1)＝[(M-1) R/R1](kT/q) LN(F)+VD1 …(4)

Indicates that in the back gate voltage control circuit 222, the M+1th grayscale output VL(M+1) counted from the L-side power supply is used

VL(M+1)＝[(M+1) R/R1](kT/q) LN(F)+VD1 …(5)

express.

VL(M+1) is connected to the back gate of the P-channel MOS transistor 213 of the analog switch circuit 211 , and VL(M-1) is connected to the back gate of the N-channel MOS transistor 212 of the analog switch circuit 211 .

In addition, since the voltage VR(M) is output to the output terminal Vout through the analog switch circuit 211, with

Vout＝VR(M)＝[(M·R)/R1]·(kT/q)·LN(F)+VD0 …(6)

express.

Temperature characteristics of output voltage Vout with

T＝VR(M)/

T＝[(M·R)/R1]·(k/q)·LN(F)+

VD0/

T  …(7)表示。 Vout/

T = VR(M)/

T=[(M·R)/R1]·(k/q)·LN(F)+

VD0/

T ... (7) said.

T＝[(M·R)/R1]·(k/q)·LN(F)+

VD1/

T  …(8)表示。In addition, the temperature characteristic of the gray level voltage VL(M) of the back gate voltage control circuit 222 is used for VL(M)/

T=[(M·R)/R1]·(k/q)·LN(F)+

VD1/

T ... (8) said.

Wherein, it is known that the temperature dependence of the diode forward voltage VF is -2mV/°C, by selecting the number M, The resistance value R, the resistance value R1, and the constants of the junction total area ratio F can obtain VR(M), VL(M) and output voltage Vout independent of ambient temperature. For example, when R1=5.0kΩ, R=5.0kΩ, M=11, and the total junction area ratio F is 8, the temperature characteristics of VR(M), VL(M), and Vout are -0.3mV/°C.

As described above, according to the semiconductor switch of the present embodiment, as can be known from the circuit configuration and equations (2), (4), and (5), since the back gate terminal of the P-channel MOS transistor 213 is larger than the source terminal The potential is high, and the potential of the back gate terminal of the N-channel MOS transistor 212 is lower than that of the source terminal, so in the analog switch circuit 211, it is possible to reliably prevent the source of the N-channel MOS transistor 212 and the P-channel MOS transistor 213 from Forward leakage of the PN junction between the back gates. In addition, as can be known from equations (7) and (8), since the gray level voltage VL(M) of the back gate voltage control circuit 222 and the gray level voltage VR(M) of the gray level generating circuit 200 It has equal temperature dependence and power supply voltage dependence, so even if the ambient temperature and power supply voltage change, the voltage deviation of VL(M) and VR(M) is small, and the influence of the substrate bias effect can be reduced. Because the PN junction reverse bias leakage current is not provided by the gray level generation circuit 200, but by the back gate voltage control circuit 222, it will not cause a voltage deviation of the gray level generation circuit 200, and can accurately produces an output voltage.

In addition, in order to achieve a lower threshold voltage, by using a MOS transistor with a withstand voltage below the voltage between the H-side power supply and the L-side power supply to form a semiconductor switch, low on-state resistance and high-speed switching can be realized.

In addition, in the first and second embodiments described above, an analog switch circuit in which a P-channel MOS transistor and an N-channel MOS transistor are connected in parallel is used, but an analog switch composed of only P-channel MOS transistors is used, or only An analog switch composed of N-channel MOS transistors can also achieve the same effect.

In addition, as the resistance element used in the above-mentioned first and second embodiments, each can be a resistance element that can be manufactured by a semiconductor process, and a resistance element using polysilicon, a resistance element using a diffused resistance, or a resistance element using a well resistor is used. A resistance element can also achieve the same effect.

In addition, the diode used in the above-mentioned second embodiment may be an element having a PN junction that can be manufactured by a semiconductor process. For example, a PN junction between the source and drain terminals and the back gate terminal of a MOS transistor can also be obtained. Same effect.

The present invention can be used in a semiconductor switch, especially in a semiconductor switch constituting a gray scale generating circuit and a power supply circuit.

Claims (3)

1. a semiconductor switch comprises

The gray scale that produces a plurality of gray-scale voltages produce circuit,

Have a plurality of analog switching circuits of selecting a gray-scale voltage in described a plurality of gray-scale voltage respectively the gray scale selector circuit and

Control the ON-OFF control circuit of the operation of described gray scale selector circuit,

It is characterized in that:

Described a plurality of analog switching circuit comprises the MOS transistor with the source electrode that is connected with the gray-scale voltage that should select in described a plurality of gray-scale voltages respectively,

Described ON-OFF control circuit comprises: provide in order to control switching on and off of described MOS transistor the gate voltage of this MOS transistor timing control circuit,

Provide and the source voltage voltage about equally of described MOS transistor tailgate pole tension control circuit as the tailgate pole tension of described MOS transistor,

Described tailgate pole tension control circuit has and the identical internal structure of described gray scale generation circuit,

Described gray scale produces circuit and described tailgate pole tension control circuit has the resistance string circuit that connects respectively between H side power supply and L side power supply.

In the claim 1 record semiconductor switch, it is characterized in that:

Described tailgate pole tension control circuit does not provide and carry out the tailgate pole tension of the voltage of bias voltage as described MOS transistor to the source electrode of described MOS transistor and the PN junction of tailgate interpolar on positive direction.

In the claim 1 record semiconductor switch, it is characterized in that:

Described gray scale produces circuit and described tailgate pole tension control circuit has current source, resistance string circuit and the diode that is connected in series respectively between H side power supply and L side power supply.

Images