CN101216727A - Mapping Method for Dynamic Frequency Adjustment in Embedded Low Power Operating System - Google Patents

Abstract

The invention discloses a mapping method for dynamic frequency adjustment in an embedded low-power consumption operating system. A new method and technology are provided to model, solve and optimize the mapping problem when the processor frequency is dynamically adjusted in an embedded low-power operating system. The present invention maps the most energy-saving frequency of the theoretical processor to the actual adjustable voltage by using the method of upward-downward mapping of the operating frequency of the processor, so as to achieve the purpose of energy saving and ensure the performance requirements of the system at the same time. The invention is based on a processor frequency mapping model, through which the theoretical processor most energy-saving frequency is mapped to the actual adjustable processor frequency. During the execution of the operating system, the dynamic frequency and voltage regulation technology determines the theoretically most energy-efficient operating frequency of the processor under the current performance requirements according to the performance requirements and the operating conditions of the processor, and then maps it to the actual processor frequency through the mapping model to achieve energy saving Purpose.

Description

Mapping Method for Dynamic Frequency Adjustment in Embedded Low Power Operating System

technical field

The invention relates to an energy-saving technology based on embedded system software, in particular to a mapping method for dynamic frequency adjustment in an embedded low-power operating system.

Background technique

In the field of power management of portable embedded devices, the current difficulty lies in not only meeting the requirements of portable terminals for power supply, but also achieving small footprint, light weight and longer power supply time. Power solutions for next-generation consumer electronics should focus on both hardware and software technologies, including: (1) How to achieve the required power performance in a small form factor, involving thermal management, noise reduction, Technologies such as battery management and functional integration; (2) dynamic power management technology, which depends on CPU performance, software, middleware, and user requirements for battery replacement intervals; (3) dynamic power management technology for operating system kernels and drivers , and the impact of application programming interfaces (APIs) on drivers, middleware, and the applications themselves.

Now the functions of embedded devices are becoming more and more powerful, and the functions are becoming more and more abundant. As embedded devices have more and more functions, users have higher and higher energy requirements for embedded device batteries. It has become increasingly difficult for existing lithium-ion batteries to meet consumers' requirements for normal use time. In this regard, the industry mainly adopts two methods. One is to develop new battery technologies with higher energy density, such as fuel cells. In the foreseeable five years, there will be no major breakthroughs in battery technology; Work hard on conversion efficiency and energy saving. Under the condition that new high-energy battery technologies (such as fuel cells) are still immature, the power management of next-generation handheld devices can only start from two aspects: improving power utilization and reducing power consumption.

How to prolong battery life and minimize battery energy consumption has become a research hotspot in the embedded field. Now it mainly focuses on hardware design and software optimization. Among them, software optimization now mainly includes two aspects of system software and application software. The system software is mainly concentrated in the compiler and the operating system kernel.

In the operating system field, the current main power management method is to use the operating system kernel to dynamically adjust the frequency of the system processor and the bus to reduce the overall energy consumption of the system. Moreover, the system can change the system state through the dynamic frequency command, so that the system is in a low power consumption state to achieve the purpose of energy saving. In terms of the compiler, the compiler is now mainly used to optimize the code during the compilation of the application program, so that the code is as compact as possible and the access devices are concentrated as much as possible, so as to achieve the purpose of energy saving.

Since the current processors generally only support discontinuous frequency adjustment, that is, the processor only supports a series of specific frequencies, and the optimal processor frequency obtained through the above power management methods is not necessarily the specific frequency supported by the processor, and cannot be directly adjusted. applied to the processor. It is necessary to use a certain mapping model to map the optimal processor frequency to the corresponding actual frequency of the processor. Then it is necessary to develop a corresponding mapping method, which can map the optimal processor frequency to the corresponding actual processor frequency while ensuring the system performance requirements.

Contents of the invention

The object of the present invention is to provide a mapping method for dynamic frequency adjustment in an embedded low power consumption operating system.

The steps of the technical solution adopted by the present invention to solve its technical problems are as follows:

1) Dynamically collect system events:

The hardware platform has a performance monitoring module PMU, and the PMU collects the number of running events during the entire system running, including the frequency of the processor when it is running, and the lack of processor memory;

The operating system sets the PMU through instructions to set the type of PMU acquisition event and the upper limit of the number of acquisition events. When the PMU collects an event that needs to be collected, the PMU has a corresponding counter, and this counter will increase by 1; When the number of events detected reaches the set upper limit, the PMU will send an interrupt to interrupt the running program; the interrupt program reads the number of various events collected by the PMU and adds them to the event value saved by the operating system;

In the present invention, the PMU is required to collect two kinds of system events, including: the number of instructions that the processor runs, and the number of idle instructions NOPs that the processor runs;

2) Calculate the theoretical most energy-saving frequency of the processor:

The operating system interrupts the current operation through the timer. The operating system interrupts the current operation regularly by setting the timing length t of the timer. The timer interrupt handler calculates the theoretical most energy-saving frequency of the processor under the current performance requirements; the operating system obtains the frequency based on the PMU Calculate the idle ratio m of the current processor by calculating the number of event occurrences; clear the number of events saved by the operating system to 0; use the following mapping formula to obtain the theoretically most energy-saving frequency of the processor at the current performance requirements:

f=P(m,x)=m×f _max ×x

in:

m is the idle ratio of the current processor, m=number of NOP instructions/number of instructions run by the processor,

x is the current performance requirement, and its value ranges from 0 to 1.

f is the theoretical most energy-saving frequency of the processor required by the current performance,

P(m, x) is the mapping formula, which will obtain the most energy-saving frequency according to the current x and m parameters,

f _max is the highest operating speed of the processor;

3) The theoretical operating frequency is mapped to the actual processor frequency:

Since the current processors generally only support discontinuous frequency adjustment, that is, the processor only supports a series of specific frequencies, so when the operating system calculates the current performance requirements of the theoretically most energy-saving frequency f of the processor, the processor does not necessarily support it. If the calculated theoretical frequency f happens to be a specific frequency supported by the processor, then the operating system directly sets the operating frequency of the processor to f through the dynamic rate adjustment instruction, otherwise the following formula will be used to ensure that the operating performance will not be affected Map f to the actual frequency under the premise:

N/f＝N _H /f _H +(NN _H )/f _L

in

N is the number of clocks that can be run within the time of the timer length t under the processor frequency f, that is, N=f×t,

f is the theoretically most energy-efficient frequency of the processor required by the current performance,

N _H is the number of cycles the processor is running at frequency f _H ,

f _H is a specific frequency supported by the processor, and f _H is greater than f,

f _L is a specific frequency supported by the processor, and f _L is less than f,

That is, f just falls into the interval composed of f _H and f _L , and the difference between f _H and f _L is the smallest. According to the specific frequency supported by the processor, the corresponding f _H and f can be found through the value of f. f _L ; then the value of N _H is calculated by the formula, so that in order to map f to the actual operating frequency while ensuring the performance, the number of cycles N _H that the task needs to run at the frequency of f _H can be calculated at the same time The number of cycles NN _H running at f _L frequency;

Through the above formula, f can be mapped to the actual processor frequency f _H and f _L while ensuring the same performance; the processor can first adjust the processor frequency to f _H frequency to run N _H cycles, and then the processor The frequency is adjusted to run NN _H cycles at f _L frequency.

Compared with the background technology, the present invention has the beneficial effects that:

The invention maps the theoretical processor's most energy-saving frequency to the actual adjustable voltage by using the method of upward-downward mapping of the operating frequency of the processor, so as to achieve the purpose of energy saving and ensure the performance requirements of the system at the same time. The invention is based on a processor frequency mapping model, through which the theoretical processor most energy-saving frequency is mapped to the actual adjustable processor frequency. During the execution of the operating system, the dynamic frequency modulation and voltage regulation technology determines the theoretically most energy-efficient operating frequency of the processor under the current performance requirements according to the performance requirements and the operating conditions of the processor, and then maps it to the actual processor frequency through the mapping model to achieve energy saving Purpose.

(1) Performance Guarantee. When the application program is running in the system, the theoretical processor's most energy-saving frequency is mapped to the actual adjustable processor frequency through the frequency mapping model. The premise of this model is to ensure the performance of the system.

(2) Stability. The operating system holds the right to dynamically adjust the system state in its own hands, instead of delegating it to the application program, so that the system can dynamically adjust the system state while taking into account the overall situation to ensure system stability.

(3) Practicality. The invention can modify the code of the system as little as possible to achieve the purpose of energy saving, and the mapping model is very simple and easy to realize. After repeated verification, this method can reduce the workload of programmers very well and is very practical.

Description of drawings

Accompanying drawing is the flowchart of whole system work.

Detailed ways

As shown in the accompanying drawing, when implementing the mapping method of dynamic frequency adjustment in the embedded low-power operating system, the operating system considers the two constraints of performance and energy saving during the scheduling process, and maps the theoretical most energy-saving processor frequency f to Actual processor frequency.

1) Dynamically collect system events

Now popular hardware platforms all have a performance monitoring module PMU, which can collect running events during the entire system running, including processor running frequency, processor memory loss, etc.; PMU has more than two registers to save the collected The number of events occurred; for example, the PMU on the Intel Xscale processor can collect two events at the same time.

The operating system can set the PMU through special instructions, set the type of PMU acquisition event and the upper limit of the number of acquisition events. When the PMU collects an event that needs to be collected, the PMU has a corresponding counter, and this counter will increase by 1. It can also be reduced by 1, which is mainly related to the characteristics of the PMU used; when the number of collected events reaches the upper limit value set, the PMU will send an interrupt to interrupt the running program; the interrupt program reads the various events collected by the PMU. The number of occurrences of various events is added to the value of event occurrences saved by the operating system;

Taking the PMU on the Intel Xscale processor as an example, it has two performance monitoring counters PMN0 and PMN1, which are used to count certain types of system events. The monitored events are set in the register PMNC, and are set in PMNO and PMN1 at the same time. The number of events, each time the corresponding event occurs, the corresponding counter is incremented by 1. When PMN0 and PMN1 overflow, the system will generate an interrupt. PMNC is also a 32-bit register, which can reset all counters to zero. Set the events to be monitored by PMN0 and PMN1.

In the present invention, the PMU is required to collect two kinds of system events, including: processor memory loss, the number of instructions run by the processor;

2) Calculate the theoretical most energy-saving frequency of the processor

The operating system interrupts the current operation through the timer. The operating system interrupts the current operation regularly by setting the timing length t of the timer. The timer interrupt handler calculates the theoretical most energy-saving frequency of the processor under the current performance requirements; the operating system obtains the frequency based on the PMU Calculate the idle ratio m of the current processor according to the number of events; clear the number of events saved by the operating system to 0; use the following mapping formula to obtain the theoretically most energy-saving frequency of the processor with current performance requirements:

f=P(m,x)=m×f _max ×x

in

m is the idle ratio of the current processor, m=number of NOP instructions/number of instructions run by the processor,

x is the current performance requirement, and its value ranges from 0 to 1.

f is the theoretical most energy-saving frequency of the processor required by the current performance,

P(m, x) is the mapping formula, which will obtain the most energy-saving frequency according to the current x and m parameters,

f _max is the highest operating speed of the processor;

P(m, x) is the mapping formula. This mapping formula will obtain the most energy-saving frequency according to the current x and m parameters. Taking Intel XcalePXA255 as an example, the maximum operating frequency f _max of the processor is 400MHZ, then f can be obtained according to m and x =400×m×x, assuming that m is 0.4 and x is 1, which is the highest performance, then f=160MHZ.

3) The theoretical operating frequency is mapped to the actual processor frequency

Since the current processors generally only support discontinuous frequency adjustment, that is, the processor only supports a series of specific frequencies, so when the operating system calculates the current performance requirements of the theoretically most energy-saving frequency f of the processor, the processor does not necessarily support it. If the calculated theoretical frequency f happens to be a specific frequency supported by the processor, then the operating system can directly set the operating frequency of the processor to f through the dynamic rate adjustment instruction, otherwise the following formula will be used to ensure that the operating performance will not be affected Map f to the actual frequency under the premise of :

N/f＝N _H /f _H +(NN _H )/f _L

in

N is the number of clocks that can be run within the time of the timer length t under the processor frequency f, that is, N=f×t,

f is the theoretically most energy-efficient frequency of the processor required by the current performance,

N _H is the number of cycles the processor is running at frequency f _H ,

f _H is a specific frequency supported by the processor, and f _H is greater than f,

f _L is a specific frequency supported by the processor, and f _L is less than f,

That is, f just falls into the interval composed of f _H and f _L , and the difference between f _H and f _L is the smallest. According to the specific frequency supported by the processor, the corresponding f _H and f can be found through the value of f. f _L ; then the value of N _H is calculated by the formula, so that in order to map f to the actual operating frequency while ensuring the performance, the number of cycles N _H that the task needs to run at the frequency of f _H can be calculated at the same time The number of cycles NN _H running at f _L frequency;

Through the above formula, f can be mapped to the actual processor frequency f _H and f _L while ensuring the same performance; the processor can first adjust the processor frequency to f _H frequency to run N _H cycles, and then the processor The frequency is adjusted to run NN _H cycles at f _L frequency. Taking Intel Xscale as an example, the Xscale PXA255 chip supports 4 specific frequencies, namely 400MHZ, 300MHZ, 200MHZ, and 100MHZ. Suppose now f=340MHZ, t=10us, then N=3400 cycles. Since 300<f<400, and 300 and 400 are closest to f, then f _H =400, f _L =300 can be obtained. Through the formula N/f=N _H /f _H +(NN _H )/f _L , it can be calculated that N _H =1600 cycles, and NN _H =1800 cycles, that is, the processor runs for 1600 cycles at 400MHZ, and then Runs 1800 cycles at 300MHZ.

Claims (1)

1. a mapping method of dynamic frequency adjustment in an embedded low power consumption operating system, it is characterized in that the steps of the method are as follows: 1) Dynamically collect system events: The hardware platform has a performance monitoring module PMU, and the PMU collects the number of running events during the entire system running, including the frequency of the processor when it is running, and the lack of processor memory; The operating system sets the PMU through instructions to set the type of PMU acquisition event and the upper limit of the number of acquisition events. When the PMU collects an event that needs to be collected, the PMU has a corresponding counter, and this counter will increase by 1; When the number of events detected reaches the set upper limit, the PMU will send an interrupt to interrupt the running program; the interrupt program reads the number of various events collected by the PMU and adds them to the event value saved by the operating system; In the present invention, the PMU is required to collect two kinds of system events, including: the number of instructions that the processor runs, and the number of idle instructions NOPs that the processor runs; 2) Calculate the theoretical most energy-saving frequency of the processor: The operating system interrupts the current operation through the timer. The operating system interrupts the current operation regularly by setting the timing length t of the timer. The timer interrupt handler calculates the theoretical most energy-saving frequency of the processor under the current performance requirements; the operating system obtains the frequency based on the PMU Calculate the idle ratio m of the current processor by calculating the number of event occurrences; clear the number of events saved by the operating system to 0; use the following mapping formula to obtain the theoretically most energy-saving frequency of the processor at the current performance requirements: f=P(m,x)=m×f _max ×x in: m is the idle ratio of the current processor, m=number of NOP instructions/number of instructions run by the processor, x is the current performance requirement, and its value ranges from 0 to 1. f is the theoretical most energy-saving frequency of the processor required by the current performance, P(m, x) is the mapping formula, which will obtain the most energy-saving frequency according to the current x and m parameters, f _max is the highest operating speed of the processor; 3) The theoretical operating frequency is mapped to the actual processor frequency: Since the current processors generally only support discontinuous frequency adjustment, that is, the processor only supports a series of specific frequencies, so when the operating system calculates the current performance requirements of the theoretically most energy-saving frequency f of the processor, the processor does not necessarily support it. If the calculated theoretical frequency f happens to be a specific frequency supported by the processor, then the operating system directly sets the operating frequency of the processor to f through the dynamic rate adjustment instruction, otherwise the following formula will be used to ensure that the operating performance will not be affected Map f to the actual frequency under the premise: N/N _H /f _H +(NN _H )/f _L in N is the number of clocks that can be run within the time of the timer length t under the processor frequency f, that is, N=f×t, f is the theoretically most energy-efficient frequency of the processor required by the current performance, N _H is the number of cycles the processor is running at frequency f _H , f _H is a specific frequency supported by the processor, and f _H is greater than f, f _H is a specific frequency supported by the processor, and f _L is less than f, That is, f just falls into the interval composed of f _H and f _L , and the difference between f _H and f _L is the smallest. According to the specific frequency supported by the processor, the corresponding f _H and f can be found through the value of f. f _L ; then the value of N _H is calculated by the formula, so that in order to map f to the actual operating frequency while ensuring the performance, the number of cycles N _H that the task needs to run at the frequency of f _H can be calculated at the same time The number of cycles NN _H running at f _L frequency; Through the above formula, f can be mapped to the actual processor frequency f _H and f _L while ensuring the same performance; the processor can first adjust the processor frequency to f _H frequency to run N _H cycles, and then the processor The frequency is adjusted to run NN _H cycles at f _L frequency.

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