CN101192559A - Isolation groove filling method - Google Patents
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- CN101192559A CN101192559A CNA200610118830XA CN200610118830A CN101192559A CN 101192559 A CN101192559 A CN 101192559A CN A200610118830X A CNA200610118830X A CN A200610118830XA CN 200610118830 A CN200610118830 A CN 200610118830A CN 101192559 A CN101192559 A CN 101192559A
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- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000002955 isolation Methods 0.000 title abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 25
- 238000001039 wet etching Methods 0.000 claims abstract description 19
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 36
- 238000005516 engineering process Methods 0.000 claims description 35
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 22
- 235000012239 silicon dioxide Nutrition 0.000 claims description 18
- 239000000377 silicon dioxide Substances 0.000 claims description 18
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 11
- 239000003795 chemical substances by application Substances 0.000 claims description 6
- 229910052734 helium Inorganic materials 0.000 claims description 4
- 229910000077 silane Inorganic materials 0.000 claims description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 10
- 239000004065 semiconductor Substances 0.000 abstract description 7
- 238000009413 insulation Methods 0.000 abstract description 5
- 239000012535 impurity Substances 0.000 abstract description 3
- 239000012774 insulation material Substances 0.000 abstract 2
- 239000013078 crystal Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 17
- 238000000151 deposition Methods 0.000 description 14
- 230000008021 deposition Effects 0.000 description 7
- 238000005192 partition Methods 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005672 electromagnetic field Effects 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000010790 dilution Methods 0.000 description 2
- 239000012895 dilution Substances 0.000 description 2
- 238000005429 filling process Methods 0.000 description 2
- 230000008676 import Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000009421 internal insulation Methods 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000021715 photosynthesis, light harvesting Effects 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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Abstract
The invention discloses a method for filling an isolation groove, which comprises the following steps: a semiconductor substrate is provided and a surface of the semiconductor substrate is provided with the isolation groove; a plasma chemical vapor deposition process is carried out to deposit insulation materials in the isolation groove; a wet etching process and a high density plasma chemical vapor deposition process are alternatively carried out until the deposited insulation materials of the plasma chemical vapor deposition process are fully filled in the groove. The method for filling the insulation groove in the invention is able to avoid impurity residue generated by a fluorine-contained etching gas and enhance the flat level of crystal wafers.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of system that is used to produce plasma.
Background technology
Develop rapidly along with semiconductor technology; significantly reducing of feature sizes of semiconductor devices; correspondingly chip manufacturing process is had higher requirement, one of them challenging difficult problem be exactly dielectric between each thin layer evenly the filling of atresia so that abundant effective isolation protection to be provided.After manufacturing process entered the deep sub-micron technique node, the insulation isolation between the device all adopted shallow trench isolation from (shallow trench isolation, STI) structure.The formation of STI isolation structure at first need be in substrate etching groove, in groove, fill megohmite insulant then.At the 90nm technology node,,, adopt HDP-CVD (high-density plasma chemical vapor deposition) technology filling groove usually in order to realize the filling of even imporosity (void) because the STI isolated groove has higher depth-to-width ratio usually.HDP CVD technology is the technology of synchronously carrying out deposit and sputter in same reaction chamber, as shown in Figure 1.Specifically, in common HDP CVD technology, deposition process 10 is normally realized by the reaction of silane SiH4 and oxygen O2, and sputter procedure 20 is normally finished by the ion bombardment effects of Ar or He and O2.
After device feature size entered 65 nanometers and following process node, isolated groove had higher depth-to-width ratio (usually greater than 5).In order further to strengthen the filling capacity of groove, realize that the imporosity fills, the technology of original position HDP-CVD deposit of the HDP-CVD deposit-original position that hockets in reative cell usually (in suit) etching-is again filled groove.Fig. 2 A to Fig. 2 F is the device profile schematic diagram of the existing sti trench groove filling process of explanation.Shown in Fig. 2 A, at first etch groove 200, and form cushion oxide layer (liner oxide) (not shown) in flute surfaces at substrate 100; Then, shown in Fig. 2 B, utilize HDP-CVD depositing technics 30 deposit silicon dioxide 300 in groove 200, depositing technics 30 herein promptly comprises deposition process 10 shown in Fig. 1 and sputter procedure 20; Utilize dry etch process subsequently, the silicon dioxide 300 of deposit in 40 times ditch grooves 200 of plasma etching industrial for example is shown in Fig. 2 C; Continue to utilize depositing technics 30 deposit silicon dioxide 300 in groove 200, shown in Fig. 2 D; And utilize the silicon dioxide 300 of etching technics 40 these deposits of etching once more, shown in Fig. 2 E; Circulate like this depositing technics 30 and etching technics 40 several times are until described groove 200 is filled up.But, because the etching agent that adopts in etching process is generally fluorine-containing (F) gas, for example CF4 or CHF3, when being converted to depositing technics 30 by etching technics 40, F ion in the remaining etching gas can react with deposited gas (silane SiH4), sidewall surfaces generation at groove 200 contains F impurity residue 400, shown in Fig. 2 F.
In addition, the existing HDP-CVD reative cell that is used to handle 12 inches big circular slices is subjected to the influence of large area coil self inductance, and the uniform electromagnetic field degree of generation is inconsistent, and the electromagnetic field intensity that the mid portion of coil produces is greater than the electromagnetic field intensity of marginal portion; Also be subjected to the influence of the energy dissipation that the collision of electronics and reaction chamber wall causes in addition, the energy of plasma that the coil zone line is produced will be higher than the energy of plasma of marginal portion, causes plasma the etch rate of wafer central region to be higher than the etch rate of wafer edge region.The difference of this etch rate can make the smooth degree difference of wafer edge region and central area increase, and has brought more highly difficult for follow-up wafer planarization.
Summary of the invention
The object of the present invention is to provide a kind of fill method of isolated groove, can avoid impurity residue, and improve the smooth degree of wafer by fluorine-containing etching gas generation.
For achieving the above object, the fill method of a kind of isolated groove provided by the invention comprises:
Semi-conductive substrate is provided, and described substrate surface has isolated groove;
Carry out a high-density plasma chemical vapor deposition method, in described groove, deposit megohmite insulant;
Alternately carry out a wet-etching technology and a high-density plasma chemical vapor deposition method, fill up described groove until the megohmite insulant of described high-density plasma chemical vapor deposition method deposit.
The etching agent of described wet etching is a hydrofluoric acid.
The diluted concentration of described hydrofluoric acid is 100: 1.
The time of adopting described hydrofluoric acid to carry out wet etching is 4～6 minutes.
The technological parameter of described high-density plasma chemical vapor deposition method comprises: rf bias power is 3300～4000W; The flow of hydrogen is 130～200sccm; The flow of helium is 300～5000sccm; The flow of oxygen is 190～300sccm; The flow of silane is 50～150sccm.
Described megohmite insulant is a silicon dioxide.
Compared with prior art, the present invention has the following advantages:
The fill method of high-aspect-ratio isolated groove adopts HDP-CVD technology to add original position (in suit) plasma etching industrial, promptly by the processing step of deposit of deposit+sputter-plasma etching-again, can realize the imporosity filling to high aspect ratio trench quite.Yet as previously mentioned, be connected on trenched side-wall between the etching gas meeting and produce residue, influence insulation property; And it is different to be subjected to equipment to influence the etch rate of the fringe region of large tracts of land wafer and central area, causes the wafer flatness to descend.Isolated groove fill method of the present invention adopts HDP-CVD to add the technology of wet method etching, promptly fills megohmite insulant by the processing step of deposit+sputter-wet etching-deposit again in isolated groove.Carve the megohmite insulant of filling owing to adopted the method for wet etching to return, can not produce fluorine-containing residue on the one hand, improved insulation property at trenched side-wall; Weakened of the influence of the difference of etch rate on the other hand, further improved the smooth degree in wafer surface center and peripheral zone, helped the planarization on subsequent wafer surface the smooth degree of wafer surface.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing in proportion, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, amplified the thickness in layer and zone.
Fig. 1 is the rough schematic view of explanation HDP-CVD technical process;
Fig. 2 A to Fig. 2 F is the device profile schematic diagram of the existing sti trench groove filling process of explanation;
Fig. 3 A to Fig. 3 F is the generalized section of filling the wafer edge region isolated groove according to the preferred embodiment of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
The invention relates to semiconductor integrated circuit manufacturing technology field, particularly about in fabrication of semiconductor device, filling the method for isolated groove.Here need to prove that this specification provides different embodiment that each feature of the present invention is described, but these embodiment utilize special The Nomenclature Composition and Structure of Complexes with convenient explanation, are not limitation of the invention.
Therefore the depth-to-width ratio of deep submicron process node sti trench groove is higher relatively, and (High-Density-Plasma CVD, HDP-CVD) technology adds the original position etching technics fill insulant in groove to adopt the high-density plasma chemical vapor deposition.HDP-CVD technology is synchronously to carry out deposit and sputter reaction in same reaction chamber.Specifically, in the trench fill process, accumulation is dwindled open top along with the carrying out of deposit understood constantly at groove top deposit, influence the further deposition of megohmite insulant, the deposited material that the sputter effect of carrying out synchronously will constantly accumulate etches away, deposition enters channel bottom again, thereby has avoided the generation of hole.The original position etching technics of proceeding returns carves the megohmite insulant of filling, and groove is further opened, and helps follow-up megohmite insulant deposition.When yet the original position etching technics adopted dry etching (for example plasma etching), the fluorine ion in the etching gas can react with deposited gas, thereby produced residue at trenched side-wall, influenced insulation property; And it is different to be subjected to equipment to influence the etch rate of the fringe region of large tracts of land wafer and central area, causes the wafer flatness to descend.
Isolated groove fill method of the present invention adopts hocket HDP-CVD technology and wet-etching technology, promptly fills megohmite insulant by the processing step of HDP-CVD-wet etching-HDP-CVD in isolated groove.Fig. 3 A to Fig. 3 F is the generalized section of filling the wafer edge region isolated groove according to the preferred embodiment of the present invention, and described schematic diagram is an example, should too much not limit the scope of protection of the invention at this.As shown in Figure 3A, at first in substrate 100, etch groove 200, and form cushion oxide layer (liner oxide) (, not shown) for for simplicity in flute surfaces; Then, shown in Fig. 3 B, in groove 200, utilize HDP-CVD depositing technics 30 deposit silicon dioxide 300.The reacting gas that uses in the HDP-CVD technology 30 comprises reacting gas SiH4 and the O2 that deposit is used, and sputter the gas H2 and the He that use.The content influence sputtering raste of helium (He) in the reative cell/hydrogen gases such as (H2), the content influence deposition rate of O2 and SiH4.The effect that the influence of the ratio of sputtering raste and deposition rate is filled, and the content of the ratio of sputtering raste and deposition rate and deposited gas SiH4 and O2 and sputter gas H2 and He is than relevant.Because deposit and sputtering technology are carried out simultaneously, the content of SiH4 and O2 and H2 will suitably be adjusted, so that loading reaches best.In the HDP-CVD technology of present embodiment, content by adjusting SiH4 and O2 and H2 and He is so that the sputtering deposit ratio is 1: 1, this technology is applicable to the trench fill technology of high-aspect-ratio, can avoid the generation of top rake and hole phenomenon effectively, reaches best filling effect.
When utilizing HDP-CVD technology 30 to fill silicon dioxide 300, at first substrate is placed in the vacuum tank of reative cell, and form groove at substrate surface.Be provided with the conductivity partition wall in the vacuum tank of reative cell, the conductivity partition wall is two spaces with the vacuum tank internal insulation, it is that film forming is handled the space that an interior volume forms the plasma span, another space of having disposed radio frequency electrode, and internal configurations has the substrate maintaining body of carrying substrate.Above-mentioned conductivity partition wall has the stripped span and film forming such as makes to handle a plurality of through holes of spatial communication, and have with etc. the stripped span isolate, and pass through the inner space that a plurality of diffusion holes are communicated with film formation space.H
2Supply to from the outside the inner space of conductivity partition wall and material gas SiH with He
4Mix mutually, and be imported into film forming processing space, simultaneously with O by these a plurality of diffusion holes
2Feed the plasma span.Utilize radio frequency electrode that radio-frequency voltage is provided, the reative cell bottom provides rf bias power, in the plasma span, make O2 ionization generate high density oxygen atom plasma, by the plasma generation atomic group, a plurality of holes of this atomic group being passed above-mentioned partition wall import to film forming processing space, handle direct transfer material gas SiH in the space in film forming simultaneously
4(importing respectively) from the top and the side of reative cell.A plurality of holes that this plasma is passed above-mentioned partition wall import to film forming and handle the space, film forming handle this plasma discharge of space and with material gas SiH
4Carry out the chemical vapor deposition reaction, H
2With He and material gas SiH
4Carry out the sputter reaction, H
2Effect be the SiO that too much forms salient angle with deposit
2Reaction reduction again generates SiH
4Feed inert gas He simultaneously and protected, thereby deposit generates silicon dioxide film on substrate.Handle space O in film forming
2And SiH
4The chemical equation that reaction generates silicon dioxide film is:
SiH
4+O
2＝SiO
2+H
2O
The scope of the basic technology parameter of above-mentioned HDP-CVD technology 30 is listed in the table 1, sputtering deposit ratio and O
2/ SiH
4The content ratio can get by these basic technology parameter adjustments.The thickness 700～800 of deposit silicon dioxide
Table 1
| SiH 4Flow (top) | 20～50sccm |
| SiH 4Flow (side) | 50～150sccm |
| O 2Flow | 190～300sccm |
| H 2Flow | 130～200sccm |
| The He flow | 300～5000sccm |
| Radio-frequency power | 7000～8000W |
| Rf bias power | 3300～4000W |
Next shown in Fig. 3 C, after carrying out a HDP-CVD technology 30, continue to carry out wet-etching technology 50.The purpose of wet etching is that the silicon dioxide attenuate of will fill in the groove is so that the expansion groove opening is convenient to continue deposition.Wet-etching technology 50 depositing technics 30 in reative cell carries out after finishing, and the etching agent of described wet etching is the hydrofluoric acid of dilution, and diluted concentration is 100: 1.The time of adopting described hydrofluoric acid to carry out wet etching is 4～6 minutes, and the thickness of etching silicon dioxide is 100～150
Next shown in Fig. 3 D, in reative cell, continue to fill silicon dioxide 300 with HDP-CVD technology 30, the reaction condition of employing identical with shown in above-mentioned Fig. 3 B, the thickness of deposit also is 700～800 substantially
Then shown in Fig. 3 E, continue to carry out wet-etching technology 50, etching agent is the hydrofluoric acid of dilution, and diluted concentration is 100: 1, and the time of etching is 4～6 minutes, and the thickness of etching also is 100～150
Subsequently, shown in Fig. 3 F, continue to fill silicon dioxide 300 with HDP-CVD technology 30.According to the degree of depth decision HDP-CVD technology 30 of isolated groove 200 and the cycle-index of wet-etching technology 50, because the thickness 700～800 of each deposit silicon dioxide
The thickness of each etching silicon dioxide is 100～150
As if the degree of depth of known groove 200, just can calculate the number of times of circulation.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (10)
1. the fill method of an isolated groove comprises:
Semi-conductive substrate is provided, and described substrate surface has isolated groove;
Carry out a high-density plasma chemical vapor deposition method, in described groove, deposit megohmite insulant;
Alternately carry out a wet-etching technology and a high-density plasma chemical vapor deposition method, fill up described groove until the megohmite insulant of described high-density plasma chemical vapor deposition method deposit.
2. the method for claim 1, it is characterized in that: the etching agent of described wet etching is a hydrofluoric acid.
3. method as claimed in claim 2 is characterized in that: the diluted concentration of described hydrofluoric acid is 100: 1.
4. as claim 2 or 3 described methods, it is characterized in that: the time of adopting described hydrofluoric acid to carry out wet etching is 4～6 minutes.
5. the method for claim 1, it is characterized in that: the technological parameter of described high-density plasma chemical vapor deposition method comprises: rf bias power is 3300～4000W; The flow of hydrogen is 130～200sccm; The flow of helium is 300～5000sccm; The flow of oxygen is 190～300sccm; The flow of silane is 50～150sccm.
6. the method for claim 1, it is characterized in that: described megohmite insulant is a silicon dioxide.
7. the fill method of an isolated groove comprises:
At least one fills the high-density plasma chemical vapor deposition step of megohmite insulant in described groove; And
The step of a described megohmite insulant of wet etching.
8. method as claimed in claim 7 is characterized in that: the etching agent of described wet etching is a hydrofluoric acid.
9. method as claimed in claim 8 is characterized in that: the time of adopting described hydrofluoric acid to carry out wet etching is 4～6 minutes.
10. method as claimed in claim 7 is characterized in that: described megohmite insulant is a silicon dioxide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200610118830XA CN101192559A (en) | 2006-11-28 | 2006-11-28 | Isolation groove filling method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200610118830XA CN101192559A (en) | 2006-11-28 | 2006-11-28 | Isolation groove filling method |
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| Publication Number | Publication Date |
|---|---|
| CN101192559A true CN101192559A (en) | 2008-06-04 |
Family
ID=39487452
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA200610118830XA Pending CN101192559A (en) | 2006-11-28 | 2006-11-28 | Isolation groove filling method |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102915948A (en) * | 2012-10-19 | 2013-02-06 | 上海宏力半导体制造有限公司 | Forming method of a shallow-groove isolation structure |
| CN108054078A (en) * | 2017-11-23 | 2018-05-18 | 上海华力微电子有限公司 | HDP technique film build methods |
| CN110546753A (en) * | 2017-04-24 | 2019-12-06 | 应用材料公司 | Methods for Gap Filling in High Aspect Ratio Structures |
| CN111799216A (en) * | 2020-06-30 | 2020-10-20 | 长江存储科技有限责任公司 | Filling method |
| CN114256132A (en) * | 2021-12-16 | 2022-03-29 | 上海华虹宏力半导体制造有限公司 | Method for forming shallow trench isolation structure |
-
2006
- 2006-11-28 CN CNA200610118830XA patent/CN101192559A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102915948A (en) * | 2012-10-19 | 2013-02-06 | 上海宏力半导体制造有限公司 | Forming method of a shallow-groove isolation structure |
| CN110546753A (en) * | 2017-04-24 | 2019-12-06 | 应用材料公司 | Methods for Gap Filling in High Aspect Ratio Structures |
| CN110546753B (en) * | 2017-04-24 | 2023-08-11 | 应用材料公司 | Method for gap filling in high aspect ratio structure |
| CN108054078A (en) * | 2017-11-23 | 2018-05-18 | 上海华力微电子有限公司 | HDP technique film build methods |
| CN111799216A (en) * | 2020-06-30 | 2020-10-20 | 长江存储科技有限责任公司 | Filling method |
| CN114256132A (en) * | 2021-12-16 | 2022-03-29 | 上海华虹宏力半导体制造有限公司 | Method for forming shallow trench isolation structure |
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