CN101178675A - Method and device for verifying data - Google Patents

Abstract

The invention discloses a method and a device for verifying the data which belongs to the field of data storage. The method comprises: a CPU makes the wrong check of the verifying data and the corrected verifying code; the data is stored in the memory that a target chip uses; the verifying code is stored; wrong check and corrected verifying are made to the data according to the data and the verifying code by the CPU. The device comprises a disposing module, a storage module and a verifying module. The invention can correctly judge the correctness of data in the memory used by the target chip. Compared with the prior art, the invention overcomes the defect that the target chip hardware does not support the ECC verifying function, protects the data in the memory used by the target chip and improves the reliability of data.

Description

Method and device for verifying data

technical field

The invention relates to the field of data storage, in particular to a method and device for verifying data.

Background technique

ECC (Error Checking and Correcting, Error Checking and Correcting) means that when storing data, an ECC calculation result is stored in the extra bit of the data bit, that is, the ECC check code. When the stored data is re-read, it is checked according to the ECC The code checks the data, and if an error is found in the data, it will be processed accordingly. For example, when one bit error is detected, it is corrected, and when multiple bit errors are detected, an alarm message is generated.

In the prior art, the ECC function is generally completed by the memory controller of the chip. When storing data in the memory, the memory controller performs ECC calculation to obtain the ECC check code, and stores the ECC check code in the memory. When the data is read from the memory, the data is verified according to the stored ECC check code, and if the data is wrong, corresponding correction and protection are carried out.

In the process of realizing the present invention, the inventors have found that the above-mentioned prior art has at least the following disadvantages:

Not all memory controllers of chips have the ECC function. When a chip that does not support the ECC function on this hardware stores and reads data in the memory, it cannot perform ECC verification on the data according to the ECC check code. Therefore, when the In abnormal situations, the stored data cannot be protected, which may lead to the destruction of important data. For example, when a bit jump occurs for some reason and the data in the memory has a soft failure, the data cannot be checked and protected.

Contents of the invention

In order to improve data reliability, embodiments of the present invention provide a method and device for verifying data. Described technical scheme is as follows:

On the one hand, an embodiment of the present invention provides a method for verifying data, the method comprising:

The CPU generates error checking and correcting check codes for the data to be checked, and the data is stored in the internal memory used by the target chip;

storing the check code;

The CPU performs error checking and correction checking on the data according to the data and the check code.

On the other hand, an embodiment of the present invention also provides a device for verifying data, the device comprising:

A processing module, configured to generate a check code for error checking and correction of the data to be checked, the data being stored in the memory used by the target chip in the device;

a storage module, configured to store the check code generated by the processing module;

The verification module is configured to perform error checking and correction verification on the data according to the data and the verification code stored in the storage module.

The beneficial effects of the technical solution provided by the embodiments of the present invention are:

By generating an ECC check code in advance and performing an ECC check on the data according to the read data and the ECC check code during the check, the correctness of the data in the memory used by the target chip can be correctly judged. Compared with the existing technology, it overcomes the defect that the target chip hardware does not support the ECC verification function, can detect in time whether the data in the memory used by the target chip is damaged, and protect it, improving the reliability of the data sex.

Description of drawings

FIG. 1 is a flowchart of a method for verifying data provided in Embodiment 1 of the present invention;

FIG. 2 is a schematic diagram of the relationship between the chip and the memory provided by Embodiment 1 of the present invention;

FIG. 3 is a schematic diagram of the CPU protecting the data in the memory used by the NP according to Embodiment 1 of the present invention;

FIG. 4 is a structural diagram of a device for verifying data provided by Embodiment 2 of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

The embodiment of the present invention generates and stores the ECC check code of the data when storing the data in the internal memory used by the target chip, reads the data and the ECC check code during verification, and checks the data according to the data and the ECC check code. The data is checked by ECC.

Example 1

Referring to Fig. 1, an embodiment of the present invention provides a method for verifying data, which specifically includes:

S101: Store data in the memory used by the target chip.

S102: Generate and store the ECC check code of the data;

Wherein, the step of generating the ECC check code can be realized by software, and in this embodiment, the process of executing the software code is realized by CPU. The ECC check code can be stored in the memory used by the CPU, or in other memories, such as the memory used by the target chip. In this embodiment, the ECC check code is stored in the memory used by the CPU.

S103: Read data from the memory used by the target chip, and read an ECC check code from the memory used by the CPU.

Wherein, when the data is used, the ECC check can be performed on the data, and the data in the memory can also be checked periodically, such as 5ms or 10ms and so on.

S104: Perform an ECC check on the data according to the read data and the ECC check code.

Wherein, the method for performing ECC verification on data may be to recalculate a new ECC verification code according to the same algorithm when reading the data, and combine the new ECC verification code with the ECC verification code generated in S102 For comparison, if the two ECC check codes are different, it means that the data has an error; if the two ECC check codes are the same, it means that the data is correct. Among them, there are multiple methods for comparing whether two ECC check codes are the same. For example, bitwise XOR is performed on the ECC check code generated in S102 and the calculated new ECC check code, if the result is 0, it means that the data is correct; otherwise, it means that the data is wrong.

If after the ECC check, it is found that the data has an error, the data can also be corrected or alarmed, for example, if a bit error occurs, correct it; if multiple bit errors occur , then perform alarm processing.

Referring to Figure 2, when verifying, the CPU reads data from the memory used by the target chip through the target chip, and the CPU reads the stored ECC check code from the memory used by it, and according to the ECC check code and The data from the target chip performs an ECC check on the data, thereby verifying the correctness of the data stored in the memory used by the target chip.

In order to avoid excessive occupation of chip resources due to frequent verification, further, the following steps can also be added to the above method:

Before storing data in the memory used by the target chip, divide the memory used by the target chip into at least one block, usually into multiple blocks, when storing data, store the data in the divided block, and store the data The state of the block is recorded as used. For example, a data structure can be designed to store the generated ECC check code and the usage status of the memory block where the data is stored in the data structure; at this time, if the ECC check code is also stored in the target chip In the internal memory, the ECC check code and the data are stored in different blocks.

When verifying, the method of timing verification is adopted to regularly check the status of each block storing data. If the current block is used, the data is read from this block, and the ECC is read from the block storing the ECC check code. Check code, perform ECC check on the data according to the read data and ECC check code. Wherein, according to the actual situation, for each block storing data, some memory blocks may be checked each time, or all memory blocks may be checked each time. Further, when the stored data is deleted from the memory, the state of the memory block where the data is located can be modified to be unused, so as to facilitate subsequent use.

The above-mentioned processes S101 to S104 can be used to perform ECC management and protection on memory related to more important data. For example, referring to Figure 3, the CPU generates and sends various table entries applied in the NP (Network Processor, network processor) message forwarding process to the NP, and the NP performs packet classification, filtering, and Processing such as business processing and route forwarding, the memory in the figure is the memory used by NP, which stores the specific content of the entry. When the CPU publishes an entry, the driver of the CPU writes the entry into the memory, and at the same time triggers the call of the callback function pre-registered in the driver. The callback function calculates the ECC check code of the entry and checks the ECC The code is stored in the ECC data structure allocated by the CPU, which can be stored in the memory used by the CPU or in the memory used by the NP shown in the figure. In addition, the CPU starts a regular inspection task, reads the entry in the NP memory and performs ECC verification on the entry together with the ECC check code stored in the ECC data structure. If the result of the verification is that the entry is correct, Indicates that the NP memory area has no soft failure, and the system can run normally; if the verification result is an entry error, it indicates that the NP memory area has failed; the inspection task performs error correction according to the saved ECC check code, if the error cannot be corrected, then The inspection task is notified to the upper layer through the alarm module, and the upper layer determines the processing strategy according to the address and importance of the entry.

In this embodiment, the correctness of the data in the memory used by the target chip can be correctly judged by generating the ECC check code in advance and performing the ECC check according to the data and the ECC check code during the check. Compared with the existing technology, it overcomes the defect that the target chip hardware does not support the ECC verification function, can detect in time whether the data in the memory used by the target chip is damaged, and protect it, improving the reliability of the data sex. Block storage and ECC verification of memory can save precious resources occupied by ECC verification and improve efficiency and practicability.

Example 2

Referring to Fig. 4, the embodiment of the present invention also provides a device for verifying data, which specifically includes:

The processing module is used to generate error checking and correcting check codes for the data to be checked, and the data is stored in the memory used by the target chip; in this embodiment, the target chip and the memory used by the target chip are located in the device;

The storage module is used to store the verification code generated by the processing module;

The verification module is used for checking and correcting the data according to the data and the verification code stored in the storage module.

Further, the verification module specifically includes:

The reading unit is used to regularly read data from the memory, or when using data, read data from the memory, and is also used to read the check code stored in the storage module;

The checking unit is used for checking and correcting the data according to the data read by the reading unit and the check code.

Further, the above-mentioned device also includes:

A division module, configured to divide the memory used by the target chip into at least one piece;

The data storage module is used to store the data to be verified in the blocks divided by the division module;

A recording module, configured to record the state of the block storing data in the data storage module as used;

Correspondingly, the verification module specifically includes:

A checking unit is used to check the state of the blocks divided by the division module;

The checking unit is used to read the used block when the checking unit detects that at least one block is in use, and perform error checking and summing on the data according to the data stored in the block and the check code stored in the storage module Correct the checksum.

Further, the above-mentioned device also includes:

The correction module is used to correct the data or process an alarm when the verification module detects a data error.

In this embodiment, the correctness of the data in the memory used by the target chip can be correctly judged by generating the ECC check code in advance and performing the ECC check according to the data and the ECC check code during the check. Compared with the existing technology, it overcomes the defect that the target chip hardware does not support the ECC verification function, can detect in time whether the data in the memory used by the target chip is damaged, and protect it, improving the reliability of the data sex.

The embodiment of the present invention can be realized by software, and the corresponding software can be stored in a readable storage medium, such as a chip or a memory.

The above are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention Inside.

Claims (9)

1. A method for verifying data, characterized in that the method comprises: The CPU generates error checking and correcting check codes for the data to be checked, and the data is stored in the internal memory used by the target chip; storing the check code; The CPU performs error checking and correction checking on the data according to the data and the check code. 2. The method for verifying data according to claim 1, wherein the storing the verification code is specifically: The check code is stored in the memory used by the CPU, or the check code is stored in the memory used by the target chip. 3. The method for verifying data according to claim 1, wherein the CPU performs error checking and correcting verification on the data according to the data and the verification code, specifically: Reading the data and check code regularly, and performing error check and correction check on the data; Or when using the data, read the data and the check code, and perform error checking and correction check on the data. 4. The method for verifying data according to claim 3, wherein, before the CPU generates the error checking and correcting check code of the data to be verified, it also includes: Divide the memory used by the target chip into at least one block, store the data to be verified in the block, and record the state of the block storing the data as used; Correspondingly, the CPU performs error checking and correction checking on the data according to the data and the check code, specifically including: The CPU checks the state of the divided block, and if it is used, performs error checking and correction checking on the data according to the check code and the data stored in the block. 5. The method for verifying data according to any one of claims 1 to 4, wherein the method further comprises: When the CPU performs error checking and correction checking on the data according to the data and the check code, and finds that the data is erroneous, it performs correction or alarm processing on the data. 6. A device for verifying data, characterized in that the device comprises: A processing module, configured to generate a check code for error checking and correction of the data to be checked, and the data is stored in the memory used by the target chip; a storage module, configured to store the check code generated by the processing module; A verification module, configured to perform error checking and correction verification on the data according to the data in the internal memory and the verification code stored in the storage module. 7. The device for verifying data according to claim 6, wherein the verification module specifically includes: The reading unit is used to regularly read the data from the memory, or when using the data, read the data from the memory, and is also used to read the check code stored in the storage module ; The verification unit is configured to perform error checking and correction on the data according to the data read by the reading unit and the verification code. 8. The device for verifying data according to claim 6, wherein the device further comprises: A division module, configured to divide the memory used by the target chip into at least one piece; a data storage module, configured to store the data to be verified in the blocks divided by the division module; a recording module, configured to record the state of the block storing the data in the data storage module as used; Correspondingly, the verification module specifically includes: a check unit, configured to check the state of the blocks divided by the division module; A checking unit, configured to read the used block when the checking unit checks that the status of at least one block is used, according to the data stored in the block and the checksum stored in the storage module The code performs error checking and correction checks on the data. 9. The device for verifying data according to any one of claims 6 to 8, wherein the device further comprises: The correction module is used to correct or warn the data when the verification module detects that the data is wrong.

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