CN101165619A - Programmable logic controller device - Google Patents
Programmable logic controller device Download PDFInfo
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- CN101165619A CN101165619A CNA2007101802584A CN200710180258A CN101165619A CN 101165619 A CN101165619 A CN 101165619A CN A2007101802584 A CNA2007101802584 A CN A2007101802584A CN 200710180258 A CN200710180258 A CN 200710180258A CN 101165619 A CN101165619 A CN 101165619A
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- 238000009795 derivation Methods 0.000 claims 3
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- 230000000717 retained effect Effects 0.000 abstract 1
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- 230000015572 biosynthetic process Effects 0.000 description 12
- 238000004891 communication Methods 0.000 description 10
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- 244000017020 Ipomoea batatas Species 0.000 description 1
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- 238000010276 construction Methods 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/11—Plc I-O input output
- G05B2219/1131—I-O connected to a bus
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/11—Plc I-O input output
- G05B2219/1139—By using software configurable circuit, integrated, pga between cpu and I-O
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Abstract
The present invention provides a PLC device capable of realizing additional equipment under module unit (base unit) through simple operation without stopping the running of the device. Lower segment additional bus gate (601) inserted in the route from the lower segment side socket (23a) to the inner bus (201). And abnormal signals can be prevented to enter the inner bus of the current system when the connector is being installed by disconnecting the electric power of additional module beforehand, because cutoff state can be retained only if the electric power of additional module is disconnected. On the other hand, the drive of the additional module (3) can be performed smoothly by connecting the electric power of additional module after that the connector is installed, because the lower segment additional bus gate is in an on-state.
Description
Technical field
The present invention relates to basic module and the PLC device of setting up module formation more than 1 or 2 are set by setting up the cable connection.
Background technology
By as can be known, basic module and the PLC device (for example, with reference to patent documentation 1) of setting up module formation more than 1 or 2 are set by setting up the cable connection in the past.
The outward appearance pie graph of an example of such PLC device as shown in figure 11.As shown in the figure, this PLC device connects setting up module 2,3 and forming of 1 this module of stylobate 1 being set and (in this example being 2) more than 1 or 2 by setting up cable.In addition, the state after state, this figure (b) expression before module 3 does not also have connected setting up set up that module 3 is connected and set up is set up in this figure (a) expression.
Basic module 1 comprises a plurality of control modules except that power supply unit 11 and intermodule linkage unit 14.In the present example, as control module, (comprise IN unit, OUT unit, IN though represented CPU element 12 and 3 I/O unit, the OUT mixed cell) 13, in addition, as control module, also can comprise communication unit (comprising the communication unit between master-slave communication unit, the PLC), various special function unit (PID calculation unit, action/control module etc.).
These unit 11~14, the base unit (baseunit) (being also referred to as backboard) 10 that forms for lay internal bus on motherboard is freely installed by connector (not shown) respectively with loading and unloading.Like this, CPU element 12 and each I/O unit 13 are connected by internal bus (not shown) respectively.
Set up module 2 except that the linkage unit 23 of power supply unit 21 and intermodule, comprise a plurality of control modules.In the present example, as control module, (comprise IN unit, OUT unit, IN though represented 5 I/O unit, the OUT mixed cell) 22, but in addition, as control module, also can comprise communication unit (comprising the communication unit between master-slave communication unit, the PLC), various special function unit (PID calculation unit, action/control module etc.).
These unit 21~23, the base unit (being also referred to as backboard) 20 that forms for lay internal bus on motherboard is freely installed by connector (not shown) respectively with loading and unloading.Like this, each I/O unit 22 is connected by internal bus (not shown) respectively.
Set up module 3, except that the linkage unit 33 of power supply unit 31 and intermodule, comprise a plurality of control modules.In the present example, as control module, (comprise IN unit, OUT unit, IN though represented 5 I/O unit, the OUT mixed cell) 32, but in addition, as control module, also can comprise communication unit (comprising the communication unit between master-slave communication unit, the PLC), various special function unit (PID calculation unit, action/control module etc.).
These unit 31~33, the base unit (being also referred to as backplate) 30 that forms for lay internal bus on motherboard is freely installed by board connector (not shown) respectively with loading and unloading.Like this, each I/O unit 32 is connected by internal bus (not shown) respectively.
More specifically, the front of the linkage unit 14 between the module of basic module 1 is provided with as being used for and derives the socket 14a that the outside export mouth of the hypomere side that is laid on the internal bus (with reference to Figure 12 label 101) on the base unit 10 works to the outside.
In addition, the front of the linkage unit 23 between the module of setting up module 2, about dispose side by side as being used for and derive socket 23a that the outside export mouth of the hypomere side be laid on the internal bus (with reference to Figure 12 label 201) on the base unit 20 works and derive the socket 23b that the outside export mouth of the epimere side that is laid on the internal bus (with reference to Figure 12 label 201) on the base unit 20 works to the outside as being used for to the outside.
Further, the front of the linkage unit 33 between the module of setting up module 3, about dispose side by side as being used for deriving the socket 33a that the outside export mouth of the hypomere side be laid on the internal bus (with reference to Figure 12 label 301) on the base unit 30 works and having and derive the socket 33b that the outside export mouth of the epimere side that is laid on the internal bus (with reference to Figure 12 label 301) on the base unit 30 works to the outside as being used for to the outside.
Basic module 1 and set up between the module 2, set up module 2 and set up between the module 3 uses cable to connect.That is, in the present example, the linkage unit 14 between the module of basic module 1 and set up between the linkage unit 23 between the module of module 2 and use cable 41 to connect.Equally, set up the linkage unit 23 between the module of module 2 and set up between the linkage unit 33 between the module of module 3, use cable 42 to connect.
More specifically, plug (link of connector opposite side) 41a is installed, plug 41b is installed at the hypomere side end of cable 41 at the epimere side end of cable 41.Equally, plug 42a is installed, plug 42b is installed at the hypomere side end of cable 42 at the epimere side end of cable 42.These plugs have identical construction substantially, have a cable loading port and a connector.Being connected of plug and the cable that is loaded into uses the fixing method of the turn of the screw or welding etc. to carry out.
Equally, set up the linkage unit 23 between the module of module 2 and set up linkage unit 33 between the module of module 3 between when connecting by cable 42, plug 42a is installed to socket 23a, plug 42b is installed to socket 33b.At this moment, use plug 42a and socket 23a to constitute removably connector, use plug 42b and socket 33b to constitute removably connector.
In other words, the outside export mouth (socket 14a) of the hypomere side of basic module 1 and set up between the outside export mouth of epimere side (socket 23b) of module 2 and be positioned at the outside export mouth (socket 23a) of the hypomere side of setting up module 2 of epimere side and be positioned between the epimere side outside export mouth (socket 33b) of setting up module 3 of hypomere side is connected by cable 41,42 respectively.Simultaneously the two ends of cable 41,42 and each outside export mouth ( socket 14a, 23a, 23b, 33a, 33b) between, have removably connector (group of socket and plug).
The electric hardware structure diagram of such PLC device as shown in figure 12.In addition, 10a in the drawings, 20a, 30a is to unload CPU element on the base unit 10,20,30 and the unit beyond the power supply unit and the zone that makes it to expose.
As shown in the drawing, at the regional 10a of the base unit 10 of basic module 1, be provided with the pedestal control circuit 103 that constitutes by ASIC.In addition, at the regional 20a of the base unit 20 of setting up module 2, be respectively arranged with the pedestal control circuit 203 and the power supply status announcing circuit 204 that constitute by ASIC.Further, at the regional 30a of the base unit 30 of setting up module 3, be respectively arranged with the pedestal control circuit 303 and the power supply status announcing circuit 304 that constitute by ASIC.
Pedestal control circuit 103,203,303 comprises internal register 103a, 203a, 303a respectively. Internal register 103a, 203a, 303a have same formation.Pedestal control circuit 103,203,303, management is for the reading and writing action of internal register 103a, 203a, 303a.In internal register, whether storing for the information of each the I/O unit on this base unit, installed or control module power supply etc.CPU element can read or write the content of internal register 103a, 203a, 303a by bus 101,201,301.
Power supply status announcing circuit 204,304 comprises the state that monitors power supply unit 21,31 respectively, this result is sent to the function of CPU element by bus 206,306.
Patent documentation 1: the spy opens flat 6-124103 communique
Summary of the invention
But; in the PLC device of setting up of this carried out module unit (base unit unit) in the past; set up module if PLC device newly-increased adduction under operating condition connects to be provided with, it is unusual or set up modular power source by unusual etc. that bus can take place, and running can stop.Therefore, set up module, the problem points that existence must make the running of PLC device stop at every turn in order newly to append for the PLC device in the running and to connect to be provided with.
The present invention is conceived to the problems referred to above point and finishes, and its objective is to provide the running of device is stopped, and can realize the PLC device of setting up under the module unit (base unit unit).
About the present invention's other purpose and action effect further, by the following record of reference instructions, so long as industry personnel can understand well.
Above-mentioned problem solves by the PLC with following formation.That is, this PLC device is that basic module is connected to be provided with and forms by setting up cable with the module of setting up more than one or 2.
Basic module comprises: a plurality of control modules that comprise CPU element and I/O unit; The internal bus that connects these control modules; The outside export mouth of hypomere side that internal bus is derived to the outside, set up module and comprise: a plurality of control modules that comprise the I/O unit; The internal bus that connects these control modules; The outside export mouth of epimere side that internal bus is derived to the outside, or outside export mouth of epimere side and hypomere side outside export mouth that internal bus is derived to the outside.
In addition, the outside export mouth of the hypomere side of basic module and setting up between the outside export mouth of epimere side of module, and at the outside export mouth of the hypomere side of setting up module of epimere side with between the outside export mouth of the epimere side of setting up module of hypomere side, be connected via cable, simultaneously, between the two ends and each outside export mouth of cable, there is removably connector.
In addition, setting up in the module separately, be provided with the hypomere that can make conducting between internal bus and the outside export mouth of hypomere side, end and set up the highway gate circuit; Have and be used to remember hypomere and set up the 1st memory zone of bus control signal, be used to remember the 2nd memory zone that hypomere is set up the power supply status notification signal, simultaneously, the internal register that these memory zones can read or write by internal bus; The power supply status announcing circuit has the power supply of detection in on-state or in off-state, and generation should notify the hypomere of the module that is positioned at epimere to set up the function of power supply status notification signal; Control assembly has setting up the function that the power supply status notification signal writes on internal register the 2nd memory zone from the hypomere of setting up the module arrival that is positioned at the hypomere side; The function that makes hypomere set up the highway gate conducting, end corresponding to the content of the hypomere bus control signal of in the 1st memory zone of internal register, remembering.
So, carry out the access of information by being included in the CPU element of setting up module and basic module of newly appending via internal register, set up the online possibility that is mounted for of module.
If according to this formation, be present in from outside export mouth to the hypomere on the path of internal bus of hypomere side and set up highway gate, as long as the power supply of the module of appending is not switched on and then keeps cut-off state, power supply of the module of appending by prior disconnection when so connector is installed, abnormal signal enters in the internal bus of existing system in the time of can avoiding connector to install, on the other hand, connect the modular power source that appends by the back being installed at connector, because hypomere is set up highway gate and is become conducting state alone, so the startup of the module that can append smoothly.
In above-mentioned PLC device, in the basic module, the hypomere that can make conducting between internal bus and the outside export mouth of hypomere side, end also can be set set up the highway gate circuit; Have and be used to remember hypomere and set up the 1st memory zone of bus control signal, be used to remember the 2nd memory zone that hypomere is set up the power supply status notification signal, simultaneously, the internal register that these memory zones can read or write via internal bus; Control assembly has setting up the function that the power supply status notification signal writes on the 2nd memory zone of internal register from the hypomere of setting up the module arrival that is positioned at the hypomere side; The function that makes hypomere set up the highway gate conducting, end corresponding to the content of the hypomere bus control signal of in the 1st memory zone of internal register, remembering.
If according to this formation, about being connected, basic module sets up the operation of module, carry out while also can continue the work of system.
If according to the present invention, can provide the running of device is stopped, realizing the PLC device of setting up under the module unit (base unit unit).
Description of drawings
Fig. 1 is the electric hardware structure diagram of PLC device of the present invention.
Fig. 2 is the detailed pie graph of internal register.
Fig. 3 is the process flow diagram of the expression user operation that is used to append.
Fig. 4 is the process flow diagram that expression is used for the processing of the online CPU element of appending of pedestal.
Fig. 5 is that the expression hypomere is set up the process flow diagram of the processing of bus control unit, wherein (a) expression hypomere set up the conducting of highway gate, by handling, (b) detection of setting up power supply status of expression hypomere is handled.
Fig. 6 is to use the concept map (1) of each circuit that ASIC constitutes, and the expression hypomere is set up the highway gate circuit.
Fig. 7 is to use the concept map (2) of each circuit that ASIC constitutes, and the expression hypomere is set up power supply status announcing circuit (setting up module).
Fig. 8 is to use the concept map (3) of each circuit that ASIC constitutes, and the expression hypomere is set up power supply status announcing circuit (basic module).
Fig. 9 is the key diagram of the distribution method of specific address.
Figure 10 is the process flow diagram of processing that expression is used for the CPU element of unit/Address Recognition.
Figure 11 is the outward appearance pie graph of PLC device in the past.Before wherein (a) expression is set up, after (b) expression is set up.
Figure 12 is the electric hardware structure diagram of PLC device in the past.
Label declaration
1 basic module
2 set up module
3 set up module
10 base units
Installation region, 10a unit
11 power supply units
12 CPU element
13 I/O unit
Linkage unit between 14 modules
The 14a socket
20 base units
Installation region, 20a unit
21 power supply units
22 I/O unit
Linkage unit between 23 modules
The 23a socket
30 base units
Installation region, 30a unit
31 power supply units
32 I/O unit
Linkage unit between 33 modules
The 33a socket
41 cables
The 41a plug
The 41b plug
42 cables
The 42a plug
The 42b plug
101 internal buss
The 101a access path
102 hypomeres are set up bus control unit
103 bus control circuits
The 103a internal register
201 internal buss
The 201a access path
The 201b access path
202 hypomeres are set up bus control unit
203 pedestal control circuits
The 203a internal register
204 power supply status announcing circuits
301 internal buss
The 301a access path
The 301b access path
302 hypomeres are set up bus control unit
303 pedestal control circuits
The 303a internal register
304 power supply status announcing circuits
A1 the 1st memory zone
A2 the 2nd memory zone
601 hypomere highway gate circuit
602 hypomeres are set up the power supply status announcing circuit
603 hypomeres are set up the power supply status announcing circuit
Embodiment
Below, a preferred embodiment of the PLC device that present invention will be described in detail with reference to the accompanying.In addition, outward appearance pie graph and Figure 11 of PLC device of the present invention are same, omit its explanation.
The electric hardware structure diagram of PLC device of the present invention as shown in Figure 1.In addition, in the drawings, 10a, 20a, 30a are to unload the unit beyond CPU element on the base unit 10,20,30 and the power supply unit and the zone that makes it to expose.
As shown in the drawing, in the regional 10a of the base unit 10 of basic module 1, be respectively arranged with the hypomere that uses ASIC to constitute and set up bus control unit 102, pedestal control circuit 103.In addition, in the regional 20a of the base unit 20 of setting up module 2, be respectively arranged with the hypomere that uses ASIC to constitute and set up bus control unit 202, pedestal control circuit 203, power supply status announcing circuit 204.Further, in the regional 30a of the base unit 30 of setting up module 3, be respectively arranged with and use ASIC formation hypomere to set up bus control unit 302, pedestal control circuit 303, power supply status announcing circuit 304.
Hypomere is set up bus control unit 102,202,302, comprises that respectively hypomere as shown in Figure 6 sets up highway gate circuit 601.This hypomere is set up highway gate circuit 601, in each module 1~3, can make conducting between the outside export mouth of internal bus and hypomere side, end.Use Fig. 6 to describe hypomere in detail and set up highway gate circuit 601.In addition, give the numbering same about inscape among this figure and the same inscape of Fig. 1 with Fig. 1.It is structures of inserting three-state buffer 601a between access path 101a, 201a, 301a and 101c, 201c, the 301c at the internal bus 101,201,301 that prolongs each module that hypomere is set up highway gate circuit 601.Access path 101c, the 201c of each module, 301c are connected to socket 14a, 23a, the 33a as the outside export mouth of hypomere side respectively.Then, at the switching input end of three-state buffer 601a, connecting as the hypomere of the control signal wire that switches usefulness and setting up bus control signal 105a, 205a, 305a.Therefore, this three-state buffer 601a logic state of setting up bus control signal corresponding to hypomere be controlled as can or can not state.Its result, this hypomere is set up highway gate circuit 601, can make conducting between the outside export mouth of internal bus and hypomere side, end.
Get back to Fig. 1, more specifically, be included in hypomere in the basic module 1 and set up the hypomere of bus control unit 102 and set up highway gate circuit 601, be inserted among the access path 101a between internal bus 101 and socket (the outside export mouth of the hypomere side) 14a.So, when setting up highway gate circuit 601 at this hypomere for conducting (ON) state, become conducting state between internal bus 101 and the socket 14a, the running of setting up module of appending becomes possibility, if hypomere is set up highway gate circuit 601 for ending (OFF) state, then become nonconducting state between internal bus 101 and the socket 14a, can stop intrusion from the abnormal signal of outside via socket 14a.
Be included in the hypomeres of setting up in the module 2 and set up the hypomere of bus control unit 202 and set up highway gate circuit 601, be inserted among the access path 201a between internal bus 201 and socket (the outside export mouth of the hypomere side) 23a.Promptly, though internal bus 201 has and the access path 201a of socket (hypomere side outside export mouth) 23a and and the access path 201b of socket (the outside export mouth of epimere side) 23b, hypomere is set up highway gate circuit 601 and is inserted in the access path 201a between internal bus 201 and socket (the hypomere side outside export mouth) 23a.So, when setting up highway gate circuit 601 at this hypomere for conducting state, become conducting state between internal bus 201 and the socket 23a, the running of setting up module of appending becomes possibility, if setting up highway gate circuit 601, hypomere is cut-off state, become nonconducting state between internal bus 201 and the socket 23a, can stop intrusion from the abnormal signal of outside via socket 23a.
Be included in the hypomeres of setting up in the module 3 and set up the hypomere of bus control unit 302 and set up highway gate circuit 601, be inserted among the access path 301a between internal bus 301 and socket (the outside export mouth of the hypomere side) 33a.Promptly, though internal bus 301 has and the access path 301a of socket (hypomere side outside export mouth) 33a and and the access path 301b of socket (the outside export mouth of epimere side) 33b, hypomere is set up highway gate circuit 601 and is inserted in the access path 301a between internal bus 301 and socket (the hypomere side outside export mouth) 33a.So, when setting up highway gate circuit 601 at this hypomere for conducting state, become conducting state between internal bus 301 and the socket 33a, the running of setting up module of appending becomes possibility, if setting up highway gate circuit 601, hypomere is cut-off state, become nonconducting state between internal bus 301 and the socket 33a, can stop intrusion from the abnormal signal of outside via socket 33a.
Pedestal control circuit 103,203,303 comprises internal register 103a, 203a, 303a respectively. Internal register 103a, 203a, 303a have same formation, for example, as shown in Figure 2, have a plurality of independent internal register 1~n.In this example, in k number single memory, the 1st regional A1 of memory and the regional A2 of the 2nd memory are defined, wherein, in the regional A1 of the 1st memory, the state (conduction and cut-off of memory [hypomere is set up bus control signal], " 1 "/" 0 "), in the regional A2 of the 2nd memory, the state (conduction and cut-off, " 1 "/" 0 ") of memory [hypomere is set up the power supply status notification signal].Pedestal control circuit 103,203,303, management is for the reading and writing action of internal register 103a, 203a, 303a.Whether storage is installed to the I/O unit on this base unit or the information of control module power supply etc. for each in the internal register.CPU element can read or write the content of internal register 103a, 203a, 303a via bus 101,201,301.
Power supply status announcing circuit 204,304 has the state that monitors power supply unit 21,31 respectively, this result is sent to the function of CPU element by bus 206,306.
Hypomere in the basic module 1 is set up bus control unit 102, comprises that hypomere as shown in Figure 8 sets up power supply status announcing circuit 603.In addition, the hypomeres of setting up in the module 2,3 are set up bus control unit 202,302, comprise that hypomere as shown in Figure 7 sets up power supply status announcing circuit 602.
Use Fig. 8 to illustrate in greater detail the hypomere that the hypomere that is included in basic module 1 sets up in the bus control unit 102 and set up power supply status announcing circuit 603.In addition, give the label same about inscape among this figure and the same inscape of Fig. 1 with Fig. 1.Hypomere is set up power supply status announcing circuit 603 by being input with access path 107c, and output is made as the OR circuit 603a formation that hypomere is set up power supply status notification signal 105b.This access path 107c is connecting basic modules 1 by cable 41 and is setting up under the state of module 2, and will be connected from the bus 206 of power supply status announcing circuit 204 outputs of setting up module 2 output signal line as the OR circuit 602b (with reference to Fig. 7) of input.So the state of the power supply unit of setting up module 221 that is positioned at the hypomere of basic module 1 is stored in the internal register 103a of basic module 1.
Then, the hypomere that uses Fig. 7 to illustrate in greater detail to be included in the hypomere of setting up module 2,3 to set up in the bus control unit 202,302 is set up power supply status announcing circuit 602.In addition, in the inscape in the figure and the same inscape of Fig. 1 give the label same with Fig. 1.Be included in the hypomere that the hypomere of setting up module 2 sets up in the bus control unit 202 and set up power supply status announcing circuit 602, by access path 207c as input, the OR circuit 602a that output is set up power supply status notification signal 205b as hypomere constitutes.This access path 207c is setting up module 2 and is setting up module 3 by under the cable 42 connected states, and will be connected from the bus 306 of power supply status announcing circuit 304 outputs of setting up module 3 output signal line as the OR circuit 602b of input.So the state that is positioned at the power supply unit of setting up module 3 31 of the hypomere of setting up module 2 is stored in the internal register 203a that sets up module 2.Equally, in setting up the internal register 303a of module 3, be stored in the state of the power supply unit of setting up module that the hypomere of setting up module 3 sets up.
The hypomere processing of setting up bus control unit of having used flowcharting among Fig. 5.Set up at hypomere and to be incorporated with the 1st function and the 2nd function in the bus control unit 102,202,302, the 1st function is shown in Fig. 5 (b), receive the hypomere that sends from the power supply status announcing circuit 204,304 of the module (pedestal) that is positioned at hypomere respectively and set up power supply status notification signal (step 511), simultaneously, its hypomere at internal register 103a, 203a, 303a is set up carried out state in the power supply status notification signal zone (the 2nd memory regional A2) and write; The 2nd function is shown in Fig. 5 (a), the hypomere of register 103a, 203a, 303a is set up bus control signal zone (the 1st memory regional A1) and is carried out state and read (step 501) internally, when being set to " 1 " ("Yes" of step 502) with respect to the state of setting up bus control signal at hypomere, make corresponding hypomere set up highway gate conducting (step 503), if be not set to " 1 " ("No" of step 502), then make corresponding hypomere set up highway gate by (step 504).
In other words, set up at each hypomere and to be incorporated with the 1st function and the 2nd function in the bus control unit 102,202,302, the 1st function is setting up the 2nd memory zone (A2) that the state of power supply status notification signal is written to internal register from the hypomere that module arrives set up that is positioned at the hypomere side; The 2nd function is set up hypomere the highway gate conducting, is ended corresponding to the state of the hypomere bus control signal of memory in the 1st memory zone (A1) of internal register.
On the other hand, in a side of the CPU element 12 that is installed in basic module 1, as shown in Figure 4, packing into is used for the processing that online pedestal (online base) appends (appending at wire module).
That is, in this is handled, the internal register of the base unit by visiting the module that is positioned at hypomere constantly at this at first, hypomere of reading memory in the 1st memory zone (A1) of this internal register is set up the state (step 401) of power supply status notification signal.
Here, for this internal register of visiting the base unit of the module that is positioned at hypomere constantly, the Address Recognition result when utilizing system's starting.That is, in the present example, as shown in Figure 9, in each base unit 10,20,30, base position specification signal line 101,201,301 and totalizer 108,208,308 have been respectively charged into.So, use each base unit 10,20,30 cable 41,42 to be linked in sequence into sweet potato calyculate formula, by the effect of totalizer 108,208,308, each base unit 10,20,30 is automatically distributed intrinsic base position (address).
On the other hand, when the starting of system, as shown in figure 10, by visiting each unit (UNIT) and the pedestal control circuit 103,203,303 (step 1001) that is installed on each base unit on one side, confirm normal/abnormal (step 1002) of its reaction on one side, be identified in the processing (step 1003) of the installation of the unit of this address or pedestal control circuit, by whole unit and pedestal control circuit are repeated above-mentioned identification processing (step 1004) respectively, obtain the Address Recognition result.Based on the Address Recognition result who obtains like this, carry out being positioned at the visit of internal register of base unit of the module of hypomere constantly at aforesaid that.
Get back to Fig. 4, set up the state of power supply status notification signal, judge that power supply is normal (on-state), still unusual (state of access failure) (step 402) based on the hypomere of reading.In addition, as its prerequisite, the state that hypomere is set up the power supply status notification signal is set at " abnormity of power supply " when starting in system.
Here, if be judged as power supply normal ("Yes" of step 402), then hypomere is set up the 1st memory zone (A1) that bus control signal set condition (" 1 ") is written to the internal register of this base unit.Like this, set up the effect of the 2nd function in the bus control unit by being encased in aforesaid hypomere, this hypomere that is positioned at the base unit of hypomere is set up highway gate and is operated from the cut-off state to the conducting state (step 404), is positioned at the internal bus of base unit of hypomere and the bus internal bus conducting of the base unit that will append later on thus now.In addition, as its prerequisite, to set up bus control signal be reset mode (" 0 ") to hypomere when starting in system.
Then, obtain the information (step 405) of regulation,, carry out the normal/abnormal judgement (step 406) of this base unit based on this information that obtains from the base unit that appends.
Here, if judge that the base unit append for normal ("Yes" of step 406), then proceeds to step 408, in the 1st memory zone of the internal register of the base unit that appends, write hypomere and set up the reset mode of bus control signal (" 0 ").Like this, set up the effect of the 2nd function in the bus control unit by being encased in aforesaid hypomere, this hypomere that is positioned at the base unit of hypomere is set up highway gate and is operated from the conducting state to the cut-off state, becomes non-conduction between internal bus by the base unit that appends like this and the outside export mouth of hypomere side.In contrast, be unusual ("No" of step 406) if judge the base unit that appends, then be identified as this and append failure (step 407), in the 1st memory zone of the internal register of hypomere pedestal, write hypomere and set up the reset mode of bus control signal (" 0 ") (step 409).Like this, set up the effect of the 2nd function in the bus control unit by being encased in aforesaid hypomere, this hypomere that is positioned at the base unit of hypomere is set up highway gate and is operated from the conducting state to the cut-off state, thus, being positioned at the internal bus of base unit of hypomere and the internal bus of the base unit that will append later on now becomes non-conduction.In addition, if judge that in the processing of step 402 power supply is undesired, what then be identified as base unit appends failure (step 403), finishes this processing.As the timing that is used for the processing that this online pedestal appends, for example, be considered as the structure that the part of the re-treatment of CPU element is periodically carried out.Known CPU element is carried out initialization process after power turn-on, then, repeat 4 processing of common processing, user program execution processing, I/O recovery processing, peripheral service processing.For example, the part that can constitute this common processing of conduct is carried out processing shown in Figure 4.Certainly,, also can detect the situation that cable has been mounted of setting up, be undertaken by Interrupt Process in order to set up base unit.
Below, above-mentioned formation (the hypomere inside of setting up the circuit formation of bus control unit and function, pedestal control circuit constitutes, the processing of the circuit formation of power supply status announcing circuit and function, CPU element) as prerequisite, with reference to the effect of the PLC device of the flowchart text present embodiment of Fig. 3.
As shown in the drawing, the user at first is connected to system's (step 301) in the work to the unit pedestal that the unit (I/O unit, communication unit, special function unit etc.) that appends has been installed.That is,, then, shown in this figure (b), use cable 42 to connect and set up module 2 and set up module 3 if the example of Fig. 1 at first shown in this figure (a), prepares to set up module 3.At this moment, setting up on the module 2 except that epimere side socket 23b, preparing hypomere side socket 23a.
Then, the power supply (step 302) of pedestal is appended in user's conducting.That is, if the example of Fig. 1, for setting up module 3 as what append pedestal, the connection of power supply is carried out in the operation by power switch etc.Like this, action by aforesaid power supply status announcing circuit 304, signal wire and cable 42 based on regulation, hypomere pedestal power supply status notification signal is sent to and sets up module 2 from setting up module 3, receive this signal, set up the effect of the 1st function in the bus control unit 202 by being encased in hypomere, hypomere pedestal power supply status notification signal is write the memory zone of the 2nd in the internal register 203a (A2) automatically.
Then, carry out before the processing (online pedestal appends processing) (step 303) of the CPU element side that has illustrated with reference to Fig. 4.Like this, the CPU element 12 memory zone of the 2nd among the register 203a (A2) is internally read hypomere pedestal power supply status notification signal, simultaneously, because this is " power supply is normal ", so, write " 1 " that the expression hypomere is set up the set condition of bus control signal for the memory zone of the 1st among the internal register 203a (A1).
Like this, set up the effect of the 2nd function of bus control unit 202 by being encased in hypomere, being encased in hypomere sets up the hypomere of bus control unit 202 and sets up highway gate and be operated from the cut-off state to the conducting state, internal bus 301 conductings of internal bus 201 by the present like this base unit 20 that is positioned at hypomere and the base unit 30 that will append are later on set up successfully.And, when predetermined success conditions is invalid, as previously mentioned, set up failure.
Promptly, with respect to when the state that appends pedestal is normal ("Yes" of step 304), pedestal appends normal termination, the work of adding system is continued (step 305), be not normal ("No" of step 304) if append the state of pedestal, pedestal appends failure to be finished, and gets back to the state (step 306) before appending.
Like this, if device according to present embodiment, the following highway gate 601 of setting up that from the hypomere side socket 23a of the module 2 of the hypomere that constitutes existing system to the path of internal bus 201, inserts, as long as just keep cut-off state because the power supply of the module 3 of appending is disconnected, so by disconnect the power supply of the module 3 of appending in advance when connector is installed, abnormal signal enters into the internal bus of existing system in the time of can avoiding connector to install.On the other hand, by module 3 energized of appending after connector is installed, because hypomere is set up highway gate 601 separately for conducting state, so the starting of the module 3 that can append smoothly.
In addition, in the present embodiment,,, carry out while also can continue the work of system so set up the operation of module 2 about basic module 1 is connected because also built-in hypomere is set up bus control unit 102, pedestal control circuit 103 in basic module 1.
And, in the above embodiment, though in constructing the PLC of modular type, be suitable for the present invention, but the present invention also can be useful in the PLC device of no backboard type, the PLC device of this no backboard type is built in each unit the part of bus, carry out the connector connection by these unit are adjoined each other, a series of internal bus occurs.
If according to the present invention, can provide the running of device is stopped, can realizing the PLC device of setting up of module unit (base unit unit) by shirtsleeve operation.
Claims (2)
1. PLC device connects and basic module is set and the module of setting up more than 1 or 2 forms by setting up cable, it is characterized in that:
Basic module comprises:
The a plurality of control modules that comprise CPU element and I/O unit;
Connect the internal bus between these control modules; And
To the outside export mouth of hypomere side of outside derivation internal bus,
Setting up module comprises:
The a plurality of control modules that comprise the I/O unit;
Connect the internal bus between these control modules; And
To the outside export mouth of epimere side of outside derivation internal bus, perhaps, to the outside export mouth of epimere side and the outside export mouth of hypomere side of outside derivation internal bus,
The outside export mouth of the hypomere side of basic module and setting up between the outside export mouth of epimere side of module, and at the outside export mouth of the hypomere side of setting up module of epimere side with between the outside export mouth of the epimere side of setting up module of hypomere side, connect via cable, simultaneously, between the two ends of cable and each the outside export mouth, be inserted with removably connector
Be provided with respectively setting up in the module respectively:
Hypomere is set up the highway gate circuit, can make conducting between the outside export mouth of internal bus and hypomere side, end;
Internal register has and is used to remember hypomere and sets up the 1st memory zone of bus control signal and be used to remember the 2nd memory zone that hypomere is set up the power supply status notification signal, and simultaneously, these memory zones can be read or write via internal bus;
The power supply status announcing circuit has the power supply of detection in on-state or in off-state, thus the function that generation should notify the hypomere of the module that is positioned at epimere to set up the power supply status notification signal; And
Control assembly, have setting up the function that the power supply status notification signal writes the 2nd memory zone of internal register from the hypomere of setting up the module arrival that is positioned at the hypomere side, with the content of remembering the hypomere bus control signal of remembering in the zone corresponding to the 1st of internal register, the function that makes hypomere set up the highway gate conducting, end
Thus, carry out the access of information via internal register, can set up the online installation of module by the CPU element of setting up module and being included in the basic module of newly appending.
2. as the PLC device of record in the claim 1, it is characterized in that:
In basic module, also be provided with:
Hypomere is set up the highway gate circuit, can make conducting between the outside export mouth of internal bus and hypomere side, end;
Internal register has and is used to remember hypomere and sets up the 1st memory zone of bus control signal and be used to remember the 2nd memory zone that hypomere is set up the power supply status notification signal, and simultaneously, these memory zones can be read or write via internal bus;
Control assembly, have setting up the function that the power supply status notification signal writes the 2nd memory zone of internal register from the hypomere of setting up the module arrival that is positioned at the hypomere side, with the content of remembering the hypomere bus control signal of remembering in the zone corresponding to the 1st of internal register, the function that makes hypomere set up the highway gate conducting, end.
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JP281578/06 | 2006-10-16 | ||
JP2006281578A JP4784759B2 (en) | 2006-10-16 | 2006-10-16 | PLC equipment |
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KR (1) | KR100905874B1 (en) |
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---|---|---|---|---|
CN102792237A (en) * | 2011-03-15 | 2012-11-21 | 欧姆龙株式会社 | PLC CPU unit, system program for PLC, and storage medium having system program for PLC stored therein |
CN103765500A (en) * | 2011-09-09 | 2014-04-30 | 三菱电机株式会社 | Programmable display device |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103430110B (en) | 2011-03-22 | 2016-12-07 | 三菱电机株式会社 | Programmable logic controller (PLC) |
JP5819023B2 (en) | 2013-03-29 | 2015-11-18 | 三菱電機株式会社 | PLC system |
WO2014155701A1 (en) * | 2013-03-29 | 2014-10-02 | 三菱電機株式会社 | Sequencer system and address setting method |
KR102263388B1 (en) * | 2020-01-20 | 2021-06-09 | 엘에스일렉트릭(주) | Power supply for plc extension module |
WO2021240720A1 (en) * | 2020-05-28 | 2021-12-02 | 三菱電機株式会社 | Programmable controller and power supply method |
WO2022009256A1 (en) * | 2020-07-06 | 2022-01-13 | 三菱電機株式会社 | Input/output module, standard input/output module unit, and safety circuit unit |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0731524B2 (en) * | 1986-03-10 | 1995-04-10 | オムロン株式会社 | Input / output expansion device for programmable controller |
JPH02201679A (en) * | 1989-01-31 | 1990-08-09 | Toshiba Corp | System configuration recognizing system |
JPH02208704A (en) * | 1989-02-09 | 1990-08-20 | Sharp Corp | I/o bus extension device of programmable controller |
JPH04216104A (en) * | 1990-12-14 | 1992-08-06 | Omron Corp | Remote i/o system for programmable controller |
JP3393434B2 (en) * | 1992-10-12 | 2003-04-07 | オムロン株式会社 | Programmable controller |
JPH06202714A (en) * | 1993-01-04 | 1994-07-22 | Toshiba Corp | Parallel input/output device |
KR960038365U (en) * | 1995-05-25 | 1996-12-18 | PI's I / O Expansion Unit | |
JPH09179609A (en) * | 1995-12-27 | 1997-07-11 | Omron Corp | Controller |
JP2001084064A (en) * | 1999-09-16 | 2001-03-30 | Toshiba Corp | Computer system and extended device for computer |
JP2001209410A (en) | 2000-01-26 | 2001-08-03 | Yaskawa Electric Corp | Method for specifying i/o module defect |
-
2006
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2007
- 2007-10-15 KR KR1020070103463A patent/KR100905874B1/en active Active
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102792237A (en) * | 2011-03-15 | 2012-11-21 | 欧姆龙株式会社 | PLC CPU unit, system program for PLC, and storage medium having system program for PLC stored therein |
CN102792237B (en) * | 2011-03-15 | 2015-05-13 | 欧姆龙株式会社 | PLC CPU unit |
CN103765500A (en) * | 2011-09-09 | 2014-04-30 | 三菱电机株式会社 | Programmable display device |
CN103765500B (en) * | 2011-09-09 | 2015-11-25 | 三菱电机株式会社 | Programable display |
Also Published As
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KR100905874B1 (en) | 2009-07-03 |
TWI364639B (en) | 2012-05-21 |
CN100559312C (en) | 2009-11-11 |
JP4784759B2 (en) | 2011-10-05 |
KR20080034406A (en) | 2008-04-21 |
JP2008097523A (en) | 2008-04-24 |
TW200827959A (en) | 2008-07-01 |
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