CN101162448A - Hardware transmit method of USB high speed data tunnel - Google Patents
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Abstract
The present invention discloses a hardware transmission method for USB high-speed data tunnel. On the base of a hardware transmission mode of the prior DMA user intervention, the present invention is provided with a high-speed data tunnel transmission mode and uses double data buffer zone technique, and the combination of the two promotes the transmission speed close to the limit transmission rate of USB1.1, i.e. 12 M bit/s. In the transmission mode of USB high-speed data tunnel, an application program needs to collocate the start address and data amount of data block reading-writing transmission only once, and then DMA can divide the data block into a plurality of data packets for transmission by series according to maximum packet length, so as to accomplish the data communication between a PC computer and SoC. The present invention automatically generates the base address of the transmission of each data packet, cancels the calculating and setting process of the redundant addresses of the application service program, further decreases the intervention degree of CPU and upper software, and greatly reduces the processing time of interrupt service routine. Meanwhile, the use of double data buffer zones realizes the synchronization of sending and receiving data, which greatly improves the throughput of data transmission.
Description
Technical field
The present invention relates to a kind of hardware transmit method of USB high speed data tunnel.By the hardware transmission mode of increase high speed data tunnel in USB device, and, can improve USB device is transmitted data between PC and SoC system speed rapidly fully in conjunction with Double Data buffer area technology.
Background technology
Along with integrated circuit (IC) design enters the SOC (system on a chip) epoch, the function of embedded system constantly strengthens, and uses also more and more widely.In order to can be good at that existing processor is expanded, improve the application level of processor, just need the interfacing of more reliable and more stable peripherals.Use increasingly extensive today at USB, the USB interface technology of built-in field has obtained huge development.The USB interface technology is being made huge contribution aspect the peripherals expansion of processor.Because USB interface has simple and flexible, high bandwidth, is easy to advantages such as expansion and hot plug, it has become one of standard interface of digital equipment at present, and little USB flash disk, the MP3 of arriving arrives digital camera, printer greatly, and the figure of USB interface is ubiquitous.In addition, in order to enlarge the range of application of USB, a lot of companies have added new function on the basis of USB standard, make that the application of USB is more extensive, have the more and more embedded system slip-stick artist to want the USB interface technology is applied in the design of embedded system.
Because the USB interface technology is in the widespread use of current built-in field, can realize the easily interconnected of embedded system and PC based on the USB device of USB1.1 agreement, for the application power that improves the SoC processor very important meaning is arranged.The position of this USB device in embedded system as shown in Figure 1.
Summary of the invention
The hardware transmit method that the purpose of this invention is to provide a kind of USB high speed data tunnel
The hardware transmit method feature of USB high speed data tunnel is:
1) in USB device, increases the DMA parts, realize being used for the data tunnel of bulk transfer;
2) realize being used for initial address register and the data size register that batch data transmits in the data tunnel;
DMA upgraded the start address that data size register also produces next packet automatically automatically when 3) each transmission was finished;
4) data tunnel is supported word, the conversion between half-word and byte transmission and the three;
5) data tunnel supports transmitted data amount and unit of transfer not to match, and finishes alignment of data automatically by hardware;
6) DMA supports each end points intersection transmission side by side, and the transmission information of preserving each end points automatically;
7) USB adopts the Double Data caching technology, supports DMA and data buffer area concurrent working;
8) USB device is supported the dynamic switching of user intervention transmission mode and high speed data tunnel transmission mode.
The described DMA parts that in USB device, increase, realization is used for the data tunnel of bulk transfer: in USB device, independently expand the dma module that is intended to promote message transmission rate, be used for controlling automatically the USB hardware device and under the data tunnel pattern, carry out the batch data transmission.
Realize being used for the initial address register and the data size register of batch data transmission in the described data tunnel: the DMA register basis under original user intervention transmission mode, the data tunnel initial address register and the data size register that are used for bulk transfer have been expanded, represent the transmission start address and the transmission data total amount of data block respectively, the register external interface of expansion is identical with original register with accessing operation.
DMA upgraded the start address that data size register also produces next packet automatically automatically when described each transmission was finished: after each data packet transmission is finished, the state of DMA detection hardware logic, and according to the current data packet data quantity transmitted, automatically calculate the transmission start address of next packet, be deposited in the address register, upgrade data size register simultaneously.
Described data tunnel is supported word, conversion between half-word and byte transmission and the three: the system bus that links to each other with USB device has word, half-word and three kinds of transmission modes of byte, data tunnel is all supported this three kinds of patterns, and when the bit wide of the bit wide of system bus and data tunnel is inconsistent, data tunnel is finished the conversion between word, half-word and the byte automatically, guarantees the correctness of transmission data.
Described data tunnel supports transmitted data amount and unit of transfer not to match, automatically finish alignment of data by hardware: under the data tunnel pattern, when if data transmission total amount and data transmission unit do not match, the phenomenon that data do not line up can occur when the fast end of bag transmission, this moment, the hardware control logic of data tunnel can be finished alignment of data automatically according to configuration information.
Described DMA supports each end points intersection transmission side by side, and the transmission information of preserving each end points automatically: under usb data tunnel transmission mode, DMA supports the transmission of multi-endpoint crossing parallel, automatically preserve the information of other end points except that current Transport endpoint, and after finishing current endpoint transmission, carry out end points according to priority and switch.
Described USB adopts the Double Data caching technology, support DMA and data buffer area concurrent working: Double Data buffer area technical support DMA data transmission and usb data transmission are carried out simultaneously, promptly when DMA carries out data transmission, take a data buffer zone, USB can transmit data by another buffer zone; Both reach the maximum utilization of resource.
Described USB device is supported the dynamic switching of user intervention transmission mode and high speed data tunnel transmission mode: the user can be by closing the enabler flags position of data tunnel transmission mode, directly close the data tunnel transmission mode, enter the user intervention pattern, after this data are transmitted by the user intervention pattern.
The beneficial effect that the present invention compared with prior art has:
The technical scheme of a kind of USB high speed data tunnel that the present invention announces has adopted the simple protocol of USB1.1, and that has reduced product designs and develops difficulty and complexity; By on the basis of original USB device, realizing high speed data tunnel, can improve the performance of USB1.1 data transmission significantly.High speed data tunnel adopts the DMA transmission technology in USB device, directly according to the data communication between hardware realization main memory and the peripheral hardware, transmission course itself does not need CPU to intervene, can be on the basis of not improving system clock frequency, the system data transfer rate is improved several times, improve the travelling speed of total system greatly, greatly improved system performance.On the other hand, in order to improve data transmission performance when the in enormous quantities data transmission, under original user intervention transmission mode, increased the high speed data tunnel transmission mode, it only needs application program to set the transmission start address and the corresponding data volume of data block before the transmission beginning, in case after the transmission beginning, DMA can be automatically according to this data block of maximum bag transmission length batchwise transfer, and after finishing, each data packet transmission calculates the start address of next data packet transmission automatically, upgrade initial address register and data size register simultaneously, till having transmitted last packet.Compare with traditional user intervention transmission mode, the data tunnel transmission mode can improve transmission performances greatly, because the user intervention pattern will produce interruption after the intact packet of every biography, and wait for that upper layer software (applications) interrupts producing response to this, enter corresponding interrupt service routine and dispose the transmission information of next packet, comprise start address, transmission size and data packet transmission size.Because the operation of interrupt service routine will take the plenty of time, greatly reduces data transmission efficiency, and increased the complexity that the software developer designs; And the data tunnel pattern does not produce interruption in the transmission course of data block, be responsible for the transmission of each packet by DMA, this pattern has strengthened the independent processing ability of hardware, the miscellaneous work that is about to software is realized with hardware, not only realize simple, expense is less, and when data volume is big, the tunnel transmission mode more can demonstrate fully the superiority of its performance, because it need not to enter interrupt service routine behind the intact packet of every transmission, cancel the calculating and the assignment procedure of application services redundant address, further reduced the intervention degree of CPU and upper layer software (applications), greatly reduced the processing time of interrupt service routine.
Also used the hardware technology of Double Data buffer area in the technological means of high speed data tunnel, both combinations can effectively solve in data transmission, the problem that USB device does not respond for a long time for the waiting for CPU data greatly shortens even has eliminated the stand-by period.And traditional forms data buffer area is in use, the every reception of USB device or send a packet after, all need to wait reading away or writing of pending data, thereby the data transfer request of the usb host that can't make an immediate response.Because the existence of a kind of like this data stand-by period makes the utilization rate of USB universal serial bus reduce half.Though the introducing of Double Data buffer area technology need consume more relatively hardware resource (increasing a data buffer area), increased software programming complexity (need preserve) to data transmission and accepting state, but the speed of its data transmission has obtained promoting significantly, and the utilization factor of usb bus almost reaches capacity.
Description of drawings
Fig. 1 is the block diagram of USB device in embedded system.
Fig. 2 is the state transition graph of USB high speed data tunnel transmission.
Fig. 3 is the hardware realization figure of word, half-word and byte converter.
Fig. 4 is the hardware realization figure of signal Synchronization module.
Fig. 5 is that the hardware of USB high speed data tunnel and Double Data buffer area is realized schematic diagram.
Fig. 6 is the transfer process figure of USB device.
Embodiment
The hardware transmit method feature of USB high speed data tunnel is:
1) in USB device, increases the DMA parts, realize being used for the data tunnel of bulk transfer;
2) realize being used for initial address register and the data size register that batch data transmits in the data tunnel;
DMA upgraded the start address that data size register also produces next packet automatically automatically when 3) each transmission was finished;
4) data tunnel is supported word, the conversion between half-word and byte transmission and the three;
5) data tunnel supports transmitted data amount and unit of transfer not to match, and finishes alignment of data automatically by hardware;
6) DMA supports each end points intersection transmission side by side, and the transmission information of preserving each end points automatically;
7) USB adopts the Double Data caching technology, supports DMA and data buffer area concurrent working;
8) USB device is supported the dynamic switching of user intervention transmission mode and high speed data tunnel transmission mode.
The described DMA parts that in USB device, increase, realization is used for the data tunnel of bulk transfer: in USB device, independently expand the dma module that is intended to promote message transmission rate, be used for controlling automatically the USB hardware device and under the data tunnel pattern, carry out the batch data transmission.The technical scheme of high speed data tunnel has reduced the intervention degree that the legacy user intervenes upper layer software (applications) under the transmission mode, it only needs the control register of application program initialization DMA before the transmission beginning, the start address, data volume and the transmission size that comprise transmission, in case after the transmission beginning, DMA just can finish the transmission of this data volume automatically, it will be by maximum data packet length batchwise transfer, except last packet, after intact each packet of every transmission, it understands automatic refresh counter, transmission initial address register and data size register etc. simultaneously.Under the data tunnel transmission mode, because data quantity transmitted is very big, generally all be far longer than maximum bag data length, therefore data block will be by the maximum packet length batchwise transfer, and the transmission of AHB system bus size and transport-type are by user configured, so data are surrounded by and are divided into several times bus transfer possibly and just can finish.DMA data transmission under the high speed data tunnel pattern can be divided into following several stages by reading or writing two self-contained process of transmission, as shown in Figure 2:
1. idle condition: idle condition is meant that the high speed data tunnel transmission mode is closed.Behind the electrification reset, the data tunnel pattern enters this state automatically.
2. initialization or upgrade register, counter status: if before transmission data block, data tunnel is enabled, state of a control enters this state by idle condition automatically, this moment, the groundwork of this state was to wait for that user application comes initialization DMA registers group by the Slave interface of ahb bus, comprises base address register, control register etc.; If after the transmission beginning, and successfully pass the packet that is over, then this state is used for upgrading register, counter etc. automatically, for initial work is carried out in the transmission of next packet.
3. read the transfer bus solicited status: this and 4,5,6,7 one of four states have constituted reads to transmit operating process.After if bag transmission commencing signal has been put, and DMA is for the IN port transmits, and then can enter this state, and initiate to read the transfer bus request signal to ahb bus, and the right to use of ahb bus is obtained in wait.
4. read the internal storage data state: after DMA obtains the bus right to use as the Master of ahb bus, just initiate bus and read the transmission operation, according to the transport address that address generator produces,, and keep in the data buffer area that arrives DMA inside toward corresponding system memory address section reading of data.
5. write the Double Data buffer state: read after transmission operation finishes when bus, DMA just can put the enable signal of writing the Double Data buffer area, and wait Double Data buffer area comes the data in the reading DMA inner buffer district.Because therefore the clock frequency of AHB system all will can be done very for a short time at the data buffer area capacity of DMA inside much larger than the system frequency of USB in the ordinary course of things, generally just can satisfy the needs of design as 4 * 32.
6. keep writing the enable signal state: before DMA writing of not receiving that synchronization module produces enables feedback signal it will to keep writing enable signal constant always.Finished if whole data block is all transmitted, then got back to idle condition, and produced interruption, the wait interrupt service routine is handled accordingly, if a packet end of transmission, then get back to the 2nd state, continue the transmission of next packet.
7. produce the transmission of control signals state of reading automatically: because a data packet transmission needs bus transfer operation several times just can finish sometimes, therefore before a bus transfer request of every initiation, all need to be ready to read control signals transmitted, comprise signals such as transmission size, transport-type and transmission base address.
8. keep reading the enable signal state: it is to write the transmission operating process that this and 9,10,11,12 one of four states have constituted, after if the transmission commencing signal has been put, and DMA transmits for the OUT port, then can enter this state, DMA do not receive read to enable feedback signal before it will to keep reading enable signal constant always.
9. read Double Data buffer area data mode: DMA and read the interior data of Double Data buffer memory, and pass through the conversion of word and byte converter, data are filled into the data buffer area of DMA inside.
10. produce automatically and write the transmission of control signals state: see the 7th state description for details.
Initiate to write the transfer bus request signal 11. write transfer bus transmission requests state: DMA to ahb bus, wait for the right to use of obtaining ahb bus.
12. write data state in the internal memory: after DMA initiates the bus transfer request and obtains the bus right to use, just initiate bus and write the transmission operation,, insert data toward corresponding system memory address section according to the transport address that address generator produces.Finished if whole data block is all transmitted, then got back to idle condition, and produced interruption, the wait interrupt service routine is handled accordingly, if a packet end of transmission, then get back to the 2nd state, continue the transmission of next packet.
Realize being used for the initial address register and the data size register of batch data transmission in the described data tunnel: the DMA register basis under original user intervention transmission mode, the data tunnel initial address register and the data size register that are used for bulk transfer have been expanded, represent the transmission start address and the transmission data total amount of data block respectively, the register external interface of expansion is identical with original register with accessing operation.
DMA upgraded the start address that data size register also produces next packet automatically automatically when described each transmission was finished: after each data packet transmission is finished, the state of DMA detection hardware logic, and according to the current data packet data quantity transmitted, automatically calculate the transmission start address of next packet, be deposited in the address register, upgrade data size register simultaneously.In the transmission course of a packet, DMA also can produce repeatedly the address of bus read-write transmission operation automatically simultaneously.This address generator is to be calculated by one 32 hardware address adder unit, for bus transfer address each time it according to the transmission size with 4 bytes, 2 bytes and 1 byte are that unit increases, and for the start address of each packet, it then is that product according to transmission size and transport-type increases progressively generation.Therefore under this pattern, as long as application program is after the start address of before the transmission beginning read-write of internal storage data piece being transmitted writes base address register by AHB Slave interface, the address generator of DMA inside can produce the transmission start address of each packet correspondence automatically.
Described data tunnel is supported word, the conversion between half-word and byte transmission and the three: high speed data tunnel transmission mode support transmission size is word (4 byte), three kinds of patterns of half-word (2 byte) and byte.In the control register of DMA, the transmission size of two bit representation buses is arranged: 00 expression word transmission, 01 expression half-word transmission, 10 expression byte transmission, the undefined length of 11 expressions.Default conditions are the word transmission, improve the efficient and the bandwidth of bus transfer as far as possible.Because the bit wide (32) of system bus is inconsistent with the bit wide (8) of data tunnel, in order to guarantee the correctness of data transmission, DMA can be according to these two conversion and interceptings of carrying out between word, half-word and the byte of register, to reach the consistance of data bit width between bus and the data buffer area; If packet is last packet and data volume is not the word alignment, then DMA can change the transmission size automatically according to actual conditions, and its hardware realizes that figure is shown in 3.
Described data tunnel supports transmitted data amount and unit of transfer not to match, automatically finish alignment of data by hardware: under the data tunnel pattern, when if data transmission total amount and data transmission unit do not match, the phenomenon that data do not line up can appear when the fast end of bag transmission, for example, the data transmission total amount of packet is 63, and user configured unit of transfer is the word transmission, phenomenon has just appearred not lining up so when last three bytes of transmission, this moment, the hardware control logic of data tunnel can be finished alignment of data automatically according to corresponding configuration information and bus transfer address, transmitted after three bytes are filled to word again.
Described DMA supports each end points intersection transmission side by side, and the transmission information of preserving each end points automatically: under usb data tunnel transmission mode, DMA supports the transmission of multi-endpoint crossing parallel, automatically preserve the information of other end points except that current Transport endpoint, and after finishing current endpoint transmission, carry out end points according to priority and switch.
Described USB adopts the Double Data caching technology, support DMA and data buffer area concurrent working: Double Data buffer area technical support DMA data transmission and usb data transmission are carried out simultaneously, promptly when DMA carries out data transmission, take a data buffer zone, USB can transmit data by another buffer zone; Both reach the maximum utilization of resource.Because the system clock frequency of DMA and the work of Double Data buffer area is different, therefore need between these two modules, add the signal Synchronization module, with the correctness of assurance data sampling, the metastable state of erasure signal, its hardware is realized schematic diagram as shown in Figure 4.The high speed data tunnel transmission mode combines with Double Data buffer area technology, greatly shortened the interval of packet and data packet transmission, DMA and data buffer area can be worked simultaneously, thus make the USB transmission speed near the limiting velocity 12Mbit/s.USB high speed data tunnel transmission of USB1.1 and Double Data buffer area overall hardware structure as shown in Figure 5.
Described USB device is supported the dynamic switching of user intervention transmission mode and high speed data tunnel transmission mode: for the traditional DMA user intervention transmission mode of compatibility, in the control register of DMA, be provided with the enable bit of data tunnel transmission mode.The user can directly close the data tunnel transmission mode by closing this enabler flags position, enters the user intervention pattern, and after this data are transmitted by the user intervention pattern.Default setting was closed for the data tunnel pattern after this position powered on.Application program of user can be according to the actual needs, and Dynamic Selection is opened or closed this position and come control data tunnel transmission mode.In transmission course, support the dynamic handoff functionality of data tunnel transmission mode and user intervention transmission mode, its process flow diagram is shown in 6.
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Cited By (12)
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| CN101958885A (en) * | 2009-07-20 | 2011-01-26 | 新奥特（北京）视频技术有限公司 | Non-IP data tunnel-based file secure transmission method and system |
| CN101958919A (en) * | 2009-07-20 | 2011-01-26 | 新奥特（北京）视频技术有限公司 | Non-IP data channel-based multi-file parallel transmission method and system |
| CN101958884A (en) * | 2009-07-20 | 2011-01-26 | 新奥特（北京）视频技术有限公司 | Data transmission method and system based on non IP data tunnel |
| CN103034598A (en) * | 2011-09-28 | 2013-04-10 | 安凯(广州)微电子技术有限公司 | Processing method and processing system for write enable signals in storage of DMA (direct memory access) downlink data |
| CN103714152A (en) * | 2013-12-26 | 2014-04-09 | 国家电网公司 | Method and device for universal data access |
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| CN113254375A (en) * | 2020-12-30 | 2021-08-13 | 深圳怡化电脑股份有限公司 | Data transmission method and device, electronic equipment and storage medium |
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| CN101958884A (en) * | 2009-07-20 | 2011-01-26 | 新奥特（北京）视频技术有限公司 | Data transmission method and system based on non IP data tunnel |
| CN103034598A (en) * | 2011-09-28 | 2013-04-10 | 安凯(广州)微电子技术有限公司 | Processing method and processing system for write enable signals in storage of DMA (direct memory access) downlink data |
| CN103714152A (en) * | 2013-12-26 | 2014-04-09 | 国家电网公司 | Method and device for universal data access |
| CN109360408A (en) * | 2018-08-14 | 2019-02-19 | 深圳芯珑电子技术有限公司 | A kind of data communications method based on plastic optical fiber |
| CN109360408B (en) * | 2018-08-14 | 2023-06-23 | 深圳芯珑电子技术有限公司 | Data communication method based on plastic optical fiber |
| CN111290983B (en) * | 2018-12-10 | 2023-05-16 | 澜至电子科技（成都）有限公司 | USB transmission equipment and transmission method |
| CN111290983A (en) * | 2018-12-10 | 2020-06-16 | 澜至电子科技（成都）有限公司 | USB transmission equipment and transmission method |
| CN109902044A (en) * | 2019-02-28 | 2019-06-18 | 厦门码灵半导体技术有限公司 | A kind of control system, a set control system and its design method, electronic device |
| CN113254375A (en) * | 2020-12-30 | 2021-08-13 | 深圳怡化电脑股份有限公司 | Data transmission method and device, electronic equipment and storage medium |
| CN114356813A (en) * | 2021-12-15 | 2022-04-15 | 中国航空工业集团公司成都飞机设计研究所 | Bus data efficient IO method based on message block DMA |
| CN114328354A (en) * | 2021-12-29 | 2022-04-12 | 苏州矽典微智能科技有限公司 | Data transmission system and method |
| CN114328354B (en) * | 2021-12-29 | 2024-08-02 | 苏州矽典微智能科技有限公司 | Data transmission system and method |
| CN115617721A (en) * | 2022-11-05 | 2023-01-17 | 深圳三地一芯电子有限责任公司 | Data transmission method, DMA device and main control chip |
| CN115617721B (en) * | 2022-11-05 | 2023-11-21 | 深圳三地一芯电子股份有限公司 | Data transmission method, DMA device and main control chip |
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