CN101132283B - Method and device for processing Ethernet frame end mark - Google Patents
Method and device for processing Ethernet frame end mark Download PDFInfo
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Abstract
This invention discloses a chip of MAC layer of Ethernet including a specific service accumulating sub-layer and a public part sub-layer, in which, said public part sub-layer includes a receiving module of the physical layer used in receiving data containing error instruction signals and data frames from the physical layer, a sending module of the service layer used in sending specific service to the specific service sub-layer, a module processing received data used in screening error instruction information from the physical layer chip and carrying out serial check to all data frames of the physical layer chip and transferring them to the specific service acumulation sub-layer by the transfer module of the service layer.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of ethernet frame end mark processing method and equipment.
Background technology
In the ethernet communication system, carry out transfer of data by physical layer between the equipment, wherein the encoding and decoding of data are to be realized by the PMD in the physical layer (Physical Medium Dependent, physical medium is relevant) sublayer.The PMD sublayer coded system of existing ethernet standard comprises: NRZ (Non-Return-to-Zero, non-return-to-zero) coding, NRZI (Non-Return-to-Zero-Inverse, non-return-to-zero is anti-phase) coding, Manchester (Manchester) coding, MLT-3 (Multi-level Transmission-3 levels, multilevel transmission-3 level) coding and PAM (Pulse Amplitude Modulation, pulse amplitude modulation) encode etc.The specific coding structure is as shown in Figure 1: the nrz encoding mode is used in the low-speed communication usually, by pulse clock in the cycle height of level represent, if high level, then expression numeral 1, if low level, then expression numeral 0; The nrzi encoding mode does not return 0 for meeting 1 upset; The Manchester coded system is for having saltus step in the middle of each binary digit, and with indicator bit value, for example, the logical zero value is indicated in from 1 to 0 saltus step, from 0 to 1 saltus step indication logical one value; The MLT-3 coded system be a kind of ambipolar coding (comprise+V, 0 ,-three level of V), signal can transition between adjacent two level, is 1 during saltus step, is 0 during not saltus step; The PAM coded system is the multilevel electrical level coded system, each clock cycle sends a symbol, and each symbol once comprises two positions, for example, for PAM-4, comprise 00,01,10 and 11, thereby its each code element (symbol) can load the data of 2bit, therefore the frequency halving of symbol is suitable for transmitting higher chip rate when transmission phase same rate.
The chip rate of several coded systems commonly used is as shown in table 1 in the PMD sublayer coding of existing ethernet standard:
Table 1:
| Coded system | Chip rate (Symbol rate) |
| Manchester(10BaseTX) | 20M baud/second |
| MLT-3(100BaseTX) | 125M baud/second |
By table 1 as can be known: the Manchester coding is represented a bit with two code elements, the efficient of coding has only 50%, promptly need double transmission bandwidth (signal rate is 2 times of data rate), for example, transmission rate is the Manchester coded data that the Ethernet of 20Mb/s can only transmit 10Mb/s, therefore, code efficiency is lower.But Manchester encodes and carries clock information in each code element, so recovered clock only needs several code elements, and resume speed is very fast.
For the 10Base-T ethernet physical layer standard of IEEE802.3 standard, use be Manchester coding.In this coding, data bit ' 1 ' and data bit ' 0 ' is the saltus step of corresponding different directions respectively, as shown in Figure 1.In standard, stipulated the EOF (End OfFrame, every frame end mark) that transmits on the physical layer simultaneously, EOF is the level signal of 3 bit widths, the receiving terminal physical chip receives after this level index signal, just knows that this data frame transfer finishes.This is because under the coding of normal data transfer part, high level or low duration are the longest to be the time of a bit, when being ' 10 ' or ' 01 ' as former and later two successive bits.
In existing radio and television standard, EPCN (Ethernet Passive Coxial Network, ether passive coaxial network) system uses the coaxial frequency band of TV to distribute from 5MHz～1GHz, wherein 65MHz uses as programme channel to 1GHz, and 5MHz～65MHz uses as bidirectional data path.The frequency spectrum that is lower than 5MHz is not made concrete regulation.
At the Network Transmission spectral characteristic test result under the 418-416-414 splitter networking in the prior art as shown in Figure 2, network is partly decayed very big to the low-frequency transmission of 50KHz～300KHz.Because what 10Base-T adopted is the Manchester encoding scheme of base band, this scheme is owing to be base band and non-modulation system, therefore need to use very wide frequency spectrum, as frequency spectrum from 200KHz～30MHz, in based on the transmission of twisted-pair feeder environment, the frequency spectrum aspect is no problem, does not all have big decay from 0Hz to 30MHz.But in coaxial splitter Network Transmission, problem has just taken place in this assumed condition, because to the frequency spectrum of 300KHz very large decay is arranged at 50KHz.
The decay of low frequency part has the greatest impact to the EOF of 10Base-T, because this signal is the constant level signal of a 300ns width, signal is wide more, and low frequency component is big more, and the influence that is subjected to is just big more.EOF signal by network actual measurement as shown in Figure 3, the top waveform among Fig. 3 is the measured waveform through the splitter network, and the following waveform among Fig. 3 is comparatively desirable transmitted waveform.As can be seen from Figure 3, what the EOF signal was subjected to has the greatest impact, and according to normal condition, receiving terminal can't recover correct EOF signal.
If the physical chip of receiving terminal can't identify correct EOF index signal, this physical chip will given MAC (Media Access Control so, medium access control) MII of chip (Media Independent Interface, Media Independent Interface) on, sends error indication signal.MII interface signal annexation comprises as shown in Figure 4: TX_EN (transmission enables), TXD[3:0] (transmission data), TX_ER (transmit data error signal), TX_CLK (tranmitting data register); RX_DV (reception enables), RXD[3:0] (reception data), RX_ER (receive data error signal), RX_CLK (receive clock).MII interface received signal sequential supposes that EOF makes mistakes as shown in Figure 5, and the RX_ER signal among Fig. 5 can be in the last indication of RX_DV so, but not indicates in the centre.(RX_ER makes mistakes, cause RX_DV invalid, can not normal read) according to Fig. 4, MAC layer chip received after the signal that receives wrong indication, can lose whole Frame, this will make and utilize the Ethernet of existing 10Base-T standard code can't be in the coaxial splitter transmission over networks of broadcasting and TV.
Summary of the invention
The embodiment of the invention provides a kind of ethernet frame end mark processing method and equipment, and under the situation about descending with the EOF signal transmission quality that guarantees physical layer, the MAC layer is the normal transmission Ethernet data also.
The embodiment of the invention provides a kind of ethernet mac layer chip, comprise service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, and described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, obtain the data that receive from described physical chip by described physical layer receiver module, be used to shield error indication signal from physical chip, directly all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
Described reception data processing module specifically comprises:
The syndrome module is used for the Frame from physical chip is carried out sequence check;
Rub-out signal shielding submodule is used for shielding and receives error indication signal, makes described syndrome module carry out sequence check to all Frames.
The present invention also provides a kind of ethernet mac layer chip, comprise service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, and described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip, and shielding error indication signal wherein;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, be used for all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
Described physical layer receiver module specifically comprises:
Interface sub-module is used to receive the data from physical chip;
Receive data enable and keep submodule, be used for shielding the error indication signal of described data, and other data in the data are normally passed through.
Described reception data enable keeps submodule when receiving the data that comprise error indication signal, and it is invalid that the reception error in data indication pin among the Media Independent Interface MII that will be connected with physical chip is changed to, and shields described error indication signal.
The present invention also provides a kind of Ethernet data transmitting device, comprises physical chip and MAC layer chip, and described physical chip is used to connect coaxial network, and described MAC layer chip carries out data forwarding by MII and described physical chip; Described MAC layer chip comprises service specific convergence sublayer and common part sublayer, and described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, and described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, obtain the data that receive from described physical chip by described physical layer receiver module, be used to shield error indication signal from physical chip, directly all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
Described reception data processing module specifically comprises:
The syndrome module is used for the Frame from physical chip is carried out sequence check;
Rub-out signal shielding submodule is used for shielding and receives error indication signal, makes described syndrome module carry out sequence check to all Frames.
The present invention also provides a kind of Ethernet data transmitting device, comprises physical chip and MAC layer chip, and described physical chip is used to connect coaxial network, and described MAC layer chip carries out data forwarding by MII and described physical chip; Described MAC layer chip comprises service specific convergence sublayer and common part sublayer, and described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, and described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip, and shielding error indication signal wherein;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, be used for all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
Described physical layer receiver module specifically comprises:
Interface sub-module is used to receive the data from physical chip;
Receive data enable and keep submodule, be used for shielding the error indication signal of described data, and other data in the data are normally passed through.
Described reception data enable keeps submodule when receiving the data that comprise error indication signal, will to indicate pin to be changed to invalid with the reception error in data among the MII that physical chip is connected, shield described error indication signal.
The present invention also provides a kind of Ethernet data transmitting method, is applied to said method comprising the steps of in the coaxial Ethernet transmission system:
Reception is from the data that comprise error indication signal and Frame of physical chip;
Shield the error indication signal in the described data;
All Frames are carried out sequence check, and after verification is correct, be forwarded to high level by the service specific convergence sublayer in the MAC chip;
Described shielding specifically comprises from the error indication signal of physical chip:
Shield described error indication signal by the reception data processing module in the MAC layer chip.
Described reception data processing module is realized by being arranged at the rub-out signal shielding submodule that receives in the data processing module the shielding of error indication signal.
Described shielding specifically comprises from the error indication signal of physical chip:
Shield described error indication signal by the physical layer receiver module.
Describedly shield described error indication signal by the physical layer receiver module and be specially:
It is invalid to be changed to the reception error in data indication pin among the MII that physical chip is connected, shields described error indication signal.
In the embodiments of the invention, the situation that the EOF signal transmission quality descends in the physical layer transmission data, the shielding of MAC layer receives data error signal, make the reception data carry out frame check, if verification is correct, determine that then this Frame is normal, continues subsequent treatment, thereby guarantees normally to communicate transmission on the coaxial splitter network of broadcasting and TV.
Description of drawings
Fig. 1 is an ethernet physical layer coding structure schematic diagram in the prior art;
Fig. 2 is a transmitting pin spectrogram of the prior art;
Fig. 3 is actual measurement EOF transmitted waveform figure in the prior art;
Fig. 4 is physical chip and a MAC layer chip MII interface signal connection diagram in the prior art;
Fig. 5 is that physical chip receives transmitted waveform figure under the error situation in the prior art;
Fig. 6 is a kind of Ethernet data transmitting device structure chart in the embodiment of the invention;
Fig. 7 is MAC layer chip structure figure in the embodiment of the invention;
Fig. 8 is from the data frame structure figure of physical chip in the embodiment of the invention;
Fig. 9 is a kind of MAC layer chip structure figure in the embodiment of the invention;
Figure 10 changes the schematic diagram that receives error in data indication pin connection status in the embodiment of the invention.
Embodiment
Core concept of the present invention is: the wrong error indication signal of MAC layer chip shielding physical layer, directly the Frame from physical layer is carried out the frame check sequence verification, when verification is correct, be defined as normal data frames, carry out subsequent treatment, when check errors, then be defined as the abnormal data frame, it is abandoned.Avoided in the prior art,, made MAC layer chip mistake delete normal data frames because of the mistake indication that the physical layer signal transmission quality descends and produces by mistake.
Be elaborated below in conjunction with specific embodiment.
The invention provides a kind of Ethernet data transmitting device, as shown in Figure 6, comprise physical chip and MAC layer chip, described physical chip is used to connect coaxial network, and described MAC layer chip carries out data forwarding by MII and described physical chip.MAC layer chip is connected by the MII interface with physical chip, comprise data-interface, and the management interface between MAC layer chip and the physical chip, data-interface comprises two independent channels that are respectively applied for transmission and receive, every channel all has data, clock and the control signal of oneself.
Described MAC layer chip as shown in Figure 7, comprise service specific convergence sublayer 100 and common part sublayer 200, service specific convergence sublayer 100 is positioned on the common part sublayer 200, be used to receive the business datum that comes from high level, and these data encapsulation are become business packet, so that can reverting to high layer information with these business packet, recipient's service specific convergence sublayer is transmitted to high level.Common part sublayer 200 common part sublayers are cores of MAC layer, comprise the foundation of framing, allocated bandwidth, fail safe, link and maintenance etc.Framing is that the business packet of service specific convergence sublayer 100 encapsulation configuration frame is passed to physical layer then; Allocated bandwidth is how with the bandwidth resource allocation of the broadband fixed wireless Access Network different business to the different user station; Fail safe is the intrusion that prevents that the disabled user from standing; Link establishment and maintenance are to set up communication link between subscriber station and base station, and safeguard this link.
Wherein, common part sublayer 200 specifically comprises: physical layer receiver module 210 is used for receiving the data that comprise error indication signal and Frame from physical chip; Operation layer sending module 220 is used for sending specific transactions to service specific convergence sublayer 100; Data processing module 230, obtain the data that receive from described physical chip by physical layer receiver module 210, be used to shield error indication signal from physical chip, directly all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer forwarding module.Because the present invention relates generally to the processing from the receiving data frames of physical chip, therefore only mentioned the receiving unit in the MAC layer chip, but in fact, also should comprise in the MAC layer chip to physical chip and send section data, that is: the operation layer receiver module 240, be used for receiving data from service specific convergence sublayer 100, carry out the data processing of relevant sending direction by data processing module 230 after, send to physical chip by physical layer sending module 250.
Wherein, data processing module 230 specifically comprises: syndrome module 231 is used for the Frame from physical chip is carried out sequence check; Rub-out signal shielding submodule 232 is used for shielding and receives error indication signal, makes described syndrome module carry out sequence check to all Frames.Because when the physical layer transmission signal quality descends in the prior art, can produce error indication signal and give MAC layer chip, make the reception data enable signal invalid, cause MAC layer chip to carry out directly these data being abandoned before the frame sequence verification, therefore, can be constant among this embodiment to the interface of MAC layer chip, only in data processing module, increase rub-out signal shielding submodule 232, the Frame of 231 pairs of all receptions of syndrome module is all handled.
Wherein from the Frame of physical chip as shown in Figure 8, comprising: Preamble (Pre), 7 bytes, 1 and 0 uses alternately in the Pre field, and the recipient knows the importing frame by this field.SFD (Start-of-Frame Delimiter, frame decollator), 1 byte, 1 and 0 uses alternately in the field, ending be two continuous 1, the expression next bit is the repeated use position that utilizes the repeated use byte of destination address.DA (Destination Address, destination address), 6 bytes are used to discern the target that needs received frame.SA (Source Addresses, source address), 6 bytes are used to discern the source of transmit frame.Length/Type, 2 bytes, if when adopting Optional Form component frame structure, this field had both represented to be included in the MAC client data size in the frame data field, also represented frame type ID.Data (data) is the arbitrary value sequence of one group of n (46=＜n=＜1500) byte, and frame total value minimum is 64 bytes.FCS (Frame Check Sequence, frame check sequence), 4 bytes comprise 32 cyclic redundancy check value, are generated by transmit leg MAC layer chip, calculate with the ruined frame of verification by recipient MAC layer chip.
In the another embodiment of the present invention, existing data processing module 230 is not changed, but by changing the shielding that physical layer receiver module 210 is realized error indication signal, as shown in Figure 9.The physical layer receiver module specifically comprises: interface sub-module 212 is used to receive the data from physical chip; Receive data enable and keep submodule 211, be used for the error indication signal of shadow data, and other data in the data are normally passed through.
Receiving data enable maintenance submodule also can be on MAC layer chip, realize with the reception error in data indication pin among the MII that physical chip is connected, specifically as shown in figure 10, to receive error in data indication pin RX_ER and physical chip disconnects, and by pull down resistor ground connection, (it is invalid to establish the RX_ER low level among this embodiment to make this pin signal remain low level, expression receives data does not have mistake, allow MAC layer chip receiving data frames), certainly, if if RX_ER acquiescence high level is invalid in the MAC layer chip, then this pin need be received power supply by pull-up resistor.
In addition, though provided data processing module 230 and physical layer receiver module 210 difference improved plans in the foregoing description, if it is suitable simultaneously that it is combined.
The present invention also provides a kind of Ethernet data transmitting method, is applied to said method comprising the steps of in the coaxial Ethernet transmission system:
Step s101 receives the data that comprise error indication signal and Frame from physical chip, and shields the error indication signal in these data.Wherein, wherein shielding reception error indication signal can realize by software at MAC layer chip internal, for example, by the reception data processing module in the MAC layer chip error indication signal is shielded.Also can be on MAC layer chip, shield described error indication signal by the physical layer receiver module, for example, with MII that physical chip is connected in reception error in data indication pin realize, to receive error in data indication pin RX_ER and physical chip disconnects, and by pull down resistor ground connection, (it is invalid to establish the RX_ER low level among this embodiment to make this pin signal remain low level, expression receives data does not have mistake, allow MAC layer chip receiving data frames), certainly, if if RX_ER acquiescence high level is invalid in the MAC layer chip, then this pin need be received power supply by pull-up resistor.
Step s102 directly carries out sequence check to all Frames, and after verification is correct, is defined as normal data frames, and is forwarded to high level by the service specific convergence sublayer in the MAC chip.When check errors, then be defined as the abnormal data frame, it is abandoned.
Through the above description of the embodiments, those skilled in the art can be well understood to the present invention and can realize by the mode that software adds essential general hardware platform, can certainly pass through hardware, but the former is better execution mode under a lot of situation.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium, comprise that some instructions are with so that a computer equipment (can be a personal computer, server, the perhaps network equipment etc.) carry out the method for each embodiment of the present invention.
More than disclosed only be several specific embodiment of the present invention, still, the present invention is not limited thereto, any those skilled in the art can think variation all should fall into protection scope of the present invention.
Claims (14)
1. ethernet mac layer chip, comprise service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, it is characterized in that described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, obtain the data that receive from described physical chip by described physical layer receiver module, be used to shield error indication signal from physical chip, directly all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
2. ethernet mac layer chip according to claim 1 is characterized in that described reception data processing module specifically comprises:
The syndrome module is used for the Frame from physical chip is carried out sequence check;
Rub-out signal shielding submodule is used for shielding and receives error indication signal, makes described syndrome module carry out sequence check to all Frames.
3. ethernet mac layer chip, comprise service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, is used for described common part sublayer and high level data and transmits, it is characterized in that described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip, and shielding error indication signal wherein;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, be used for all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
4. as ethernet mac chip as described in the claim 3, it is characterized in that described physical layer receiver module specifically comprises:
Interface sub-module is used to receive the data from physical chip;
Receive data enable and keep submodule, be used for shielding the error indication signal of described data, and other data in the data are normally passed through.
5. as ethernet mac layer chip as described in the claim 4, it is characterized in that, described reception data enable keeps submodule when receiving the data that comprise error indication signal, it is invalid that reception error in data indication pin among the Media Independent Interface MII that will be connected with physical chip is changed to, and shields described error indication signal.
6. an Ethernet data transmitting device comprises physical chip and MAC layer chip, and described physical chip is used to connect coaxial network, and described MAC layer chip carries out data forwarding by MII and described physical chip; Described MAC layer chip comprises service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, be used for described common part sublayer and high level data and transmit, it is characterized in that described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, obtain the data that receive from described physical chip by described physical layer receiver module, be used to shield error indication signal from physical chip, directly all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
7. as Ethernet data transmitting device as described in the claim 6, it is characterized in that described reception data processing module specifically comprises:
The syndrome module is used for the Frame from physical chip is carried out sequence check;
Rub-out signal shielding submodule is used for shielding and receives error indication signal, makes described syndrome module carry out sequence check to all Frames.
8. an Ethernet data transmitting device comprises physical chip and MAC layer chip, and described physical chip is used to connect coaxial network, and described MAC layer chip carries out data forwarding by MII and described physical chip; Described MAC layer chip comprises service specific convergence sublayer and common part sublayer, described service specific convergence sublayer is positioned on the common part sublayer, be used for described common part sublayer and high level data and transmit, it is characterized in that described common part sublayer specifically comprises:
The physical layer receiver module is used for receiving the data that comprise error indication signal and Frame from physical chip, and shielding error indication signal wherein;
The operation layer sending module is used for sending specific transactions to described service specific convergence sublayer;
Receive data processing module, be used for all Frames from physical chip are carried out sequence check, and after verification is correct, be forwarded to described service specific convergence sublayer by described operation layer sending module.
9. as Ethernet data transmitting device as described in the claim 8, it is characterized in that described physical layer receiver module specifically comprises:
Interface sub-module is used to receive the data from physical chip;
Receive data enable and keep submodule, be used for shielding the error indication signal of described data, and other data in the data are normally passed through.
10. as Ethernet data transmitting device as described in the claim 9, it is characterized in that, described reception data enable keeps submodule when receiving the data that comprise error indication signal, it is invalid to be changed to the reception error in data indication pin among the MII that physical chip is connected, shields described error indication signal.
11. an Ethernet data transmitting method is applied to it is characterized in that in the coaxial Ethernet transmission system, said method comprising the steps of:
Reception is from the data that comprise error indication signal and Frame of physical chip;
Shield the error indication signal in the described data;
All Frames are carried out sequence check, and after verification is correct, be forwarded to high level by the service specific convergence sublayer in the MAC chip;
Described shielding specifically comprises from the error indication signal of physical chip:
Shield described error indication signal by the reception data processing module in the MAC layer chip.
12., it is characterized in that described reception data processing module is realized by being arranged at the rub-out signal shielding submodule that receives in the data processing module the shielding of error indication signal as Ethernet data transmitting method as described in the claim 11.
13., it is characterized in that described shielding specifically comprises from the error indication signal of physical chip as Ethernet data transmitting method as described in the claim 11:
Shield described error indication signal by the physical layer receiver module.
14. as Ethernet data transmitting method as described in the claim 13, it is characterized in that, describedly shield described error indication signal by the physical layer receiver module and be specially:
It is invalid to be changed to the reception error in data indication pin among the MII that physical chip is connected, shields described error indication signal.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1599369A (en) * | 2003-09-16 | 2005-03-23 | 华为技术有限公司 | Physical address conversion device and conversion method |
| CN1764182A (en) * | 2004-10-22 | 2006-04-26 | 华为技术有限公司 | Multi protocol processing chip and multi protocol processing apparatus |
| CN101018101A (en) * | 2006-02-10 | 2007-08-15 | 华为技术有限公司 | Data transmission method and system and data transmission and receiving device |
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