CN101131523A - Electronic Ink Display Panel - Google Patents

Abstract

An electronic ink display panel. The electronic ink display panel is provided with a dielectric layer with a thickness of about 1 to 4 μm above the bottom gate thin film transistor to shield the influence of noise on the bottom gate thin film transistor, the scanning wiring and the data wiring on the pixel electrode. Therefore, the display quality of the electronic ink display panel can be improved.

Description

Electronic Ink Display Panel

technical field

The present invention relates to a display panel, and in particular to an electronic ink display panel.

Background technique

The electronic ink display device was first developed in the 1970s. Its characteristic is to contain a charged ball. One side of the ball is white and the other side is black. When the electric field is changed, the ball will rotate up and down to show different colors. The second-generation electronic ink display device was developed in the 1990s. It is characterized by microcapsules instead of traditional balls, and the capsules are filled with colored oil and charged white particles. Through the control of the external electric field, the white particles move up or down. When the white particles go up (close to the direction of the reader), they show white, and when they go down (away from the direction of the reader), they show white. The color of the oil.

Because electronic paper has the advantages of paper-like readability (high contrast ratio), extremely low power consumption, flexibility, lightness, and ease of carrying, etc., electronic ink displays have become a popular choice for applications such as PDAs, mobile phones, and e-readers. Or any information-intensive, portable device solution for applications requiring high readability in dynamic lighting environments.

Contents of the invention

Therefore, one of the objectives of the present invention is to provide an electronic ink display panel. In this electronic ink display panel, the thickness of the dielectric layer disposed between the bottom gate thin film transistor and the pixel electrode is used to shield the noise generated from the circuit under the pixel electrode, so as to reduce the bottom gate thin film transistor, scan distribution The influence of the signal on the line and the data wiring on the pixel electrode. Therefore, the display quality of the electronic ink display panel can be improved.

According to the above object of the present invention, an electronic ink display panel is proposed. The electronic ink display panel includes an active element array substrate, an opposite substrate and an electronic ink display medium. The active element array substrate includes a substrate, a plurality of scanning wiring lines, a plurality of data wiring lines and a plurality of pixel structures. The scan wires and the data wires are arranged on the substrate, and are respectively electrically connected with the pixel structure to drive the pixel structure. Each pixel structure includes a bottom gate thin film transistor, a dielectric layer and a pixel electrode. Wherein the bottom gate thin film transistor includes a gate, a source and a drain. The gate is electrically connected to the scanning wiring, and the source is electrically connected to the data wiring. The dielectric layer is disposed above the bottom gate TFT. The dielectric layer has a thickness between 1-4 μm and has a contact window to expose part of the surface of the drain of the bottom gate TFT. The pixel electrode is disposed on the dielectric layer and electrically connected to the drain through the contact window. The opposite substrate corresponds to the configuration of the active device array substrate. The electronic ink display medium is disposed between the active device array substrate and the opposite substrate.

In a preferred embodiment, the dielectric layer covers the scan wiring and the data wiring. The pixel electrode completely covers its corresponding bottom gate thin film transistor, and also covers the data wiring electrically connected thereto. In another preferred embodiment, the pixel electrodes can also cover the scan lines electrically connected thereto. In yet another preferred embodiment, the pixel electrode can even cover adjacent scan lines and/or data lines that are not electrically connected to it.

In the present invention, a dielectric layer with a thickness of about 1-4 μm is arranged between the bottom gate thin film transistor of the active element array substrate and the pixel electrode covering it. The thickness of the dielectric layer is used to shield the noise generated from the circuit below, so as to reduce the influence of the signals on the bottom gate thin film transistor, the scan wiring and the data wiring on the pixel electrode. Therefore, the display quality of the electronic ink display panel can be improved. In addition, the thickness of the dielectric layer also helps to improve the flatness of the entire active device array substrate.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

Description of drawings

FIG. 1A is a top view of an active element array substrate of an electronic ink display panel of the present invention.

FIG. 1B is a cross-sectional view of the electronic ink display panel shown in FIG. 1A along line A-A'.

FIG. 1C is a schematic structural diagram of an electronic ink display panel according to another embodiment.

Detailed ways

FIG. 1A is a top view of an active element array substrate of an electronic ink display panel according to an embodiment of the present invention. FIG. 1B is a cross-sectional view of the electronic ink display panel shown in FIG. 1A along line A-A'. Only one pixel of the display panel is shown in FIG. 1A and FIG. 1B for illustration. Please refer to FIG. 1B , the electronic ink display panel 200 of the present invention mainly includes an active device array substrate 210 , a pair of facing substrates 220 and a display medium 230 . The structure of each element in the electronic ink display panel 200 and the relationship among the elements will be described below with illustrations.

Please refer to FIG. 1A and FIG. 1B at the same time, the active device array substrate 210 includes a substrate 211 , a plurality of scanning lines 212 , a plurality of data lines 213 and a plurality of pixel structures 214 . The substrate 211 can be a glass substrate, a plastic substrate or other substrates. The scan wires 212 and the data wires 213 are generally arranged on the substrate 211 perpendicular to each other. The pixel structures 214 are arranged in a matrix to define a pixel area P, and are electrically connected to the corresponding scan lines 212 and data lines 213 to be driven by the scan lines 212 and the data lines 213 . Each pixel structure 214 includes a bottom gate thin film transistor 2141 , a dielectric layer 2142 and a pixel electrode 2143 .

The bottom gate TFT 2141 includes a gate 2141a, a gate insulating layer 2141b, a channel layer 2141c, a source 2141d and a drain 2141d'. The gate 2141 a is disposed on the substrate 211 and is electrically connected to the scan wiring 212 . The gate insulating layer 2141b is disposed on the substrate 211 and covers the gate 2141a. The channel layer 2141c is disposed on the gate insulating layer 2141b corresponding to the gate 2141a. The source electrode 2141d and the drain electrode 2141d' are located on both sides of the channel layer 2141c. The source electrode 2141d is electrically connected to the data wiring 213 . A protective layer 2141e can be selectively formed on the bottom gate thin film transistor 2141, the scan wiring 212 and the data wiring 231 to protect the underlying elements from damage and moisture. The protection layer 2141e is generally made of silicon nitride (SixNy) or silicon oxide, and its thickness is mostly between thousands of angstroms.

A dielectric layer 2142 with a thickness of about 1-4 μm is disposed on the bottom gate thin film transistor 2141 . The dielectric layer 2142 covers the entire substrate 211 including the data wiring 212 and the scanning wiring 213. Noise interference on the wire 213 and the data wiring 213 forms an effective shield, so that the influence on the pixel electrode 2143 can be reduced to a negligible level. The thickness of the dielectric layer 2142 is a major feature of the present invention. Since the dielectric layer 2142 can effectively shield noise, it can improve the display quality of the electronic ink display panel of the present invention. In order to achieve such a thickness on the thin film transistor array substrate, the dielectric layer 2142 is made of photoresist material or resin material. When the dielectric layer 2142 is made of a photoresist material, the photoresist material can be directly patterned by a photolithography process to form the contact window 2142a.

There is a contact window 2142a in the dielectric layer 2142 to expose part of the surface of the drain 2141d' of the bottom gate TFT 2141. The pixel electrode 2143 is disposed on the dielectric layer 2142 . The pixel electrode 2143 is electrically connected to the drain 2141d' of the bottom gate TFT 2141 through the contact window 2142a in the dielectric layer 2142. The material of the pixel electrode 2143 is preferably indium tin oxide or indium zinc oxide. In this embodiment, the pixel electrode 2143 completely covers its corresponding bottom-gate TFT 2141 and also covers the data wiring 213 electrically connected thereto. In another embodiment, the pixel electrode 2143 can also cover the scanning wire 212 electrically connected thereto. In yet another embodiment, the pixel electrode 2143 can even cover adjacent scan lines and/or data lines that are not electrically connected to it.

Please continue to refer to FIG. 1B , the opposite substrate 220 is configured corresponding to the active device array substrate 210 . The opposite substrate 220 includes a substrate 222 and a common electrode 224 . The common electrode 224 can be a transparent conductive layer. The display medium 230 is disposed between the active device array substrate 210 and the opposite substrate 220 .

The display medium 230 is at least bistable, and after the image is updated, the image signal will not disappear due to removal of the signal source. In this embodiment, the display medium 230 includes a plurality of ink particles 230a, one half of each ink particle 230a is bright, and the other half is dark, and each has a different electrical property. When the electric field between the pixel electrode 2143 and the common electrode 224 changes, the ink particles 230a in the display medium 230 will be driven, so that the electronic ink display panel 200 displays images.

Of course, the display medium 230 is not limited to the above-mentioned types. FIG. 1C is a schematic structural diagram of an electronic ink display panel in another embodiment. Please refer to FIG. 1C , in the electronic ink display panel 200' of this embodiment, the display medium 230 includes a plurality of dark particles 2323, a plurality of bright particles 2322 and a transparent fluid 2321. Wherein, the dark particles 2323 and bright particles 2322 are distributed in the transparent fluid 2321 , and each has a different electrical property. When the electric field between the pixel electrode 2143 and the common electrode 224 changes, the dark particles 2323 and the bright particles 2322 move up or down according to the direction of the electric field, so that each pixel displays different particle colors. In another embodiment, the display medium 230 includes a plurality of color-developing particles with a single charge, suspended in a color-developing liquid, and the color-developing particles with a single charge are distributed upward or downward under the action of different electric fields, according to Displays the color of chromogenic particles or chromogenic liquid.

In a further embodiment, the display medium 230 can be surrounded by a plurality of microcapsules (microcapsule); in another embodiment, the display medium 230 is placed within the range of a plurality of microgrooves (microcup); in one implementation In one example, the display medium 230 can move in the active area without being restricted by the lateral structures; in other embodiments, the display medium 230 can be matched with various architectural configurations. The present invention does not impose any limitation on the type of the display medium 230 and its configuration structure.

To sum up, in the electronic ink display panel of the present invention, a dielectric layer with a thickness of about 1-4 μm is disposed between the bottom gate thin film transistor of the active element array substrate and the pixel electrodes covering it. The dielectric layer can shield the signal interference from the bottom gate thin film transistor, scanning wiring and data wiring, so as to minimize the impact on the pixel electrode. Therefore, the display quality of the electronic ink display panel can be improved. In addition, the thickness of the dielectric layer also helps to make the surface of the active device array substrate more flat.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person familiar with the art may make various equivalent changes or substitutions without departing from the spirit and scope of the present invention. Therefore The scope of protection of the present invention shall prevail as defined by the appended claims of the application.

Claims (10)

1. electronic ink display panel comprises:

One active component array base board comprises:

One substrate;

Plurality of scanning wirings and many data wirings are arranged on this substrate;

A plurality of dot structures are electrically connected to described data wiring and described scan wiring respectively, and to drive by described data wiring and described scan wiring, each described dot structure comprises:

One bottom gate thin film transistor comprises a grid, one source pole and a drain electrode, and wherein this grid is electrically connected at one of described scan wiring, and this source electrode is electrically connected at one of described data wiring;

One dielectric layer is disposed at the top of this bottom gate thin film transistor, and this dielectric layer has a contact hole, and exposing the part surface of this drain electrode, and the thickness of this dielectric layer is between 1～4 μ m.

One pixel electrode is disposed on this dielectric layer, and this pixel electrode electrically connects by this contact hole and this drain electrode;

One subtend substrate, it is corresponding to this active component array base board configuration; And

One electric ink show media, it is disposed between this active component array base board and this subtend substrate.

2. electronic ink display panel as claimed in claim 1 is characterized in that this active component array base board also comprises a protective seam, to cover this bottom gate thin film transistor and described scan wiring and data wiring.

3. electronic ink display panel as claimed in claim 2 is characterized in that this protective seam is made of a silicon nitride material or silicon monoxide material.

4. electronic ink display panel as claimed in claim 1 is characterized in that this dielectric layer is made of a photoresist or a resin material.

5. electronic ink display panel as claimed in claim 1 is characterized in that this dielectric layer covers described data wiring and described scan wiring.

6. electronic ink display panel as claimed in claim 5 is characterized in that each described pixel electrode is covered in this data wiring with its electric connection.

7. electronic ink display panel as claimed in claim 5 is characterized in that each described pixel electrode is covered in this scan wiring with its electric connection.

8. electronic ink display panel as claimed in claim 5 is characterized in that each described pixel electrode is covered in this data wiring of electrical unconnected vicinity with it.

9. electronic ink display panel as claimed in claim 5 is characterized in that each described pixel electrode is covered in this scan wiring of electrical unconnected vicinity with it.

10. electronic ink display panel as claimed in claim 1 is characterized in that each described pixel electrode hides its pairing this bottom gate thin film transistor fully.

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