CN101106101A - Single-damascene structure, dual-damascene structure and method for forming opening of single-damascene structure and dual-damascene structure - Google Patents

Abstract

A method for forming a single damascene opening includes providing a substrate having a conductive line formed therein. Then, a barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a bottom anti-reflection layer and a patterned photoresist layer are sequentially formed on the substrate. And then, directly removing the bottom anti-reflection layer, the silicon oxynitride layer and the metal hard mask layer which are not covered by the patterned photoresist layer until the surface of part of the dielectric layer is exposed. And finally, removing the patterned photoresist layer and the bottom anti-reflection layer. Then, the silicon oxynitride layer and the metal hard mask are used as masks, and part of the dielectric layer and part of the barrier layer are removed to form a damascene opening exposing the surface of the wire.

Description

Single damascene structure, double damascene structure and methods for forming openings thereof

technical field

The invention relates to a method for forming an interconnect structure and an opening thereof, in particular to a method for forming a single damascene structure and a double damascene structure and an opening thereof.

Background technique

With the advancement of semiconductor technology, the size of semiconductor components is also continuously reduced, and they enter the field of Deep Sub-Micron. When the integration of integrated circuits increases, the surface of the chip cannot provide enough area to make the required interconnection (Interconnect). , has become the method that VLSI technology must adopt.

Generally speaking, multiple interconnections are mostly formed by using a damascene process, including a single-damascene process or a dual-damascene process. Currently, the damascene process defines trenches (or openings) in the dielectric layer by first forming a titanium nitride (TiN) layer on the dielectric layer. Then, a photoresist layer having a trench (or opening) pattern is formed on the titanium nitride layer. Next, the trench (or opening) pattern of the photoresist layer is transferred to the titanium nitride layer. Next, a trench (or opening) is defined in the dielectric layer by using the titanium nitride layer having a trench (or opening) pattern as a hard mask. Moreover, due to the limitations of the photolithography process, a layer of plasma-enhanced oxide (PE-oxide) is usually formed on the titanium nitride layer in the damascene process to improve the process window. And the titanium nitride layer and the plasma-enhanced oxide layer are used as the hard mask layer in the damascene process.

However, there are still some issues to be solved in the damascene process. For example, before the step of defining trenches (or openings) in the dielectric layer, a second etching step is required to define trenches (or openings) in the hard mask layer. The so-called secondary etching step includes: the first etching step and the second etching step. Wherein, the first etching step is to use the photoresist layer as a mask to remove part of the plasma-enhanced oxide layer until the surface of the titanium nitride layer is exposed. The second etching step is to etch part of the titanium nitride layer until the surface of the dielectric layer is exposed. Therefore, the existing damascene process needs to go through quite a lot of steps to complete, and will consume a lot of process time (cycle time).

Contents of the invention

The object of the present invention is to provide a method for forming a single damascene opening, which can simplify process steps and save process time.

Another object of the present invention is to provide a single damascene structure, which can also simplify process steps and save process time.

Another object of the present invention is to provide a method for forming dual damascene openings, which can simplify process steps and save process time.

Another object of the present invention is to provide a dual damascene structure, which can simplify process steps and save process time.

The invention proposes a method for forming a single damascene opening. In this method, a substrate is provided first, and wires have been formed in the substrate. Then, a barrier layer, a dielectric layer, a metal hard mask layer, a silicon nitride oxide layer, a bottom anti-reflection layer and a patterned photoresist layer are sequentially formed on the substrate. Next, the bottom anti-reflection layer, the silicon oxynitride layer and the metal hard mask layer not covered by the patterned photoresist layer are directly removed to expose part of the surface of the dielectric layer. Afterwards, the patterned photoresist layer and the bottom anti-reflection layer are removed. Then, using the silicon oxynitride layer and the metal hard mask as a mask, part of the dielectric layer and part of the barrier layer are removed to form a damascene opening exposing the surface of the wire.

According to an embodiment of the present invention, in the above method for forming the single damascene opening, after forming the silicon oxynitride layer and before forming the bottom anti-reflection layer, a silicon oxide layer may also be formed. In another embodiment, a surface modification process may also be performed on the silicon oxynitride layer to form an oxide layer on the silicon oxynitride layer, wherein the surface modification process includes performing a plasma process with an oxygen-containing gas. According to an embodiment of the present invention, in the above method for forming the damascene opening, the material of the wire is copper, for example. The material of the metal hard mask layer is, for example, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W) or tungsten nitride (WN). The material of the dielectric layer is, for example, a low dielectric constant material.

The invention proposes a single damascene structure, which includes a substrate, a barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer and a conductor layer. Wherein, wires are arranged in the substrate. The barrier layer is on the substrate. A dielectric layer is on the barrier layer. A metal hard mask layer is on the dielectric layer. A silicon oxynitride layer is on the metal hard mask layer. Wherein, the silicon oxynitride layer, the metal hard mask layer, the dielectric layer and the barrier layer have inlaid openings exposing the surface of part of the wires. The conductor layer is disposed in the inlaid opening.

According to an embodiment of the present invention, the above-mentioned single damascene structure may further include a silicon oxide layer disposed on the silicon oxynitride layer. In another embodiment, an oxide layer may also be disposed on the silicon oxynitride layer.

According to an embodiment of the present invention, in the above single damascene structure, the material of the dielectric layer is, for example, a low dielectric constant material. The material of the metal hard mask layer is, for example, tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. The material of the wire is, for example, copper.

The invention proposes a method for forming dual damascene openings. In the method, a substrate is provided first, and a wire is formed in the substrate. Then, a barrier layer, a dielectric layer, a metal hard mask layer, a silicon nitride oxide layer, a first bottom anti-reflection layer and a first patterned photoresist layer are sequentially formed on the substrate. Next, the first bottom anti-reflection layer, the silicon oxynitride layer and the metal hard mask layer not covered by the first patterned photoresist layer are directly removed to form a first part of the surface of the dielectric layer exposed. Open your mouth. Afterwards, the first patterned photoresist layer and the first bottom anti-reflection layer are removed. Then, a second patterned photoresist layer is formed on the substrate to cover the silicon oxynitride layer and part of the dielectric layer. Then, using the second patterned photoresist layer as a mask, part of the dielectric layer is removed to form a second opening in the dielectric layer. Next, the second patterned photoresist layer is removed. Subsequently, using the silicon oxynitride layer and the metal hard mask layer as a mask, part of the dielectric layer and part of the barrier layer are removed to form a dual damascene opening exposing the surface of the wire.

According to an embodiment of the present invention, in the above-mentioned method for forming the dual damascene opening, after forming the silicon oxynitride layer and before forming the first bottom anti-reflection layer, a silicon oxide layer may also be formed. In another embodiment, a surface modification process may also be performed on the silicon oxynitride layer. An oxide layer is formed on the silicon oxynitride layer, wherein the surface modification process includes performing a plasma process with an oxygen-containing gas.

According to an embodiment of the present invention, in the above method for forming the dual damascene opening, the material of the wire is copper, for example. The material of the metal hard mask layer is, for example, tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. The material of the dielectric layer is, for example, a low dielectric constant material.

The present invention proposes a dual damascene structure, which includes a substrate, a barrier layer, a dielectric layer, a metal hard mask, a silicon oxynitride layer and a conductor layer. Wherein, wires are arranged in the substrate. The barrier layer is on the substrate. A dielectric layer is on the barrier layer. A metal hard mask layer is on the dielectric layer. A silicon oxynitride layer is on the metal hard mask layer. Wherein, the silicon oxynitride layer, the metal hard mask layer and the dielectric layer have dual damascene openings exposing the surfaces of the wires. The conductor layer is disposed in the dual damascene opening.

According to an embodiment of the present invention, the above-mentioned dual damascene structure may further include a silicon oxide layer disposed on the silicon oxynitride layer. In another embodiment, an oxide layer may also be disposed on the silicon oxynitride layer.

According to an embodiment of the present invention, in the aforementioned dual damascene structure, the material of the dielectric layer is, for example, a low dielectric constant material. The material of the metal hard mask layer is, for example, tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. The material of the wire is, for example, copper.

The method and structure of the present invention replace the existing plasma-enhanced oxide layer (PE-oxide) with a silicon oxynitride layer, and before the step of defining a trench (or opening) in the dielectric layer, only a single The etching step defines a pattern of trenches (or openings) in the hard mask layer. Therefore, the method and structure of the present invention can simplify process steps and save process time.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are described below in detail together with accompanying drawings.

Description of drawings

1A to 1D are structural cross-sectional schematic diagrams illustrating a process of forming a single damascene opening according to an embodiment of the present invention;

2A to 2G are structural cross-sectional schematic diagrams illustrating a formation process of a dual damascene opening according to an embodiment of the present invention.

Description of main component symbols

100: base

102: wire

104: barrier layer

106: Dielectric layer

108: metal hard mask layer

110: Silicon oxynitride layer

112: Bottom anti-reflection layer

114, 122: Patterned photoresist layer

116: Mosaic opening

118, 128: conductor layer

120, 121: ditches

123: opening pattern

124, 125: opening

126: Double inlay opening

Detailed ways

1A to FIG. 1D are schematic cross-sectional views of a process for forming a single damascene opening according to an embodiment of the present invention.

First, please refer to FIG. 1A , a substrate 100 is provided. A wire 102 has been formed in the substrate 100 , and the material of the wire 102 is copper, for example.

Next, please continue to refer to FIG. 1A , a barrier layer 104 , a dielectric layer 106 , a metal hard mask layer 108 , a silicon oxynitride layer 110 , a bottom antireflection layer 112 and a patterned photoresist are sequentially formed on the substrate 100 Agent layer 114.

Wherein, the material of the barrier layer 104 is, for example, silicon nitride (SiN) or other suitable materials, and its formation method is, for example, chemical vapor deposition. The barrier layer 104 can prevent copper surface oxidation and prevent copper from diffusing into the dielectric layer 106 . The dielectric layer 106 is, for example, a low dielectric constant dielectric layer, and the material of the low dielectric constant dielectric layer is, for example, a low dielectric constant material including inorganic materials, such as hydrogenated silicon sesquioxide (HSQ), fluorine-doped Silicon oxide (FSG), etc., and organic materials, such as polyarylene ether (Flare), aromatic hydrocarbon (SILK), polyarylene ether (Parylene), etc. The forming method of the dielectric layer 106 is, for example, chemical vapor deposition. In an embodiment, the dielectric layer 106 can also be composed of, for example, a low-k dielectric layer and an insulating layer. The material of the insulating layer is, for example, silicon oxide formed from tetraethoxysilane (TEOS) as a reactive gas source, and the forming method is, for example, chemical vapor deposition. The insulating layer can also be used as a chemical mechanical polishing stop layer to avoid possible polishing to the dielectric layer 106 during chemical mechanical polishing (CMP). The material of the metal hard mask layer 108 is, for example, tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride, and its formation method is, for example, chemical vapor deposition. The bottom anti-reflection layer 112 is, for example, an organic bottom anti-reflection layer or an inorganic bottom anti-reflection layer, wherein the formation method of the inorganic anti-reflection layer is, for example, chemical vapor deposition, and its material may include amorphous carbon film, silicon nitride, nitrogen Silicon oxide and titanium oxide etc.

In one embodiment, after the formation of the silicon oxynitride layer 110 and before the formation of the bottom anti-reflective layer 112, a silicon oxide layer (not shown) may be formed on the silicon oxynitride layer 110, so that the silicon oxynitride layer The refractive index (n) and dielectric constant (k) of layer 110 do not change with time.

In another embodiment, after the silicon oxynitride layer 110 is formed and before the bottom anti-reflective layer 112 is formed, the silicon oxynitride layer 110 may also be subjected to a surface modification process to form an oxide layer on the silicon oxynitride layer 110. layer (not shown) to maintain the refractive index and dielectric constant of the silicon oxynitride layer 110 . The surface modification process is, for example, performing a plasma process on the surface of the silicon oxynitride layer 110 with an oxygen-containing gas.

In particular, the silicon oxynitride layer 110 can reduce the reflected light of the underlying reflective material (metal hard mask layer 108 ), thus facilitating the photolithography process.

Then, referring to FIG. 1B , the bottom anti-reflective layer 112 , the silicon oxynitride layer 110 and the metal hard mask layer 108 not covered by the patterned photoresist layer 114 are directly removed until a part of the dielectric layer is exposed. 106 surfaces. In more detail, the method for directly removing the bottom anti-reflective layer 112, the silicon oxynitride layer 110 and the metal hard mask layer 108 not covered by the patterned photoresist layer 114 is completed by performing one etching process. , that is, only a single etching step is performed.

Then, referring to FIG. 1C , the patterned photoresist layer 114 and the bottom anti-reflective layer 112 are removed, for example, by performing an etching process. Afterwards, using the silicon oxynitride layer 110 and the metal hard mask layer 108 as a mask, part of the dielectric layer 106 and part of the barrier layer 104 are removed to form a damascene opening 116 exposing the surface of the wire 102 . As mentioned above, the method of removing part of the dielectric layer 106 and part of the barrier layer 104 is, for example, to first remove the dielectric layer 106 not covered by the silicon oxynitride layer 110 and the metal hard mask layer 108. The removal method is, for example, is to perform an etching process. Afterwards, the exposed barrier layer 104 is removed, for example, by performing an etching process.

Then, referring to FIG. 1D , the conductive layer 118 is filled in the damascene opening 116 , and excess metal is removed by chemical mechanical polishing (CMP) to form a single damascene structure. The material of the conductive layer 118 is, for example, metal material or polysilicon.

It is worth mentioning that before the step of defining the opening in the dielectric layer, the present invention only needs a single etching step to define the opening pattern in the hard mask layer, thus simplifying the process steps and saving process time .

Hereinafter, a single damascene structure formed by the method of the present invention will be described. Wherein, the materials of all the components have been described in the above-mentioned embodiments, so no more details are given here.

Referring to FIG. 1D again, the single damascene structure includes a substrate 100 , a barrier layer 104 , a dielectric layer 106 , a metal hard mask layer 108 , a silicon oxynitride layer 110 and a conductive layer 118 . Wherein, wires 102 are disposed in the substrate 100 . The barrier layer 104 is located on the substrate 100 . A dielectric layer 106 is located on the barrier layer 104 . Metal hard mask layer 108 is on dielectric layer 106 . A silicon oxynitride layer 110 is on the metal hard mask layer 108 . Wherein, the silicon oxynitride layer 110 , the metal hard mask layer 108 , the dielectric layer 106 and the barrier layer 104 have a damascene opening 116 exposing a portion of the surface of the wire 102 . The conductive layer 118 is disposed in the damascene opening 116 .

In an embodiment, the single damascene structure of the present invention may further include a silicon oxide layer (not shown), which is disposed on the silicon oxynitride layer 110 .

In another embodiment, the single damascene structure of the present invention may further include an oxide layer (not shown), which is disposed on the silicon oxynitride layer 110, and the oxide layer is made by performing a plasma process to treat nitrogen The surface of the silicon oxide layer 110 is modified. The functions of the above silicon oxide layer and the oxide layer are to maintain the refractive index and dielectric constant of the silicon oxynitride layer 110 so that they will not change with time.

2A to 2G are schematic cross-sectional flow diagrams of a method for forming dual damascene openings according to an embodiment of the present invention. In FIGS. 2A to 2G , the description of the same components as those in FIGS. 1A to 1D is omitted, and they are denoted by the same reference numerals.

First, please refer to FIG. 2A , a substrate 100 is provided. Wires 102 have been formed in the substrate 100 , and the material of the metal 102 is copper, for example.

Next, please continue referring to FIG. 2A , a barrier layer 104 , a dielectric layer 106 , a metal hard mask layer 108 , a silicon oxynitride layer 110 , a bottom anti-reflection layer 112 and a patterned photoresist are sequentially formed on the substrate 100. Agent layer 114.

In one embodiment, after the formation of the silicon oxynitride layer 110 and before the formation of the bottom anti-reflective layer 112, a silicon oxide layer (not shown) may be formed on the silicon oxynitride layer 110, so that the silicon oxynitride layer The refractive index and dielectric constant of layer 110 do not change with time.

In another embodiment, after the silicon oxynitride layer 110 is formed and before the bottom anti-reflective layer 112 is formed, the silicon oxynitride layer 110 may also be subjected to a surface modification process to form an oxide layer on the silicon oxynitride layer 110. layer (not shown) to maintain the refractive index and dielectric constant of the silicon oxynitride layer 110 . The surface modification process is, for example, performing a plasma process on the surface of the silicon oxynitride layer 110 with an oxygen-containing gas.

Next, referring to FIG. 2B , the bottom anti-reflective layer 112 , the silicon oxynitride layer 110 and the metal hard mask layer 108 not covered by the patterned photoresist layer 114 are directly removed to form a part of the dielectric layer exposed. Trench 120 on the surface of layer 106 .

Similarly, the silicon oxynitride layer 110 and the metal hard mask layer 108 can be removed using the same etching conditions, instead of using two methods as in the prior art because the material properties of the metal hard mask layer and the film layer on it are different. different etching process conditions. Therefore, the process steps can be simplified to save time, thereby increasing productivity.

Then, referring to FIG. 2C , the patterned photoresist layer 114 and the bottom anti-reflection layer 112 are removed. Afterwards, a patterned photoresist layer 122 is formed on the substrate 100 to cover the silicon oxynitride layer 110 and part of the dielectric layer 106 . The patterned photoresist layer 122 has an opening pattern 123 therein.

In one embodiment, before the patterned photoresist layer 122 is formed, a bottom anti-reflective layer (not shown) is formed on the substrate 100 to cover the silicon oxynitride layer 110 and the dielectric layer 106 .

Then, please refer to Figure 2D. Using the patterned photoresist layer 122 as a mask, a portion of the dielectric layer 106 is removed to form an opening 124 in the dielectric layer 106 .

Then, referring to FIG. 2E , the patterned photoresist layer 122 is removed. A method for removing the patterned photoresist layer 122 is, for example, performing an etching process.

Subsequently, referring to FIG. 2F , using the silicon oxynitride layer 110 and the metal hard mask layer 108 as a mask, part of the dielectric layer 106 and part of the barrier layer 104 are removed to expose the surface of the wire 102 to form a trench. 121 and opening 125. The trenches 121 and openings 125 are used as dual damascene openings 126 .

Afterwards, please refer to FIG. 2G , fill the conductive layer 128 in the dual damascene opening 126, and cooperate with chemical mechanical polishing to remove excess metal, so as to form wires in the trench 121 and plugs in the opening 125 respectively, and the wires Form a dual damascene structure with the plug. The material of the conductive layer 128 is, for example, metal material or polysilicon.

Hereinafter, the dual damascene structure formed by the method of the present invention will be described. Wherein, the materials of all the components have been described in the above-mentioned embodiments, so no more details are given here.

Referring to FIG. 2G again, the dual damascene structure mainly includes: a substrate 100 , a barrier layer 104 , a dielectric layer 106 , a metal hard mask layer 108 , a silicon oxynitride layer 110 and a conductor layer 128 . Wherein, wires 102 are disposed in the substrate 100 . The barrier layer 104 is located on the substrate 100 . A dielectric layer 106 is located on the barrier layer 104 . Metal hard mask layer 108 is on dielectric layer 106 . A silicon oxynitride layer 110 is on the metal hard mask layer 108 . Wherein, the silicon oxynitride layer 110 , the metal hard mask layer 108 and the dielectric layer 106 have a dual damascene opening 126 exposing a portion of the surface of the wire 102 . The conductive layer 128 is disposed in the dual damascene opening 126 .

In an embodiment, the dual damascene structure of the present invention may further include a silicon oxide layer (not shown), which is disposed on the silicon oxynitride layer 110 .

In another embodiment, the dual damascene structure of the present invention may further include an oxide layer (not shown), which is disposed on the silicon oxynitride layer 110, and the oxide layer is made by performing a plasma process to treat nitrogen The surface of the silicon oxide layer 110 is modified. The functions of the above silicon oxide layer and the oxide layer are to maintain the refractive index and dielectric constant of the silicon oxynitride layer 110 so that they will not change with time.

To sum up, before the step of defining the trench (or opening) in the dielectric layer, the present invention only needs a single etching step to define the pattern of the trench (or opening) in the hard mask layer. Therefore, the method and structure of the present invention can simplify process steps and save process time. On the other hand, the silicon oxynitride layer can also absorb reflected light from the metal hard mask layer, thereby facilitating the photolithography process.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection of the invention should be defined by the appended claims.

Claims (27)

1. A method for forming a single damascene opening, comprising: providing a substrate in which leads have been formed; sequentially forming a barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a bottom antireflective layer, and a patterned photoresist layer on the substrate; directly removing the bottom anti-reflective layer, the silicon oxynitride layer and the metal hard mask layer not covered by the patterned photoresist layer, to expose part of the surface of the dielectric layer; removing the patterned photoresist layer and the bottom anti-reflection layer; and Using the silicon oxynitride layer and the metal hard mask layer as a mask, part of the dielectric layer and part of the barrier layer are removed to form a damascene opening exposing the surface of the wire. 2. The method for forming a single damascene opening as claimed in claim 1, wherein after forming the silicon oxynitride layer and before forming the bottom antireflection layer, further comprising: forming a silicon oxide layer on the silicon oxynitride layer . 3. The method for forming a single damascene opening according to claim 1, wherein after forming the silicon oxynitride layer and before forming the bottom antireflection layer, further comprising: performing a surface modification process on the silicon oxynitride layer, An oxide layer is formed on the silicon oxynitride layer. 4. The method for forming a single damascene opening as claimed in claim 3, wherein the surface modification process comprises performing a plasma process with an oxygen-containing gas. 5. The method for forming a single damascene opening as claimed in claim 1, wherein a material of the metal hard mask layer comprises tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. 6. The method for forming a single damascene opening as claimed in claim 1, wherein a material of the dielectric layer comprises a low dielectric constant material. 7. The method for forming a single damascene opening as claimed in claim 1, wherein a material of the wire comprises copper. 8. A single damascene structure comprising: a base, the base is configured with wires; a barrier layer on the substrate; a dielectric layer on the barrier layer; a metal hard mask layer on the dielectric layer; a silicon oxynitride layer on the metal hard mask layer, wherein the silicon oxynitride layer, the metal hard mask layer, the dielectric layer, and the barrier layer have damascene openings exposing a portion of the surface of the wire; and The conductor layer is arranged in the inlaid opening. 9. The single damascene structure as claimed in claim 8, further comprising a silicon oxide layer disposed on the silicon oxynitride layer. 10. The single damascene structure as claimed in claim 8, further comprising an oxide layer disposed on the silicon oxynitride layer. 11. The single damascene structure as claimed in claim 8, wherein the material of the dielectric layer comprises a low dielectric constant material. 12. The single damascene structure of claim 8, wherein a material of the metal hard mask layer comprises tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. 13. The single damascene structure as claimed in claim 8, wherein a material of the wire comprises copper. 14. A method of forming a dual damascene opening, comprising: providing a substrate in which leads have been formed; sequentially forming a barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a first bottom anti-reflection layer and a first patterned photoresist layer on the substrate; directly removing the first bottom anti-reflection layer, the silicon oxynitride layer and the metal hard mask layer not covered by the first patterned photoresist layer to form an exposed part of the surface of the dielectric layer the first opening of removing the first patterned photoresist layer and the first bottom anti-reflection layer; forming a second patterned photoresist layer on the substrate, covering the silicon oxynitride layer and part of the dielectric layer; using the second patterned photoresist layer as a mask, removing part of the dielectric layer to form a second opening in the dielectric layer; removing the second patterned photoresist layer; and Using the silicon oxynitride layer and the metal hard mask layer as a mask, part of the dielectric layer and part of the barrier layer are removed to form a dual damascene opening exposing the surface of the wire. 15. The method for forming dual damascene openings according to claim 14, wherein after forming the silicon oxynitride layer and before forming the first bottom anti-reflective layer, further comprising: forming an oxide layer on the silicon oxynitride layer silicon layer. 16. The method for forming dual damascene openings as claimed in claim 14, wherein after forming the silicon oxynitride layer and before forming the first bottom anti-reflection layer, further comprising: performing surface modification on the silicon oxynitride layer quality process to form an oxide layer on the silicon oxynitride layer. 17. The method for forming a dual damascene opening as claimed in claim 16, wherein the surface modification process comprises performing a plasma process with an oxygen-containing gas. 18. The method for forming dual damascene openings according to claim 14, further comprising: forming a second bottom anti-reflection layer on the substrate to fill up the second patterned photoresist layer before forming the second patterned photoresist layer. The first opening covers the silicon oxynitride layer. 19. The method for forming dual damascene openings as claimed in claim 14, wherein a material of the metal hard mask layer comprises tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. 20. The method for forming dual damascene openings as claimed in claim 14, wherein the material of the dielectric layer comprises a low dielectric constant material. 21. The method for forming a dual damascene opening as claimed in claim 14, wherein a material of the wire comprises copper. 22. A dual damascene structure comprising: a base, the base is configured with wires; a barrier layer on the substrate; a dielectric layer on the barrier layer; a metal hard mask layer on the dielectric layer; and a silicon oxynitride layer on the metal hard mask layer, wherein the silicon oxynitride layer, the metal hard mask layer, the dielectric layer, and the barrier layer have dual damascene openings exposing a portion of the surface of the wire; and The conductor layer is configured in the dual damascene opening. 23. The dual damascene structure as claimed in claim 22, further comprising a silicon oxide layer disposed on the silicon oxynitride layer. 24. The dual damascene structure as claimed in claim 22, further comprising an oxide layer disposed on the silicon oxynitride layer. 25. The dual damascene structure as claimed in claim 22, wherein the material of the dielectric layer comprises a low dielectric constant material. 26. The dual damascene structure of claim 22, wherein a material of the metal hard mask layer comprises tantalum, tantalum nitride, titanium, titanium nitride, tungsten or tungsten nitride. 27. The dual damascene structure of claim 22, wherein a material of the wire comprises copper.

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