CN101075857A - Method for generating turbo-code block intersection and HARQ packet - Google Patents
Method for generating turbo-code block intersection and HARQ packet Download PDFInfo
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Abstract
The method comprises: the message packet is sent to a turbo code encoder with 1/3 code rate to generate a system bit-stream, a first even-odd check bit-stream and a second event-odd check bit-stream; wherein, the system bit-stream and the first even-odd check bit-stream uses the block interleavers which use 2M equaling lengths, based on bit-reversed order (BRO), and taken as column displacement function; bias delta of both block interleavers are zero; bias delta of the block interleaver of the second even-odd check bit-stream is not always zero. The invention also provides a cyclic buffer based turbo code HAQQ packet generation method.
Description
Technical field
The present invention relates to digital communication system, particularly relate to a kind of chnnel coding of digital communication system.
Background technology
The common transmitting terminal of digital communication system generally includes parts such as information source, source encoder, channel encoder and modulator, and receiving terminal generally includes demodulator, channel decoder, source decoder and the stay of two nights, as shown in Figure 1.Channel encoder is used for introducing redundant information according to certain rule so that the receiving terminal channel decoder can be corrected the error code that information takes place when the channel to a certain extent to information bit.The present invention improves the method for the rate-matched of channel encoder.
Usually the encoding block that information bit is divided into certain-length during the channel encoder coding is encoded, and the big more error-correcting performance of encoding block is good more usually, but cost is the increase of coding and decoding complexity and deciphers the increase of time of delay.So when the design channel encoder, must do a restriction to the size of maximum encoding block.Usually source encoder output block (be called burst below, normally send into the data block of physical layer from high level in wireless communication protocol stack) is bigger, must divide according to maximum coded block size when entering channel encoder.The size of burst satisfies the certain particle requirement usually, and system is at the size of the distributing burst integral multiple of Physical Resource Block beared information bit length normally.To allow the message length of each encoding block all be the integral multiple of Physical Resource Block beared information bit length in code block segmentation, each encoding block will be mapped in the integer complete Physical Resource Block at last.But the size of burst is not the integral multiple of maximum coded block size usually.We are that the minimum code piece of cutting apart generation is unlikely to too little usually to burst segmentation being become encoding block certain rule is set, because little encoding block performance is poor, will have a strong impact on the performance of whole burst.
In common digital communication system, in the time of the design coded modulation scheme, the modulation system (as QPSK, 16QAM and 64QAM etc.) and different sign indicating numbers (as convolution code, CTC etc.) of different rank are set usually, every kind of sign indicating number has different code check (Rate, as 1/2,2/3,3/4 and 5/6 etc.) usually.According to channel quality and business demand a kind of specific code modulation mode is arranged in each burst in the time of system call.In order to obtain the effect of better link adaptation, every kind of sign indicating number preferably can be accomplished smaller granularity in the conversion code check.If just with the bigger several code checks of spacing, as 1/2,2/3,3/4 and 5/6 etc., the granularity of its link adaptation is more coarse so.
For turbo sign indicating number commonly used in the digital communication system, its code check raising is to delete the coding that surplus (puncture) obtains higher code check by the female sign indicating number to low code check, and we also reduce this method rate-matched (Rate Matching, or RM).But for the turbo sign indicating number of 3GPP, system just must support various possibility code checks.
The circular buffering rate-matched input that the present invention proposes is identical with the input of Re1-6 rate-matched, the bit stream that produces comprising Turbo coding, bit rate output is that the 1/3turbo coding is divided into three data flow, the bit stream of corresponding systematic bits stream and two parity checks.Each of two component convolutional encodings produces a check bit stream, and 12 tail bits are evenly distributed on three data flow.The K bit information is delivered to the turbo coding, and the length that produces three data flow all is K '=K+4.
The circular buffering rate-matched
As substituting of 3GPP Re1-6 speed matching algorithm, provide a generation to have the simple method that good performance is deleted surplus pattern based on the rate-matched (circular buffer rate matching, CB RM) of cyclic buffer, as shown in Figure 2.In the circular buffering speed matching method, each data flow will be rearranged by block interleaver separately, is called as in the piece interweave (sub-blockinterleaver).Then, in single output buffer, the systematic bits after resetting is placed on the starting position, places the check bit data flow of two rearrangements subsequently alternately, be called as interblock and interweave.For the code check of expectation, can select N
DataIndividual coded-bit is as the input of rate-matched; The bit of circular buffering rate-matched is selected to read the N of front from the starting point of buffer
DataIndividual bit is called as bit and selects.Generally speaking, the bit that is selected for transmission can begin to be read out and from any one point of buffer.If arrive the end of buffer, can continue read data around starting position to buffer.So, by using simple method can realize deleting surplus and repeating.For the HARQ operation, cyclic buffer has the advantage of flexibility and granularity.
Redundancy versions (Xrv)
For the HARQ operation, the starting point that simple defining is different in circular buffering RM can be specified different redundancy versions (Xrv).So for the HARQ based on IR, use circular buffering RM can be so that orthogonal retransmission becomes easy.
Systematic bits is deleted surplus (systematic bits puncturing)
Generally speaking, for chnnel coding,, can think to begin sense data from the original position of systematic bits part when selecting initial redundancy versions based on CB.In other words, this will mean and will be selected for transmission for all systematic bits of any code check.In other words, only check bit is deleted surplus.But deleting some systematic bits can be so that more flexible based on the operation of CB, the performance of turbo sign indicating number when can also improve high code check.Just, systematic bits is deleted surplus (systematic bitspuncturing) can be applied to circular buffering rate-matched (circular buffer ratematching), as shown in Figure 3.Skip is meant and skips a part of systematic bits (General System bit 5%) that in transmission for the first time promptly this part systematic bits does not pass.
The piece interleaver
The piece interleaver can be based on bit reversal order (bit-reversal ordering, row-column interleaver BRO), it can make delete surplus (puncturing) can be more evenly to obtain needed code check.Systematic bits, the interleaver that the check bit of the check bit that first component code produces and second component code generation is equal to use.The step that specifically interweaves is as follows:
1, calculate M, and M will determine the row size of row-column interleaver, as 2
M
2, calculate J, as
And J will determine the row size of row-column interleaver.
3, this sequence that need interweave is write J * 2 from left to right from top to bottom
MMatrix in.
4, rearrange the matrix column number, establish original h row (h=0,1 ..., 2
M-1) become BROm (h) OK after rearranging, wherein BROm (h) expression h is through the number after the bit reversal.
5, the number that rearranges according to reading wherein symbol for a short time from from left to right going up.
In fact, above-mentioned interleaving process can be represented with following formula:
Here, j=0,1 ..., K '-1 and BRO
M(k) be the bit reversal function of the M bit form of input k.If ∏
B(j) greater than K, it will be skipped.
In 3GPP E-UTRA standard or LTE (Long term evolution), circular buffering rate-matched (CB RM) algorithm is used probably.Studies show that m to Effect on Performance and not obvious, select fixing m value can simplify hardware apparent in viewly.By research, it is 5 proper that m gets, and length is that 32 BRO will be as column permutation.Systematic bits stream, the general block interleaver that is equal to that uses of first Parity Check Bits stream and second Parity Check Bits stream.
Under the low code check, three algorithm performances that flow the circular buffering rate-matched of using the block interleaver that is equal to are better.But the coupling system bit is deleted poor-performing when surplus under high code check.
Summary of the invention
The objective of the invention is to, a kind of block interleaving and HARQ bag generation method of the turbo sign indicating number based on circular buffering are provided, by the offset distance of choice of dynamical second Parity Check Bits stream, algorithm performance that can significant improvement chnnel coding circular buffering rate-matched.
For solving the problems of the technologies described above, the invention provides a kind of block interleaving method of turbo sign indicating number, it is characterized in that:
Information block is delivered to 1/3 code check turbo code coder, produce the bit stream of a systematic bits stream and first, second parity check, wherein, systematic bits stream and first Parity Check Bits stream with use the length that is equal to as 2M will be based on bit reversal order BRO as the block interleaver of column permutation function, the skew δ of block interleaver is zero; The skew δ of the block interleaver of second Parity Check Bits stream does not always equal zero, promptly when choosing the δ value of second Parity Check Bits:
1) if actual bit rate R≤code check thresholding R
0, R for example
0=0.8, then be offset δ and equal 0 or do not adopt any skew;
2) if actual bit rate R＞code check thresholding R
0, then select to be not equal to 0 deviant δ according to code length k.
Further, code check thresholding R
0=0.8 or 4/5, at this moment, in above-mentioned steps 2) in, when code length k=1792 and 2112, δ=3; When k is not equal to 1792 and 2112, δ=1.
Further, code check thresholding R
0=5/6.
Further, the block interleaver of described systematic bits stream and first check bit stream is: ∏
Sys(j)=2
M. (jmodJ)+BRO
M(j/J), the block interleaver of second check bit stream is: ∏
P1(j)=(∏
Sys(j)+δ) %K ', wherein, K '=K+4, j are the orders of input block interleaver, the best value of M is 5.
The present invention also provides a kind of turbo sign indicating number HARQ bag generation method based on circular buffering, and described method comprises:
1), information block delivers to 1/3 code check turbo code coder, produces the bit stream of a systematic bits stream and first, second parity check;
2), each data flow will rearrange by block interleaver separately, carries out the branch block interleaving:
The length that systematic bits stream and first Parity Check Bits stream are equal to use is 2
MWill be based on bit reversal order BRO as the block interleaver of column permutation function, the skew δ of block interleaver is zero; The skew δ of the block interleaver of second Parity Check Bits stream does not always equal zero, promptly when choosing the δ value of second Parity Check Bits:
If a) actual bit rate R≤code check thresholding R
0, then be offset δ and equal 0 or do not adopt any skew;
B) if actual bit rate R＞code check thresholding R
0, then select to be not equal to 0 deviant δ according to code length k;
3), in single output buffer, the systematic bits after resetting is placed on the starting position, place the check bit data flow of two rearrangements subsequently alternately, carry out interblock and interweave;
4), for the code check of expectation, select N
DataIndividual coded-bit, constituting a code check is N
Data/ K transmission package is as the input of rate-matched.
Further, code check thresholding R
0=0.8 or 4/5, at this moment, in above-mentioned steps 2) b) in, when code length k=1792 and 2112, δ=3; When k is not equal to 1792 and 2112, δ=1.
Further, code check thresholding R
0=5/6.
Further, the block interleaver of described systematic bits stream and first check bit stream is: ∏
Sys(j)=2
M. (jmodJ)+BRO
M(j/J), the block interleaver of second check bit stream is: ∏
P1(j)=(∏
Sys(j)+δ) %K ', wherein, K '=K+4, j are the orders that input divides the interleaver of determining, the best value of M is 5.
The present invention is by the offset distance of choice of dynamical second Parity Check Bits stream, and under low code check, δ equals at 0 o'clock, and the algorithm performance of circular buffering rate-matched is better; δ takes the better performances of non-0 value under high code check.Therefore, the method that the present invention adopts has been taken into account the performance of high code check and low code check, makes the best performance of Turbo coding and decoding, algorithm performance that can significant improvement chnnel coding circular buffering rate-matched.
Description of drawings
Fig. 1 is the digital communication system structural representation;
Fig. 2 is the structure of circular buffering rate-matched;
Fig. 3 has systematic bits and deletes surplus circular buffering rate-matched.
Embodiment
For ease of profound understanding technology contents of the present invention, the present invention is described in detail below in conjunction with drawings and the specific embodiments.
Please in the lump referring to figs. 1 to Fig. 3.
The invention provides a kind of turbo sign indicating number HARQ bag generation method based on circular buffering.
1), information block delivers to 1/3 code check turbo code coder, produces the bit stream of a systematic bits stream and first, second parity check.Each all will produce a check bit stream in two component convolutional encodings, and 12 tail bits are evenly distributed on three data flow.The K bit information is delivered to the turbo coding, and the length that produces three data flow all is K '=K+4.
2), each data flow will rearrange by block interleaver separately, carries out the branch block interleaving.
The length that systematic bits stream and first Parity Check Bits stream are equal to use is 2
MBRO will be as the block interleaver of column permutation function, the skew of block interleaver all is δ=0.The skew δ of the block interleaver of second Parity Check Bits stream does not always equal 0.Details are as follows for this process:
The block interleaver of systematic bits stream is:
∏
sys(j)＝2
M.(jmodJ)+BRO
M(j/J)
Here, the M value is 5, and K length can be got any positive integer according to code block length, and j is the order of input block interleaver, j=0, and 1 ..., K '-1 and BRO
M(k) be the bit reversal function of the M bit form of input k.If ∏
B(j) greater than K, it will be skipped.Above-mentioned formulate, the data map of the preceding j position that interweaves is to the back ∏ that interweaves
Sys(j) on the position.
The block interleaver of first Parity Check Bits stream is:
∏
1(j)＝∏
sys(j) j＝0，1，…，K’-1
The block interleaver with skew of second Parity Check Bits stream is:
∏
P1(j)＝(∏
sys(j)+δ)％K′ j＝0，1，…，K’-1
If a) actual bit rate R≤code check thresholding R
0, as R
0=0.8, skew δ equals 0 or do not adopt any skew.
B) if actual bit rate R＞code check thresholding R
0, as R
0=0.8,
In the time of k=1792 and 2112, δ=3.
When k is not equal to 1792 and 2112, δ=1.
3), in single output buffer, the systematic bits after resetting is placed on the starting position, place the check bit data flow of two rearrangements subsequently alternately, carry out interblock and interweave.
4), for the code check of expectation, select 3K＞N
Data＞K coded-bit is as the input of rate-matched; The bit of circular buffering rate-matched is selected to read the N of front from the starting point of buffer
DataIndividual bit is called as bit and selects.The N of input
DataConstituting a code check is N
Data/ K transmission package.Generally speaking, the bit that is selected for transmission can begin to be read out and from any one point of buffer.If arrive the end of buffer, can continue read data around starting position to buffer.So, by using simple method can realize deleting surplus and repeating.
The present invention also provides a kind of block interleaving method of turbo sign indicating number, it is characterized in that:
Information block is delivered to 1/3 code check turbo code coder, produce the bit stream of a systematic bits stream and first, second parity check, each all will produce a check bit stream in two component convolutional encodings, and 12 tail bits are evenly distributed on three data flow.The K bit information is delivered to the turbo coding, and the length that produces three data flow all is K '=K+4.Wherein, the length that systematic bits flows and first Parity Check Bits stream is equal to use is 2
MWill be based on bit reversal order BRO as the block interleaver of column permutation function, the skew δ of block interleaver is zero; The skew δ of the block interleaver of second Parity Check Bits stream does not always equal zero, promptly when choosing the δ value of second Parity Check Bits:
1) if actual bit rate R≤code check thresholding R
0, then be offset δ and equal 0 or do not adopt any skew;
2) if actual bit rate R＞code check thresholding R
0, then select to be not equal to 0 deviant δ according to code length k.
Further, code check thresholding R
0=0.8, at this moment, in above-mentioned steps 2) in, when code length k=1792 and 2112, δ=3; When k is not equal to 1792 and 2112, δ=1.
Further, the block interleaver of described systematic bits stream and first check bit stream is: ∏
Sys(j)=2
M. (jmodJ)+BRO
M(j/J), the block interleaver of second check bit stream is: ∏
P1(j)=(∏
Sys(j)+δ) %K ', wherein, the best value of M is 5.
Can carry out conversion according to concrete execution mode on the selection of parameter of the δ of specific non-0 value of the correspondence of the BRO interleaver M among the present invention, code check thresholding, specific code block.For example: in another embodiment, code check thresholding R
0Be 5/6, other parameters are with first examples of implementation.We still get δ=0 for second check bit that code check is lower than thresholding.Be higher than this thresholding and get δ=1.So setting still can take into account the performance of height code check.
The present invention is by the offset distance of choice of dynamical second Parity Check Bits stream, and under low code check, δ equals at 0 o'clock, and the algorithm performance of circular buffering rate-matched is better; δ takes the better performances of non-0 value under high code check.Therefore, the method that the present invention adopts has been taken into account the performance of high code check and low code check, makes the best performance of Turbo coding and decoding, algorithm performance that can significant improvement chnnel coding circular buffering rate-matched.
Certainly, the present invention also can have other various embodiments, and those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (12)
1, a kind of block interleaving method of turbo sign indicating number is characterized in that:
Information block is delivered to 1/3 code check turbo code coder, produce the bit stream of a systematic bits stream and first, second parity check, wherein, the length that systematic bits stream and first Parity Check Bits stream are equal to use is 2
MWill be based on bit reversal order BRO as the block interleaver of column permutation function, the skew δ of block interleaver is zero; The skew δ of the block interleaver of second Parity Check Bits stream does not always equal zero, promptly when choosing the δ value of second Parity Check Bits:
1) if actual bit rate R≤code check thresholding R
0, then be offset δ and equal 0 or do not adopt any skew;
2) if actual bit rate R＞code check thresholding R
0, then select to be not equal to 0 deviant δ according to code length k.
2, method according to claim 1 is characterized in that: code check thresholding R
0=0.8 or 4/5.
3, method according to claim 2 is characterized in that: in above-mentioned steps 2) in, when code length k=1792 and 2112, δ=3; When k is not equal to 1792 and 2112, δ=1.
4, method according to claim 1 is characterized in that: code check thresholding R
0=5/6.
5, method according to claim 1 is characterized in that: the block interleaver of described systematic bits stream and first check bit stream is: ∏
Sys(j)=2
M(jmodJ)+BRO
M(j/J), the block interleaver of second check bit stream is: ∏
P1(j)=(∏
Sys(j)+δ) %K ', wherein, K '=K+4, j are the orders of input block interleaver.
6, method according to claim 5 is characterized in that: the best value of above-mentioned M is 5.
7, a kind of turbo sign indicating number HARQ bag generation method based on circular buffering, described method comprises:
1), information block delivers to 1/3 code check turbo code coder, produces the bit stream of a systematic bits stream and first, second parity check;
2), each data flow will rearrange by block interleaver separately, carries out the branch block interleaving,
The length that systematic bits stream and first Parity Check Bits stream are equal to use is 2
MWill be based on bit reversal order BRO as the block interleaver of column permutation function, the skew δ of block interleaver is zero; The skew δ of the block interleaver of second Parity Check Bits stream does not always equal zero, promptly when choosing the δ value of second Parity Check Bits:
If a) actual bit rate R≤code check thresholding R
0, then be offset δ and equal 0 or do not adopt any skew;
B) if actual bit rate R＞code check thresholding R
0, then select to be not equal to 0 deviant δ according to code length k;
3), in single output buffer, the systematic bits after resetting is placed on the starting position, place the check bit data flow of two rearrangements subsequently alternately, carry out interblock and interweave;
4), for the code check of expectation, select N
DataIndividual coded-bit, constituting a code check is N
Data/ K transmission package is as the input of rate-matched.
8, method according to claim 7 is characterized in that: code check thresholding R
0=0.8 or 4/5.
9, method according to claim 8 is characterized in that: in above-mentioned steps 2) b) in, when code length k=1792 and 2112, δ=3; When k is not equal to 1792 and 2112, δ=1.
10, method according to claim 7 is characterized in that: code check thresholding R
0=5/6.
11, method according to claim 7 is characterized in that: the block interleaver of described systematic bits stream and first check bit stream is: ∏
Sys(j)=2
M(jmodJ)+BRO
M(j/J), the block interleaver of second check bit stream is: ∏
P1(j)=(∏
Sys(j)+δ) %K ', wherein, K '=K+4, j are the orders of input block interleaver.
12, method according to claim 11 is characterized in that: the best value of above-mentioned M is 5.
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| CN1120594C (en) * | 2000-11-17 | 2003-09-03 | 北京邮电大学 | Authority bit inverse interlace device |
| CN1271791C (en) * | 2001-01-18 | 2006-08-23 | 深圳市中兴集成电路设计有限责任公司 | Turbo decoder and its implementing method |
| KR100770902B1 (en) * | 2004-01-20 | 2007-10-26 | 삼성전자주식회사 | An apparatus and method for generating and decoding error correction code of variable code rate for high speed wireless data system |
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