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CN101051643A - Semiconductor device - Google Patents

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Publication number
CN101051643A
CN101051643A CN 200710089090 CN200710089090A CN101051643A CN 101051643 A CN101051643 A CN 101051643A CN 200710089090 CN200710089090 CN 200710089090 CN 200710089090 A CN200710089090 A CN 200710089090A CN 101051643 A CN101051643 A CN 101051643A
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electrode
conductive portion
gate electrode
channel region
semiconductor device
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入口千春
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Seiko Epson Corp
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Seiko Epson Corp
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Abstract

半导体装置(21)具备多栅极结构,形成有具备下述区域的半导体层(23):相互分离的第一沟道区域(31)及第二沟道区域(32)、连接这两个沟道区域(31、32)的高浓度杂质区域(33)、与第一沟道区域(31)邻接并独立的源极区域(34)、和与第二沟道区域邻接并独立的漏极区域(35)。而且,在半导体层(23)上形成有栅极绝缘膜(24)、和形成在栅极绝缘膜(24)上的第一栅电极(16)及第二栅电极(17)。层间绝缘膜电容器(19)与第二栅电极(17)串联连接,其将位于第二铝布线层(27b)的一端(38)和第一栅电极(16)从平面上重叠的区域(A)的层间绝缘膜(25)作为电容器。由此可提供一种能够抑制输出电流减少并抑制漏电流流动的半导体装置。

The semiconductor device (21) has a multi-gate structure, and a semiconductor layer (23) having the following regions is formed: a first channel region (31) and a second channel region (32) separated from each other, and a channel connecting the two channels. a high-concentration impurity region (33) of the channel region (31, 32), a source region (34) adjacent to and independent of the first channel region (31), and a drain region adjacent to and independent of the second channel region (35). Furthermore, a gate insulating film (24), and a first gate electrode (16) and a second gate electrode (17) formed on the gate insulating film (24) are formed on the semiconductor layer (23). The interlayer insulating film capacitor (19) is connected in series with the second gate electrode (17), and it will be located in a region where one end (38) of the second aluminum wiring layer (27b) and the first gate electrode (16) overlap from a plane ( The interlayer insulating film (25) of A) serves as a capacitor. Thereby, it is possible to provide a semiconductor device capable of suppressing a decrease in output current and suppressing the flow of leakage current.

Description

Semiconductor device
Technical field
The present invention relates to semiconductor device, particularly a kind of structure technology that is used for the transistorized electrical characteristic of improved thin film.
Background technology
Above-mentioned semiconductor device for example is formed with thin-film transistor (Thin FilmTransistor:TFT) on glass substrate.Specifically, on glass substrate, be formed with semiconductor layer, in this semiconductor layer, be formed with source region and drain region.And, on semiconductor layer, be formed with gate electrode across gate insulating film.In such semiconductor device, in order to improve the reliability of electrical characteristics, known method is for example to possess patent documentation 1 LDD that put down in writing, that have low concentration impurity layer in the source region and the drain region of semiconductor device (Lightly Doped Drain) structure, or possesses by connecting the multi grid that a plurality of gate electrodes constitute.
Patent documentation 1: the spy opens the 2000-216397 communique
But, in semiconductor device with LDD structure, when thin-film transistor is applied voltage, because because of low concentration impurity layer makes load (resistance) become big, so, cause output current to reduce by voltage decline.On the other hand, in having the semiconductor device of multi grid, have electric field and concentrate (electric field strength grow),, then can flow through unusual leakage current, or cause insulation breakdown in the drain region if this electric field strength increases in the tendency of the end of drain region.
Summary of the invention
The objective of the invention is to, provide a kind of output current that suppresses to reduce, and can suppress the semiconductor device of leakage current flow.
In order to solve above-mentioned problem, semiconductor device of the present invention comprises: substrate; First grid electrode; Second gate electrode; First channel region is between described substrate and described first grid electrode; Second channel region is between described substrate and described second gate electrode; Gate insulating film is at least between described first channel region and the described first grid electrode and between described second channel region and described second gate electrode; First conductive part, second conductive part and the 3rd conductive part are between described substrate and described gate insulating film; And target, be electrically connected with described second gate electrode, and overlapping with the part of described first grid electrode, described first channel region is between described first conductive part and described second conductive part, and described second channel region is between described second conductive part and described the 3rd conductive part.
According to this structure, can suppress the end that electric field concentrates on the included transistor drain zone of semiconductor device, thereby can improve the drain electrode withstand voltage.Therefore, can be suppressed at the transistor drain zone flows through unusual leakage current or causes insulation breakdown.
In above-mentioned semiconductor device, the beeline of preferred described first conductive part and described second conductive part is bigger than the beeline of described second conductive part and described the 3rd conductive part.
According to this structure, when first grid electrode has been applied grid voltage,, can reduce to be applied to the voltage of second gate electrode with respect to the voltage that is applied to first grid electrode.
In above-mentioned semiconductor device, preferred described target is the metal film of island.
According to this structure, when first grid electrode has been applied grid voltage,, can reduce to be applied to the voltage of second gate electrode with respect to the voltage that is applied to first grid electrode.
In above-mentioned semiconductor device, preferably also has interlayer dielectric, it is at least between described first grid electrode and the described target and between described second gate electrode and the described target, described second gate electrode and described target are electrically connected by the contact plug that is formed at described interlayer dielectric, and described first grid electrode and described target form capacitor by described interlayer dielectric.
According to this structure, overlook and observe down, form capacitor in the part of the target that is electrically connected with second gate electrode and a part of overlapping areas of first grid electrode, and the first grid electrode and second gate electrode have been connected by capacitors in series, so, electric capacity can be divided into condenser capacitance and electrostatic capacitance.
In above-mentioned semiconductor device, preferred described second gate electrode and described target are electrically connected by the contact plug that is formed at described gate insulating film, and described first grid electrode and described target form capacitor by described gate insulating film.
According to this structure, overlook and observe down, form capacitor in the part of the target that is electrically connected with second gate electrode and a part of overlapping areas of first grid electrode, and the first grid electrode and second gate electrode have been connected by capacitors in series, so, electric capacity can be divided into condenser capacitance and electrostatic capacitance.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain inorganic semiconductor material, and described first conductive part, described second conductive part and described the 3rd conductive part contain impurity and described inorganic semiconductor material separately.
According to this structure, when forming first~the 3rd conductive part, can adopt the method for impurity in containing the semiconductor layer of inorganic semiconductor material, thereby making to make becomes easy.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain organic semiconducting materials, and described first conductive part, described second conductive part and described the 3rd conductive part contain the conductivity organic material separately.
According to this structure, even, also can form first conductive part~the 3rd conductive part not to the semiconductor layer doped impurity that contains organic semiconducting materials.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain organic semiconducting materials, and described first conductive part, described second conductive part and described the 3rd conductive part contain metal separately.
According to this structure, even, also can form first conductive part~the 3rd conductive part not to the semiconductor layer doped impurity that contains organic semiconducting materials.
In order to solve above-mentioned problem, semiconductor device of the present invention can also be to comprise: substrate; First grid electrode; Second gate electrode; First channel region is between described substrate and described first grid electrode; Second channel region is between described substrate and described second gate electrode; Gate insulating film is at least between described first channel region and the described first grid electrode and between described second channel region and described second gate electrode; First conductive part, second conductive part and the 3rd conductive part are between described substrate and described gate insulating film; And target, overlapping with the part of described first grid electrode, and it is overlapping with the part of described second gate electrode, described first channel region is between described first conductive part and described second conductive part, and described second channel region is between described second conductive part and described the 3rd conductive part.
According to this structure, can suppress the end that electric field concentrates on the included transistor drain zone of semiconductor device, thereby can improve the drain electrode withstand voltage.Therefore, can be suppressed at the transistor drain zone flows through unusual leakage current or causes insulation breakdown.
In above-mentioned semiconductor device, the beeline of preferred described first conductive part and described second conductive part is bigger than the beeline of described second conductive part and described the 3rd conductive part.
According to this structure, when first grid electrode has been applied grid voltage,, can reduce to be applied to the voltage of second gate electrode with respect to the voltage that is applied to first grid electrode.
In above-mentioned semiconductor device, preferred described target is the metal film of island.
According to this structure, when first grid electrode has been applied grid voltage,, can reduce to be applied to the voltage of second gate electrode with respect to the voltage that is applied to first grid electrode.
In above-mentioned semiconductor device, preferably also has interlayer dielectric, it is at least between described first grid electrode and the described target and between described second gate electrode and the described target, the part of described first grid electrode and described target form first capacitor by described interlayer dielectric, and the part of described second gate electrode and described target form second capacitor by described interlayer dielectric.
According to this structure, overlook and observe down, form capacitor in the part of the target that is electrically connected with second gate electrode and a part of overlapping areas of first grid electrode, and the first grid electrode and second gate electrode have been connected by capacitors in series, so, electric capacity can be divided into condenser capacitance and electrostatic capacitance.
In above-mentioned semiconductor device, the part of preferred described first grid electrode and described target form first capacitor by described gate insulating film, and the part of described second gate electrode and described target form second capacitor by described gate insulating film.
According to this structure, overlook and observe down, form capacitor in the part of the target that is electrically connected with second gate electrode and a part of overlapping areas of first grid electrode, and the first grid electrode and second gate electrode have been connected by capacitors in series, so, electric capacity can be divided into condenser capacitance and electrostatic capacitance.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain inorganic semiconductor material, and described first conductive part, described second conductive part, described the 3rd conductive part and described target contain impurity and described inorganic semiconductor material separately.
According to this structure, when forming first~the 3rd conductive part and target, for example can adopt the method for impurity in containing the semiconductor layer of inorganic semiconductor material, thereby making to make becomes easy.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain organic semiconducting materials, and described first conductive part, described second conductive part, described the 3rd conductive part and described target contain the conductivity organic material separately.
According to this structure, even, also can form first conductive part~the 3rd conductive part not to the semiconductor layer doped impurity that contains organic semiconducting materials.
In above-mentioned semiconductor device, preferred described first channel region and described second channel region contain organic semiconducting materials, and described first conductive part, described second conductive part, described the 3rd conductive part and described target contain metal separately.
According to this structure, even, also can form first conductive part~the 3rd conductive part not to the semiconductor layer doped impurity that contains organic semiconducting materials.
In order to solve above-mentioned problem, semiconductor device of the present invention can be to comprise: substrate; First conductive part, second conductive part, the 3rd conductive part and target are positioned on the described substrate; Semiconductor film between described first conductive part and described second conductive part and between described second conductive part and described the 3rd conductive part, contains organic semiconducting materials at least; Gate insulating film is positioned on described organic semiconductor film and the described target at least; First grid electrode is positioned on the described gate insulating film at least, and is overlapping across described gate insulating film and described semiconductor film and described target, forms first capacitor with described target; With second gate electrode, at least be positioned on the described gate insulating film, overlapping across described gate insulating film and described semiconductor film and described target, form second capacitor with described target, the beeline of described first conductive part and described second conductive part is bigger than the beeline of described second conductive part and described the 3rd conductive part.
According to this structure, can suppress the end that electric field concentrates on the included transistor drain zone of semiconductor device, thereby can improve the drain electrode withstand voltage.Therefore, can be suppressed at the transistor drain zone flows through unusual leakage current or causes insulation breakdown.
Description of drawings
Fig. 1 is the equivalent circuit diagram of the structure of the semiconductor element of representing that schematically execution mode is related.
Fig. 2 is the diagrammatic top view of structure of the semiconductor device of expression first execution mode.
Fig. 3 is the schematic sectional view of structure of the semiconductor device of expression first execution mode.
Fig. 4 is the diagrammatic top view of structure of the semiconductor device of expression second execution mode.
Fig. 5 is the schematic sectional view of structure of the semiconductor device of expression second execution mode.
Among the figure: the 11-semiconductor element; 12; 51-first semiconductor element; 13; 52-second semiconductor element; the 14-source terminal; the 15-drain terminal; 16; 61-first grid electrode; 17; 62-second gate electrode; the 18-gate terminal; 19-layer insulation membrane capacitance (capacitor); 21; the 50-semiconductor device; 22; the 53-substrate; 23; 58-is as the semiconductor layer of semiconductor film, 24-gate insulating film, 25-interlayer dielectric; 26a-is as first contact plug of first plug; 26b-is as second contact plug of second plug, 26c-the 3rd contact plug, 26d-the 4th contact plug; the 27a-first aluminium wiring layer; 27b-is as the second aluminium wiring layer of target, 27c-the 3rd aluminium wiring layer, 27d-the 4th aluminium wiring layer; 31; 71-first channel region; 32; 72-second channel region, 33-be as the high concentration impurity of regions and source, the 34-source region; the 35-drain region; 36-first grid electrostatic capacitance, 37-second grid electrostatic capacitance, 38-one end; 54-source electrode (source region); 55-drain electrode (drain region), 56-public electrode (regions and source), 57-target; the 59-gate insulating film; the 63-diaphragm, 73-first capacitor, 74-second capacitor.
Embodiment
Below, describe with reference to the execution mode of accompanying drawing semiconductor device of the present invention.
(first execution mode)
Fig. 1 is the equivalent circuit diagram of structure of semiconductor element of schematically representing to be formed at the multi grid of semiconductor device.Below, with reference to Fig. 1 the formation of the semiconductor element of multi grid is described.
As shown in Figure 1, semiconductor element 11 possesses multi grid, forms the structure that first semiconductor element 12 and second semiconductor element 13 are connected in series on equivalent electric circuit.Specifically, become the structure that between source terminal 14 and drain terminal 15, is formed with the first grid electrode 16 and second gate electrode 17.
First grid electrode 16 directly is electrically connected with gate terminal 18.Second gate electrode 17 is connected with gate terminal 18 by the capacitor 19 that is used to cut apart electrostatic capacitance.That is, when gate terminal 18 had been applied voltage, power supply was based on capacitor connected in series 19 and second gate electrode 17 and by dividing potential drop.
As mentioned above, semiconductor element 11 with multi grid links together and can cut apart drain voltage by a plurality of gate electrodes such as first grid electrode 16, second gate electrodes 17, so, compare with the semiconductor element of device of single gate structure, become the structure that can realize high withstand voltage driving.
Fig. 2 is the diagrammatic top view of the structure of expression semiconductor device.Fig. 3 is the schematic sectional view of structure of the semiconductor device of presentation graphs 2.Wherein, vertical view shown in Figure 2 has represented to remove the state of aluminium wiring layer 27a~27d (being represented by imaginary line) and interlayer dielectric 25.Below, with reference to Fig. 2 and Fig. 3 the structure of semiconductor device is described.
As shown in Figures 2 and 3, semiconductor device 21 possesses above-mentioned multi grid, has: at the semiconductor layer 23 as semiconductor film that forms on the substrates such as glass 22, cover the gate insulating film 24 of semiconductor layer 23 and be formed on the first grid electrode 16 and second gate electrode 17 on the gate insulating film 24.And semiconductor device 21 also has: the interlayer dielectric 25 that covers the first grid electrode 16 and second gate electrode 17, gate insulating film 24; Be positioned at a plurality of contact holes of being formed on interlayer dielectric 25, the first contact plug 26a as first plug (plug), the second contact plug 26b, the 3rd contact plug 26c, the 4th contact plug 26d as second plug; With the first aluminium wiring layer 27a~the 4th aluminium wiring layer 27d that is connected respectively with the first contact plug 26a~the 4th contact plug 26d.
Semiconductor layer 23 patterns form the shape of regulation, for example are made of the polysilicon (p-Si) as inorganic semiconductor material.And semiconductor layer 23 has: first channel region 31 that is separated from each other and second channel region 32, connect these two channel regions 31 and 32 high concentration impurity (regions and source) 33, with first channel region 31 in abutting connection with and independently source region 34, with second channel region 32 in abutting connection with and drain region 35 independently.These high concentration impurity 33, source region 34, drain region 35 have the function as the conductive part of semiconductor device 21.
If be described in detail, then semiconductor device 21 becomes that high concentration impurity 33 in clamping and structure that first semiconductor element 12 and second semiconductor element 13 are connected in series as mentioned above.And high concentration impurity 33 comprises the drain region of first semiconductor element 12 and the source region of second semiconductor element 13.
Gate insulating film 24 for example is made of silicon oxide layer, is become first grid electrostatic capacitance 36 by the zone of first grid electrode 16 and 31 clampings of first channel region, is become second grid electrostatic capacitance 37 by the zone of second gate electrode 17 and 32 clampings of second channel region.
First grid electrode 16 is mainly used in the driving of control semiconductor device 21, for example is made of tantalum (Ta).And first grid electrode 16 patterns form according to mode that covers first channel region 31 across gate insulating film 24 and first channel region, 31 couplings.And first grid electrode 16 is electrically connected with the first aluminium wiring layer 27a on being formed on interlayer dielectric 25 by the first contact plug 26a.In addition, the first aluminium wiring layer 27a directly is electrically connected with gate terminal 18 (with reference to Fig. 1).
Second gate electrode 17 is used to make the electric field of the end that concentrates on drain region 35 to relax, and for example is made of tantalum (Ta).And second gate electrode, 17 patterns form according to mode that covers second channel region 32 across gate insulating film 24 and second channel region, 32 couplings.And second gate electrode 17 is by the second contact plug 26b, is electrically connected with the second aluminium wiring layer 27b as target on being formed on interlayer dielectric 25.
The second aluminium wiring layer 27b is the metal film that forms island, and one end 38 extends to and the zone of the part of first grid electrode 16 overlapping areas A and forming from the plane.The part that is positioned at the interlayer dielectric 25 of this overlapping region A constitutes layer insulation membrane capacitance 19 (" capacitor 19 " that is equivalent to Fig. 1 is by circuit mark diagram).That is, layer insulation membrane capacitance 19 as electrode, constitutes with the part of interlayer dielectric 25 part of the part of first grid electrode 16 and the second aluminium wiring layer 27b as dielectric substrate.Second gate electrode 17 is connected with first grid electrode 16 by layer insulation membrane capacitance 19.And, be connected in series by making this layer insulation membrane capacitance 19 and second gate electrode 17, can realize between the capacitance of second grid electrostatic capacitance 37 and layer insulation membrane capacitance 19 that electric capacity distributes.
In addition, the grid length of second gate electrode 17 forms shortlyer than the grid length of first grid electrode 16.Specifically, the grid length of second gate electrode 17 is the extremely short length that can suppress punch-through, for example is 2 μ m.By forming such grid length, can reduce because of the influence (for example driving force etc.) of the charging that layer insulation membrane capacitance 19 causes is set.In addition, said here grid length means the beeline of source region and drain region.That is, the grid length of second gate electrode 17 is the length of the beeline between expression high concentration impurity 33 and the drain region 35.The grid length of first grid electrode 16 is also defined equally.
Source region 34 is by the 3rd contact plug 26c and the 3rd aluminium wiring layer 27c etc., is electrically connected with source terminal 14 (with reference to Fig. 1) on being formed on interlayer dielectric 25.
Drain region 35 is by the 4th contact plug 26d and the 4th aluminium wiring layer 27d etc., is electrically connected with drain terminal 15 (with reference to Fig. 1) on being formed on interlayer dielectric 25.
As mentioned above, by the layer insulation membrane capacitance 19 and second gate electrode 17 are connected in series, can realize between the capacitance of second grid electrostatic capacitance 37 and layer insulation membrane capacitance 19 that electric capacity distributes, and can make the voltage ratio first grid electrode 16 that puts on second gate electrode 17 little.Thus, when drain region 35 has been applied voltage, the electric field of the end that concentrates on drain region 35 is disperseed, thereby can weaken the electric field strength of end.And, owing to the dielectric substrate of interlayer dielectric 25 as capacitor used, so, and compare by for example thickening methods such as a part that pattern forms gate insulating film 24 is in harmonious proportion in order to relax that electric field is concentrated, can easily form.
In addition, semiconductor device 21 of the present invention for example can be applicable to the image element circuit of each pixel of formation in the electro-optical devices such as EL device or liquid-crystal apparatus, the driver (integrated circuit) of control image element circuit.And, except such electro-optical device, can also be applied to various devices.
In sum, according to the semiconductor device 21 of first execution mode, can obtain the effect of the following stated.
(1) according to the semiconductor device 21 of first execution mode, because the layer insulation membrane capacitance 19 and second gate electrode 17 that will be formed by the part of interlayer dielectric 25 are connected in series, so, can realize between the capacitance of layer insulation membrane capacitance 19 and second grid electrostatic capacitance 37 that electric capacity distributes, wherein, described interlayer dielectric 25 is positioned at the second aluminium wiring layer 27b and first grid electrode 16 overlapping areas A from the plane.Thus,, compare, can reduce the voltage of second gate electrode 17 with the voltage that imposes on first grid electrostatic capacitance 36 when first grid electrode 16 and layer insulation membrane capacitance 19 have applied grid voltage.Therefore, when drain region 35 has been applied voltage, the electric field of the end that concentrates on drain region 35 is disperseed, thereby can weaken the electric field strength of 35 ends, drain region.As a result, can improve the drain electrode withstand voltage, can be suppressed at drain region 35 and flow through unusual leakage current or cause insulation breakdown.Thereby, a kind of semiconductor device 21 with the multi grid that can realize high withstand voltage driving can be provided.
(2) according to the semiconductor device 21 of first execution mode, shorten to the length that can suppress punch-through as far as possible, thereby can further reduce because of the influence of the charging that layer insulation membrane capacitance 19 causes is set by grid length with second gate electrode 17.Therefore, can provide a kind of and not only can be suppressed at drain region 35 mobile leakage currents, and can reduce the semiconductor device 21 of the amount (for example comparing) of output current minimizing with the LDD structure.
In addition, though omitted diagram, in the semiconductor device 21 of first execution mode, also can be electrically connected the first grid electrode 16 and the second aluminium wiring layer 27b by being formed at the contact plug of interlayer dielectric 25.Under this situation, second gate electrode 17 and the second aluminium wiring layer 27b are insulated across interlayer dielectric 25, have formed capacitor.
And, in the semiconductor device 21 of first execution mode, also can be that the first grid electrode 16 and the second aluminium wiring layer 27b are insulated by interlayer dielectric 25, and form first capacitor; Second gate electrode 17 and the second aluminium wiring layer 27b are insulated by interlayer dielectric 25, and form second capacitor.
(second execution mode)
Fig. 4 is the diagrammatic top view of the structure of expression semiconductor device.Fig. 5 (a) is the schematic sectional view along the A-A ' cross section of the semiconductor device of Fig. 4.Fig. 5 (b) is the schematic sectional view along the B-B ' cross section of the semiconductor device of Fig. 4.Wherein, the semiconductor device of Fig. 4 has omitted the diagram of diaphragm.In addition, the different piece of the semiconductor device of second execution mode and first execution mode is: substitute the semiconductor device that contains inorganic semiconductor material of above-mentioned first execution mode, become the semiconductor device (organic tft) that has adopted the semiconductor layer that contains organic semiconducting materials.Below, with reference to Fig. 4 and Fig. 5 the structure of the semiconductor device of second execution mode is described.
As shown in Figure 4 and Figure 5, semiconductor device 50 possesses the multi grid as first execution mode, has: first semiconductor element 51 (first semiconductor element 12 that is equivalent to Fig. 1) and second semiconductor element 52 (second semiconductor element 13 that is equivalent to Fig. 1).Semiconductor device 50 with first semiconductor element 51 and second semiconductor element 52 has: be formed on (first face) on the substrate 53 of PETG (PET) etc. the source electrode 54 as the source region, as the drain electrode 55 of drain region, as regions and source public electrode 56, target 57 and be formed on these electrodes 54,55,56,57 and the semiconductor layer 58 on the substrate 53 as semiconductor film.And semiconductor device 50 has: be formed on gate insulating film 59 on the semiconductor layer 58, be formed on first grid electrode 61 (first grid electrode 16 that is equivalent to Fig. 1) on the gate insulating film 59 and second gate electrode 62 (second gate electrode 17 that is equivalent to Fig. 1), according to cover these gate electrodes 61 and 62 and gate insulating film 59 on mode and the diaphragm 63 that forms.
The material of substrate 53 is not limited to above-mentioned PETG (PET), for example also can be the plastic base (resin substrate) that is made of Merlon (PC), polyimides (PI) etc.
Source electrode 54 is connected with source terminal 14 (with reference to Fig. 1), and pattern is formed on the part on the substrate 53.The material of source electrode 54 can adopt conductive metal material, for example can enumerate Cr (chromium) or Au (gold) etc.Also can substitute conductive metal material in addition and use the conductivity organic material.
Drain electrode 55 is connected with drain terminal 15 (with reference to Fig. 1), and pattern is formed on the part of separating with source electrode 54 on the substrate 53.Material and source electrode 54 as drain electrode 55 are same, for example can enumerate Cr (chromium) or Au (gold) etc.
Public electrode 56 (source/drain electrode) keeps predetermined distance and pattern formation with each electrode (54,55) between the source electrode 54 and drain electrode 55 on the substrate 53.Public electrode 56 comprises the drain electrode of first semiconductor element 51 and the source electrode of second semiconductor element 52.Semiconductor layer 58 between source electrode 54 and the public electrode 56 becomes first channel region 71.In addition, the semiconductor layer 58 between drain electrode 55 and the public electrode 56 becomes second channel region 72.These public electrodes 56, source electrode 54, drain electrode 55 have the function as the conductive part of semiconductor device 50.
And semiconductor device 50 becomes by the be connected in series structure of first semiconductor element 51 and second semiconductor element 52 of public electrode 56.As the material of public electrode 56, same with above-mentioned source electrode 54 and drain electrode 55, for example can enumerate Cr (chromium) or Au (gold) etc.
Target 57 is the metal films that form island, is used to form in order to relax the capacitor that electric field concentrates on the end of drain electrode 55.Target 57 for example form with substrate 53 on source electrode 54, public electrode 56, end separately (end of the semiconductor layer 58) adjacency of drain electrode 55.Specifically, form the part zone of crossing over a part of regional and second gate electrode 62 of first grid electrode 61 by gate insulating film 59 from the plane.As the material of target 57, same with above-mentioned source electrode 54 and drain electrode 55, for example can enumerate Cr (chromium) or Au (gold) etc.
Semiconductor layer 58 forms the part of covering source electrode 54, public electrode 56, drain electrode 55 and substrate 53.As the material of semiconductor layer 58, can use any one of low branch subsystem organic semiconducting materials, copolymer organic semiconducting materials.
For example can enumerate pentacene, anthracene, naphthacene etc. as the low subsystem organic material that divides.In addition, as the copolymer organic semiconducting materials for example can enumerate poly-(3-hexyl thiophene) (P3HT), poly-(3-alkylthrophene) etc.And, under the situation of low molecule organic material, for example can adopt vapour deposition method.Under the situation of copolymer organic semiconducting materials, for example can adopt coating process.
Gate insulating film 59 forms a part that covers semiconductor layer 58 and substrate 53.Material as gate insulating film 59 can be enumerated polyimides, methacrylate, polystyrene etc.In addition, also can replacement gate dielectric film 59, and between first grid electrode 61 and second gate electrode 62 and target 57, have interlayer dielectric.And, can also be structure with gate insulating film 59 and interlayer dielectric.
First grid electrode 61 is mainly used in the driving of control semiconductor device 50, is formed on the gate insulating film 59 according to the mode of crossing over first channel region 71 and public electrode 56 from the plane.Part by the gate insulating film 59 of first grid electrode 61 and 71 clampings of first channel region becomes the first grid electrostatic capacitance.In addition, the part of the part of first grid electrode 61, target 57 and constituted first capacitor 73 by the part of the gate insulating film 59 of the two clamping.
And first grid electrode 61 directly is electrically connected with gate terminal 18 (with reference to Fig. 1).First grid electrode 61 is for example by having adopted the liquid phase process that contains at least one side's solution in metal particle and the organo-metallic compound to form.As solution, can adopt the dispersion liquid that makes metal particle be scattered in decentralized medium, the organo-metallic compound of liquid, the solution of organo-metallic compound or these mixture.As organo-metallic compound, for example be the compound that contains silver etc.
Second gate electrode 62 is used to make the electric field of the end that concentrates on drain electrode 55 to relax, and is formed on the gate insulating film 59 according to the mode of crossing over second channel region 72 and target 57 from the plane.Part by the gate insulating film 59 of second gate electrode 62 and 72 clampings of second channel region becomes the second grid electrostatic capacitance.And, the part of the part of second gate electrode 62, target 57 and constituted second capacitor 74 by the part of the gate insulating film 59 of the two clamping.
In addition, the combination of first capacitor 73 and second capacitor 74 is equivalent to " capacitor 19 " shown in the equivalent electric circuit of Fig. 1.That is,, the first grid electrode 61 and second gate electrode 62 have been connected by target 57, first capacitor 73, second capacitor 74.As the material of second gate electrode 62, for example same with first grid electrode 61.
And the length of second gate electrode 62 forms shortlyer than the grid length of first grid electrode 61.Specifically, same with first execution mode, be set to the extremely short length that can suppress punch-through.The grid length of second gate electrode 62 for example is 2 μ m.By being set at such grid length, can reduce because of the influence (for example driving force etc.) of the charging that first capacitor 73 and second capacitor 74 cause is set.
In addition, by first capacitor 73 and second capacitor 74 and second gate electrode 62 are connected in series, can between second capacitance of first capacitance of second grid electrostatic capacitance, first capacitor 73 and second capacitor 74, realize that electric capacity distributes.
Diaphragm 63 forms a part that covers first grid electrode 61, second gate electrode 62, gate insulating film 59.As the material of diaphragm 63, same with above-mentioned gate insulating film 59, for example can enumerate polyimides, methacrylate, polystyrene etc.
In sum, by two capacitors (first capacitor 73 and second capacitor 74) and second gate electrode 62 are connected in series, can realize between second capacitance of first capacitance of second grid electrostatic capacitance, first capacitor 73 and second capacitor 74 that electric capacity distributes, thereby can make the voltage that puts on second gate electrode 62 less than first grid electrode 61.Thus, when drain electrode 55 has been applied voltage, the electric field of the end that concentrates on drain electrode 55 is disperseed, thereby can weaken the electric field strength of end.
In addition, the semiconductor device 50 of second execution mode is to be made of flexual resin substrate by substrate 53, makes semiconductor device 50 integral body have flexibility.Therefore, for example can be applied to Electronic Paper etc.
As mentioned above, according to the semiconductor device 50 of second execution mode, can on the basis of (1) of above-mentioned first execution mode, (2) effect, obtain the effect of the following stated.
(3) according to the semiconductor device 50 (organic tft) of second execution mode, general organic tft is compared with silicon TFT, the control that exists implanted dopant is difficult to carry out, is difficult for making the problem of LDD structure, but by adopting above-mentioned structure, even implanted dopant can not make semiconductor device 50 possess the function suitable with the LDD structure yet.Therefore, the electric field of the end that concentrates on drain electrode 55 is disperseed, thereby can weaken the electric field strength of end.
In addition, though omitted diagram, in the semiconductor device 50 of second execution mode, can be electrically connected first grid electrode 61 and target 57 by being formed at the contact plug of gate insulating film 59.Under this situation, second gate electrode 62 and target 57 are insulated by gate insulating film 59, have formed capacitor.
And, in the semiconductor device 50 of second execution mode, also can be electrically connected second gate electrode 62 and target 57 by being formed at the contact plug of gate insulating film 59.Under this situation, first grid electrode 61 and target 57 are insulated by gate insulating film 59, have formed capacitor.
In addition, in the first embodiment, by semiconductor layer 23 is adopted organic semiconducting materials, also can play effect of the present invention, but owing to being the stepped construction that the second aluminium wiring layer 27b with the upper strata of first grid electrode 16 uses as target, so, the preferred inorganic semiconductor material that forms contact plug easily that adopts.And, in second execution mode,, also can play effect of the present invention, but not need to form under the situation of contact plug by semiconductor layer 58 is adopted inorganic semiconductor material, preferably semiconductor layer 58 is used organic semiconducting materials.
In addition, execution mode is not limited to above-mentioned execution mode, also can implement by following mode.
(variation 1) is not limited to as the first above-mentioned execution mode, constitutes the multi grid of semiconductor device 21 by the first grid electrode 16 and second gate electrode 17, for example, can adopt the multi grid that has connected a plurality of gate electrodes as required.In addition, too for the semiconductor device 50 of second execution mode.
(variation 2) is not limited to as above-mentioned first execution mode, on the substrate 22 of glass etc., form first semiconductor element 12 and second semiconductor element 13, for example, also can on semiconductor substrate, form first semiconductor element 12 and second semiconductor element 13.
(variation 3) do not limit as the first above-mentioned execution mode, and 27a~27d constitutes wiring layer by the aluminium wiring layer, for example so long as the wiring layer of metal get final product.

Claims (17)

1、一种半导体装置,其中包括:1. A semiconductor device, comprising: 基板;Substrate; 第一栅电极;a first gate electrode; 第二栅电极;second gate electrode; 第一沟道区域,位于所述基板和所述第一栅电极之间;a first channel region located between the substrate and the first gate electrode; 第二沟道区域,位于所述基板和所述第二栅电极之间;a second channel region located between the substrate and the second gate electrode; 栅极绝缘膜,至少位于所述第一沟道区域和所述第一栅电极之间、以及所述第二沟道区域和所述第二栅电极之间;a gate insulating film located at least between the first channel region and the first gate electrode, and between the second channel region and the second gate electrode; 第一导电部、第二导电部以及第三导电部,位于所述基板和所述栅极绝缘膜之间;和a first conductive portion, a second conductive portion, and a third conductive portion located between the substrate and the gate insulating film; and 中间电极,与所述第二栅电极电连接,且与所述第一栅电极的一部分重叠,an intermediate electrode electrically connected to the second gate electrode and overlapping a part of the first gate electrode, 所述第一沟道区域位于所述第一导电部和所述第二导电部之间,所述第二沟道区域位于所述第二导电部和所述第三导电部之间。The first channel region is located between the first conductive portion and the second conductive portion, and the second channel region is located between the second conductive portion and the third conductive portion. 2、根据权利要求1所述的半导体装置,其特征在于,2. The semiconductor device according to claim 1, wherein: 所述第一导电部和所述第二导电部的最短距离,比所述第二导电部和所述第三导电部的最短距离大。A shortest distance between the first conductive portion and the second conductive portion is greater than a shortest distance between the second conductive portion and the third conductive portion. 3、根据权利要求1或2所述的半导体装置,其特征在于,3. The semiconductor device according to claim 1 or 2, wherein: 所述中间电极是岛状的金属膜。The intermediate electrode is an island-shaped metal film. 4、根据权利要求1~3中任意一项所述的半导体装置,其特征在于,4. The semiconductor device according to any one of claims 1 to 3, wherein: 还具有层间绝缘膜,其至少位于所述第一栅电极和所述中间电极之间、以及所述第二栅电极和所述中间电极之间,所述第二栅电极和所述中间电极通过形成于所述层间绝缘膜的接触插头而电连接,所述第一栅电极和所述中间电极通过所述层间绝缘膜而形成电容器。There is also an interlayer insulating film at least between the first gate electrode and the intermediate electrode, and between the second gate electrode and the intermediate electrode, the second gate electrode and the intermediate electrode The first gate electrode and the intermediate electrode are electrically connected through contact plugs formed on the interlayer insulating film, and form a capacitor through the interlayer insulating film. 5、根据权利要求1~3中任意一项所述的半导体装置,其特征在于,5. The semiconductor device according to claim 1, wherein: 所述第二栅电极和所述中间电极通过形成于所述栅极绝缘膜的接触插头而电连接,所述第一栅电极和所述中间电极通过所述栅极绝缘膜而形成电容器。The second gate electrode and the intermediate electrode are electrically connected through a contact plug formed on the gate insulating film, and the first gate electrode and the intermediate electrode form a capacitor through the gate insulating film. 6、根据权利要求1~5中任意一项所述的半导体装置,其特征在于,6. The semiconductor device according to claim 1, wherein: 所述第一沟道区域以及所述第二沟道区域含有无机半导体材料,所述第一导电部、所述第二导电部以及所述第三导电部各自含有杂质和所述无机半导体材料。The first channel region and the second channel region contain an inorganic semiconductor material, and the first conductive portion, the second conductive portion, and the third conductive portion each contain impurities and the inorganic semiconductor material. 7、根据权利要求1~5中任意一项所述的半导体装置,其特征在于,7. The semiconductor device according to any one of claims 1 to 5, wherein: 所述第一沟道区域以及所述第二沟道区域含有有机半导体材料,所述第一导电部、所述第二导电部以及所述第三导电部各自含有导电性有机材料。The first channel region and the second channel region contain an organic semiconductor material, and each of the first conductive portion, the second conductive portion, and the third conductive portion contains a conductive organic material. 8、根据权利要求1~5中任意一项所述的半导体装置,其特征在于,8. The semiconductor device according to any one of claims 1 to 5, wherein: 所述第一沟道区域以及所述第二沟道区域含有有机半导体材料,所述第一导电部、所述第二导电部以及所述第三导电部各自含有金属。The first channel region and the second channel region contain an organic semiconductor material, and each of the first conductive portion, the second conductive portion, and the third conductive portion contains metal. 9、一种半导体装置,其中包括:9. A semiconductor device comprising: 基板;Substrate; 第一栅电极;a first gate electrode; 第二栅电极;second gate electrode; 第一沟道区域,位于所述基板和所述第一栅电极之间;a first channel region located between the substrate and the first gate electrode; 第二沟道区域,位于所述基板和所述第二栅电极之间;a second channel region located between the substrate and the second gate electrode; 栅极绝缘膜,至少位于所述第一沟道区域和所述第一栅电极之间、以及所述第二沟道区域和所述第二栅电极之间;a gate insulating film located at least between the first channel region and the first gate electrode, and between the second channel region and the second gate electrode; 第一导电部、第二导电部以及第三导电部,位于所述基板和所述栅极绝缘膜之间;和a first conductive portion, a second conductive portion, and a third conductive portion located between the substrate and the gate insulating film; and 中间电极,与所述第一栅电极的一部分重叠,且与所述第二栅电极的一部分重叠,an intermediate electrode overlapping a portion of the first gate electrode and overlapping a portion of the second gate electrode, 所述第一沟道区域位于所述第一导电部和所述第二导电部之间,所述第二沟道区域位于所述第二导电部和所述第三导电部之间。The first channel region is located between the first conductive portion and the second conductive portion, and the second channel region is located between the second conductive portion and the third conductive portion. 10、根据权利要求9所述的半导体装置,其特征在于,10. The semiconductor device according to claim 9, wherein: 所述第一导电部和所述第二导电部的最短距离,比所述第二导电部和所述第三导电部的最短距离大。The shortest distance between the first conductive portion and the second conductive portion is greater than the shortest distance between the second conductive portion and the third conductive portion. 11、根据权利要求9或10所述的半导体装置,其特征在于,11. The semiconductor device according to claim 9 or 10, characterized in that, 所述中间电极是岛状的金属膜。The intermediate electrode is an island-shaped metal film. 12、根据权利要求9~11中任意一项所述的半导体装置,其特征在于,12. The semiconductor device according to any one of claims 9 to 11, wherein: 还具有层间绝缘膜,其至少位于所述第一栅电极和所述中间电极之间、以及所述第二栅电极和所述中间电极之间,所述第一栅电极的一部分和所述中间电极通过所述层间绝缘膜形成第一电容器,所述第二栅电极的一部分和所述中间电极通过所述层间绝缘膜形成第二电容器。An interlayer insulating film is provided at least between the first gate electrode and the intermediate electrode, and between the second gate electrode and the intermediate electrode, a part of the first gate electrode and the An intermediate electrode forms a first capacitor through the interlayer insulating film, and a part of the second gate electrode and the intermediate electrode form a second capacitor through the interlayer insulating film. 13、根据权利要求9~11中任意一项所述的半导体装置,其特征在于,13. The semiconductor device according to any one of claims 9 to 11, wherein: 所述第一栅电极的一部分和所述中间电极通过所述栅极绝缘膜形成第一电容器,所述第二栅电极的一部分和所述中间电极通过所述栅极绝缘膜形成第二电容器。A part of the first gate electrode and the intermediate electrode form a first capacitor through the gate insulating film, and a part of the second gate electrode and the intermediate electrode form a second capacitor through the gate insulating film. 14、根据权利要求9~13中任意一项所述的半导体装置,其特征在于,14. The semiconductor device according to claim 9, wherein: 所述第一沟道区域以及所述第二沟道区域含有无机半导体材料,所述第一导电部、所述第二导电部、所述第三导电部以及所述中间电极各自含有杂质和所述无机半导体材料。The first channel region and the second channel region contain an inorganic semiconductor material, and each of the first conductive part, the second conductive part, the third conductive part, and the intermediate electrode contains impurities and the Inorganic semiconductor materials. 15、根据权利要求9~13中任意一项所述的半导体装置,其特征在于,15. The semiconductor device according to any one of claims 9 to 13, wherein: 所述第一沟道区域以及所述第二沟道区域含有有机半导体材料,所述第一导电部、所述第二导电部、所述第三导电部以及所述中间电极各自含有导电性有机材料。The first channel region and the second channel region contain an organic semiconductor material, and each of the first conductive part, the second conductive part, the third conductive part and the intermediate electrode contains a conductive organic semiconductor material. Material. 16、根据权利要求9~13中任意一项所述的半导体装置,其特征在于,16. The semiconductor device according to any one of claims 9 to 13, wherein: 所述第一沟道区域以及所述第二沟道区域含有有机半导体材料,所述第一导电部、所述第二导电部、所述第三导电部以及所述中间电极各自含有金属。The first channel region and the second channel region contain an organic semiconductor material, and each of the first conductive portion, the second conductive portion, the third conductive portion, and the intermediate electrode contains metal. 17、一种半导体装置,其中包括:17. A semiconductor device comprising: 基板;Substrate; 第一导电部、第二导电部、第三导电部以及中间电极,位于所述基板上;The first conductive part, the second conductive part, the third conductive part and the intermediate electrode are located on the substrate; 半导体膜,至少位于所述第一导电部和所述第二导电部之间、以及所述第二导电部和所述第三导电部之间,含有有机半导体材料;a semiconductor film located at least between the first conductive portion and the second conductive portion, and between the second conductive portion and the third conductive portion, containing an organic semiconductor material; 栅极绝缘膜,至少位于所述有机半导体膜以及所述中间电极上;a gate insulating film located at least on the organic semiconductor film and the intermediate electrode; 第一栅电极,至少位于所述栅极绝缘膜上,隔着所述栅极绝缘膜与所述半导体膜以及所述中间电极重叠,与所述中间电极形成第一电容器;和a first gate electrode located at least on the gate insulating film, overlapping the semiconductor film and the intermediate electrode via the gate insulating film, and forming a first capacitor with the intermediate electrode; and 第二栅电极,至少位于所述栅极绝缘膜上,隔着所述栅极绝缘膜与所述半导体膜以及所述中间电极重叠,与所述中间电极形成第二电容器,a second gate electrode located at least on the gate insulating film, overlapping the semiconductor film and the intermediate electrode via the gate insulating film, and forming a second capacitor with the intermediate electrode, 所述第一导电部与所述第二导电部的最短距离,比所述第二导电部与所述第三导电部的最短距离大。The shortest distance between the first conductive portion and the second conductive portion is greater than the shortest distance between the second conductive portion and the third conductive portion.
CN 200710089090 2006-04-03 2007-03-29 Semiconductor device Pending CN101051643A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
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CN101635310B (en) * 2009-06-09 2011-07-06 上海宏力半导体制造有限公司 High voltage multi-threshold MOSFET device
CN103788653A (en) * 2008-03-10 2014-05-14 日产化学工业株式会社 Underlayer film composition for image formation
CN104157676A (en) * 2009-11-27 2014-11-19 松下电器产业株式会社 Light emitting display device
WO2022041367A1 (en) * 2020-08-31 2022-03-03 武汉华星光电技术有限公司 Tft device and manufacturing method therefor, and array substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103788653A (en) * 2008-03-10 2014-05-14 日产化学工业株式会社 Underlayer film composition for image formation
CN101635310B (en) * 2009-06-09 2011-07-06 上海宏力半导体制造有限公司 High voltage multi-threshold MOSFET device
CN104157676A (en) * 2009-11-27 2014-11-19 松下电器产业株式会社 Light emitting display device
CN104157676B (en) * 2009-11-27 2017-04-12 株式会社日本有机雷特显示器 Light emitting display device
WO2022041367A1 (en) * 2020-08-31 2022-03-03 武汉华星光电技术有限公司 Tft device and manufacturing method therefor, and array substrate
US11791414B2 (en) 2020-08-31 2023-10-17 Wuhan China Star Optoelectronics Technology Co., Ltd. TFT device, manufacturing method thereof, and array substrate

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