CN101043010A - Integrated circuit packaging method without adhesive tape - Google Patents
Integrated circuit packaging method without adhesive tape Download PDFInfo
- Publication number
- CN101043010A CN101043010A CN 200610065147 CN200610065147A CN101043010A CN 101043010 A CN101043010 A CN 101043010A CN 200610065147 CN200610065147 CN 200610065147 CN 200610065147 A CN200610065147 A CN 200610065147A CN 101043010 A CN101043010 A CN 101043010A
- Authority
- CN
- China
- Prior art keywords
- substrate
- glutinous
- integrated circuit
- packaging method
- adhesive tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 58
- 239000002390 adhesive tape Substances 0.000 title claims abstract description 46
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 45
- 239000000758 substrate Substances 0.000 claims abstract description 94
- 239000000463 material Substances 0.000 claims abstract description 57
- 239000007788 liquid Substances 0.000 claims abstract description 50
- 239000011248 coating agent Substances 0.000 claims abstract description 11
- 238000000576 coating method Methods 0.000 claims abstract description 11
- 239000000853 adhesive Substances 0.000 claims description 48
- 230000001070 adhesive effect Effects 0.000 claims description 48
- 239000013078 crystal Substances 0.000 claims description 41
- 238000004026 adhesive bonding Methods 0.000 claims description 13
- 230000009514 concussion Effects 0.000 claims description 8
- 238000005520 cutting process Methods 0.000 claims description 8
- 238000007789 sealing Methods 0.000 claims description 8
- 230000032798 delamination Effects 0.000 abstract description 7
- 238000012856 packing Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 7
- 238000005538 encapsulation Methods 0.000 description 7
- 230000009286 beneficial effect Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 239000000084 colloidal system Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 208000019901 Anxiety disease Diseases 0.000 description 1
- 229920000297 Rayon Polymers 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 230000036506 anxiety Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000741 silica gel Substances 0.000 description 1
- 229910002027 silica gel Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92147—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention relates to an integrated circuit packaging method of a non-adhesive-tape crystal-adhering mode, which comprises the steps of coating a liquid crystal-adhering material on a substrate; performing a defoaming step to remove micro bubbles in the liquid die-bonding material by placing the substrate in a vacuum state; then, a first baking step is carried out to enable the liquid crystal-bonded material to be in a semi-curing state so as to form a compact crystal-bonded film on the substrate, and the compact crystal-bonded film is used for bonding a chip to the substrate; and then, a second baking step is performed to completely solidify the compact die-bonding film. Therefore, fine bubbles do not exist between the substrate and the wafer, the die bonding strength can be enhanced, and delamination of the wafer can be avoided.
Description
Technical field
The present invention relates to a kind of integrated circuit encapsulation process, particularly relate to a kind of integrated circuit encapsulation process, can strengthen the integrated circuit packaging method that sticks brilliant intensity and avoid the non adhesive tape adhesive crystal type of wafer delamination about non adhesive tape adhesive crystal type.
Background technology
In the integrated circuit encapsulation process, the step of glutinous brilliant (die-attaching) is to be an important ring, good glutinous brilliant operating condition can be really with the wafer gluing to substrate, can reduce packaging cost and promote the encapsulation quality.And in order to meet advanced integrated circuit encapsulation, for glutinous brilliant material strict requirement is also arranged, for example glutinous brilliant intensity, thermal conductivity and operation all should have certain requirement.
In the prior art, as United States Patent (USP) the 6th, 385, disclosed a kind of IC circuit packing structure in No. 049 patent case.See also Fig. 1 and shown in Figure 2, Fig. 1 is the partial cross-sectional perspective view that has known IC circuit packing structure now, Fig. 2 is the schematic cross-section that has known IC circuit packing structure now, should have known IC circuit packing structure now, it consists predominantly of at least one substrate 110, one glutinous brilliant material 120, a wafer 130, a plurality of bonding wire 140, an adhesive body 150 and a plurality of soldered ball 160.When glutinous crystalline substance, this glutinous brilliant material 120 is a upper surface 111 of this substrate 110 of gluing and an active surface 131 of this wafer 130.Before sealing, an open slot 113 of this substrate 110 is the weld pads 132 that appear this wafer 130, so that those bonding wires 140 electrically connect those weld pads 132 to this substrate 110.This adhesive body 150 is to be filled in this open slot 113 to seal those bonding wires 140.Those soldered balls 160 are a lower surface 112 that are engaged to this substrate 110, with external connection.In the said integrated circuit packaging structure, this glutinous brilliant material 120 is to use liquid viscose, otherwise has the anxiety of pollution to those weld pads 132.A kind of known glutinous brilliant material 120 is to be two sides stickiness adhesive tape, pi adhesive tape for example, and its cost is higher and need correct mechanically operated adhesive tape to attach, to avoid blocking this open slot 113.Another kind of known glutinous brilliant material 120 is to use B rank (B-stage) stickiness glued membrane, as United States Patent (USP) the 6th, 689, as No. 638 the patent case discloses, one liquid glutinous brilliant material is to be coated on earlier on the substrate, is baked into B rank stickiness glued membrane again, in order to this wafer of gluing; But the glutinous brilliant material 120 in this kind B rank can residually have micro air bubble 121, makes sticking together of substrate and wafer have micro air bubble 121 between face and the gap in generation cavity, influences glutinous brilliant intensity, even can cause the delamination of this wafer 130.
This shows that above-mentioned existing integrated circuits method for packing obviously still has inconvenience and defective, and demands urgently further being improved in method and use.In order to solve the problem that integrated circuit packaging method exists, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and conventional method does not have appropriate method to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of integrated circuit packaging method of new non adhesive tape adhesive crystal type, just become the current industry utmost point to need improved target.
Because the defective that above-mentioned existing integrated circuits method for packing exists, the inventor enriches practical experience and professional knowledge for many years based on being engaged in this type of product design manufacturing, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of integrated circuit packaging method of new non adhesive tape adhesive crystal type, can improve general existing integrated circuits method for packing, make it have more practicality.Through constantly research, design, and after studying repeatedly and improving, create the present invention who has practical value finally.
Summary of the invention
Main purpose of the present invention is, overcome the defective that the existing integrated circuits method for packing exists, and provide a kind of integrated circuit packaging method of new non adhesive tape adhesive crystal type, technical problem to be solved is to make it stick brilliant material after a substrate in coating one liquid state, step by a deaeration, remove the micro air bubble in the glutinous brilliant material of this liquid state, be beneficial in the step of first baking, should become a closely knit glutinous epitaxial by the glutinous brilliant material semi-solid preparation of liquid state, but by this closely knit glutinous epitaxial gluing one wafer to this substrate, and then can reach the effect that strengthens glutinous brilliant intensity and avoid the wafer delamination, thereby be suitable for practicality more.
Another object of the present invention is to, a kind of integrated circuit packaging method of new non adhesive tape adhesive crystal type is provided, technical problem to be solved is to make it carry out the step of a deaeration before first baking, one substrate is placed a vacuum state (for example being not more than the pressure of 2Torr) and is aided with the concussion mode, make it remove the micro air bubble in the liquid glutinous brilliant material on this substrate, be beneficial to be baked into a closely knit glutinous epitaxial, thereby be suitable for practicality more.
The object of the invention to solve the technical problems is to adopt following technical scheme to realize.The integrated circuit packaging method of a kind of non adhesive tape adhesive crystal type that proposes according to the present invention, it may further comprise the steps: at least one substrate is provided, and it is to have a upper surface, a lower surface and at least one open slot; Coating one liquid glutinous brilliant material is in this upper surface of this substrate; Carry out the step of a deaeration, to remove the micro air bubble in the glutinous brilliant material of this liquid state; Carry out the step of baking for the first time, making the glutinous brilliant material of this liquid state is that semi-cured state becomes a closely knit glutinous epitaxial; To this upper surface of this substrate, this wafer is to have a plurality of weld pads that are positioned at this active surface by an active surface of this closely knit glutinous epitaxial gluing one wafer, and those weld pads are to be revealed in this open slot; And carry out the step of baking for the second time, to solidify this closely knit glutinous epitaxial.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, wherein in the step of deaeration, this substrate is to place a vacuum state, and is aided with the concussion mode and removes micro air bubble in the glutinous brilliant material of this liquid state.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, the pressure of wherein said vacuum state is to be not more than 2Torr.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, wherein said those weld pads are the central authorities that are positioned at this active surface of this wafer.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, it comprises a step that electrically connects in addition, and a plurality of bonding wires are to electrically connect those weld pads to this substrate via this open slot.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, it also comprises the step of a sealing in addition, to seal those bonding wires.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, it comprises the step that a soldered ball engages in addition, and it is this lower surface that a plurality of soldered balls is engaged to this substrate.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, it comprises the step of a substrate cut in addition, and the path of wherein cutting this substrate is the two ends by this open slot.
The object of the invention to solve the technical problems also realizes by the following technical solutions.The integrated circuit packaging method of a kind of non adhesive tape adhesive crystal type that proposes according to the present invention, it may further comprise the steps: at least one substrate is provided, and it is to have a upper surface and a lower surface; Coating one liquid glutinous brilliant material is in this upper surface of this substrate; Carry out the step of a deaeration, to remove the micro air bubble in the glutinous brilliant material of this liquid state; Carry out the step of baking for the first time, making the glutinous brilliant material of this liquid state is that semi-cured state becomes a closely knit glutinous epitaxial; Carry out a glutinous brilliant step, to this upper surface of this substrate, this wafer is to have a plurality of weld pads by this closely knit glutinous epitaxial gluing one wafer; Those weld pads that electrically connect this wafer are to this substrate; And carry out the baking procedure second time, to solidify this closely knit glutinous epitaxial.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, in the step of wherein said deaeration, this substrate is to place a vacuum state, and is aided with the concussion mode and removes micro air bubble in the glutinous brilliant material of this liquid state.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, the pressure of wherein said vacuum state is to be not more than 2Torr.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, wherein said those weld pads are the central authorities that are positioned at this active surface of this wafer.
The integrated circuit packaging method of aforesaid non adhesive tape adhesive crystal type, it comprises the step that a soldered ball engages in addition, and it is this lower surface that a plurality of soldered balls is engaged to this substrate.
The present invention compared with prior art has tangible advantage and beneficial effect.As known from the above, in order to achieve the above object, according to the integrated circuit packaging method of non adhesive tape adhesive crystal type of the present invention, at first, provide at least one substrate, it is to have a upper surface, a lower surface and at least one open slot.Afterwards, coating one liquid glutinous brilliant material is in this upper surface of this substrate.Afterwards, carry out the step of a deaeration, to remove the micro air bubble in the glutinous brilliant material of this liquid state.Afterwards, carry out the step of baking for the first time, making the glutinous brilliant material of this liquid state is that semi-cured state becomes a closely knit glutinous epitaxial.And can be by an active surface of this closely knit glutinous epitaxial gluing one wafer to this upper surface of this substrate, this wafer is to have a plurality of weld pads that are positioned at this active surface, those weld pads are to be revealed in this open slot.In addition, can carry out the step of baking for the second time, to solidify this closely knit glutinous epitaxial.This step of toasting for the second time is performable in after the glutinous crystalline substance or in the step of follow-up sealing.
By technique scheme, the integrated circuit packaging method of non adhesive tape adhesive crystal type of the present invention has following advantage at least:
1, the present invention sticks brilliant material after a substrate in coating one liquid state, again by the step of a deaeration, remove the micro air bubble in the glutinous brilliant material of this liquid state, can be beneficial in the step of first baking, should become a closely knit glutinous epitaxial by the glutinous brilliant material semi-solid preparation of liquid state, but by this closely knit glutinous epitaxial gluing one wafer to this substrate, and then can reach the effect that strengthens glutinous brilliant intensity and avoid the wafer delamination, thereby be suitable for practicality more.
2, the present invention is a step of carrying out a deaeration before first baking, one substrate is placed a vacuum state (for example being not more than the pressure of 2Torr) and is aided with the concussion mode, make the micro air bubble in the liquid glutinous brilliant material of its removal on this substrate, and can be beneficial to be baked into a closely knit glutinous epitaxial, thereby be suitable for practicality more.
In sum, the integrated circuit packaging method of non adhesive tape adhesive crystal type of the present invention is earlier a liquid glutinous brilliant material to be coated on the substrate; And the step of carrying out a deaeration, this substrate is placed a vacuum state, to remove the micro air bubble in the glutinous brilliant material of this liquid state; Carry out the step of baking for the first time again, so that should the glutinous brilliant material of liquid state be semi-cured state forming a closely knit glutinous epitaxial on this substrate, and utilize this closely knit glutinous epitaxial gluing one wafer to this substrate; Carry out a step of toasting for the second time again, with this closely knit glutinous epitaxial of full solidification.Therefore the utilization of the present invention step of before the step of baking for the first time, carrying out deaeration, can remove the micro air bubble in the glutinous brilliant material of this liquid state, and can be transformed into closely knit glutinous epitaxial on this substrate, thus glutinous brilliant intensity can be strengthened, and can avoid the delamination of this wafer.The present invention has above-mentioned outstanding advantage and practical value, no matter it is all having bigger improvement on method or on the function, have technically than much progress, and produced handy and practical effect, and the effect that has enhancement than the existing integrated circuits method for packing, thereby being suitable for practicality more, and having the extensive value of industry, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the partial cross-sectional perspective view that has known IC circuit packing structure now.
Fig. 2 is the schematic cross-section that has known IC circuit packing structure now.
Fig. 3 is the block flow diagram according to integrated circuit packaging method one specific embodiment of non adhesive tape adhesive crystal type of the present invention.
Fig. 4 A to Fig. 4 H is according to a specific embodiment of the present invention, is the schematic cross-section of a substrate in non adhesive tape adhesive crystal type integrated circuit encapsulation process.
Fig. 5 is according to a specific embodiment of the present invention, is the upper surface schematic diagram of this substrate.
1: a substrate 2 is provided: coating one liquid glutinous brilliant material is in this substrate
3: deaeration 4: baking for the first time
5: glutinous brilliant 6: baking for the second time
7: electrically connect 8: sealing
9: soldered ball engages 10: substrate cut
110: substrate 111: upper surface
112: lower surface 113: open slot
120: glutinous brilliant material 121: bubble
130: wafer 131: active surface
132: weld pad 140: bonding wire
150: adhesive body 160: soldered ball
210: substrate 211: upper surface
212: lower surface 213: open slot
214: in connect and refer to 215: the ball pad
216: cutting path 220: liquid glutinous brilliant material
221: bubble 222: closely knit glutinous epitaxial
230: wafer 21: active surface
232: weld pad 240: bonding wire
250: adhesive body 260: soldered ball
270: cutting tool
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, its embodiment of integrated circuit packaging method, method, step, feature and the effect thereof of the non adhesive tape adhesive crystal type that foundation the present invention is proposed, describe in detail as after.
See also shown in Figure 3, the integrated circuit packaging method of the non adhesive tape adhesive crystal type of preferred embodiment of the present invention mainly may further comprise the steps: the step 2 of the step 1 of " substrate is provided ", " coating one liquid glutinous brilliant material is in this substrate ", the step 3 of " deaeration ", the step 4 of " baking for the first time ", the step 5 of " glutinous brilliant ", step 6, the step 7 of " electric connection ", the step 8 of " sealing ", the step 9 of " soldered ball joint " and the step 10 of " substrate cut " of " baking for the second time ".Now with its detailed description as after.
At first, in the step 1 that a substrate is provided, shown in Fig. 4 A, provide at least one substrate 210, this substrate 210 is to have a upper surface 211, a lower surface 212 and at least one open slot 213, and wherein this open slot 213 is to run through this upper surface 211 and this lower surface 212.And this substrate 210 is to can be a printed circuit board (PCB), a ceramic circuit board or a circuit film.In the present embodiment, connect in a plurality of and refer to that 214 is this lower surface 212 and contiguous these open slots 213 that are formed at this substrate 210, and a plurality of ball pad 215 is these lower surfaces 212 that can be formed at this substrate 210.
Afterwards, in the step 2 of this substrate, shown in Fig. 4 B, a liquid glutinous brilliant material 220 is coated on this upper surface 211 of this substrate 210 at coating one liquid glutinous brilliant material, its application pattern can be screen printing, steel plate printing, spot printing, spraying or the like, is preferable with screen printing wherein.As shown in Figure 5, the glutinous brilliant material 220 of this liquid state is these upper surfaces 211 that patterning is covered in this substrate 210, but after suitable baking the gluing wafer.In the present embodiment, the glutinous brilliant material 220 of this liquid state is to have required multistage curing characteristics, even can include the colloid mixture of various characteristics, for example have to be mixed with silica gel to promote elasticity, to be mixed with metal microparticle (as silver powder) to promote thermal conductivity, to be mixed with the heat-curable glue of different curing temperatures even can be mixed with various nano materials to reach the colloid of special purpose.In order to reach the good mixing effect, when encapsulating under normal pressure, the glutinous brilliant material 220 of this liquid state can have micro air bubble 221.
Afterwards, carry out the step 3 of a deaeration especially.Shown in Fig. 4 C, by deaeration to remove the micro air bubble 221 in the glutinous brilliant material 220 of this liquid state.In concrete operations, this substrate 210 can be positioned over one can isolate in the deaeration machine (not drawing among the figure) of ambient pressure, and vacuumize and make this substrate 210 place a vacuum state, for example the pressure of this vacuum state is to be not more than 2Torr, vacuum state can be kept 10 minutes to 60 minutes.Preferably, and be aided with the concussion mode, for example ultrasonic waves concussion with the micro air bubble 221 in the glutinous brilliant material 220 of this liquid state of effective removal, more can be guaranteed mixing of the glutinous brilliant material 220 of this liquid state.
After the step 3 of above-mentioned deaeration, can carry out the step 4 of baking for the first time.Shown in Fig. 4 D, the glutinous brilliant material 220 of this liquid state changes a closely knit glutinous epitaxial 222 on substrate 210 into for semi-cured state (for example B scalariform attitude).In the present embodiment, this closely knit glutinous epitaxial 222 is to have B rank characteristic, and possesses glutinous brilliant ability.In addition, may will be excluded at the most micro air bubbles 221 in the glutinous brilliant material 220 of this liquid state originally.
In glutinous brilliant step 5, see also shown in Fig. 4 E, at least one wafer 230 is to paste to this substrate 210 by this closely knit glutinous epitaxial 222, it is under suitable glutinous brilliant pressure and heating-up temperature, this closely knit glutinous epitaxial 222 adhesion that become is with in conjunction with an active surface 231 of this wafer 230 this upper surface 211 to this substrate 210.In the present embodiment, a plurality of weld pads 232 of this wafer 230 are to be positioned at this active surface 231, for example are positioned at the central authorities of this active surface 231.And after glutinous brilliant step 5, those weld pads 232 are these open slots 213 that are revealed in this substrate 210.
Afterwards, can carry out the step 6 of baking for the second time,, for example be solidified into C scalariform attitude with this closely knit glutinous epitaxial 222 of full solidification.This step 6 of toasting for the second time is to may be implemented in glutinous brilliant step 5 back or delay to the step 8 in sealing and carry out simultaneously.In addition, in the step 7 that electrically connects, see also shown in Fig. 4 F, it is to pass through this open slot 213 with a plurality of bonding wires 240 that routing forms, connect in those of those weld pads 232 that connect this wafer 230 and this substrate 210 and refer to 214, reach electric connection between this wafer 230 and this substrate 210.
Afterwards, in the step 8 of sealing, shown in Fig. 4 G, an adhesive body 250 is these open slots 213 that are formed at this substrate 210, to seal those bonding wires 240.In the present embodiment, this adhesive body 250 is that it is this upper surface 211 that more is formed at this substrate 210 for pressing mold forms, to seal this wafer 230 and this closely knit glutinous epitaxial 222.
Afterwards, in the step 9 that soldered ball engages, shown in Fig. 4 H, utilize solder printing and reflow or soldered ball to plant the mode that connects, a plurality of soldered balls 260 are engaged to ball pad 215 at this lower surface 212 of this substrate 210, with the encapsulation kenel that constitutes the window sphere grid array (Window Ball Grid Array, WBGAPackage).At last, carry out the step 10 of this substrate cut, utilize these substrates 210 of a cutting instrument 270 cutting indivedual IC circuit packing structure that pluralize.See also shown in Figure 5, in the present embodiment, its cutting path 216 is the two ends by this open slot 213 of this substrate 210, can go out substrates in same packaging structure two times by these substrate 210 cutting and separating, wherein those substrate is to integrally combine with these wafer 230 gluings and with this adhesive body 250.
Therefore, in the integrated circuit packaging method of non adhesive tape adhesive crystal type of the present invention, utilization is carried out deaeration before the step 4 of baking for the first time step 3, can remove the micro air bubble 221 in the glutinous brilliant material 220 of this liquid state, and can be transformed into closely knit glutinous epitaxial 222 on this substrate 210, so can strengthen glutinous brilliant intensity, and can avoid the delamination of this wafer 230, be very suitable for practicality.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be not break away from the technical solution of the present invention content, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (13)
1, a kind of integrated circuit packaging method of non adhesive tape adhesive crystal type is characterized in that it may further comprise the steps:
At least one substrate is provided, and it is to have a upper surface, a lower surface and at least one open slot;
Coating one liquid glutinous brilliant material is in this upper surface of this substrate;
Carry out the step of a deaeration, to remove the micro air bubble in the glutinous brilliant material of this liquid state;
Carry out the step of baking for the first time, making the glutinous brilliant material of this liquid state is that semi-cured state becomes a closely knit glutinous epitaxial;
To this upper surface of this substrate, this wafer is to have a plurality of weld pads that are positioned at this active surface by an active surface of this closely knit glutinous epitaxial gluing one wafer, and those weld pads are to be revealed in this open slot; And
Carry out the step of baking for the second time, to solidify this closely knit glutinous epitaxial.
2, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 1 is characterized in that wherein in the step of deaeration, this substrate is to place a vacuum state, and is aided with the concussion mode and removes micro air bubble in the glutinous brilliant material of this liquid state.
3, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 2, the pressure that it is characterized in that wherein said vacuum state is to be not more than 2Torr.
4, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 1 is characterized in that wherein said those weld pads are the central authorities that are positioned at this active surface of this wafer.
5, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 1 is characterized in that it comprises a step that electrically connects in addition, and a plurality of bonding wires are to electrically connect those weld pads to this substrate via this open slot.
6, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 5 is characterized in that it comprises the step of a sealing in addition, to seal those bonding wires.
7, according to the integrated circuit packaging method of claim 1 or 6 described non adhesive tape adhesive crystal types, it is characterized in that it comprises the step that a soldered ball engages in addition, it is this lower surface that a plurality of soldered balls is engaged to this substrate.
8, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 1 is characterized in that it comprises the step of a substrate cut in addition, and the path of wherein cutting this substrate is the two ends by this open slot.
9, a kind of integrated circuit packaging method of non adhesive tape adhesive crystal type is characterized in that it may further comprise the steps:
At least one substrate is provided, and it is to have a upper surface and a lower surface;
Coating one liquid glutinous brilliant material is in this upper surface of this substrate;
Carry out the step of a deaeration, to remove the micro air bubble in the glutinous brilliant material of this liquid state;
Carry out the step of baking for the first time, making the glutinous brilliant material of this liquid state is that semi-cured state becomes a closely knit glutinous epitaxial;
Carry out a glutinous brilliant step, to this upper surface of this substrate, this wafer is to have a plurality of weld pads by this closely knit glutinous epitaxial gluing one wafer;
Those weld pads that electrically connect this wafer are to this substrate; And
Carry out the baking procedure second time, to solidify this closely knit glutinous epitaxial.
10, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 9 is characterized in that in the step of wherein said deaeration that this substrate is to place a vacuum state, and is aided with the concussion mode and removes micro air bubble in the glutinous brilliant material of this liquid state.
11, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 10, the pressure that it is characterized in that wherein said vacuum state is to be not more than 2Torr.
12, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 9 is characterized in that wherein said those weld pads are the central authorities that are positioned at this active surface of this wafer.
13, the integrated circuit packaging method of non adhesive tape adhesive crystal type according to claim 9 is characterized in that it comprises the step that a soldered ball engages in addition, and it is this lower surface that a plurality of soldered balls is engaged to this substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610065147 CN100505194C (en) | 2006-03-21 | 2006-03-21 | Integrated circuit packaging method in non-adhesive tape crystal adhering mode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610065147 CN100505194C (en) | 2006-03-21 | 2006-03-21 | Integrated circuit packaging method in non-adhesive tape crystal adhering mode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101043010A true CN101043010A (en) | 2007-09-26 |
| CN100505194C CN100505194C (en) | 2009-06-24 |
Family
ID=38808381
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610065147 Expired - Fee Related CN100505194C (en) | 2006-03-21 | 2006-03-21 | Integrated circuit packaging method in non-adhesive tape crystal adhering mode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100505194C (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104253116A (en) * | 2013-06-26 | 2014-12-31 | 英特尔公司 | Package assembly for embedded die and associated techniques and configurations |
| CN107195760A (en) * | 2017-04-26 | 2017-09-22 | 安徽欧瑞特照明有限公司 | A kind of LED packaging technologies |
| CN114023863A (en) * | 2021-09-15 | 2022-02-08 | 深圳市华笙光电子有限公司 | Wafer-level LED chip packaging method |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6385049B1 (en) * | 2001-07-05 | 2002-05-07 | Walsin Advanced Electronics Ltd | Multi-board BGA package |
| TW497236B (en) * | 2001-08-27 | 2002-08-01 | Chipmos Technologies Inc | A soc packaging process |
| JP2003158157A (en) * | 2001-11-26 | 2003-05-30 | Shindo Denshi Kogyo Kk | IC device mounting method for semiconductor device |
| JP3870106B2 (en) * | 2002-02-22 | 2007-01-17 | ソニーケミカル＆インフォメーションデバイス株式会社 | Bonding method |
| TW582078B (en) * | 2002-11-29 | 2004-04-01 | Chipmos Technologies Bermuda | Packaging process for improving effective die-bonding area |
| CN1298031C (en) * | 2003-07-29 | 2007-01-31 | 南茂科技股份有限公司 | Encapsulation Process for Enhancing Effective Die Bonding Area |
-
2006
- 2006-03-21 CN CN 200610065147 patent/CN100505194C/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104253116A (en) * | 2013-06-26 | 2014-12-31 | 英特尔公司 | Package assembly for embedded die and associated techniques and configurations |
| US9685414B2 (en) | 2013-06-26 | 2017-06-20 | Intel Corporation | Package assembly for embedded die and associated techniques and configurations |
| US10014263B2 (en) | 2013-06-26 | 2018-07-03 | Intel Corporation | Package assembly for embedded die and associated techniques and configurations |
| US10304785B2 (en) | 2013-06-26 | 2019-05-28 | Intel Corporation | Package assembly for embedded die and associated techniques and configurations |
| US10522483B2 (en) | 2013-06-26 | 2019-12-31 | Intel Corporation | Package assembly for embedded die and associated techniques and configurations |
| CN107195760A (en) * | 2017-04-26 | 2017-09-22 | 安徽欧瑞特照明有限公司 | A kind of LED packaging technologies |
| CN114023863A (en) * | 2021-09-15 | 2022-02-08 | 深圳市华笙光电子有限公司 | Wafer-level LED chip packaging method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100505194C (en) | 2009-06-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1219322C (en) | Resin sealing semi-conductor device and its producing method | |
| CN1208820C (en) | Semiconductor wafer, semiconductor device and manufacturing method thereof | |
| CN1577841A (en) | Stacked chip semiconductor device and method for manufacturing the same | |
| CN1777988A (en) | Taped lead frames and methods of making and using the same in semiconductor packaging | |
| CN1835222A (en) | Semiconductor device and a manufacturing method of the same | |
| CN1505150A (en) | Semiconductor device and method of manufacturing the same | |
| CN1945805A (en) | Semiconductor packaging method and carrier for semiconductor packaging | |
| CN1287452C (en) | Window type ball grid array semiconductor package with lead frame as carrier and its manufacturing method | |
| CN1797728A (en) | Glue filling structure and method for wafer level chip size packaging | |
| CN100336217C (en) | Lead wire, resin closed semiconductor device and its mfg. method | |
| CN1295768C (en) | Ultrathin pinless packaging process of integrated circuit and discrete component and its packaging structure | |
| CN101043010A (en) | Integrated circuit packaging method without adhesive tape | |
| CN1257540C (en) | Semiconductor chip package method and its package structure | |
| CN1354507A (en) | Semiconductor package with glue overflow prevention structure and manufacturing method thereof | |
| CN1855450A (en) | High heat dissipation semiconductor package and manufacturing method thereof | |
| CN1133205C (en) | Component packaging method with ceramic substrate and grain structure | |
| CN1157781C (en) | Integrated circuit package structure and manufacturing method thereof | |
| CN114121685A (en) | Method for manufacturing semiconductor device and corresponding semiconductor device | |
| CN1661814A (en) | Photosensitive semiconductor package with support and manufacturing method thereof | |
| CN1303678C (en) | Semiconductor package with chip pad opening and manufacturing method thereof | |
| CN1702846A (en) | Novel integrated circuit or discrete components ultra-thin non-pin packing technology and packing arrangement | |
| CN1617316A (en) | Encapsulation process for increasing effective die bonding area and B-stage film layer for implementing the encapsulation process | |
| CN1779931A (en) | Heat-dissipating package structure and its manufacturing method | |
| CN101043011A (en) | Wafer stacking method to prevent delamination between wafers | |
| CN1992248A (en) | Package structure with slotted metal film carrying wire-bonded chips |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090624 Termination date: 20150321 |
|
| EXPY | Termination of patent right or utility model |