CN101021659A - Liquid crystal pixel, manufacturing method thereof, and liquid crystal display - Google Patents

Abstract

The present invention provides a liquid crystal pixel and a manufacturing method thereof and a liquid crystal display, wherein the liquid crystal pixel comprises a data line, a doped polysilicon layer and a shielding metal layer. The doped polysilicon layer is located below the data line, and its projection in the vertical direction does not overlap with the data line. The shielding metal layer is located between the data line and the doped polysilicon layer, and forms a storage capacitor with the doped polysilicon layer. In addition, the present invention also provides a manufacturing method for a liquid crystal pixel. The method stores image data through a storage capacitor formed by the shielding metal layer and the doped polysilicon layer, and does not cause a burden on the data line, and can avoid parasitic capacitance that may be formed between the pixel electrode and the data line.

Description

Liquid crystal pixel, manufacturing method thereof, and liquid crystal display

technical field

The invention relates to the field of liquid crystal pixels, and particularly relates to a liquid crystal pixel capable of reducing the load of data lines in a liquid crystal panel, a manufacturing method thereof and a liquid crystal display.

Background technique

In recent years, due to the rapid development of liquid crystal displays and many advantages such as light weight, low power consumption and zero radiation, they are widely used in various electronic products. In a general active matrix liquid crystal display, the liquid crystal pixels are arranged in an array, and the action of each liquid crystal pixel is controlled by an active element such as a thin film transistor.

Please refer to FIG. 1 , which shows a schematic diagram of a display array in a conventional liquid crystal display. The display array 100 includes several scan lines 102 and several data lines 104 , and the scan lines 102 and the data lines 104 intersect to form a plurality of pixel regions 106 . Each pixel area 106 is mainly composed of two substrates and liquid crystal molecules sealed between the substrates, and one of the substrates has a pixel electrode, and the other substrate has a common electrode. The potential of the common electrodes of the pixel regions 106 located in the same column is controlled by a common electrode line 108 .

For a thin film transistor liquid crystal display (TFT-LCD), it uses individual thin film transistors to apply voltage to the corresponding pixel electrodes, and uses the potential difference provided between the pixel electrodes and the common electrodes on the two substrates to determine the liquid crystal. The direction of the crystal axis of the molecule makes the local liquid crystal appear light-transmitting or opaque.

Generally speaking, in order to avoid the formation of parasitic capacitance between the pixel region 106 and the data line 104, the two sides of the pixel region 106 are usually designed not to overlap with the data line 104, but in this way, the gap between the pixel region 106 and the data line 104 However, light leakage may occur. Therefore, the shielding metal layer 110 can be disposed on both sides of the pixel region 106 to block possible light leakage between the pixel region 106 and the data line 104 .

Please refer to FIG. 2 , which shows a cross-sectional view of part A1-A2 in FIG. 1 . The doped polysilicon layer 200 is located below the data line 104 and the shielding metal layer 110 , and its projection in the vertical direction overlaps with the data line 104 and the shielding metal layer 110 . Since the shielding metal layer 110 is connected to the common electrode line 108 in FIG. 1 , and its projection in the vertical direction overlaps the doped polysilicon layer 200 , a storage capacitor Cst is formed with the doped polysilicon layer 200 due to the coupling effect. In addition, since the projection of the shielding metal layer 110 in the vertical direction also overlaps with the data line 104 , it also forms a storage capacitor (not shown) with the data line 104 . However, the unnecessary storage capacitance formed by the doped polysilicon layer 200 and the data line 104 also consumes current during the operation of the liquid crystal pixel, thus causing an additional load burden on the data line 104 .

Therefore, there is a need for a liquid crystal pixel that can reduce the load on the data lines and has a storage capacitor to temporarily store data.

Contents of the invention

The object of the present invention is to provide a liquid crystal pixel, its manufacturing method and a liquid crystal display to overcome the defects of the prior art.

According to an embodiment of the present invention, a liquid crystal pixel is provided. The liquid crystal pixel includes a data line, a doped polysilicon layer and a shielding metal layer. The doped polysilicon layer is located below the data lines, and its projection in the vertical direction does not overlap with the data lines. The shielding metal layer is located between the data line and the doped polysilicon layer, and forms a storage capacitor with the doped polysilicon layer.

According to another embodiment of the present invention, a liquid crystal pixel is provided. The liquid crystal pixel includes a substrate, a doped polysilicon layer, a grid oxide layer, a first shielding metal layer, an inner dielectric layer and a protection layer. The doped polysilicon layer is formed on the substrate, and the gate oxide layer is formed on the substrate and covers the doped polysilicon layer. The first shielding metal layer is formed on the gate oxide layer, and a storage capacitor is formed between the first shielding metal layer and the doped polysilicon layer. The inner layer dielectric layer is formed on the gate oxide layer and covers the first shielding metal layer. The protective layer is located on the inner dielectric layer and covers the data lines.

According to another embodiment of the present invention, a liquid crystal display including the liquid crystal pixels is proposed.

According to yet another embodiment of the present invention, a method for manufacturing a liquid crystal pixel is provided. The method includes forming a doped polysilicon layer on a substrate; forming a gate oxide layer on the substrate and covering the doped polysilicon layer; forming a first shielding metal layer on the gate oxide layer, so that the first shielding metal layer forming a storage capacitor with the doped polysilicon layer; forming an inner layer dielectric layer on the gate oxide layer and covering the first shielding metal layer on the gate oxide layer; forming a data line on the inner layer dielectric layer, Make the projection of the data line in the vertical direction not overlap with the doped polysilicon layer; and form a protection layer on the inner dielectric layer and cover the data line.

The liquid crystal pixel of the present invention stores image data by shielding the storage capacitor formed by the metal layer and the doped polysilicon layer, without burdening the data line, and avoiding the possible parasitic capacitance formed between the pixel electrode and the data line.

Description of drawings

FIG. 1 shows a schematic diagram of a display array in a conventional liquid crystal display;

Figure 2 is a cross-sectional view of part A1-A2 in Figure 1;

FIG. 3 shows a schematic diagram of a display array in a liquid crystal display according to an embodiment of the present invention;

Fig. 4 depicts a sectional view of part B1-B2 in Fig. 3;

FIG. 5 is a flowchart of a method for manufacturing a liquid crystal pixel according to an embodiment of the present invention.

Description of main component symbols:

100, 300: display array 200, 412: doped polysilicon layer

102, 302: Scanning lines 306a, 306b: Pixel electrodes

104, 304: Data cable 400: Substrate

106, 306: Pixel area 410: Gate oxide layer

108, 308: common electrode wire 420: inner dielectric layer

110, 312, 314: shielding metal layer 430: protective layer

Steps: 502-514

Detailed ways

Please refer to FIG. 3 , which shows a schematic diagram of a display array in a liquid crystal display according to an embodiment of the present invention. The display array 300 includes several scan lines 302 and several data lines 304 , and the scan lines 302 and the data lines 304 intersect to form a plurality of pixel regions 306 . The potential of the common electrode of each row of pixel regions 306 is controlled by a common electrode line 308 . In addition, two sides of each pixel area 306 also include shielding metal layers 312 and 314 , wherein the shielding metal layer 312 is connected to the common electrode line 308 , and the shielding metal layer 314 is not connected to the common electrode line 308 .

Please refer to FIG. 4 , which shows a cross-sectional view of part B1-B2 in FIG. 3 . The liquid crystal pixel includes data lines 304 , a doped polysilicon layer 412 and a shielding metal layer 312 . The doped polysilicon layer 412 is located below the data line 304 , and its projection in the vertical direction does not overlap with the data line 304 . The shielding metal layer 312 is located between the data line 304 and the doped polysilicon layer 412 , and forms a storage capacitor Cst with the doped polysilicon layer 412 .

On the other hand, the liquid crystal pixel further includes a substrate 400 , a gate oxide layer 410 , an interlayer dielectric layer 420 and a protection layer 430 . A doped polysilicon layer 412 is formed on the substrate 400 , and a gate oxide layer 410 is also formed on the substrate 400 and covers the doped polysilicon layer 412 . Both the ILD layer 420 and the shielding metal layer 312 are located on the gate oxide layer 410 , and the ILD layer 420 covers the shielding metal layer 312 , wherein the shielding metal layer 312 and the doped polysilicon layer 412 form a storage capacitor Cst. In addition, the passivation layer 430 and the data lines 304 are located on the ILD layer 420 , and the passivation layer 430 covers the data lines 304 , wherein the vertical projection of the data lines 304 does not overlap with the doped polysilicon layer 412 .

In addition, the ILD layer 420 also covers the shielding metal layer 314 , and the projection of the shielding metal layer 314 in the vertical direction does not overlap with the doped polysilicon layer 412 , that is, does not form a storage capacitor with the doped polysilicon layer 412 . Wherein, the shielding metal layer 312 and the shielding metal layer 314 are respectively located on two sides below the data line 304 , and their projections in the vertical direction partially overlap the data line 304 respectively.

In addition, the protective layer 430 also includes the pixel electrodes 306a and 306b in the pixel area 306, wherein the projection of the pixel electrode 306a in the vertical direction partially overlaps with the shielding metal layer 312, but does not overlap with the data line 304, and the pixel electrode 306b The projection in the vertical direction partially overlaps with the shielding metal layer 314 , but does not overlap with the data line 304 .

FIG. 5 shows a flowchart of a liquid crystal pixel manufacturing method according to an embodiment of the present invention, and please refer to FIG. 4 and FIG. 5 . In step 502 , a doped polysilicon layer 412 is first formed on the substrate 400 , wherein the doped ions in the doped polysilicon layer 412 can be provided by N-type or P-type dopants. Next, in step 504 , a gate oxide layer 410 is formed on the substrate 400 to cover the doped polysilicon layer 412 . In the subsequent step 506 , a shielding metal layer 312 is formed on the gate oxide layer 410 , so that the shielding metal layer 312 and the doped polysilicon layer 412 form a storage capacitor Cst. Furthermore, in step 508, an interlayer dielectric layer 420 is formed to cover the shielding metal layer 312 and the gate oxide layer 410, wherein the material for forming the interlayer dielectric layer 420 can be a dielectric such as silicon nitride or silicon oxide. Material. Then, in step 510 , the data line 304 is formed on the interlayer dielectric layer 420 so that the projection of the data line 304 in the vertical direction does not overlap with the doped polysilicon layer 412 . Then in step 512 , a protection layer 430 is formed to cover the data line 304 and the ILD layer 420 . Finally, in step 514, the pixel electrodes 306a and 306b are formed on the protection layer 430, so that the projection of the pixel electrode 306a in the vertical direction partially overlaps with the shielding metal layer 312, but does not overlap with the data line 304, and the pixel electrode 306b is in the vertical direction. The projection in the vertical direction partially overlaps with the shielding metal layer 314 , but does not overlap with the data line 304 , so as to complete the manufacture of the liquid crystal pixel. Wherein, the material for forming the pixel electrodes 306a and 306b includes transparent conductive materials such as indium tin oxide (ITO).

In step 506 , another shielding metal layer 314 may be formed on the gate oxide layer 410 when the shielding metal layer 312 is formed on the gate oxide layer 410 . Wherein, the materials forming the shielding metal layers 312 and 314 may include molybdenum, chromium or tungsten-molybdenum alloy and other materials with shielding and conductive properties. The projection of the shielding metal layer 314 in the vertical direction does not overlap with the doped polysilicon layer 412 , that is, does not form a storage capacitor Cst with the doped polysilicon layer 412 . Moreover, projections of the shielding metal layer 312 and the shielding metal layer 314 in the vertical direction partially overlap the data lines 304 respectively.

In addition, the method further includes forming a common electrode line, so that the shielding metal layer 312 is connected to the common electrode line, while the shielding metal layer 314 is not connected to the common electrode line.

In this way, image data can be stored by shielding the storage capacitor Cst formed by the metal layer 312 and the doped polysilicon layer 412 without burdening the data line 304 . In addition, since the two pixel electrodes 306 a and 306 b do not overlap with the data line 304 , the possible parasitic capacitance formed between the two pixel electrodes 306 a and 306 b and the data line 304 can also be avoided.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field may make various modifications and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the claims.

Claims (18)

1. A liquid crystal pixel, characterized in that the liquid crystal pixel comprises: a data line; a doped polysilicon layer located below the data line, wherein the vertical projection of the doped polysilicon layer does not overlap with the data line; and A first shielding metal layer is located between the data line and the doped polysilicon layer, and forms a storage capacitor with the doped polysilicon layer. 2. The liquid crystal pixel according to claim 1, wherein the liquid crystal pixel further comprises: A second shielding metal layer, wherein the first shielding metal layer and the second shielding metal layer are respectively located on two sides below the data line. 3. The liquid crystal pixel according to claim 2, wherein the projection of the second shielding metal layer in the vertical direction does not overlap with the doped polysilicon layer. 4 . The liquid crystal pixel according to claim 2 , wherein projections of the first shielding metal layer and the second shielding metal layer in the vertical direction partially overlap the data lines respectively. 5. The liquid crystal pixel according to claim 2, wherein the liquid crystal pixel further comprises: A first pixel electrode, located above the data line, wherein the projection of the first pixel electrode in the vertical direction partially overlaps with the first shielding metal layer, but does not overlap with the data line; and A second pixel electrode is located above the data line, wherein the projection of the second pixel electrode in the vertical direction partially overlaps with the second shielding metal layer, but does not overlap with the data line. 6. The liquid crystal pixel according to claim 2, wherein the liquid crystal pixel further comprises a common electrode line, wherein the first shielding metal layer is connected to the common electrode line, and the second shielding metal layer layer is not connected to the common electrode line. 7. A liquid crystal display, characterized in that the liquid crystal display comprises the liquid crystal pixel according to claim 1, 2, 5 or 6. 8. A liquid crystal pixel, characterized in that the liquid crystal pixel comprises: a substrate; a doped polysilicon layer formed on the substrate; a gate oxide layer formed on the substrate and covering the doped polysilicon layer; a first shielding metal layer formed on the gate oxide layer, and the first shielding metal layer forms a storage capacitor with the doped polysilicon layer; an interlayer dielectric layer formed on the gate oxide layer and covering the first shielding metal layer; A protective layer is formed on the inner dielectric layer and covers the data lines. 9. The liquid crystal pixel according to claim 8, wherein the liquid crystal pixel further comprises: A second shielding metal layer is formed on the gate oxide layer, and the vertical projection of the second shielding metal layer does not overlap with the doped polysilicon layer. 10 . The liquid crystal pixel according to claim 9 , wherein projections of the first shielding metal layer and the second shielding metal layer in the vertical direction partially overlap the data lines respectively. 11 . 11. The liquid crystal pixel according to claim 9, wherein the liquid crystal pixel further comprises: a first pixel electrode located on the protective layer, wherein the projection of the first pixel electrode in the vertical direction partially overlaps with the first shielding metal layer, but does not overlap with the data line; and A second pixel electrode is located on the protective layer, wherein the projection of the second pixel electrode in the vertical direction partially overlaps with the second shielding metal layer, but does not overlap with the data line. 12. The liquid crystal pixel according to claim 9, wherein the liquid crystal pixel further comprises a common electrode line, wherein the first shielding metal layer is connected to the common electrode line, and the second shielding metal layer layer is not connected to the common electrode line. 13. A liquid crystal display, characterized in that the liquid crystal display comprises the liquid crystal pixel according to claim 8, 9, 11 or 12. 14. A method for manufacturing a liquid crystal pixel, characterized in that the method comprises: forming a doped polysilicon layer on a substrate; forming a gate oxide layer on the substrate and covering the doped polysilicon layer; forming a first shielding metal layer on the gate oxide layer, so that the first shielding metal layer and the doped polysilicon layer form a storage capacitor; forming an interlayer dielectric layer on the gate oxide layer and covering the first shielding metal layer; forming a data line on the interlayer dielectric layer, so that the projection of the data line in the vertical direction does not overlap with the doped polysilicon layer; and A protection layer is formed on the inner dielectric layer and covers the data line. 15. The manufacturing method according to claim 14, further comprising: forming a second shielding metal layer on the gate oxide layer and covered by the interlayer dielectric layer, And the projection of the second shielding metal layer in the vertical direction does not overlap with the doped polysilicon layer. 16 . The manufacturing method according to claim 15 , wherein projections of the first shielding metal layer and the second shielding metal layer in the vertical direction partially overlap the data lines respectively. 17. The manufacturing method according to claim 15, wherein the method further comprises: forming a first pixel electrode on the protective layer, so that the projection of the first pixel electrode in the vertical direction partially overlaps with the first shielding metal layer, but does not overlap with the data line; and A second pixel electrode is formed on the protection layer, so that the projection of the second pixel electrode in the vertical direction partially overlaps with the second shielding metal layer, but does not overlap with the data line. 18. The manufacturing method according to claim 15, further comprising forming a common electrode line so that the first shielding metal layer is connected to the common electrode line, and the second shielding metal layer layer is not connected to the common electrode line.

Images