CN101010871A - Receiver and method for wireless communications terminal - Google Patents
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Abstract
A wireless receiver (200) for receiving and demodulating a frequency modulated RF signal by a direct conversion procedure comprising an input signal path (101), a local oscillator (111), a first mixer (107) for mixing an output reference signal from the local oscillator with an input received signal to produce an in-phase component, a quadrature phase shifter (113) connected to the input signal path a second mixer (109) for mixing an output signal from the phase shifter with the input received signal to produce a quadrature component; and means (218) for producing an output demodulated information signal by producing a combining function of the in-phase and quadrature components; and characterised by means (214) for periodically detecting an error in the relative phase difference between the in-phase and quadrature components and for applying (217) a relative adjustment in phase difference to compensate for the detected error.
Description
Technical Field
The present invention relates to a receiver and method used in wireless communication, and a terminal using the same. In particular, the invention relates to a direct conversion receiver capable of demodulating Frequency Modulated (FM) (radio frequency) signals by decomposing (resolution) and using the in-phase (I) and quadrature (Q) components of the modulated signal.
Background
A conventional FM radio receiver constructed using a direct conversion architecture to detect I and Q components of a received signal has problems as described below. As will be described later, such a receiver can produce errors in the relative phase and amplitude between the I and Q components. This error, sometimes referred to as "quadrature imbalance," can cause distortion of the resulting output audio signal. This distortion is unacceptable to the user, especially under conditions when the received signal is fading or has a low signal-to-noise ratio. The prior art does not provide a satisfactory solution to this problem.
Disclosure of Invention
According to a first aspect of the present invention there is provided a radio receiver as claimed in claim 1 of the accompanying claims.
According to a second aspect of the present invention there is provided a method of wireless communication as claimed in claim 21 of the accompanying claims.
According to a third aspect of the present invention there is provided a wireless communication terminal as claimed in claim 22 of the accompanying claims.
Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:
drawings
Fig. 1 is a schematic block circuit diagram of a known direct conversion RF receiver.
FIG. 2 is a plot of the computed inner product L versus the imbalance phase angle α, illustrating a relationship useful in embodiments of the present invention;
fig. 3 is a schematic block circuit diagram of a direct conversion RF receiver embodying the present invention.
Fig. 4 is a schematic block circuit diagram of another direct conversion RF receiver embodying the present invention.
Fig. 5 is a graph of detector output versus local oscillator frequency offset illustrating a useful relationship in the circuit shown in fig. 4.
Fig. 6 is a graph of phase imbalance angle versus slot number (algorithm loop) for a simulated actual imbalance versus a calculated imbalance using signal processing embodying the present invention.
FIG. 7 is a graph of amplitude imbalance versus slot number for simulated actual imbalance versus calculated imbalance using signal processing embodying the present invention.
Detailed Description
Fig. 1 shows a known RF direct conversion FM receiver 100 illustrating the problem to be solved by the present invention. The incoming FM signal x (t) is passed via an input path 101 with branch connections 103, 105 to two mixers 107, 109, respectively. The local oscillator 111 generates a reference signal having the same frequency as the carrier frequency of the incoming signal x (t). The first component of the reference signal is applied directly to the mixer 107 where it is multiplied with the input signal x (t). The second component of the reference signal is applied to the phase shifter 113 and the phase shifted output of the phase shifter 113 is applied to the mixer 109 where it is multiplied by the input signal x (t). Although the phase shifter 113 in combination with the mixers 107 and 109 is intended to introduce a phase shift of 90 degrees with a gain of "1" between the reference signal components applied to the mixers 107 and 109, a phase shift slightly different from 90 degrees and a gain slightly different from "1" are actually introduced. The output signal from mixer 107 is passed through a Low Pass Filter (LPF)115 to produce an output in-phase component signal i (t), and the output signal from mixer 109 is passed through a Low Pass Filter (LPF)117 to produce an output quadrature component signal q (t). The imbalance introduced into the amplitude of the mixer 109 output is shown as imbalance gain a in block 119.
The mathematical analysis of the structure shown in fig. 1 is as follows:
the input signal may be represented as:
x(t)＝cos(ωt+φ(t)+γ)
where is the RF carrier frequency of the ω input RF signal x (t), γ is the oscillator arbitrary phase, and Φ (t) is the frequency modulation of x (t) to be detected.
Furthermore, x (t) ═ i (t) + j × q (t), where i (t) and q (t) are the in-phase and quadrature components of x (t).
Where A represents the amplitude imbalance and α represents the phase imbalance angle between the phase angles of I (t) and Q (t).
According to an embodiment of the invention, which will be described later, i (t) and q (t) are periodically processed in a manner to be described later to estimate and remove these imbalances, and the resulting adjustment components are combined to construct the modulation signal phi (t) to provide an audio signal output.
The following analysis shows how the phase imbalance a is determined.
Consider the inner product of I (t) and Q (t). Given by the following equation:
L＝Z+X
the value of T is selected based on the desired immunity to noise.
In the usual case, X is not equal to zero. However, under certain specific conditions X < Z, i.e.:
two examples in this case are as follows:
1. for tone FM modulation (FM modulated audio tone); e.g., 150Hz PL tone using 500Hz offset modulation) and γ ═ 0 we get X < Z. Then I is orthogonal to Q (L ≈ Z).
2. For tone FM modulation and large modulation index we get X < Z (L ≈ Z). this is correct for any γ, but wrong for any local oscillator frequency error. If the Local Oscillator (LO) has 0, fm/2，fm，3fmA frequency error of/2, etc., then X will not equal zero. However, if such frequency error can be detected, the LO frequency can be adjusted to overcome problems described later.
Thus, if the condition such that X ═ 0 is satisfied as in these two examples, we get:
for any value of phi (t), the expression
Is limited to 1. This is also true for α ═ 0 and L ═ 0.
Fig. 2 illustrates the relationship between L and α. In FIG. 2, curve C1 is shown, which is L (in V)2) And a phase angle (α) PH2 in degrees. As shown in fig. 2, curve C1 reaches a trough when PH2 reaches a minimum value PH2_ opt. This corresponds to the minimum value of L, L (PH2_ opt).
Thus, in both of the above examples, we know that if L is the minimum, then the imbalance phase angle α is the minimum. Thus, using these examples, we aim to minimize L by an adaptive sampling and adjustment process. Adaptive configurations embodying the present invention using these examples are illustrated in examples 1 and 2 below for finding the minimum value of L.
Example 1
The circuit 200 used in this example is shown in fig. 3. In fig. 3, elements having the same reference numerals as in fig. 1 have the same functions. The output signal i (t) passing through the Low Pass Filter (LPF)115 is sampled via connection 201 and the output signal q (t) passing through the Low Pass Filter (LPF)117 is sampled via connection 203. The respective sampled signals are provided as respective inputs to a processor 205, which processor 205 squares the respective inputs and estimates (estimate) the value of a factor a, which is the estimated amplitude imbalance. It is determined by the following formula:
the output signal from the processor 205 is an amplitude imbalance correction signal indicating a value of 1/a. The correction signal is applied via connection 202 to an amplitude modifier 207, which amplitude modifier 207 modifies the amplitude of q (t) by a factor of 1/a to cancel the detected amplitude imbalance a.
The output signal representing the component i (t) passing through the Low Pass Filter (LPF)115 is sampled via a connection 210, which connection 210 has a first branch 223, which first branch 223 is connected to a DC estimator (estimator)225, which estimates the DC value. The output signal q (t) passing through the Low Pass Filter (LPF)117 is sampled via a connection 208, the connection 208 having a branch 217, which branch 217 is connected to a DC estimator 219 which estimates the DC value of the signal q (t). By "DC value" we mean the value of i (f) or q (f) that is appropriate when f is 0, where i (f) is the fourier transform of signal i (t) and q (f) is the fourier transform of signal q (t). The output signals from the DC estimators 219 and 225 are passed to an arbitrary phase estimator 221, which arbitrary phase estimator 221 uses the two signals to estimate an arbitrary phase angle γ in the following manner. The output signal from the arbitrary phase estimator 221, representing an arbitrary phase angle y, is provided to processors 211 and 215 via connection 227, as further described below. The connection 210 is also directly connected to the processor 215. Connection 209 is also connected to a phase shifter PH 2209, which phase shifter PH 2209 is in turn connected to the processor 211. The processors 211, 215 compute the function e-jγiWhere i is an index of γ. For each value of alphaiProcessor 221 calculates γi. Processors 211 and 215 for each value αiPhase shifting Q (t) and I (t) by gammai. The output signals from the processor phase shifters 211 and 215 are multiplied by the mixer 213 to obtainTo an output signal provided to a further processor 212, which processor 212 for each alphaiThe parameter 'L' is calculated. The output signal from the processor 212 represents the aforementioned parameter L and is applied to a storage and processing unit which records the value of L accordingly.
A phase shift control signal is applied from the storage and processing unit 214 to the phase shifter PH2 via connection 216. The phase shift control signal operates to apply a phase shift at phase shifter PH2 having a phase shift angle that varies in steps from-5 degrees to +5 degrees in a single scan (or multiple scans where the steps become smaller from scan to scan), in 0.2 degree steps. For each phase shift angle value applied, the corresponding value of L generated at processor 212 is monitored at element 214, and the phase shift angle value that gives the minimum value of L is recorded. This corresponds to the aforementioned minimum value of α. The phase shift control signals of the same and opposite values corresponding to this calculated phase angle are applied from unit 214 to phase shifter PH 1231 via connection 229. The signal corresponding to the quadrature component q (t) is applied from the low-pass filter 117 to the phase shifter PH 1231 via connection 226. Whereby the phase shifter 231 applies a phase angle adjustment that compensates for the detected phase imbalance angle alpha. The output from phase shifter PH 1231 corresponding to the phase correction value of q (t) is applied to processor 218. The signal corresponding to the in-phase component i (t) is also applied as an input to the processor 218 via connection 224. Processor 218 calculates the value of quotient q (t)/i (t) from its various inputs and provides a signal representative of the result to processor 230. The processor 230 calculates an arctangent (arctg) value of the input signal from the processor 218. The output signal from the processor 230 is applied to a further processor 232, which processor 232 calculates a differential with respect to the time t of the input signal. Finally, the output signal from the processor 233 is applied to an audio output. Audio output 233 includes a transducer, such as an audio speaker, that converts the electronic signal output from processor 232 into an audio signal, such as voice information.
The following is a mathematical analysis that further explains and explains the operation of the circuit 200 shown in fig. 3.
(i) Estimation of the arbitrary phase angle γ:
we investigated the DC values of the I and Q components:
wherein J0(.) is the first zero order bessel equation.
Suppose we wish to estimate arbitrary angle gamma with an accuracy of +/-alpha. We can thus approximate the following expression:
using the last two equations, γ can be estimated by the following calculation:
this is performed by the arbitrary phase estimator 221 of fig. 1.
(ii) Application of arbitrary phase angle correction:
for each alpha applied by the phase shifter PH2iCalculating corresponding gammai。
Thus, for each αiThe following correction is performed:
{[Icos(αi)-Qsin(αi)]+jQ}ejγi
wherein ejγiIs a function of the processors 211 and 215.
The phase shift introduced by the phase shifter PH2 (and by the phase shifter PH1) is actually achieved according to the following mathematical analysis:
Icorr＝Iin cos(αi)-Qin sin(αi)
Qcorr＝Qin
thus Icorr+jQcorr＝{[Iin cos(αi)-Qin sin(αi)]+jQ}
Wherein IinAnd QinIs an input to PH 2.
IcorrAnd QcorrIs the output of PH 2. For simplicity, PH2 (and PH1) is shown in the figure (fig. 3) as the Q path, but the actual implementation is using the last set of equations above.
For L ═ minimum, we get:
for the values of α and γ described above, I and Q are orthogonal. Let us assume fmSignaling tones of frequency, modulated according to industry standard TIA603 FM. This is an industry standard promulgated by the TIA and is known as "Land Mobile FM or PM Communications Equipment and performance Standards" ("Land Mobile FM or PM Communications Equipment and performance Standards"), which includes the following specifications: "CDCSS (" Continuous Digital Controlled squelch system ") shall define a system in which the radio receiver(s) is/are equipped with a tone or data response device that allows audio signals to appear at the receiver audio output, selects speech processing, e.g., scrambling, selects between speech or data, or controls repeater functions only when a carrier modulated with a particular tone or data pattern is received. For continuous audio output, the tone or data pattern must occur continuously. As in the CTCSS System ("continuous Tone controlled Squelch System"), a transmitter transmitting a carrier wave should be modulated with continuous tones, the frequency of which is coordinated with the operation at the receiver outputThe audio required by the audio-responsive CTCSS device is the same. In a similar manner, in a CDCSS system, a transmitter transmitting a carrier wave should be modulated with a continuous NRZ FSK data stream with the correct pattern to operate a data sensitive detector at the receiver output. The purpose of the defined system is to minimize the noise of listening to communications directed to others sharing the same carrier frequency or channel. By using a particular tone or data system, each user can encode his carrier to prevent any uncoded or differently encoded carrier from receiving audio signals.
Thus CTCSS/CDCSS is sub-audio signaling using the TIA protocol described above.
The CDCSS off (turn off) code is a waveform that is needed to disable the receiver audio output before the RF carrier is removed. Which acts as a squelch tail or noise canceller. To achieve this, the CDCSS encoder should transmit a 134.4+/-0.5Hz tone for 150 to 200 milliseconds. It may also be a PL/DPL tone. (PL ═ dedicated line, DPL ═ digital dedicated line). PL/DPL and sub-audio signaling are used to turn on receiver squelch. PL/DPL is transmitted in parallel with speech.
We can comply with this specification by applying adaptive correction during periods when there is no voice activity, although in practice we find our phase adjustment algorithm works well even in the presence of audio speech.
For the I channel:
for CDCSS audio close codes, the modulation index is
Bessel function Jo(βCDCSS_Audio_turn_offf)＝Jo(3.72)＝-0.4
Thus for the case of CDCSS Audio close code
For the Q channel:
thus for the case of CDCSS Audio close code
As has been described above, in the above-mentioned, <math> <mrow> <mi>L</mi> <mo>=</mo> <mfrac> <mn>1</mn> <mi>T</mi> </mfrac> <munderover> <mo>∫</mo> <mn>0</mn> <mi>T</mi> </munderover> <mi>I</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mi>Q</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mi>dt</mi> </mrow> </math>
the first part of L is zero due to the integration of the orthogonal function.
Thus:
again, since the integral is applied to the orthogonal function:
but instead of the other end of the tube <math> <mrow> <mfrac> <mn>1</mn> <mi>T</mi> </mfrac> <munderover> <mo>∫</mo> <mn>0</mn> <mi>T</mi> </munderover> <msup> <mi>cos</mi> <mn>2</mn> </msup> <mrow> <mo>(</mo> <mn>2</mn> <mi>k</mi> <msub> <mi>ω</mi> <mi>m</mi> </msub> <mi>t</mi> <mo>)</mo> </mrow> <mi>dt</mi> <mo>=</mo> <mfrac> <mn>1</mn> <mn>2</mn> </mfrac> </mrow> </math>
We therefore get:
from this last equation we can see that for α ═ 0, L ═ 0. In this example, L ═ 0 can be simplified to X ═ 0. By unit 214, in the method described with reference to fig. 3, it is determined when X is 0, or more specifically when X is minimum, by applying a sweep of phase adjustment steps (sweep) via phase shifter PH2 and recording in unit 214 when the output of processor 212 gives a minimum.
(iii) Demodulating to give an audio output signal
The audio output signal may be constructed using the following relationship:
the computation of the last expression is performed in the circuit 200 by the processors 218, 230, and 233 as described above.
Example 2
The circuit used in this example is shown in fig. 4. In this example, tone FM modulation with a large modulation index is used for giving the above-mentioned L ═ X. Elements in fig. 4 having the same reference numerals as those in fig. 1 or 3 have the same functions as those of these elements and will not be described again. In fig. 4, connection 305 is connected directly from phase shifter PH 2209 to mixer 213, anConnection 327 is connected from low pass filter 115 directly to mixer 213. The processor 212 performs a calculation of L for finding the minimum value of L by scanning the phase adjustment value applied at the phase shifter PH 2209, thus excluding a correction for an arbitrary phase angle as in the circuit 200 of fig. 3. This is because L-Z is true for any γ in this example 2, but does not if there is any frequency offset (error) between the carrier frequency of the incoming received signal x (t) and the Local Oscillator (LO) frequency. If the LO frequency offset is at 0, fm/2，fm，3fmHz sequence, then X will not be zero. In other words, if there is a problematic frequency offset, the calculation of L for the phase adjustment does not work correctly (gives a false result). The problematic frequency offset is the discrete value described above. The bandwidth of problematic frequency offsets (the width of peaks within the sequence) is withinNearby and depending on the integration time. For an integration time of, for example, 150msec, the problematic frequency range (bandwidth) is
For an integration time of 1000msec, the problematic frequency range (bandwidth) is
(without optimal integration time, the longer the integration time, the narrower the problem bandwidth.) thus, circuit 300 detects and adjusts for any problematic LO frequency offset, as described below.
The quadrature component q (t) sampled by connection 208 is further sampled by connection 322 to frequency error detector 320. Similarly, the in-phase component i (t) is sampled via connection 327 to detector 320. The detector detects in the sequence 0, fm/2，fm，3fmWhether there is a frequency error in/2.
Fig. 5 illustrates the output of detector 320 as a function of frequency error or offset Δ f (hz). When the output is greater than the threshold THR, an error is detected. If such an error is detected, a correction signal is generated and applied to the local oscillator 111 via connection 312 to adjust the reference frequency generated by the local oscillator 111 to compensate for the error so that the local oscillator frequency is not a problematic frequency, for example, by shifting the local oscillator frequency by 20 Hz.
The local frequency detector is based on the following analysis.
If an offset frequency is received <math> <mrow> <msub> <mi>f</mi> <mi>e</mi> </msub> <mo>=</mo> <mi>k</mi> <mo>·</mo> <mfrac> <mi>fm</mi> <mn>2</mn> </mfrac> <mo>,</mo> </mrow> </math> Where k is an integer, the algorithm will disable detection.
The detector 320 operates the following correction.
Wherein,
m (τ) is the sample of the desired PL or end tone. I isIdealAnd QIdealStored in a memory associated with the receiving.
The following mathematical analysis describes the process of this example 2:
from the foregoing it is explained that we have:
I(t)≈cos(φ(t)-γ)
Q(t)≈sin(φ(t)-α-γ)
wherein <math> <mrow> <mi>φ</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>=</mo> <mn>2</mn> <mi>π</mi> <msub> <mi>f</mi> <mi>d</mi> </msub> <munderover> <mo>∫</mo> <mn>0</mn> <mi>t</mi> </munderover> <msub> <mi>A</mi> <mi>m</mi> </msub> <mi>cos</mi> <mrow> <mo>(</mo> <msub> <mi>ω</mi> <mi>m</mi> </msub> <mi>τ</mi> <mo>)</mo> </mrow> <mi>dτ</mi> <mo>=</mo> <mi>β</mi> <mi>sin</mi> <mrow> <mo>(</mo> <msub> <mi>ω</mi> <mi>m</mi> </msub> <mi>t</mi> <mo>)</mo> </mrow> </mrow> </math>
Wherein <math> <mrow> <mi>β</mi> <mo>=</mo> <mfrac> <mrow> <msub> <mi>A</mi> <mi>m</mi> </msub> <msub> <mi>f</mi> <mi>d</mi> </msub> </mrow> <msub> <mi>f</mi> <mi>m</mi> </msub> </mfrac> </mrow> </math> Is the modulation index.
Also, from the foregoing description:
for a large modulation index I as in this example 2, the I-path power is equal to the Q-path power: i path power is
Path power of Q is
Therefore, the temperature of the molten metal is controlled, <math> <mrow> <mfrac> <mi>L</mi> <mi>P</mi> </mfrac> <mo>=</mo> <mi>A</mi> <mi>sin</mi> <mrow> <mo>(</mo> <mi>α</mi> <mo>)</mo> </mrow> </mrow> </math> and <math> <mrow> <mi>α</mi> <mo>=</mo> <mi>arcsin</mi> <mrow> <mo>(</mo> <mfrac> <mi>L</mi> <mi>P</mi> </mfrac> <mo>)</mo> </mrow> </mrow> </math>
however, in the case of fading of the received incoming signal due to the discrete local oscillator frequency error shown in fig. 5, the use of the arcsin function to calculate the phase imbalance α is problematic (giving inaccurate results). The local oscillator frequency is adjusted if necessary as described above.
The accuracy (algorithm tracking performance) of the procedure described with reference to fig. 4 used in example 2 was determined for a signal-to-noise ratio of 15dB, a tone time of 150msec, and a frequency Fs signal sampling rate of 48KHz as the PL synthesized signal. Fig. 6 and 7 show the results obtained. In fig. 6, curve C1 indicates the simulated received phase angle imbalance and curve C2 indicates the calculated phase angle imbalance using the L min estimate using the phase shifter PH 2209 and the processors 212 and 214. As shown in fig. 6, the phase imbalance (degrees) calculated by the adjustment algorithm closely tracks the actual phase imbalance. In fig. 7, curve C3 indicates the simulated received amplitude imbalance and curve C4 indicates the calculated amplitude imbalance using the processor 205. As shown in fig. 7, the amplitude imbalance (%) calculated by the adjustment algorithm closely tracks the actual phase imbalance.
In fig. 6 and 7, the "slot number" measured on the horizontal axis is each integration period of the algorithm. Thus, for example, a 150msec slot is a 150msec integration period. Thus, in fig. 6 and 7, the algorithm runs for 150msec in each case, calculating the required phase (fig. 6) or amplitude (fig. 7) adjustment (for slot 1). It then runs another 150msec and calculates the adjustment (for slot 2) and so on.
In the circuits 200 and 300 described above with reference to fig. 3 and 4, various processors are described. They may be separate devices, although two or more of these processors may be combined in a single processing device. Suitably, each processing device may comprise a digital signal processor programmed and operated in a manner known per se to perform the required signal processing or computing function(s).
In summary, the present invention provides an improved method and apparatus for adaptive quadrature imbalance compensation in a direct conversion receiver.
If the invention is used in a radio receiver, the memory of the radio device can be programmed after manufacture to store a table of initial imbalance values and RF frequencies. During operation of the radio device, the imbalance values will change over time. Thus, updated imbalance information may be collected in use as in the above example and used to provide appropriate compensation to maintain an appropriate quality of the audio output signal. The updated imbalance information may also be stored in the memory of the radio device to replace the initially stored information.
Unlike the prior art, the steps described in examples 1 and 2 with reference to fig. 3 and 4 allow operation under conditions where the received signal-to-noise ratio is low and/or rayleigh (multi-path) fading occurs.
The receiver circuits 200 or 300 may be used in a conventional mobile station that uses direct conversion of FM wireless communications.
Claims (10)
1. A wireless receiver for receiving and demodulating a frequency modulated RF signal by a direct conversion process, comprising:
an input signal path for conveying an RF input receive signal;
a local oscillator connected to the input signal path;
a first mixer for mixing an output reference signal from the local oscillator with an input receive signal to produce an in-phase component of the input receive signal;
a quadrature phase shifter for applying a quadrature phase shift to an output reference signal from the local oscillator, the local oscillator being connected to the input signal path;
a second mixer for mixing an output signal from the phase shifter with the input receive signal to produce a quadrature component of the input receive signal; and
means for generating an output demodulated information signal by generating said in-phase and quadrature component combining functions; and is characterized in that it is characterized in that,
means for periodically detecting an error in the relative phase difference between the in-phase and quadrature components and for applying a relative adjustment of the phase difference to compensate for the detected error.
2. The receiver of claim 1 wherein said means for periodically detecting an error is operative to determine an inner product L of said in-phase and quadrature components, wherein said inner product L is expressed by <math> <mrow> <mi>L</mi> <mo>=</mo> <mfrac> <mn>1</mn> <mi>T</mi> </mfrac> <munderover> <mo>∫</mo> <mn>0</mn> <mi>T</mi> </munderover> <mi>I</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mi>Q</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mi>dt</mi> </mrow> </math> Define, where i (T) is the in-phase component, q (T) is the quadrature component, T is time, and T is an integration period.
3. The receiver of claim 2 wherein said means for periodically detecting an error is operative to determine an approximation of L that is <math> <mrow> <mi>L</mi> <mo>=</mo> <mi>Z</mi> <mo>=</mo> <mi>A</mi> <mi>sin</mi> <mrow> <mo>(</mo> <mi>α</mi> <mo>)</mo> </mrow> <mfrac> <mn>1</mn> <mi>T</mi> </mfrac> <munderover> <mo>∫</mo> <mn>0</mn> <mi>T</mi> </munderover> <msup> <mi>cos</mi> <mn>2</mn> </msup> <mrow> <mo>(</mo> <mi>φ</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mo>+</mo> <mi>γ</mi> <mo>)</mo> </mrow> <mi>dt</mi> </mrow> </math> Wherein A is an amplitude measurement, φ is a tone frequency modulation, α is an error in phase angle between an in-phase component and a quadrature component of the input RF receive signal, γ is an arbitrary phase angle, and t is time.
4. A receiver as claimed in claim 3, wherein said means for periodically detecting errors is operable to determine said inner product L when at least one of a) any phase angle γ is zero, b) said input RF receive signal is a tone modulated with a large modulation index, and c) is at a minimum.
5. The receiver of claim 4 wherein said means for periodically detecting errors is operative to sample said in-phase and quadrature components and apply varying relative phase shifts between said sampled in-phase and quadrature components and to determine when said relative varying phase shifts give a minimum value of said inner product L.
6. The receiver of claim 5 wherein said means for periodically detecting errors is operative to apply a relative phase shift between said sampled in-phase and quadrature components that varies in steps.
7. The receiver of claim 1 wherein said means for generating an output demodulated information signal by generating a combining function is operative to calculate a difference functionWhere I (t) is the in-phase component, and Q (t) is the quadrature component, and t is time.
8. The receiver of claim 1, comprising: means for periodically detecting an amplitude imbalance between the in-phase and quadrature components and for applying an adjustment of the relative amplitude to compensate for the detected imbalance.
9. The receiver of claim 1, comprising: means for periodically detecting a frequency imbalance between the local oscillator output reference signal and the input receive signal, and for applying a frequency adjustment of the output reference signal to compensate for the detected imbalance.
10. A method of receiving and demodulating a frequency modulated RF signal by a direct conversion process to periodically detect an error in a relative phase difference between in-phase and quadrature components of an input RF receive signal and for applying a relative adjustment of the phase difference to compensate for the detected error.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0411888.1 | 2004-05-28 | ||
| GB0411888A GB2414609B (en) | 2004-05-28 | 2004-05-28 | Receiver for use in wireless communications and method and terminal using it |
| PCT/US2005/014192 WO2005119901A1 (en) | 2004-05-28 | 2005-04-25 | Receiver and method for wireless communications terminal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101010871A true CN101010871A (en) | 2007-08-01 |
| CN101010871B CN101010871B (en) | 2010-06-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005800173955A Expired - Fee Related CN101010871B (en) | 2004-05-28 | 2005-04-25 | Receiver and method for wireless communications terminal |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JP2008501294A (en) |
| CN (1) | CN101010871B (en) |
| AU (1) | AU2005251078B2 (en) |
| CA (1) | CA2567971A1 (en) |
| DE (1) | DE112005001234T5 (en) |
| GB (1) | GB2414609B (en) |
| WO (1) | WO2005119901A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103973260A (en) * | 2014-04-23 | 2014-08-06 | 小米科技有限责任公司 | Signal processing chip, signal conversion circuit and pin configuration method of communication chip |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2437574B (en) | 2006-04-28 | 2008-06-25 | Motorola Inc | Receiver for use in wireless communications and method of operation of the receiver |
| CN101034904B (en) * | 2007-04-10 | 2011-11-09 | 鼎芯通讯（上海）有限公司 | Device and method for the FM radio to accurately search broadcasting station |
| GB0723892D0 (en) | 2007-12-06 | 2008-01-16 | Cambridge Silicon Radio Ltd | Adaptive IQ alignment apparatus |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5828955A (en) * | 1995-08-30 | 1998-10-27 | Rockwell Semiconductor Systems, Inc. | Near direct conversion receiver and method for equalizing amplitude and phase therein |
| US6009317A (en) * | 1997-01-17 | 1999-12-28 | Ericsson Inc. | Method and apparatus for compensating for imbalances between quadrature signals |
| GB2326037A (en) * | 1997-06-06 | 1998-12-09 | Nokia Mobile Phones Ltd | Maintaining signals in phase quadrature |
| US6222878B1 (en) * | 1999-09-27 | 2001-04-24 | Sicom, Inc. | Communication system with end-to-end quadrature balance control |
| JP2003522456A (en) * | 2000-02-04 | 2003-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Wireless FM receiver |
| US7076008B2 (en) * | 2001-11-02 | 2006-07-11 | Texas Instruments Incorporated | Method and apparatus for estimating and correcting gain and phase imbalance in a code division multiple access system |
| US7031688B2 (en) * | 2003-03-24 | 2006-04-18 | Quorum Systems, Inc. | Direct-conversion receiver system and method with quadrature balancing and DC offset removal |
-
2004
- 2004-05-28 GB GB0411888A patent/GB2414609B/en not_active Expired - Fee Related
-
2005
- 2005-04-25 DE DE112005001234T patent/DE112005001234T5/en not_active Withdrawn
- 2005-04-25 CA CA002567971A patent/CA2567971A1/en not_active Abandoned
- 2005-04-25 WO PCT/US2005/014192 patent/WO2005119901A1/en active Application Filing
- 2005-04-25 JP JP2007515092A patent/JP2008501294A/en not_active Withdrawn
- 2005-04-25 CN CN2005800173955A patent/CN101010871B/en not_active Expired - Fee Related
- 2005-04-25 AU AU2005251078A patent/AU2005251078B2/en not_active Ceased
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103973260A (en) * | 2014-04-23 | 2014-08-06 | 小米科技有限责任公司 | Signal processing chip, signal conversion circuit and pin configuration method of communication chip |
| CN103973260B (en) * | 2014-04-23 | 2017-01-18 | 小米科技有限责任公司 | Signal processing chip, signal conversion circuit and pin configuration method of communication chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CA2567971A1 (en) | 2005-12-15 |
| GB2414609A (en) | 2005-11-30 |
| GB0411888D0 (en) | 2004-06-30 |
| GB2414609B (en) | 2006-07-26 |
| JP2008501294A (en) | 2008-01-17 |
| CN101010871B (en) | 2010-06-09 |
| DE112005001234T5 (en) | 2010-04-22 |
| AU2005251078A1 (en) | 2005-12-15 |
| AU2005251078B2 (en) | 2009-04-09 |
| WO2005119901A1 (en) | 2005-12-15 |
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