CN100587930C - Flip-chip mounting body and flip-chip mounting method - Google Patents
Flip-chip mounting body and flip-chip mounting method Download PDFInfo
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- CN100587930C CN100587930C CN200680016698A CN200680016698A CN100587930C CN 100587930 C CN100587930 C CN 100587930C CN 200680016698 A CN200680016698 A CN 200680016698A CN 200680016698 A CN200680016698 A CN 200680016698A CN 100587930 C CN100587930 C CN 100587930C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
倒装片安装体及该安装体的安装方法是:使衬垫等单元,介于具有多个连接端子的电路基板和具有与连接端子相对配置的多个电极端子的电子部件(半导体芯片)之间,以便使两者的间隔均匀;或者在具有两个以上的凸起部的板状体的内部,设置电子部件(半导体芯片),使其隔着由焊料粉、树脂、对流添加剂构成的树脂组成物相对,对流添加剂沸腾后,使焊料粉移动,自我集合,形成焊料层,将连接端子和电极端子电连接。
A flip-chip package and a method for mounting the package include interposing units such as pads between a circuit board having a plurality of connection terminals and an electronic component (semiconductor chip) having a plurality of electrode terminals arranged opposite to the connection terminals. In order to make the interval between the two uniform; or in the interior of the plate-shaped body having two or more protrusions, electronic components (semiconductor chips) are placed so that they are separated by a resin composed of solder powder, resin, and convective additives. The composition faces each other, and after the convective additive boils, the solder powder moves and self-assembles to form a solder layer to electrically connect the connection terminal and the electrode terminal.
Description
技术领域 technical field
[0001][0001]
本发明涉及在电路基板上搭载半导体芯片、电子部件的倒装片安装方法,特别涉及还能够与窄间距化的半导体芯片、电子部件对应的、生产率高而且连接的可靠性优异的倒装片安装体及倒装片安装方法。The present invention relates to a flip-chip mounting method for mounting semiconductor chips and electronic components on a circuit board, and particularly relates to flip-chip mounting that is capable of handling semiconductor chips and electronic components with narrower pitches, has high productivity, and is excellent in connection reliability body and flip-chip mounting methods.
背景技术 Background technique
[0002][0002]
近几年来,由于电子机器使用的半导体集成电路(以下称作“半导体”或“LSI”)芯片的高密度、高集成化,电子机器的高功能/多功能化迅猛发展,与此同时,半导体芯片的电极端子的多脚、窄间距化正在突飞猛进。将这些半导体芯片安装到电路基板上时,为了减少布线延迟,而广泛采用倒装片安装。In recent years, due to the high density and high integration of semiconductor integrated circuit (hereinafter referred to as "semiconductor" or "LSI") chips used in electronic equipment, the high function/multifunctionalization of electronic equipment has rapidly developed. At the same time, semiconductor The multi-pin and narrow pitch of chip electrode terminals are advancing by leaps and bounds. When mounting these semiconductor chips on a circuit board, flip-chip mounting is widely used in order to reduce wiring delays.
[0003][0003]
作为将LSI芯片安装到电路基板上的方法,大致可以分为将LSI芯片直接安装到电路基板上的倒装片安装的方法,和先组装到半导体封装中后再安装的方法。Methods of mounting an LSI chip on a circuit board can be broadly classified into a method of flip-chip mounting in which the LSI chip is directly mounted on the circuit board, and a method of mounting the LSI chip in a semiconductor package first.
[0004][0004]
一般来说,作为具有多脚的LSI芯片的安装方法,在倒装片安装工艺中,用在区域阵列状排列的LSI芯片的突台电极端子(pad electrode terminal)上形成的焊料突起(solder bump),与电路基板上的电极接合的安装方式,和在封装(package)安装中,在封装背面区域阵列状地排列了电极的区域阵列型封装,通过焊料球做媒介,安装到电路基板上的方式,作为可靠性高的优秀的技术,在生产中广泛采用(例如专利文献1或专利文献2)。In general, as a method of mounting an LSI chip having multiple pins, in a flip-chip mounting process, solder bumps (solder bumps) formed on pad electrode terminals of LSI chips arranged in an area array are used. ), the installation method of bonding with the electrodes on the circuit substrate, and in the package (package) installation, the area array type package in which the electrodes are arranged in an array on the back area of the package, and is mounted on the circuit substrate through solder balls as a medium The method is widely used in production as an excellent technology with high reliability (for example, Patent Document 1 or Patent Document 2).
[0005][0005]
可是,在LSI芯片多脚化的基础上,伴随着布线工艺规程的细微化,LSI芯片尺寸的缩小化,脚间隔的窄间距化正在加速。在现有技术的利用LSI芯片电极形成的焊料突起以及区域阵列型半导体封装的背面电极形成的焊料球进行的接合的安装方式中,伴随着窄间距化,电极尺寸越来越小,需要缩小焊料突起以及焊料球的尺寸。这是因为焊料突起以及焊料球的尺寸较大时,熔化的焊料就会溢到电极突台上,使邻接的脚彼此短路的缘故。可是,均匀地形成微小尺寸的焊料突起以及焊料球,进而稳定地在电路基板上接合,却非常困难。However, on the basis of the multi-pin LSI chip, along with the miniaturization of the wiring process regulations, the reduction of the size of the LSI chip, and the narrowing of the pin spacing are accelerating. In the conventional mounting method using solder bumps formed on the electrodes of the LSI chip and solder balls formed on the back electrodes of the area array type semiconductor package, the size of the electrodes is getting smaller and smaller with the narrowing of the pitch, and it is necessary to reduce the size of the solder bump and solder ball dimensions. This is because when the size of the solder bumps and solder balls is large, the molten solder overflows onto the electrode pads and short-circuits adjacent pins. However, it is very difficult to uniformly form micro-sized solder bumps and solder balls, and to bond them stably to a circuit board.
[0006][0006]
另外,在倒装片安装中,通常是在半导体芯片的电极端子上形成焊料突起,再统一接合该焊料突起与电路基板上形成的连接端子。但是为了将电极端子数量超过5000的那种下一代的半导体芯片安装到电路基板上,需要形成与100μm以下的窄间距对应的焊料突起。可是,现在的焊料突起形成技术,却难以适应这种要求。Also, in flip-chip mounting, generally, solder bumps are formed on electrode terminals of a semiconductor chip, and the solder bumps are collectively bonded to connection terminals formed on a circuit board. However, in order to mount a next-generation semiconductor chip having more than 5,000 electrode terminals on a circuit board, it is necessary to form solder bumps corresponding to a narrow pitch of 100 μm or less. However, the current solder bump forming technology is difficult to meet this requirement.
[0007][0007]
另外,因为需要形成与电极端子数量对应的焊料突起,所以为了实现低成本化,还要求通过缩短每个芯片的搭载节拍来提高生产效率。In addition, since it is necessary to form solder bumps corresponding to the number of electrode terminals, it is also required to improve production efficiency by shortening the mounting tact per chip in order to achieve cost reduction.
[0008][0008]
目前,为了与电极端子的增大对应,半导体芯片的电极端子正在从周围配置向区域配置移行。Currently, electrode terminals of semiconductor chips are being shifted from peripheral arrangements to regional arrangements in order to cope with the increase in electrode terminals.
[0009][0009]
另外,根据高密度、高集成化的要求,可以预料半导体工艺将从90nm向65nm、45nm发展。为了与此对应,迫切需要具有低介电率的绝缘材料,而为了实现这一愿望,正在引进多孔的绝缘材料。In addition, according to the requirements of high density and high integration, it can be expected that the semiconductor process will develop from 90nm to 65nm and 45nm. In response to this, an insulating material having a low dielectric constant is urgently required, and in order to realize this desire, porous insulating materials are being introduced.
[0010][0010]
可是,使用多孔的绝缘材料后,为了减少对绝缘材料及有源电路的损伤,需要用低载荷进行安装。进而,由于半导体芯片的薄型化,为了防止操作时出现的损伤,也希望用低载荷进行安装。特别是区域配置时,需要在有源电路上构成电极,所以要求用更低的载荷进行安装的方法。However, after using a porous insulating material, in order to reduce damage to the insulating material and the active circuit, it needs to be installed with a low load. Furthermore, due to thinning of semiconductor chips, mounting with a low load is also desired in order to prevent damage during handling. In particular, in the area arrangement, it is necessary to form electrodes on the active circuit, so a mounting method with a lower load is required.
[0011][0011]
因此,要求能够适用于今后的半导体工艺的进展出现的薄型、高密度化的倒装片安装方法。Therefore, there is a demand for a thinner, higher-density flip-chip mounting method that can be applied to the progress of semiconductor processes in the future.
[0012][0012]
现有技术中,作为焊料突起的形成技术,开发出电镀法及网版印刷法等。可是电镀法尽管适合于窄间距,但由于工序复杂等,存在着生产效率低的问题。另外,网版印刷法虽然生产效率高,但是在使用掩模这一点上,却不适合于窄间距。Conventionally, as techniques for forming solder bumps, a plating method, a screen printing method, and the like have been developed. However, although the electroplating method is suitable for narrow pitches, there is a problem of low production efficiency due to complicated processes and the like. In addition, although the screen printing method has high production efficiency, it is not suitable for narrow pitches in terms of using a mask.
[0013][0013]
在这种状况下,最近开发出若干个在半导体芯片及电路基板上有选择地形成焊料突起的技术。这些技术,由于不仅适合于形成细微的焊料突起,而且能够统一形成焊料突起,所以生产效率优异,被作为可能适合于将下一代的半导体芯片安装到电路基板上的技术,引人注目。Under such circumstances, several techniques for selectively forming solder bumps on semiconductor chips and circuit boards have recently been developed. These technologies are not only suitable for forming fine solder bumps, but also can form solder bumps uniformly, so they are excellent in productivity, and are attracting attention as technologies that may be suitable for mounting next-generation semiconductor chips on circuit boards.
[0014][0014]
其中之一是:采用将焊料粉和助熔剂的混合物构成的焊料糊,浓密涂敷到表面形成电极端子的电路基板上,再将电路基板加热后,使焊料粉熔化,在润湿性高的电极端子上,有选择地形成焊料突起的技术(例如专利文献3)。One of them is: use a solder paste composed of a mixture of solder powder and flux, densely apply it to the circuit board on which the electrode terminals are formed on the surface, and then heat the circuit board to melt the solder powder. A technique for selectively forming solder bumps on electrode terminals (for example, Patent Document 3).
[0015][0015]
另外,还有一个被称作“超级焊料糊法”的技术。该技术将以有机酸铅盐和金属锡作为主要成分的膏状组成物(化学反应析出型焊料),浓密涂敷到形成电极端子的电路基板上,再将电路基板加热后,使其产生Pb和Sn的置换反应,在电路基板的电极端子上,有选择地析出Pb和Sn的合金的技术(例如专利文献4)。In addition, there is a technology called "super solder paste method". This technology applies a paste composition (chemical reaction precipitation type solder) with organic acid lead salt and metal tin as the main components to the circuit board forming the electrode terminal, and then heats the circuit board to generate Pb. A substitution reaction with Sn to selectively deposit an alloy of Pb and Sn on an electrode terminal of a circuit board (for example, Patent Document 4).
[0016][0016]
另外,在现有技术的倒装片安装中,在将半导体芯片搭载到形成焊料突起的电路基板上后,为了将半导体芯片固定到电路基板上,进而需要将被称作“充填材料”的树脂注入半导体芯片和电路基板之间的工序。因此,存在着工序数量增加、成品率下降的课题。In addition, in conventional flip-chip mounting, after mounting a semiconductor chip on a circuit board on which solder bumps are formed, it is necessary to add a resin called "filler" to fix the semiconductor chip on the circuit board. The process of injecting between the semiconductor chip and the circuit board. Therefore, there is a problem that the number of steps increases and the yield decreases.
[0017][0017]
因此,作为使相对的半导体芯片的电极端子和电路基板的连接端子电连接与将半导体芯片固定到电路基板上同时进行的方法,开发出使用各向异性导电材料的倒装片安装技术。这是将含有导电粒子的热硬化性树脂供给电路基板和半导体芯片之间,在向半导体芯片加压的同时,将热硬化性树脂加热,从而同时实现半导体芯片与电路基板的电连接和固定的方法(例如专利文献5)。Therefore, flip-chip mounting technology using an anisotropic conductive material has been developed as a method of simultaneously electrically connecting electrode terminals of opposing semiconductor chips and connection terminals of a circuit board and fixing the semiconductor chip to the circuit board. This is to supply a thermosetting resin containing conductive particles between the circuit board and the semiconductor chip, and heat the thermosetting resin while applying pressure to the semiconductor chip, thereby simultaneously realizing the electrical connection and fixing of the semiconductor chip and the circuit board. method (for example, Patent Document 5).
专利文献1:日本国特开平11-163510号公报Patent Document 1: Japanese Patent Application Laid-Open No. 11-163510
专利文献2:日本国特开平11-067829号公报Patent Document 2: Japanese Patent Application Laid-Open No. 11-067829
专利文献3:日本国特开2000-94179号公报Patent Document 3: Japanese Patent Laid-Open No. 2000-94179
专利文献4:日本国特开平1-157796号公报Patent Document 4: Japanese Patent Application Laid-Open No. 1-157796
专利文献5:日本国特开2000-332055号公报Patent Document 5: Japanese Patent Laid-Open No. 2000-332055
[0018][0018]
可是,在专利文献3所示的那种焊料突起形成方法及专利文献4所示的那种超级焊料糊法中,单纯地在电路基板上涂敷膏状组成物后,由于产生局部性的厚度及浓度的离差,焊料析出量在各连接端子中互不不同,所以不能获得高度均匀的焊料突起。另外,由于这些方法是在表面形成连接端子的、有凹凸的电路基板上涂敷膏状组成物,所以不能向成为凸部的连接端子上供给足够量的焊料,在倒装片安装中,难以获得所需高度的焊料突起。However, in the solder bump forming method shown in Patent Document 3 and the super solder paste method shown in Patent Document 4, after simply coating the paste composition on the circuit board, local thickness and concentration dispersion, the amount of solder deposits differs from one connection terminal to another, so highly uniform solder bumps cannot be obtained. In addition, since these methods apply a paste-like composition on a circuit board with concavo-convexities on which connection terminals are formed on the surface, it is impossible to supply a sufficient amount of solder to the connection terminals that become protrusions. In flip-chip mounting, it is difficult to Obtain the desired height of solder bumps.
[0019][0019]
另外,在专利文献5所示的那种倒装片安装方法中,在生产性能及可靠性的方面,存在着以下所示的急待解决的许多课题。In addition, in the flip-chip mounting method disclosed in Patent Document 5, there are many problems to be urgently solved as follows in terms of productivity and reliability.
[0020][0020]
就是说,第1,由于利用介有导电粒子的机械性的接触,获得电极端子之间的电气性的导通,所以难以实现稳定的导通状态。第2,由于间隔随着半导体芯片和电路基板各端子之间存在的导电粒子的量的不同而不同,所以电气性的接合不稳定。第3,使热硬化树脂硬化的热工艺,使导电粒子飞散,引起短路,导致成品率下降。第4,由于成为半导体芯片在电路基板上露出的结构,所以将电路基板安装到机器上时的摩擦、冲击等,导致半导体芯片的连接不良,成为故障的原因。第5,为了实现稳定的电连接,需要用很高的压力(载荷)加压压接,所以容易产生半导体芯片受到破坏等问题。That is, first, since electrical conduction between electrode terminals is obtained by mechanical contact through conductive particles, it is difficult to achieve a stable conduction state. Second, since the distance varies depending on the amount of conductive particles present between the semiconductor chip and each terminal of the circuit board, electrical bonding is unstable. Third, the thermal process of hardening the thermosetting resin causes conductive particles to scatter, causing a short circuit, resulting in a decrease in yield. Fourth, due to the structure in which the semiconductor chip is exposed on the circuit board, friction, impact, etc. when the circuit board is mounted on the machine cause poor connection of the semiconductor chip and cause failures. Fifth, in order to realize a stable electrical connection, it is necessary to press and crimp with a high pressure (load), so problems such as damage to the semiconductor chip are likely to occur.
发明内容 Contents of the invention
[0021][0021]
本发明就是为了解决上述问题而研制的,其目的在于提供能够将电极端子数量超过5000的那种下一代的半导体芯片安装到上的、生产性能及可靠性都优异的倒装片安装体及倒装片安装方法。The present invention was developed to solve the above-mentioned problems, and its object is to provide a flip-chip package and a flip-chip package that can mount a next-generation semiconductor chip having more than 5,000 electrode terminals, and that are excellent in productivity and reliability. Mounting method.
[0022][0022]
就是说,本发明提供的电子部件安装件(第1发明),其特征在于:是具备电子部件、安装所述电子部件的电路基板部件的电子部件安装体,所述电子部件,在面向所述电路基板的电子部件的表面,形成多个电极端子;所述电路基板,与所述多个电极端子的一一对应地形成电极端子;采用在所述连接的电路基板的电极端子和电子部件的电极端子部以外的区域,配置多个衬垫(spacer)部件的结构;所述电路基板的电极端子和所述电子部件的电极端子,被自我集合(self-aggregating manner)地形成的焊料突起电连接。That is to say, the electronic component package provided by the present invention (the first invention) is characterized in that it is an electronic component package including an electronic component and a circuit board component on which the electronic component is mounted, and the electronic component is mounted on the surface facing the The surface of the electronic component of the circuit substrate forms a plurality of electrode terminals; the circuit substrate forms electrode terminals in one-to-one correspondence with the plurality of electrode terminals; A structure in which a plurality of spacer members are arranged in areas other than the electrode terminal portions; the electrode terminals of the circuit board and the electrode terminals of the electronic components are electrically connected by solder bumps formed in a self-aggregating manner. connect.
[0023][0023]
在某种适当的实施方式中,所述多个衬垫部件的高度,设定成为所述焊料突起的高度,在所述电子部件的电极端子中最短的边的长度的一半和在所述电路基板的电极端子中最短的边的长度的一半相加的高度以下。In an appropriate embodiment, the heights of the plurality of pad components are set to be the height of the solder bumps, half the length of the shortest side of the electrode terminals of the electronic components and the The height equal to or less than the sum of half the lengths of the shortest sides of the electrode terminals of the substrate.
[0024][0024]
在某种适当的实施方式中,所述多个衬垫部件,采用焊料构成。In a certain suitable embodiment, the plurality of pad members are made of solder.
[0025][0025]
在某种适当的实施方式中,所述多个衬垫部件,采用热硬化型树脂材料构成。In a certain suitable embodiment, the plurality of pad members are made of a thermosetting resin material.
[0026][0026]
在某种适当的实施方式中,所述多个衬垫部件,采用光硬化型树脂材料构成。In a certain suitable embodiment, the plurality of spacer members are made of a photocurable resin material.
[0027][0027]
在某种适当的实施方式中,所述多个衬垫部件,采用热可塑性树脂材料构成。In a certain suitable embodiment, the plurality of pad members are made of a thermoplastic resin material.
[0028][0028]
在某种适当的实施方式中,所述多个衬垫部件,采用热熔化型树脂材料构成。In a certain suitable embodiment, the plurality of pad members are made of a heat-melt resin material.
[0029][0029]
在某种适当的实施方式中,所述多个衬垫部件,采用用树脂材料覆盖磁心材料结构。In a certain suitable embodiment, the plurality of spacer members are formed by covering the magnetic core material with a resin material.
[0030][0030]
本发明的电子机器,是具备上述电子部件安装体的电子机器。An electronic device according to the present invention is an electronic device including the electronic component package described above.
本发明的电子部件安装体的制造方法,包含:准备具有排列了电极端子的表面的电子部件的工序(a);准备具有与所述电子部件的电极端子对应地排列了电极端子的表面的电路基板的工序(b),在所述电子部件或电路基板中的至少一个的具有所述电极端子的面上的所述电极端子部以外,形成多个衬垫的工序(c);将树脂中含有焊料粉和该树脂被加热时沸腾的对流添加剂的焊料树脂膏,给予所述电路基板的工序(d);隔着所述焊料树脂膏,将所述电子部件配置在所述电路基板之上的工序(e);加热所述焊料树脂膏,使所述对流添加剂沸腾,利用所述树脂,将所述电子部件具有的电极端子和与所述电极端子对应地在所述电路基板之上形成的电极端子电连接的工序(f);在用所述工序准备的多个衬垫的作用下,在所述电子部件排列的电极端子和与之对应地在电路基板面上排列的电极端子之间,形成一定的间隙。The method for manufacturing an electronic component package according to the present invention includes: a step (a) of preparing an electronic component having a surface on which electrode terminals are arranged; and preparing a circuit having a surface on which electrode terminals are arranged corresponding to the electrode terminals of the electronic component. The step (b) of the substrate, the step (c) of forming a plurality of spacers other than the electrode terminal portion on the surface of at least one of the electronic component or the circuit substrate having the electrode terminal; A step (d) of imparting a solder resin paste containing solder powder and a convective additive that boils when the resin is heated to the circuit board; disposing the electronic component on the circuit board through the solder resin paste The step (e) of heating the solder resin paste to boil the convective additive, and forming the electrode terminals of the electronic component on the circuit board corresponding to the electrode terminals by using the resin The process (f) of electrically connecting the electrode terminals of the above-mentioned process; under the action of a plurality of pads prepared in the process, between the electrode terminals arranged on the electronic components and the corresponding electrode terminals arranged on the surface of the circuit substrate , forming a certain gap.
[0031][0031]
本发明的电子部件安装体的其它的制造方法,准备具有排列了电极端子的表面的电子部件的工序(a);准备具有与所述电子部件的电极端子对应地排列了电极端子的表面的电路基板的工序(b),在所述电子部件或电路基板中的至少一个的具有所述电极端子的面上的所述电极端子部以外,形成多个衬垫的工序(c);将所述电子部件配置在所述电路基板上的工序(d);将使树脂中含有焊料粉和该树脂被加热时沸腾的对流添加剂的焊料树脂膏,充填到所述电子部件和电路基板之间形成的空间的工序(e);加热所述焊料树脂膏,使所述对流添加剂沸腾,利用所述树脂,将所述电子部件具有的电极端子和与所述电极端子对应地在所述电路基板之上形成的电极端子电连接的工序(f);在用所述工序准备的多个衬垫的作用下,Another manufacturing method of the electronic component package of the present invention, the step (a) of preparing an electronic component having a surface on which electrode terminals are arranged; preparing a circuit having a surface on which electrode terminals are arranged corresponding to the electrode terminals of the electronic component The step (b) of the substrate, the step (c) of forming a plurality of spacers other than the electrode terminal portion on the surface of at least one of the electronic component or the circuit substrate having the electrode terminal; The step (d) of arranging the electronic components on the circuit substrate: filling the solder resin paste between the electronic components and the circuit substrate with a solder resin paste containing solder powder and a convective additive that boils when the resin is heated. Step (e) of the space: heating the solder resin paste, boiling the convective additive, and using the resin, the electrode terminals of the electronic component and the electrode terminals corresponding to the electrode terminals are placed on the circuit board A step (f) of electrically connecting the formed electrode terminals; under the action of a plurality of pads prepared by said step,
在所述电子部件排列的电极端子和与之对应地在电路基板面上排列的电极端子之间,形成一定的间隙。A certain gap is formed between the electrode terminals arranged on the electronic component and the corresponding electrode terminals arranged on the circuit board surface.
[0032][0032]
本发明的其它的制造方法,其特征在于:在将所述电子部件配置在所述电路基板之上的工序中,利用所述多个衬垫,进行电子部件和电路基板的附着、保持。Another manufacturing method of the present invention is characterized in that, in the step of arranging the electronic component on the circuit board, the electronic component and the circuit board are attached and held using the plurality of spacers.
[0033][0033]
进而本发明提供倒装片安装体(第2发明),其特征在于:具有电路基板(该电路基板具有多个连接端子)、半导体芯片(该半导体芯片具有与连接端子相对配置的多个电极端子)、板状体(该板状体在半导体芯片的内侧对位粘接,至少在端部具有2个凸起部);在用焊料层电连接电路基板的电极端子和半导体芯片的电极端子的同时,还至少用树脂固定电路基板和半导体芯片。Furthermore, the present invention provides a flip-chip package (the second invention), which is characterized in that: a circuit board (the circuit board has a plurality of connection terminals), a semiconductor chip (the semiconductor chip has a plurality of electrode terminals arranged opposite to the connection terminals) ), a plate-shaped body (the plate-shaped body is bonded in place on the inside of the semiconductor chip, and has at least two protrusions at the end); At the same time, at least the circuit board and the semiconductor chip are fixed with resin.
[0034][0034]
进而,可以包围电路基板的电极端子地设置电极,在电极上形成伪突起(pseudbump)。Furthermore, electrodes may be provided so as to surround the electrode terminals of the circuit board, and pseudo bumps may be formed on the electrodes.
[0035][0035]
进而,电极可以离散地形成。Furthermore, the electrodes may be discretely formed.
[0036][0036]
进而,至少板状体的凸起部的前端,可以由金属或披覆金属的树脂构成,对焊料具有润湿性。Furthermore, at least the front end of the protruding portion of the plate-shaped body may be made of metal or metal-coated resin, and may have wettability to solder.
[0037][0037]
进而,电路基板和板状体的凸起部,通过压接或超声波接合,被接合在一起。Furthermore, the circuit board and the raised portion of the plate-shaped body are bonded together by pressure bonding or ultrasonic bonding.
[0038][0038]
进而,电路基板和板状体,可以被树脂组成物的树脂接合。Furthermore, the circuit board and the plate-shaped body can be bonded by the resin of the resin composition.
[0039][0039]
采用这些结构后,因为有凸起部,能够将电路基板的连接端子和半导体芯片的电极端子的间隔一定,所以可以成为均匀的连接。进而,因为在电路基板上半导体芯片不露出,所以能够实现杜绝输运时的冲击、摩擦导致的连接不良的故障、可靠性优异的倒装片安装体。With these configurations, since the bumps are provided, the distance between the connection terminals of the circuit board and the electrode terminals of the semiconductor chip can be kept constant, so that uniform connection can be achieved. Furthermore, since the semiconductor chip is not exposed on the circuit board, it is possible to realize a highly reliable flip-chip package that eliminates failures such as poor connection due to impact and friction during transportation.
[0040][0040]
另外,本发明的倒装片安装方法,其特征在于:是与具有多个连接端子的电路基板相对,配置具有多个电极端子的半导体芯片,将电路基板的连接端子和半导体芯片的电极端子电连接的倒装片安装方法,具有:使半导体芯片与至少端部具有2个凸起部的板状体对位后粘接的工序;将以焊料粉和对流添加剂及树脂为主要成分的树脂组成物,涂敷或附着在电路基板或半导体芯片上的工序;使在电路基板上粘接了半导体芯片的板状体的凸起部对位后配置,同时还利用凸起部,使电路基板和半导体芯片的间隔成为一定地固定的工序;将树脂组成物加热到焊料粉熔化的温度,使对流添加剂沸腾或分解,产生气体的工序;气体对流,在从板状体的凸起部之间排出的过程中,使熔化的焊料粉在树脂组成物中流动,使焊料粉自我集合及成长,从而将连接端子和电极端子电连接的工序。In addition, the flip-chip mounting method of the present invention is characterized in that a semiconductor chip having a plurality of electrode terminals is arranged facing a circuit board having a plurality of connection terminals, and the connection terminals of the circuit board are electrically connected to the electrode terminals of the semiconductor chip. A flip-chip mounting method for connection, including: a process of aligning a semiconductor chip with a plate-shaped body having at least two protrusions at an end and then bonding it; a resin composition mainly composed of solder powder, a convection additive, and a resin The process of coating or adhering on a circuit substrate or a semiconductor chip; aligning the protrusions of the plate-shaped body on which the semiconductor chip is bonded on the circuit substrate, and then using the protrusions to make the circuit substrate and the semiconductor chip The interval between semiconductor chips becomes fixed; the process of heating the resin composition to the melting temperature of solder powder, boiling or decomposing the convective additive, and generating gas; the gas is convected and discharged between the raised parts of the plate In the process, the molten solder powder flows in the resin composition, so that the solder powder self-assembles and grows, thereby electrically connecting the connection terminal and the electrode terminal.
[0041][0041]
进而,树脂组成物,可以由板状树脂、薄膜状树脂或膏状树脂构成,可以附着在电路基板或半导体芯片上。Furthermore, the resin composition may be composed of a plate-like resin, a film-like resin, or a paste-like resin, and may be attached to a circuit board or a semiconductor chip.
[0042][0042]
进而,将板状体的凸起部固定到电路基板上的工序,可以利用预先在电路基板上形成的固定用的焊料固定。Furthermore, in the step of fixing the protruding portion of the plate-like body to the circuit board, it may be fixed by solder for fixing formed on the circuit board in advance.
[0043][0043]
进而,将板状体的凸起部固定到电路基板上的工序,可以通过压接或超声波接合,将板状体的凸起部接合到电路基板上。Furthermore, in the step of fixing the protruding portion of the plate-shaped body to the circuit board, the protruding portion of the plate-shaped body may be bonded to the circuit board by crimping or ultrasonic bonding.
[0044][0044]
采用这些方法后,因为能够用低载荷安装,所以能够使用薄型、区域配置等的半导体芯片及低介电率的绝缘材料。进而,能够实现半导体芯片和电路基板的牢固连接和可靠性优异的倒装片安装方法。进而,由于能够使电极端子和连接端子之间的接合状态均匀,所以还能够提高成品率和制造效率。By adopting these methods, since it is possible to mount with a low load, it is possible to use a semiconductor chip with a thin profile, area arrangement, etc., and an insulating material with a low dielectric constant. Furthermore, a flip-chip mounting method excellent in firm connection and reliability of the semiconductor chip and the circuit board can be realized. Furthermore, since the bonding state between the electrode terminal and the connection terminal can be made uniform, yield and manufacturing efficiency can also be improved.
[0045][0045]
另外,本发明的倒装片安装体,其特征在于:具有电路基板(该电路基板具有多个连接端子)、半导体芯片(该半导体芯片具有与连接端子相对配置的多个电极端子)、箱状体(该箱状体在半导体芯片的内侧对位粘接,至少具有在一个方向上开口的可以通气的孔);在用焊料层电连接电路基板的电极端子和半导体芯片的电极端子的同时,还至少用树脂固定电路基板和半导体芯片。In addition, the flip-chip package of the present invention is characterized in that it has a circuit board (the circuit board has a plurality of connection terminals), a semiconductor chip (the semiconductor chip has a plurality of electrode terminals arranged opposite to the connection terminals), a box-shaped body (the box-shaped body is bonded in place on the inside of the semiconductor chip, and has at least a hole that can be ventilated in one direction); while electrically connecting the electrode terminals of the circuit board and the electrode terminals of the semiconductor chip with a solder layer, At least the circuit board and the semiconductor chip are also fixed with resin.
[0046][0046]
进而,箱状体,可以覆盖半导体芯片,被加工成在箱状体的开口的周边部,具有周端边突出的凸缘的箱形状。Furthermore, the box-shaped body may cover the semiconductor chip, and may be processed into a box shape having a flange protruding from the peripheral edge at the peripheral portion of the opening of the box-shaped body.
[0047][0047]
进而,箱状体的可以通气的所述孔,可以只在箱状体的未粘接半导体芯片的侧壁部开口。Furthermore, the hole through which air can be ventilated in the box-shaped body may be opened only on the side wall portion of the box-shaped body to which the semiconductor chip is not bonded.
[0048][0048]
进而,包围电路基板的电极端子地设置电极,可以在电极上形成伪突起。Furthermore, by providing the electrodes so as to surround the electrode terminals of the circuit board, dummy protrusions can be formed on the electrodes.
[0049][0049]
进而,电极可以离散地形成。Furthermore, the electrodes may be discretely formed.
[0050][0050]
进而,箱状体可以由金属或披覆金属的树脂构成,对焊料具有润湿性。Furthermore, the box-shaped body may be made of metal or metal-coated resin, and may have wettability to solder.
[0051][0051]
进而,电路基板和箱状体,可以通过压接或超声波接合,被接合在一起。Furthermore, the circuit board and the box-shaped body can be bonded together by crimping or ultrasonic bonding.
[0052][0052]
进而,电路基板和箱状体,可以被树脂组成物的树脂接合。Furthermore, the circuit board and the box-shaped body may be bonded by the resin of the resin composition.
[0053][0053]
采用这些结构后,因为能够利用箱状体的侧壁部,将电路基板的连接端子和半导体芯片的电极的间隔一定,所以可以在成为均匀的连接,还减少电路基板的翘曲。进而,因为在电路基板上半导体芯片不露出,所以能够实现杜绝输运时的冲击、摩擦导致的连接不良的故障、可靠性优异的倒装片安装体。With these structures, since the space between the connection terminals of the circuit board and the electrodes of the semiconductor chip can be fixed by the side wall of the box-shaped body, uniform connection can be achieved and warping of the circuit board can be reduced. Furthermore, since the semiconductor chip is not exposed on the circuit board, it is possible to realize a highly reliable flip-chip package that eliminates failures such as poor connection due to impact and friction during transportation.
[0054][0054]
另外,本发明的倒装片安装方法,其特征在于:是与具有多个连接端子的电路基板相对,配置具有多个电极端子的半导体芯片,将电路基板的连接端子和半导体芯片的电极端子电连接的倒装片安装方法,具有:使半导体芯片与至少具有在一个方向上开口的可以通气的孔的箱状体对位后粘接的工序;将以焊料粉和对流添加剂及树脂为主要成分的树脂组成物,涂敷或附着在电路基板或半导体芯片上的工序;使在电路基板上粘接了半导体芯片的箱状体对位后配置,同时还利用箱状体的开口侧的侧端部,使电路基板和半导体芯片的间隔成为一定地固定的工序;将树脂组成物加热到焊料粉熔化的温度,使对流添加剂沸腾或分解,产生气体的工序;气体对流,在从箱状体的孔排出的过程中,使熔化的焊料粉在树脂组成物中流动,使焊料粉自我集合及成长,从而将连接端子和电极端子电连接的工序。In addition, the flip-chip mounting method of the present invention is characterized in that a semiconductor chip having a plurality of electrode terminals is arranged facing a circuit board having a plurality of connection terminals, and the connection terminals of the circuit board are electrically connected to the electrode terminals of the semiconductor chip. The flip-chip mounting method of connection has: the process of aligning and bonding the semiconductor chip with the box-shaped body having at least one ventilating hole opened in one direction; the main components are solder powder, convective additive and resin The process of coating or adhering the resin composition on the circuit board or semiconductor chip; aligning the box-shaped body with the semiconductor chip bonded on the circuit board, and using the side end of the opening side of the box-shaped body at the same time Part, the process of making the distance between the circuit board and the semiconductor chip fixed; the process of heating the resin composition to the melting temperature of the solder powder, boiling or decomposing the convective additive, and generating gas; gas convection, from the box-shaped body During the hole discharge process, the molten solder powder flows in the resin composition, and the solder powder self-assembles and grows, thereby electrically connecting the connection terminal and the electrode terminal.
[0055][0055]
进而,树脂组成物,可以由板状树脂、薄膜状树脂或膏状树脂构成,可以附着在电路基板或半导体芯片上。Furthermore, the resin composition may be composed of a plate-like resin, a film-like resin, or a paste-like resin, and may be attached to a circuit board or a semiconductor chip.
[0056][0056]
进而,将箱状体的开口侧的侧端部固定到电路基板上的工序,可以利用预先在电路基板上形成的固定用的焊料固定。Furthermore, in the step of fixing the side end portion of the box-shaped body on the opening side to the circuit board, it may be fixed by solder for fixing formed on the circuit board in advance.
[0057][0057]
进而,将箱状体的开口侧的侧端部固定到电路基板上的工序,可以通过压接或超声波接合,将箱状体接合到电路基板上。Furthermore, in the step of fixing the side end portion of the box-shaped body on the opening side to the circuit board, the box-shaped body may be bonded to the circuit board by crimping or ultrasonic bonding.
[0058][0058]
进而,将箱状体的开口侧的侧端部固定到电路基板上的工序,可以是使树脂组成物介于电路基板和半导体芯片之间,将箱状体的开口侧的侧端部按压到与电路基板相接为止的工序。Further, the step of fixing the side end of the box-shaped body on the opening side to the circuit board may be to place the resin composition between the circuit board and the semiconductor chip, and press the side end of the box-shaped body on the opening side. The process up to the contact with the circuit board.
[0059][0059]
采用这些方法后,因为能够用低载荷安装,所以能够使用薄型、区域配置等的半导体芯片及低介电率的绝缘材料。进而,能够实现半导体芯片和电路基板的牢固连接和可靠性优异的倒装片安装方法。另外,由于能够使电极端子和连接端子之间的接合状态均匀,所以还能够提高成品率和制造效率。By adopting these methods, since it is possible to mount with a low load, it is possible to use a semiconductor chip with a thin profile, area arrangement, etc., and an insulating material with a low dielectric constant. Furthermore, a flip-chip mounting method excellent in firm connection and reliability of the semiconductor chip and the circuit board can be realized. In addition, since the bonding state between the electrode terminal and the connection terminal can be made uniform, yield and manufacturing efficiency can also be improved.
[0060][0060]
采用本发明后,在具备电子部件和安装了所述电子部件的电路基板的安装体——在所述电子部件的面向所述电路基板的电子部件表面,形成多个电极端子,在所述电路基板上,与所述多个电极端子的每一个对应,形成电极端子,在所述连接的电路基板的电极端子和电子部件的电极端子部以外的区域,配置多个调整部件的结构中,所述电路基板的电极端子和所述电子部件的电极端子,被自我集合地形成的焊料电连接。这样,精度高容易实现实际安装的对应的电极之间的间隙距离统一连接的适当的距离。易于高精度地实现将安装的电子部件的电极和与之对应的电路基板的电极之间的间隙距离,作为统一连接其间的自我集合地形成的焊料突起形成的适当的距离。其结果,能够实现生产性及可靠性均优异的电子部件安装体。After adopting the present invention, a plurality of electrode terminals are formed on the surface of the electronic component facing the electronic component on the electronic component and the circuit board on which the electronic component is mounted. In the structure in which an electrode terminal is formed corresponding to each of the plurality of electrode terminals on the substrate, and a plurality of adjustment members are arranged in an area other than the electrode terminal of the connected circuit board and the electrode terminal portion of the electronic component, the The electrode terminals of the circuit board and the electrode terminals of the electronic component are electrically connected by self-assembled solder. In this way, with high precision, it is easy to realize an appropriate distance between the actually installed corresponding electrodes and uniformly connected gap distances. The gap distance between the electrodes of the electronic component to be mounted and the electrodes of the circuit board corresponding thereto can be easily realized with high precision as an appropriate distance for forming the solder bumps formed by self-collection to collectively connect them therebetween. As a result, an electronic component package excellent in both productivity and reliability can be realized.
[0061][0061]
进而,采用本发明的倒装片安装体及其安装方法后,在可以成为使半导体芯片和电路基板的连接牢固的安装的方法的同时,还因为在安装了半导体芯片的电路基板上,半导体芯片不露出,所以不容易产生输运时的冲击、摩擦导致的连接不良等故障,能够实现可靠性优异的倒装片安装体。进而,由于能够使电极端子和连接端子之间的接合状态均匀,所以还能够产生提高成品率和制造效率的效果。Furthermore, after adopting the flip-chip mounting body and its mounting method of the present invention, while it can become a method of mounting the connection between the semiconductor chip and the circuit board firmly, it is also because the semiconductor chip is mounted on the circuit board on which the semiconductor chip is mounted. Since it is not exposed, failures such as shock during transportation and poor connection due to friction are less likely to occur, and a flip-chip package with excellent reliability can be realized. Furthermore, since the joining state between the electrode terminal and the connection terminal can be made uniform, the effect of improving yield and manufacturing efficiency can also be produced.
附图说明 Description of drawings
[0062][0062]
图1(a)~(c)是利用焊料突起形成技术的电子部件安装体的制造工序中的该安装体的简要剖面图。1( a ) to ( c ) are schematic cross-sectional views of the electronic component package in the manufacturing process of the electronic component package using solder bump forming technology.
图2(a)~(e)是本发明的一种样态中的电子部件安装体的制造工序中的该安装体的简要剖面图。2( a ) to ( e ) are schematic cross-sectional views of the package in the manufacturing process of the electronic component package in one aspect of the present invention.
图3是本发明的一种样态中的电子部件安装体的制造工序的流程图。FIG. 3 is a flowchart of the manufacturing process of the electronic component package in one aspect of the present invention.
图4(a)~(e)是本发明的别的样态中的电子部件安装体的制造工序中的该安装体的简要剖面图。4( a ) to ( e ) are schematic cross-sectional views of the package in the manufacturing process of the electronic component package in another aspect of the present invention.
图5是本发明的别的样态中的电子部件安装体的制造工序的流程图。5 is a flow chart of the manufacturing process of the electronic component package in another aspect of the present invention.
图6是讲述本发明的实施方式涉及的半导体封装的背面电极和电路基板的电极端子之间的理想的间隙距离的图形。6 is a graph showing an ideal gap distance between the back electrode of the semiconductor package and the electrode terminal of the circuit board according to the embodiment of the present invention.
图7(a)~(e)是本发明的别的样态中的电子部件安装体的制造工序中的该安装体的简要剖面图。7( a ) to ( e ) are schematic cross-sectional views of the package in the manufacturing process of the electronic component package in another aspect of the present invention.
图8(a)是表示本发明的第1实施方式中的倒装片安装体的立体图,(b)是图8(a)的A~A线剖面图。8( a ) is a perspective view showing a flip chip package according to the first embodiment of the present invention, and ( b ) is a sectional view taken along line A to A of FIG. 8( a ).
图9是讲述本发明的第1实施方式中的倒装片安装体及倒装片安装方法的简要工序剖面图。Fig. 9 is a schematic cross-sectional view illustrating the steps of the flip chip mounting body and the flip chip mounting method in the first embodiment of the present invention.
图10(a)是从斜下方观察图3(a)的板状体的立体图,(b)是从斜下方观察安装了图3(b)的半导体芯片的板状体的立体图。10( a ) is a perspective view of the plate-shaped body of FIG. 3( a ) viewed obliquely from below, and (b) is a perspective view of the plate-shaped body mounted with the semiconductor chip of FIG. 3( b ) viewed obliquely from below.
图11(a)是表示本发明的第2实施方式中的倒装片安装体的立体图,(b)是图5(a)的A~A线剖面图。FIG. 11( a ) is a perspective view showing a flip-chip mounted body in a second embodiment of the present invention, and ( b ) is a cross-sectional view taken along line A to A of FIG. 5( a ).
图12是讲述本发明的第2实施方式中的倒装片安装体及倒装片安装方法的简要工序剖面图。Fig. 12 is a schematic process cross-sectional view illustrating a flip-chip mounted body and a flip-chip mounting method in a second embodiment of the present invention.
图13(a)是从斜下方观察图6(a)的箱状体的立体图,(b)是从斜下方观察安装了图6(b)的半导体芯片的箱状体的立体图。13( a ) is a perspective view of the box-shaped body of FIG. 6( a ) viewed obliquely from below, and (b) is a perspective view of the box-shaped body mounted with the semiconductor chip of FIG. 6( b ) viewed obliquely from below.
符号说明Symbol Description
[0063][0063]
10半导体封装(电子部件)10 Semiconductor packages (electronic components)
11背面电极端子11 Rear electrode terminal
20衬垫(spacer)20 spacer
21、22接合突台(joining pad)21, 22 joining pad
23芯材料23 core material
24树脂材料24 resin material
30焊料膏30 solder paste
31对流31 convection
40电路基板40 circuit substrate
41电极端子41 electrode terminal
50焊料突起50 solder bumps
100电子部件安装体(electronic-part mounting body)100 Electronic-part mounting body (electronic-part mounting body)
110电路基板110 circuit substrate
111连接端子111 connection terminal
112对流添加剂112 convective additive
113焊料树脂膏113 solder resin paste
121元件电极121 element electrodes
122焊料突起122 solder bumps
201、307、401、510电路基板201, 307, 401, 510 circuit boards
204、308、402、511连接端子204, 308, 402, 511 connecting terminals
407树脂407 resin
306树脂组成物306 resin composition
206、304、404、507半导体芯片206, 304, 404, 507 semiconductor chips
207、305、406、508电极端子207, 305, 406, 508 electrode terminals
208、313、405、514焊料层208, 313, 405, 514 solder layers
200、400倒装片安装体200, 400 flip-chip mounting body
202、302凸起部202, 302 raised part
203、407、509树脂组成物203, 407, 509 resin composition
205、301板状体205, 301 plates
209、314伪突起(pseudbump)209, 314 pseudobump (pseudbump)
210、309电极210, 309 electrodes
403、504箱状体403, 504 box body
303真空吸引装置303 vacuum suction device
310接合电极310 bonding electrode
311、512加热器311, 512 heater
312、513气体312, 513 gas
408、506孔408, 506 holes
409、505凸缘409, 505 flange
501搬运装置501 handling device
502铰链502 hinge
具体实施方式 Detailed ways
[0064][0064]
下面,讲述第1发明。Next, the first invention will be described.
[0065][0065]
本申请人开发出可以在规定条件下使焊料自我集合,形成焊料突起或进行倒装片安装的独自拥有的技术,在特愿2004-257206号说明书及特愿2004-267919号说明书中进行了讲述。在这里,将特愿2004-257206号说明书及特愿2004-267919号作为本说明书的一部分引用。The present applicant has developed a proprietary technology that can self-assemble solder under specified conditions to form solder bumps or perform flip-chip mounting, which is described in Japanese Patent Application No. 2004-257206 and Japanese Patent Application No. 2004-267919 . Here, Japanese Patent Application No. 2004-257206 and Japanese Patent Application No. 2004-267919 are cited as a part of this specification.
[0066][0066]
下面,参照图1(a)~图1(c),简单讲述自我集合形成焊料突起的技术。Next, referring to FIG. 1( a ) to FIG. 1( c ), the technique of self-assembly to form solder bumps will be briefly described.
[0067][0067]
首先,如图1(a)所示,向形成多个连接端子111的电路基板110,供给含有未图示的金属粒子(例如焊料粉)及对流添加剂112。此外,和上文所述的同样,对流添加剂112是加热焊料树脂膏113时沸腾后产生对流的添加剂。First, as shown in FIG. 1( a ), a
[0068][0068]
接着,如图1(b)所示,将具有多个元件电极121的半导体芯片120与焊料树脂膏113的表面相接。这时,半导体芯片120的元件电极121,被与电路基板110的连接端子111相对地配置。然后,在该状态下,加热焊料树脂膏113。在这里,焊料树脂膏113的加热温度,用高于金属粒子的熔点及对流添加剂112的沸点的温度进行。Next, as shown in FIG. 1( b ), the
[0069][0069]
被加热熔化的金属粒子,在焊料树脂膏113中互相结合,如图1(c)所示,在润湿性高的连接端子111和元件电极121之间自我集合。这样,形成将半导体芯片120的元件电极121和电路基板110的连接端子111之间电连接的连接体122。然后,使焊料树脂膏113中的树脂硬化,从而将半导体芯片120固定在电路基板110上。The heated and melted metal particles are bonded to each other in the
[0070][0070]
上述技术的特征在于:焊料树脂膏113被加热时,焊料树脂膏113中含有的对流添加剂112沸腾,沸腾的对流添加剂112,使焊料树脂膏113中产生对流,从而促进分散在焊料树脂膏113中的金属粒子的移动。这样,能够使金属粒子的结合均匀地进行,自我集合地形成连接体(焊料突起)122。在这里,可以认为焊料树脂膏113是起使金属粒子自由地浮游、移动的“海”的作用。但是由于金属粒子彼此结合的过程,在极短的时间结束,所以无论设置多少金属粒子能够自由地移动的“海”,也只能进行局部性的结合,所以利用成为该“海”的焊料树脂膏113和对流添加剂112引起的对流的组合,能够自我集合地形成焊料突起122。此外,焊料突起122在自我集合地形成的同时,作为焊料突起的性质,还自己整合地形成。The above technique is characterized in that when the
[0071][0071]
上述方法的目的,是使含有焊料粉的树脂组成物进而含有对流添加剂,从而附加强调性地使溶化的焊料粉移动的单元。此外,对流添加剂,可以是加热后沸腾或蒸发的溶剂,在工序结束后,在树脂组成物中几乎没有剩余。The purpose of the above-mentioned method is to add a means for emphatically moving the melted solder powder by adding a convective additive to the resin composition containing the solder powder. In addition, the convective additive may be a solvent that boils or evaporates after heating, and hardly remains in the resin composition after the process is completed.
[0072][0072]
在上述技术中,如图1(b)所示,需要在半导体芯片120的元件电极121和电路基板110的连接端子111之间,形成介有焊料树脂膏113的适当的一定的间隙距离。就是说,半导体芯片120和电路基板110的间隔过近,就会产生在没有该间隙的连接部位,不能形成所述连接体122的问题;反之,过远,则会产生在没有与所述树脂相接的连接部位,不能形成所述连接体122的问题。In the above technique, as shown in FIG. 1( b ), it is necessary to form an appropriate constant gap distance between the
[0073][0073]
因此,本发明人努力研究需要解决不能形成连接体这一课题的该自我集合的焊料接合技术的内容,结果发现了解决该问题的办法,形成了本发明。Therefore, the inventors of the present invention worked hard to study the content of the self-assembled solder joint technology that needs to solve the problem that the connected body cannot be formed, found a solution to the problem, and formed the present invention.
[0074][0074]
下面,参照附图,讲述本发明的实施方式。在以下的附图中,为使说明简洁,对于和实质上具有相同功能的构成要素,给予相同的符号。此外,本发明并不局限于以下的实施方式。Embodiments of the present invention will be described below with reference to the drawings. In the following drawings, for the sake of concise description, the same reference numerals are assigned to components having substantially the same functions. In addition, this invention is not limited to the following embodiment.
[0075][0075]
下面,参照图2~图7,讲述本发明的实施方式涉及的电子部件安装体100及其制造方法。Next, the
[0076][0076]
图2(a)~图2(e)是表示本实施方式的涉及的电子部件安装体的主要工序中及完成时的简要剖面图,图3是该安装工序的流程图。2( a ) to 2( e ) are schematic cross-sectional views showing the electronic component package according to the present embodiment during the main process and at the time of completion, and FIG. 3 is a flowchart of the mounting process.
[0077][0077]
在图2(a)中,10表示本实施方式的电子部件安装体100使用的具有区域阵列端子排列的半导体封装的断面结构,11是区域阵列排列的背面电极端子,20是由具有高熔点的焊料构成的衬垫,21表示与衬垫接合的接合突台。In FIG. 2( a), 10 represents a cross-sectional structure of a semiconductor package having an area array terminal arrangement used in the
[0078][0078]
在图2(b)中,40表示本实施方式的电子部件安装体100使用的电路基板的断面结构,41是与半导体封装10形成的背面电极端子11一一对应地连接的、在电路基板40的表面形成的电极端子,22表示与衬垫20接合的在电路基板40的表面形成的接合突台,30表示焊料膏。In FIG. 2( b ), 40 represents a cross-sectional structure of a circuit board used in the
[0079][0079]
首先,如图2(a)所示,准备在一面具有背面电极端子11的半导体封装10的规定位置,形成接合突台21和在其上形成衬垫20的部件(S01)。作为接合突台21的材料,必须是涂敷衬垫20使用的焊料等材料后能够接合保持的材料。作为一个例子,可以和普通的半导体封装10的背面电极端子11同样,采用在Cu等金属上镀金(Au)的结构。衬垫20,最好由后文讲述的焊料膏30中包含的焊料粉体材料的熔化温度高的高熔点的焊料构成。例如:焊料膏30中包含的焊料粉体材料是PbSn共晶焊料(熔点183℃),衬垫20的高熔点焊料是的SnAgCu类材料(熔点220℃)。First, as shown in FIG. 2( a ), a member having a
[0080][0080]
另一方面,准备具有所需的布线图案(未图示),在其一个面上形成分别与半导体封装10的背面电极端子11对应的电极端子41和衬垫20接合的接合突台22的电路基板40(S02)。On the other hand, a circuit having a desired wiring pattern (not shown) is prepared, and the
[0081][0081]
如图2(b)所示,在电路基板40上的规定的位置,介有衬垫20地搭载半导体封装10(S03)。这时,半导体封装10形成的背面电极端子11和与它对应的电路基板40形成的电极端子41,设置规定的间隙。As shown in FIG. 2( b ), the
[0082][0082]
搭载半导体封装10后,如图2(c)所示,将向树脂中添加了焊料粉和对流添加剂的焊料树脂膏30,流入半导体封装10和电路基板40的间隙空间,进行充填(S04)。After the
[0083][0083]
对流添加剂,是该树脂被加热时沸腾的材料,例如是有机溶剂。加热焊料树脂膏30后,如图2(d)所示,焊料树脂膏30中的对流添加剂沸腾,在树脂中产生对流。于是,如图2(e)所示,焊料树脂膏30中的焊料粉自我集合,形成焊料突起50。利用该焊料突起50,将半导体封装10的背面电极端子11和电路基板40的电极端子41统一连接(S05)。The convective additive is a material that boils when the resin is heated, such as an organic solvent. When the solder resin paste 30 is heated, as shown in FIG. 2( d ), the convective additive in the solder resin paste 30 boils to generate convection in the resin. Then, as shown in FIG. 2( e ), the solder powder in the solder resin paste 30 self-assembles to form a
[0084][0084]
此外,在半导体封装10搭载工序(S03)以后的工序中,需要进行例如夹持半导体封装10和电路基板40等的处置,以便使半导体封装10不从电路基板40中脱落。In addition, in the steps after the
[0085][0085]
在本实施方式中,由于能够在半导体封装10的背面电极端子11和与之对应的电路基板40的电极端子41之间,精度良好地而且很容易地设置规定的适当的间隙距离,所以能够防止出现不形成连接突起50的问题。In the present embodiment, since it is possible to precisely and easily set a predetermined appropriate gap distance between the back
[0086][0086]
接着,参照图4(a)~图4(e)及图5,讲述本实施方式的制造方法的一个改变例。Next, a modified example of the manufacturing method of this embodiment will be described with reference to FIGS. 4( a ) to 4 ( e ) and FIG. 5 .
图4(a)~图4(e)是本实施方式的改变例涉及的电子部件安装体的主要工序中及完成时的简要剖面图。进而,图5是该安装工序的流程图。4( a ) to 4( e ) are schematic cross-sectional views during main steps and at the time of completion of the electronic component package according to the modified example of the present embodiment. Furthermore, FIG. 5 is a flowchart of this mounting process.
[0087][0087]
在本实施方式中,首先,如图4(a)所示,准备在一面具有背面电极端子11的半导体封装10的规定位置,形成接合突台21和在其上形成衬垫20的部件(S01)。In this embodiment, first, as shown in FIG. ).
[0088][0088]
再如图4(b)所示,准备在具有所需的布线图案(未图示)、在其一个面上形成分别与半导体封装10的背面电极端子11对应的电极端子41和衬垫20接合的接合突台22的电路基板40的面上的规定位置,涂敷了所需量的焊料树脂膏30的部件(S06)。As shown in FIG. 4 (b), prepare to have the required wiring pattern (not shown), and
[0089][0089]
如图4(c)所示,在电路基板40上的规定的位置,介有衬垫20并且与焊料树脂膏30相接地搭载半导体封装10(S03)。As shown in FIG. 4( c ), the
[0090][0090]
加热焊料树脂膏30后,如图4(d)所示,焊料树脂膏30中的对流添加剂沸腾,在树脂中产生对流31。于是,如图4(e)所示,焊料树脂膏30中的焊料粉自我集合,形成焊料突起50。利用该焊料突起50,将半导体封装10的背面电极端子11和电路基板40的电极端子41统一连接(S05)。When the solder resin paste 30 is heated, as shown in FIG. 4( d ), the convective additive in the solder resin paste 30 boils to generate convection 31 in the resin. Then, as shown in FIG. 4( e ), the solder powder in the solder resin paste 30 self-assembles to form a
[0091][0091]
此外,在半导体封装10搭载工序(S03)以后的工序中,需要进行例如夹持半导体封装10和电路基板40等的处置,以便使半导体封装10不从电路基板40中脱落。In addition, in the steps after the
[0092][0092]
在本实施方式的改变例中,预先在电路基板40的面上涂敷焊料树脂膏30,从而能够省略将焊料树脂膏30流入半导体封装10和电路基板40的间隙的工序(S4)。这样,因为焊料树脂膏30不必具备流入性能,所以能够扩大材料选择的范围。In the modified example of this embodiment, the step of pouring the solder resin paste 30 into the gap between the
[0093][0093]
在上述实施方式中,在将半导体封装10搭载到电路基板40上的工序(S03)之后,使用用焊料形成的衬垫20部件进行利用焊料接合的保持,从而防止半导体封装10不从电路基板40中脱落。此外,毫无疑问,预先将焊料树脂膏30涂敷到半导体封装10的一侧,也能获得同样的效果。In the above-described embodiment, after the step (S03) of mounting the
[0094][0094]
在上述实施方式中,为了形成精度很高的间隙,形成衬垫20的个数,最好是3个以上。这是因为搭载在电路基板40上的半导体封装10不倾斜,间隙距离精度高的缘故。In the above-described embodiment, in order to form a gap with high precision, the number of
[0095][0095]
在上述实施方式中,半导体封装10的背面电极端子11和电路基板40的电极端子之间的理想的间隙距离,如图6所示,使半导体封装10侧的背面电极端子11中的最短边的长度为min.Lp、电路基板40侧的电极端子41中的最短边的长度为min.Ls,那么间隙距离的最大值就最好是min.Lp和min.Ls的一半以下。其理由是:半导体封装10的背面电极端子11及电路基板40的电极端子之间形成的焊料突起50大于该距离后,溢到电极端子11、41上引起短路的可能性大的缘故。In the above-mentioned embodiment, the ideal gap distance between the
[0096][0096]
在上述实施方式中,使用高温焊料作为衬垫20。但是使用热硬化型树脂、光硬化型树脂、热可塑性树脂、热熔化型树脂等具有多种多样的粘接性的树脂材料,也能获得同样的效果。In the above-described embodiment, high-temperature solder is used as the
[0097][0097]
进而,也可以如图7(a)~(e)所示,采用例如将具有粘接性的留着未硬化部分的热硬化型树脂材料24覆盖完全硬化后的热硬化型树脂的芯材料23的结构的粘接树脂覆盖磁芯衬垫那样的复合结构。Furthermore, as shown in FIGS. 7(a) to (e), for example, a
[0098][0098]
在这里,热硬化型树脂,例如可以列举环氧树脂、苯酚树脂、氰酸盐树脂、聚(二)苯醚树脂或它们的混合物。Here, examples of thermosetting resins include epoxy resins, phenol resins, cyanate resins, poly(di)phenylene ether resins, or mixtures thereof.
[0099][0099]
光硬化型树脂,是照射规定的紫外线后产生聚合反应而形成的树脂,例如作为原子团聚合类,可以列举使用了聚酯丙烯酸脂、尿烷丙烯酸脂、环氧丙烯酸脂等丙烯基类低聚物及不饱和聚脂、烯硫醇(enthiol)或它们的化合物的物质。作为阳离子催化聚合类,可以列举使用了缩水甘油醚类、脂环式环氧树脂类等的环氧树脂类或氧杂环丁烷类、乙烯醚聚类或它们的化合物的物质。Photocurable resins are resins that undergo a polymerization reaction after being irradiated with predetermined ultraviolet rays. For example, as the radical polymerization type, acrylic oligomers such as polyester acrylate, urethane acrylate, and epoxy acrylate are used. And unsaturated polyester, enethiol (enthiol) or their compounds. Examples of cationic catalyst polymerizations include epoxy resins such as glycidyl ethers and alicyclic epoxy resins, oxetanes, vinyl ethers, or compounds thereof.
[0100][0100]
作为热可塑性树脂,例如可以列举聚乙烯(PE)、聚丙烯(PP)、聚苯乙烯(PS)、丙烯青/苯乙烯树脂(AS)、丙烯青/丁二烯/苯乙烯树脂(ABS)、甲基丙烯树脂(PMMA)、氯乙烯(PVC)等。Examples of thermoplastic resins include polyethylene (PE), polypropylene (PP), polystyrene (PS), acrylic blue/styrene resin (AS), acrylic blue/butadiene/styrene resin (ABS) , methacrylic resin (PMMA), vinyl chloride (PVC), etc.
[0101][0101]
作为热熔化型树脂材料,例如可以列举EVA(醋酸乙烯类)、PA(聚酰胺类)、PP(聚丙烯类)、橡胶类等。Examples of the hot-melt resin material include EVA (vinyl acetate), PA (polyamide), PP (polypropylene), and rubber.
[0102][0102]
上述实施方式的焊料树脂膏30,如上所述,在树脂中含有焊料粉和该树脂被加热时沸腾的对流添加剂。换句话说,焊料树脂膏30由树脂、分散在树脂中的焊料粉(未图示)和该树脂被加热时沸腾的对流添加剂(未图示)构成。在本实施方式中,作为树脂,使用热硬化型树脂(例如环氧树脂);作为焊料粉,使用Pb自由焊料粉,作为对流添加剂,可以使用溶剂(例如高沸点的有机溶剂),作为一个例子,可以使用异丙醇、乙酸丁酯、丁基卡必醇、乙二醇等。焊料粉的含有量,最好为30vol%以下。对流添加剂在树脂中的含有量,没有特别限制,但是以0.1~20重量%的比例在树脂中含有,最理想。The solder resin paste 30 of the above-mentioned embodiment contains, as described above, solder powder and a convective additive that boils when the resin is heated. In other words, the solder resin paste 30 is composed of a resin, solder powder (not shown) dispersed in the resin, and a convective additive (not shown) that boils when the resin is heated. In this embodiment, as resin, use thermosetting resin (for example epoxy resin); , isopropanol, butyl acetate, butyl carbitol, ethylene glycol, etc. can be used. The content of solder powder is preferably 30 vol% or less. The content of the convective additive in the resin is not particularly limited, but it is most preferably contained in the resin at a ratio of 0.1 to 20% by weight.
[0103][0103]
另外,如上所述,所谓对流添加剂的“对流”,是指作为运动形态的对流,只要是沸腾的对流添加剂在树脂中运动后,给于分散在树脂中的金属粒子(焊料粉)动能,起促进金属粒子的移动的作用的运动,无论哪种形态都行。此外,对流添加剂,除了其本身沸腾后产生对流的物质之外,还可以使用树脂加热后产生气体(H2O、CO2、N2等的气体)的对流添加剂,作为这种物质的例子,可以列举包含结晶水的化合物、加热分解的化合物或发泡剂。In addition, as mentioned above, the so-called "convection" of the convection additive refers to convection as a form of movement. As long as the boiling convection additive moves in the resin, it imparts kinetic energy to the metal particles (solder powder) dispersed in the resin, and starts to move. Any form of motion that promotes movement of the metal particles is acceptable. In addition, as convective additives, in addition to substances that generate convective flow after boiling themselves, convective additives that generate gases (gases such as H 2 O, CO 2 , N 2 ) after heating resins can also be used. As examples of such substances, A compound containing crystal water, a thermally decomposed compound, or a blowing agent may be cited.
[0104][0104]
图2(b)~(c)及图4(d)~图4(e)中的焊料突起50的形成时间,因条件而异,例如5秒~30秒左右(代表性的例子是大约5秒)。此外,在焊料突起50的形成中,可以引进事先加热焊料树脂膏30的预热工序。The formation time of the
[0105][0105]
焊料突起50,在自我集合地形成的同时,还对背面电极端子11及电极端子41而言自己整合地形成。这样,背面电极端子11及电极端子41和焊料突起50之间的错位就实质上没有,能够自动地与背面电极端子11及电极端子41的图案对应地形成焊料突起50。The solder bumps 50 are self-integrated with respect to the
[0106][0106]
焊料突起50因为是由焊料树脂膏30中的焊料粉自我集合后形成的,所以在构成焊料树脂膏30的树脂中,实质上不包含导电粒子,邻接的焊料突起50彼此被构成图2(e)及图4(e)中的焊料树脂膏30的树脂绝缘。另外,对流添加剂被加热后成为气体,被排放到外部,从而能够从焊料树脂膏30中清除。此外,还可以在形成焊料突起50、冲洗焊料树脂膏30后,充填其他的树脂(也可以是同种树脂)。Since the
[0107][0107]
使构成焊料树脂膏30的树脂(或其他的树脂)硬化后,就可以获得图2(e)及图4(e)所示的本实施方式的电子部件安装体100。但是充填其他的树脂时,作为构成焊料树脂膏30的树脂,还能够使用热硬化型树脂以外的树脂(光硬化型树脂、热可塑性树脂等)。After curing the resin (or other resins) constituting the solder resin paste 30 , the
[0108][0108]
以上,通过适当的实施方式讲述了本发明,但这些讲述并不是限定事项,毫无疑问,可以有各种改变。As mentioned above, although this invention was described by suitable embodiment, these descriptions are not limiting matters, and it cannot be overemphasized that various changes are possible.
[0109][0109]
构成半导体封装10的LSI芯片,代表性的是存储器IC及逻辑IC或系统LSI,但对其种类没有特殊限定。在上述本发明的实施方式中,讲述了将LSI芯片作为半导体封装10的情况,但并不局限于半导体封装10,例如还可以作为采用倒装片技术的裸芯片安装单元使用。进而,半导体封装10还可以是裸芯片等半导体元件经过渡件(中间基板)而被模块化。该模块具备多个电极(安装用端子),作为这种模块,可以包含RF模块、电源模块等。此外,除了用过渡件实施模块化之外,还可以是具备多个安装用端子的部件内置基板模块(例如SIMPACTM)之类。The LSI chips constituting the
[0110][0110]
另外,本发明的实施方式涉及的安装体100,可以搭载到安装面积受到限制的薄型·小型的电子机器中。另外,不局限于手机,还可以用于PDA及笔记本电脑,另外还可以用于其他用途(例如数码相机、壁挂式薄型电视机(FPD;黑屏显示器))。In addition, the
[0111][0111]
以下,讲述第2发明Hereinafter, the second invention will be described
[0112][0112]
本专利申请人提出了下一代半导体芯片的新式倒装片安装方法(特愿2004-267919号)。而且,本发明根据上述申请专利,讲述了可以获得更好的效果的倒装片安装方法。The applicant of this patent proposed a novel flip-chip mounting method for next-generation semiconductor chips (Japanese Patent Application No. 2004-267919). Moreover, the present invention describes a flip-chip mounting method that can obtain better effects based on the above-mentioned patent application.
[0113][0113]
本发明立足于和用图1讲述的倒装片安装方法同样的技术观点,实现更牢固、可靠性更高的新式倒装片安装方法。而且,实施本发明后,能够制作生产效率高的倒装片安装体。The present invention is based on the same technical viewpoint as the flip-chip mounting method described in FIG. 1, and realizes a new flip-chip mounting method that is stronger and more reliable. Furthermore, after implementing the present invention, it is possible to manufacture a flip-chip package with high productivity.
[0114][0114]
下面,参照附图,详细讲述本发明的实施方式。此外,为了容易理解,图纸进行了任意的扩大。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the drawings are arbitrarily enlarged for easy understanding.
[0115][0115]
(第1实施方式)(first embodiment)
图8(a)是表示本发明的第1实施方式中的倒装片安装体的立体图,图8(b)是图8(a)的A~A线剖面图。8( a ) is a perspective view showing a flip-chip mounted body in the first embodiment of the present invention, and FIG. 8( b ) is a cross-sectional view taken along line A to A of FIG. 8( a ).
[0116][0116]
在图8中,本发明的第1实施方式中的倒装片安装体200,采用利用焊料层208,将在电路基板201上形成的多个连接端子204和具有相对配置的多个电极端子207的半导体芯片206电连接的结构。而且,在和半导体芯片206的电极端子207的形成面的相反侧粘接的板状体205的角部附近,覆盖半导体芯片206地形成4个凸起部202。板状体205的4个凸起部202,直接地(例如采用压接或焊料等)与电路基板201接合。此外,凸起部202至少用焊料与电路基板201接合时,可以使用在对于焊料润湿性良好的金属或树脂上涂覆金属的材料。进而,在用电路基板201和板状体205形成的空间内,利用覆盖其周围的树脂203,和将连接端子204和电极端子207电连接的焊料层208一起,至少固定半导体芯片206和电路基板201。In FIG. 8 , the flip-
[0117][0117]
另外,还包围电路基板201的与半导体芯片206的电极端子207接合的连接端子204地设置电极210,然后使焊料粉在其上熔化集合,形成伪突起209。而且,焊料粉在加热熔化时,在电极210上作为伪突起209熔化集合,从而被捕捉,所以不能飞散到外部。这样,能够防止焊料粉从板状体205中流出来导致的短路等,可以获得可靠性高的倒装片安装体200。Also,
[0118][0118]
另外,采用本发明的倒装片安装体200后,能够利用板状体205的凸起部202规定高度,所以半导体芯片206和电路基板201的间隔一定,能够形成均匀的倒装片安装体200。因此,如果预先设定半导体芯片206和电路基板201的间隔,成为最佳的距离地决定凸起部202的长度,就能够利用一定量的焊料,连接连接端子204和电极端子207。其结果,能够实现稳定而牢固的接合状态,同时还能够抑制电路基板的翘曲等,实现可靠性优异的倒装片安装体200。In addition, after adopting the flip-
[0119][0119]
此外,在本发明的第1实施方式中,使用具有4个凸起部的板状体进行了讲述,但是并不局限于此。例如在凸起部的形状能够任意设计的同时,只要至少形成一个开口部即可。另外,只在板状体的角部附近设置时,凸起部至少有3个就行,这样能够稳定地保持板状体。进而,在板状体相对的侧面设置凸起部时,如果能够在静止状态下稳定地保持位置,毫无疑问只有两个凸起部就行。In addition, in the first embodiment of the present invention, the description was given using the plate-shaped body having four protrusions, but the present invention is not limited thereto. For example, while the shape of the protrusion can be arbitrarily designed, it is only necessary to form at least one opening. In addition, when it is provided only near the corners of the plate-shaped body, at least three protrusions are sufficient, so that the plate-shaped body can be held stably. Furthermore, when the protrusions are provided on the opposite side surfaces of the plate-shaped body, if the position can be stably maintained in a stationary state, there is no doubt that only two protrusions will suffice.
[0120][0120]
另外,采用本发明的倒装片安装体后,能够利用板状体保护内部的半导体芯片。进而,因为不会在搬运等时受到摩擦、冲击等,所以能够大幅度提高可靠性。例如即使是30μm左右的厚度的半导体芯片,如果使用100μm左右的厚度的板状体,在操作上就可以获得足够的强度。In addition, according to the flip-chip package of the present invention, the semiconductor chip inside can be protected by the plate-shaped body. Furthermore, since it is not subjected to friction, impact, etc. during transportation or the like, reliability can be greatly improved. For example, even for a semiconductor chip with a thickness of about 30 μm, if a plate-shaped body with a thickness of about 100 μm is used, sufficient strength can be obtained in terms of handling.
[0121][0121]
下面,参照图9和图10,讲述本发明的第1实施方式涉及的倒装片安装体及倒装片安装方法。Next, referring to FIGS. 9 and 10 , the flip chip mounted body and the flip chip mounting method according to the first embodiment of the present invention will be described.
[0122][0122]
图9是讲述本发明的第1实施方式中的倒装片安装体及倒装片安装方法的简要工序剖面图。另外,图10(a)是从斜下方观察图9(a)的板状体的立体图,图10(b)是从斜下方观察安装了图9(b)的半导体芯片的板状体的立体图。Fig. 9 is a schematic cross-sectional view illustrating the steps of the flip chip mounting body and the flip chip mounting method in the first embodiment of the present invention. In addition, FIG. 10 (a) is a perspective view of the plate-shaped body of FIG. 9 (a) viewed obliquely from below, and FIG. 10 (b) is a perspective view of the plate-shaped body mounted with the semiconductor chip of FIG. 9 (b) obliquely observed from below .
[0123][0123]
首先,如图9(a)所示,板状体301被真空吸引装置303吸引搬运。而且,如图10(a)所示,板状体301在其角部附近,具备4个凸起部302。First, as shown in FIG. 9( a ), the plate-shaped
[0124][0124]
接着,如图9(b)所示,在板状体301的内侧,半导体芯片304被粘接或吸引固定在规定的位置。在这里,如图10(b)所示,半导体芯片304的下面,设置着多个电极端子305。而且,在半导体芯片304的电极端子305的面上,粘接以薄板状的焊料粉和对流添加剂及树脂为主要成分的树脂组成物306。Next, as shown in FIG. 9( b ), the
[0125][0125]
再接着,如图9(c)所示,使用搬运装置(未图示),使其移动到电路基板307规定位置。然后,例如使用图象处理装置,对电路基板307的连接端子308和半导体芯片304的电极端子305进行对位,使电路基板307和板状体301介有凸起部302地相接。这样,半导体芯片304的电极端子305和电路基板307的连接端子308,就在板状体301的凸起部302的作用下,以规定的间隔相对。在这里,所谓“规定的间隔”,是半导体芯片304的电极端子305和电路基板307的连接端子308至少不接触的程度,是能够浸入下文讲述的熔化的焊料粉的程度。例如考虑半导体芯片304的厚度等,调整凸起部302的高度,以便使半导体芯片304的电极端子305和电路基板307的连接端子308的距离成为10μm~50μm左右。此外,在电路基板307中,可以按照需要,设置和多个连接端子308不同的接合电极310,以便接合旨在形成以下讲述的伪突起的电极309及板状体301的凸起部302。Next, as shown in FIG. 9( c ), it is moved to a predetermined position on the
[0126][0126]
另外,利用图象处理装置进行的对位,例如可以通过识别接合配置在电路基板307上的板状体301和电路基板307的接合电极310来进行。此外,毫无疑问,也可以在电路基板307上粘接树脂组成物306。In addition, the alignment by the image processing device can be performed by, for example, recognizing the bonding electrodes 310 for bonding the plate-
[0127][0127]
接着,如图9(d)所示,在使用真空吸引装置303使搭载半导体芯片304的板状体301和电路基板307相接的状态下,例如利用红外线加热器等加热装置311,以150℃~250℃左右的温度,从外部加热到使树脂组成物306中的焊料粉熔化的温度。Next, as shown in FIG. 9( d), in the state where the plate-shaped
[0128][0128]
经过该加热后,树脂组成物306中的对流添加剂(未图示)沸腾或蒸发后汽化的同时,焊料粉(未图示)也成为熔化的焊料粉。然后,在气体312通过板状体301的凸起部302之间向外部排出的过程中,利用对流使树脂组成物306中的熔化的焊料粉移动。After this heating, the convective additive (not shown) in the
[0129][0129]
进而,被移动的熔化的焊料粉,在相对配置的湿润性良好的半导体芯片304的电极端子305和电路基板307的连接端子308之间,自我集合、成长。Furthermore, the moved melted solder powder self-assembles and grows between the
[0130][0130]
这样,如图9(e)所示,在形成将电极端子305和连接端子308电连接的焊料层313的同时,还使树脂组成物306中的树脂硬化后,取出真空吸引装置303,就制作出倒装片安装体200。In this way, as shown in FIG. 9( e), while forming the
[0131][0131]
另外,在形成伪突起的电极310上,熔化的焊料粉也自我集合、成长,形成伪突起314。形成该伪突起314后,没有用于形成焊料层313的熔化的焊料粉,就被形成伪突起的电极310上捕捉,从而能够防止向外部流出。In addition, on the electrode 310 on which the dummy protrusion is formed, the melted solder powder self-assembles and grows to form the
[0132][0132]
此外,形成伪突起的电极310,焊料粉不飞散时,以及即使飞散也不会带来问题时,就未必需要设置。In addition, the electrode 310 which forms the dummy protrusion does not necessarily need to be provided if the solder powder does not scatter or does not cause a problem even if it does scatter.
[0133][0133]
另外,在第1实施方式中,讲述了在用真空吸引装置303保持电路基板307和板状体301的状态下,形成焊料层313的例子,但是并不局限于此。例如:可以预先通过压接及超声波接合,将板状体301的凸起部302固定到电路基板307上后,实施加热工序以后的处理。例如可以用回流焊装置等自动地制造。In addition, in the first embodiment, an example was described in which the
[0134][0134]
另外,在第1实施方式中,将薄板状的树脂组成物粘接到半导体芯片或电路基板上之后加热,但是并不局限于此。例如:可以将板状体301的凸起部302粘接到电路基板307上后,以保持一定间隔的状态,向半导体芯片304及电路基板307之间注入膏状的树脂组成物后加热。In addition, in the first embodiment, the thin plate-shaped resin composition is bonded to the semiconductor chip or the circuit board and then heated, but the present invention is not limited thereto. For example, after bonding the protruding
[0135][0135]
这样,由于制作多个电路基板和板状体被固定的倒装片安装体的中间体,能够用加热工序统一处理,所以能够进一步提高生产效率。In this way, since the intermediate body of the flip-chip package in which a plurality of circuit boards and plate-like objects are fixed can be produced and processed in one heating step, the production efficiency can be further improved.
[0136][0136]
另外,还可以采用在具有金属或至少其前端被金属涂敷的凸起部302的板状体301的凸起部302及电路基板307的电极310上,预先形成焊料膜,在加热处理完毕的时刻,利用焊料将电路基板307和板状体301结合固定的结构。进而,用比树脂组成物306中的焊料粉的熔点高、例如具有300℃的熔点的材料,形成焊料膜,再例如用激光等使焊料膜局部熔化后,用焊料接合电路基板307和凸起部302,进行以后的工序。这时,可以在取出真空吸引装置303的状态下,进行以后的工序。但是,在加热树脂组成物306的工序中,需要例如以焊料膜的熔点(300℃)以下的温度,进行以后的加热处理,以免凸起部302和电路基板307的电极310脱落。In addition, it is also possible to form a solder film in advance on the
[0137][0137]
此外,焊料膜的熔点和树脂组成物306中的焊料粉的熔点相同时,加热完毕后,板状体301和电路基板307就被接合。这样,能够不增加工序的数量,切实地固定电路基板和板状体。In addition, when the melting point of the solder film is the same as the melting point of the solder powder in the
[0138][0138]
另外,在第1实施方式中,为使讲述浅显易懂,以在半导体芯片和板状体的凸起部之间有间隙的例子,进行了讲述。但是也可以采用在凸起部内全部设置半导体芯片的结构。这样,能够进一步实现小型化。In addition, in the first embodiment, an example in which there is a gap between the semiconductor chip and the projecting portion of the plate-shaped body was described for clarity. However, it is also possible to employ a structure in which all semiconductor chips are provided in the protrusions. In this way, further miniaturization can be achieved.
[0139][0139]
另外,在第1实施方式中,以薄板状的树脂为例,讲述了树脂组成物306,但是并不局限于此。例如:毫无疑问,也可以涂敷膏状及果冻状的树脂。In addition, in the first embodiment, the
[0140][0140]
综上所述,采用本发明的第1实施方式后,能够用非常简便的而且切实的方法,实现半导体芯片的倒装片安装。As described above, according to the first embodiment of the present invention, flip-chip mounting of semiconductor chips can be realized by a very simple and reliable method.
[0141][0141]
另外,由于利用板状体,在保护半导体芯片的同时,还能够防止搬运时的冲击等引起的连接不良,所以能够实现可靠性及生产性均优异的倒装片安装体。In addition, since the semiconductor chip is protected by the plate-shaped body, it is also possible to prevent connection failures caused by shocks during transportation, etc., so that a flip-chip package excellent in reliability and productivity can be realized.
[0142][0142]
(第2实施方式)(second embodiment)
图11(a)是表示本发明的第2实施方式中的倒装片安装体的立体图,图11(b)是图11(a)的A~A线剖面图。FIG. 11( a ) is a perspective view showing a flip-chip mounted body in a second embodiment of the present invention, and FIG. 11( b ) is a cross-sectional view taken along line A to A of FIG. 11( a ).
[0143][0143]
在图11中,本发明的第2实施方式中的倒装片安装体400,采用通过焊料层405,将在电路基板401上形成的多个连接端子402和相对配置的半导体芯片404的多个电极端子406电连接的结构。而且,在和半导体芯片404的电极端子406的相反侧粘接的箱状体403,覆盖半导体芯片404地构成。进而,箱状体403,在周边具有凸缘409的同时,还具有可以内外通气的多个孔408,通过凸缘409做媒介,例如利用树脂粘接剂等,与电路基板401接合。此外,以上讲述了利用树脂粘接剂进行的接合,但是也可以使用压接、焊及超声波接合等各种方法,将箱状体403安装到电路基板401上。另外,箱状体403,还可以使用树脂或金属及向树脂上涂覆了金属的材料。而且,为了对半导体芯片404进行静电保护,箱状体403还可以使用例如混合了碳等的导电性树脂。进而毫无疑问,为了遮蔽电磁波,箱状体403还可以使用例如混合了镍的导电性树脂。In FIG. 11 , a flip-
[0144][0144]
另外,电路基板401和箱状体403,在将连接端子402和电极端子406电连接的焊料层405及覆盖其周围的树脂407的作用下,至少将半导体芯片404和电路基板401固定在一起。在这里,为了固定箱状体403而使用的树脂407,既可以是和树脂组成物中的树脂相同的材料,也可以使用不同的材料。这时,形成焊料层405后,暂时除去树脂组成物树脂,然后再度从箱状体403的孔408注入充填别的树脂,从而能够实现。In addition,
[0145][0145]
此外,在本发明的第2实施方式中,在电路基板401的接合半导体芯片404的部分的周边,没有设置第1实施方式所示的那种防止焊料粉飞散的电极。其理由是因为凸缘409妨碍焊料粉的流出,能够防止它们飞散到外部的缘故。毫无疑问,没有凸缘409的箱状体及孔较大的箱状体时,可以和第1实施方式同样,设置防止焊料粉飞散的电极,形成伪突起。In addition, in the second embodiment of the present invention, electrodes for preventing scattering of solder powder as described in the first embodiment are not provided around the portion of the
[0146][0146]
采用发明的第2实施方式后,可以用简单的结构,杜绝焊料粉流出及飞散到外部所引起的短路等,可以获得可靠性高的倒装片安装体。According to the second embodiment of the invention, with a simple structure, it is possible to prevent a short circuit caused by solder powder flowing out and scattering to the outside, and a highly reliable flip-chip package can be obtained.
[0147][0147]
另外,因为能够形成用箱状体完全包围半导体芯片的形状,所以在对变形而言的机械性的强度优异的同时,再用导电性材料等构成后,能够减少电磁波等的辐射。In addition, since the semiconductor chip can be completely surrounded by the box-shaped body, it has excellent mechanical strength against deformation, and can reduce radiation of electromagnetic waves and the like after being constructed with conductive materials.
[0148][0148]
另外,由于能够利用箱状体403的侧面的高度,将半导体芯片404和电路基板401的间隔保持成一定,所以能够确保安装半导体芯片404时的焊料层405的高度及大小等的均匀性。因此,预先设定半导体芯片404和电路基板401的间隔,决定箱状体403的侧面的高度,以便成为最佳的距离,就能够利用一定量的焊料连接连接端子402和电极端子406,从而能够实现具有非常稳定的牢靠的接合状态的可靠性优异的倒装片安装体400。In addition, since the height of the side surfaces of the box-shaped
[0149][0149]
此外,在本发明的第2实施方式中,列举了箱状体403的孔408比较大、配置数也比较少的例子。但是毫无疑问,孔408的数量、大小是任意的,可以考虑各种变形例。In addition, in the second embodiment of the present invention, an example was given in which the
[0150][0150]
另外,采用本发明的倒装片安装体后,能够利用箱状体保护内部的半导体芯片。进而,因为在搬运等时半导体芯片不会受到摩擦、冲击等。使用能够大幅度提高可靠性。In addition, according to the flip-chip package of the present invention, the semiconductor chip inside can be protected by the box-shaped body. Furthermore, it is because the semiconductor chip is not subjected to friction, impact, or the like during transportation or the like. Use can greatly improve reliability.
[0151][0151]
下面,参照图12和图13,讲述本发明的第2实施方式涉及的倒装片安装体及倒装片安装方法。Next, referring to FIG. 12 and FIG. 13 , a flip chip mounted body and a flip chip mounting method according to a second embodiment of the present invention will be described.
[0152][0152]
图12是讲述本发明的第2实施方式中的倒装片安装体及倒装片安装方法的简要工序剖面图。另外,图13(a)是从斜下方观察图12(a)的箱状体的立体图,图13(b)是从斜下方观察安装了图3(b)的半导体芯片的箱状体的立体图。Fig. 12 is a schematic process cross-sectional view illustrating a flip-chip mounted body and a flip-chip mounting method in a second embodiment of the present invention. In addition, FIG. 13 (a) is a perspective view of the box-shaped body of FIG. 12 (a) viewed from obliquely below, and FIG. 13 (b) is a perspective view of the box-shaped body of the semiconductor chip of FIG. .
[0153][0153]
首先,如图12(a)所示,利用轧入臂503保持、搬运预先形成的箱状体504。在这里,搬运装置501,其前端具有夹住搬运物的轧入臂503,和开闭轧入臂503而且可以转动的铰链502。而且,如图13(a)所示,箱状体504,在其侧面具备可以通气的多个孔506,在其端面的开口部具备凸缘505。First, as shown in FIG. 12( a ), a preliminarily formed box-shaped
[0154][0154]
接着,如图12(b)所示,在箱状体504的内侧,半导体芯片507被粘接或吸引固定在规定的位置。而且,如图13(b)所示,半导体芯片507的下面,设置着多个电极端子508。Next, as shown in FIG. 12( b ), the
[0155][0155]
再接着,如图12(c)所示,预选向电路基板501之上涂敷以焊料粉和对流添加剂及树脂为主成份的树脂组成物509,使用搬运装置501,将粘接了半导体芯片507的箱状体504移动到规定位置的上部。然后,例如使用图象处理装置等,对电路基板501的连接端子511和半导体芯片507的电极端子508进行对位,使电路基板510和箱状体504的凸缘505相接。这样,半导体芯片507的电极端子508和电路基板510的连接端子511,就在箱状体504的凸缘505和侧面部的高度的作用下,以规定的间隔相对。在这里,所谓“规定的间隔”,是半导体芯片507的电极端子508和电路基板510的连接端子511至少不接触的程度,是能够浸入下文讲述的熔化的焊料粉的程度。Next, as shown in FIG. 12(c), a
[0156][0156]
另外,利用图象处理装置进行的对位,例如可以通过识别在电路基板510上的形成的标记(未图示)和箱状体504的凸缘505来进行。In addition, the alignment by the image processing apparatus can be performed by recognizing, for example, a mark (not shown) formed on the
[0157][0157]
接着,如图12(d)所示,在通过搬运装置501做媒介,使搭载了半导体芯片507的箱状体504和电路基板510相接的状态下,例如利用红外线加热器等加热装置512,以150℃~250℃左右的温度,从外部加热到使树脂组成物306中的焊料粉熔化的温度。Next, as shown in FIG. 12( d), in a state in which the box-shaped
[0158][0158]
经过该加热后,树脂组成物509中的对流添加剂(未图示)沸腾或蒸发后汽化的同时,焊料粉(未图示)也成为熔化的焊料粉。然后,在气体513通过箱状体504的孔408向外部排出的过程中,利用对流使树脂组成物509中的熔化的焊料粉移动。After this heating, the convective additive (not shown) in the
[0159][0159]
进而,被移动的熔化的焊料粉,在相对配置的湿润性良好的半导体芯片507的电极端子508和电路基板510的连接端子511之间,自我集合、成长,从而在电极端子508和连接端子511之间形成电连接。Furthermore, the molten solder powder that has been moved gathers and grows by itself between the
[0160][0160]
这样,如图12(e)所示,在形成将电极端子508和连接端子511电连接的焊料层514的同时,还使树脂组成物509中的树脂硬化后,取出搬运装置501,就制作出倒装片安装体400。In this way, as shown in FIG. 12( e), while forming the
[0161][0161]
这时,树脂组成物509中的树脂软化,在接合半导体芯片507和电路基板510的同时,还流入箱状体504的凸缘505和电路基板510的间隙,接合固定箱状体504和电路基板510。At this time, the resin in the
[0162][0162]
此外,在本发明的第2实施方式中,没有设置防止焊料飞散的电极。但是毫无疑问也可以设置。In addition, in the second embodiment of the present invention, no electrode for preventing solder spatter is provided. But no doubt it can also be set.
[0163][0163]
另外,在本发明的第2实施方式中,讲述了形成凸缘505的箱状体504。但是毫无疑问,该凸缘505也可以没有,进而凸缘505还可以不在箱状体504的外侧,采用向内侧弯曲的形状。In addition, in the second embodiment of the present invention, the box-shaped
[0164][0164]
综上所述,采用本发明的第2实施方式后,能够用非常简便的而且切实的方法,实现半导体芯片的倒装片安装。As described above, according to the second embodiment of the present invention, flip-chip mounting of semiconductor chips can be realized by a very simple and reliable method.
[0165][0165]
另外,由于利用箱状体,在保护半导体芯片的同时,还能够防止搬运时的冲击等引起的连接不良,所以能够实现可靠性及生产性均优异的倒装片安装体。In addition, since the semiconductor chip is protected by the box-shaped body, it is also possible to prevent connection failures caused by impacts during transportation, etc., so that a flip-chip package excellent in reliability and productivity can be realized.
[0166][0166]
另外,在本发明的第2实施方式中,讲述了孔506比较大的情况,但也可以设置许多较小的孔。这时,还能够期待树脂组成物509中的树脂最终堵塞孔506。其结果,由于半导体芯片507完全与外气隔开,所以湿度等不能浸入,提高半导体芯片及焊料层等的连接部的寿命及可靠性。In addition, in the second embodiment of the present invention, the case where the
[0167][0167]
以上,通过各实施方式讲述了半发明,但这些叙述不是限定事项,可以有各种变形。例如作为含有焊料粉和对流添加剂的树脂,以热硬化型树脂为例进行了讲述。但是例如也可以使用在焊料粉的熔化温度以上具有流动性的光硬化型树脂及它们的并用型树脂。As mentioned above, although the semi-invention was described by each embodiment, these descriptions are not limiting matters, Various deformation|transformation is possible. For example, as a resin containing solder powder and a convective additive, a thermosetting resin is described as an example. However, for example, photocurable resins having fluidity at or above the melting temperature of solder powder, and resins for combined use of these resins may also be used.
[0168][0168]
另外,在本发明的各实施方式中,讲述了半导体芯片是一个的情况。但也可以在电路基板同时配置多个,进行各工序的作业。In addition, in each embodiment of the present invention, the case where there is one semiconductor chip has been described. However, it is also possible to arrange a plurality of them on the circuit board at the same time, and to perform the work of each process.
[0169][0169]
另外,在本发明的各实施方式中,用板状体及箱状体弯曲成直角的形状进行了讲述。但并不局限于此。例如也可以是锥形。这样,板状体及箱状体的加工容易,可以降低成本。In addition, in each embodiment of the present invention, description has been made using a shape in which the plate-shaped body and the box-shaped body are bent at right angles. But it is not limited to this. For example, it can also be conical. In this way, the processing of the plate-shaped body and the box-shaped body is easy, and the cost can be reduced.
[0170][0170]
另外,在本发明的各实施方式中,作为树脂组成物中的树脂,还可以使用将环氧树脂、不饱和聚脂树脂、聚丁二烯树脂、聚酰亚胺树脂、聚酰胺树脂、氰酸盐树脂中的某一个作为主剂的树脂。In addition, in each embodiment of the present invention, as the resin in the resin composition, epoxy resin, unsaturated polyester resin, polybutadiene resin, polyimide resin, polyamide resin, cyanide resin, etc. One of the salt resins is used as the main resin.
[0171][0171]
进而,在本发明的各实施方式中,作为对流添加剂,还可以使用分解型的碳酸氢钠、偏硼酸铵(ammonium methaborate)、氢氧化铝、dorsonite、偏硼酸钡(barium methaborate),作为沸腾蒸发型,可以使用丁基卡必醇(butyl carbitol)、助熔剂(flux)、异丁醇(isobutyl alcohol)、二甲苯、异戊基醇(isopentyl alcohol))、乙酸丁酯(butyl acetate)、四氯乙烯、甲基异丁基甲酮(methylisobutylketon)、乙基卡必醇(ethyl carbitol)、丁基卡必醇、苯乙烯等中沸点溶剂或高沸点溶剂。Furthermore, in each embodiment of the present invention, as convective additives, decomposed sodium bicarbonate, ammonium metaborate (ammonium methaborate), aluminum hydroxide, dorsonite, barium metaborate (barium methaborate) can also be used, as boiling evaporation Type, you can use butyl carbitol (butyl carbitol), flux (flux), isobutyl alcohol (isobutyl alcohol), xylene, isopentyl alcohol (isopentyl alcohol), butyl acetate (butyl acetate), four Medium or high boiling point solvents such as vinyl chloride, methylisobutylketon, ethyl carbitol, butyl carbitol, and styrene.
[0172][0172]
采用本发明后,能够在适用于窄间距日新月异的下一代的半导体芯片的倒装片安装的同时,还在要求生产性及可靠性均优异的倒装片安装的领域,大有用处。The present invention is not only suitable for flip-chip mounting of next-generation semiconductor chips with increasingly narrow pitches, but also useful in fields requiring flip-chip mounting with excellent productivity and reliability.
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