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CN100585850C - Image sensing module with crystal grain three-dimensional stacking structure - Google Patents

Image sensing module with crystal grain three-dimensional stacking structure Download PDF

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Publication number
CN100585850C
CN100585850C CN200710112678A CN200710112678A CN100585850C CN 100585850 C CN100585850 C CN 100585850C CN 200710112678 A CN200710112678 A CN 200710112678A CN 200710112678 A CN200710112678 A CN 200710112678A CN 100585850 C CN100585850 C CN 100585850C
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image sensing
die
sensing module
stacked structure
image
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CN101335267A (en
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张恕铭
郭子荧
江家雯
张香鈜
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Industrial Technology Research Institute ITRI
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
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    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/9222—Sequential connecting processes
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    • H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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    • H—ELECTRICITY
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention provides an image sensing module with a crystal grain three-dimensional stacking structure, which utilizes at least one via hole of an image sensing crystal grain and a dielectric layer hole of an insulating layer below the via hole to fill conductive materials so as to ensure that the image sensing crystal grain and an image processing crystal grain embedded in the insulating layer establish vertical electrical conduction, and a solder ball bump is formed on the back of the image sensing module so that the image sensing module can be directly assembled on a circuit board. The image sensing module has a wafer level packaging structure and a crystal grain three-dimensional stacking characteristic, can shorten the electrical connection distance and reduce the whole assembly area and height of the module.

Description

具晶粒三维堆叠结构的影像感测模块 Image sensing module with three-dimensional stacked structure of dies

技术领域 technical field

本发明关于一种影像感测模块的构装结构；特别是有关于一种具晶粒三维堆叠结构的影像感测模块构装结构。The present invention relates to a construction structure of an image sensing module; in particular, it relates to a construction structure of an image sensing module with a three-dimensional stacked structure of crystal grains.

背景技术 Background technique

影像传感器已经被广泛的应用在照相手机、照相机、医疗诊断与保安监视方面，其中应用在可携式产品与医疗产品时，轻薄短小与减少能量损耗并降低制造成本一直是市场的殷切需求。已知的影像传感器构装结构有以下几种：美国专利第6,646,289号图11A揭露一种影像传感器的晶圆级封装结构，利用一重分布导线层(Redistributed layer)将导线从晶粒边缘重分布到晶背，并用两层玻璃夹住该影像传感器；美国专利第5,051,802号图3揭露一种影像传感器，将影像传感器磨得非常薄，以致于从晶背即可感光；美国专利第7,061,106号图1揭露一种影像感测模块，利用一插入元件(interposer)将一影像传感器与其它晶粒作电性连接，并且将透镜元件连接于该插入元件上方；美国专利第6,429,036号图2揭露一种影像传感器，将保护该影像传感器的上盖基材钻孔形成电性导通孔，以将电路外引，再利用锡球或金属层接合方式将该上盖基材与该影像传感器作电性连接。Image sensors have been widely used in camera phones, cameras, medical diagnosis and security monitoring. Among them, when used in portable products and medical products, the market has always been eager to demand light and small, reduce energy consumption and reduce manufacturing costs. The known image sensor construction structures are as follows: US Patent No. 6,646,289 FIG. 11A discloses a wafer-level packaging structure of an image sensor, using a redistributed layer (Redistributed layer) to redistribute the wires from the edge of the die to the The crystal back, and sandwich the image sensor with two layers of glass; US Patent No. 5,051,802 Figure 3 discloses an image sensor, the image sensor is ground so thin that light can be sensed from the crystal back; US Patent No. 7,061,106 Figure 1 An image sensing module is disclosed, which uses an interposer to electrically connect an image sensor to other dies, and connects a lens element above the interposer; FIG. 2 of US Patent No. 6,429,036 discloses an image Drilling the base material of the upper cover to protect the image sensor to form an electrical via hole to lead the circuit out, and then electrically connecting the base material of the upper cover and the image sensor by solder balls or metal layer bonding .

上述传统影像传感器构装方式是采用半导体二维晶粒构装与线路连接方式，不仅电性连接距离较长，整体组装模块也占据较大面积，已经不符合未来产品朝轻薄短小、省电与高效能发展的需求趋势。因此，若将二维的晶粒导线布局方式改为三维的连接方式，将可以克服传统二维构装方式所遭遇的技术缺陷。The above-mentioned traditional image sensor construction method adopts the semiconductor two-dimensional grain structure and circuit connection method. Not only the electrical connection distance is long, but the overall assembly module also occupies a large area. Demand trends for high performance development. Therefore, if the two-dimensional grain wiring layout is changed to a three-dimensional connection method, the technical defects encountered in the traditional two-dimensional structure method can be overcome.

发明内容 Contents of the invention

本发明所要解决的技术问题是提供一种具晶粒三维堆叠结构的影像感测模块，通过至少一影像感测晶粒内的垂直导线与其下方的至少一影像处理晶粒建立垂直与水平的电性连接，以缩短该影像感测模块的电性连接距离，并于该影像感测模块背面形成锡球凸块，使该影像感测模块直接组装于一电路板上。The technical problem to be solved by the present invention is to provide an image sensing module with a three-dimensional stacked structure of dies, which establishes vertical and horizontal electrical connections through at least one vertical wire in the image sensing die and at least one image processing die below it. The electrical connection distance of the image sensing module is shortened, and solder bumps are formed on the back of the image sensing module, so that the image sensing module is directly assembled on a circuit board.

本发明提供的一种具晶粒三维堆叠结构的影像感测模块，包括至少一个影像感测晶粒、至少一个影像处理晶粒、一透光基材及多数个导电性焊垫。该影像感测晶粒与该影像处理晶粒是上下堆叠接合，其中该影像感测晶粒的一感测面朝上，该影像感测晶粒具有多数条垂直导线，借此以与该影像处理晶粒建立垂直与水平的电性导通。该透光基材形成于该影像感测晶粒的该感测面上方，该些导电性焊垫形成于该影像感测模块背面。The invention provides an image sensing module with a three-dimensional stacked structure of crystal grains, which includes at least one image sensing grain, at least one image processing grain, a light-transmitting base material and a plurality of conductive pads. The image sensing die and the image processing die are stacked and bonded one above the other, wherein a sensing surface of the image sensing die faces upward, and the image sensing die has a plurality of vertical wires, thereby connecting with the image Process the die to establish vertical and horizontal electrical continuity. The light-transmitting substrate is formed above the sensing surface of the image sensing chip, and the conductive pads are formed on the back of the image sensing module.

根据上述方案，本发明的效果是显著的：本发明上述的影像感测模块为具有晶圆级构装架构及晶粒三维堆叠结构，可缩短该影像感测模块的电性连接距离及降低该影像感测模块的整体组装面积及高度，进而有效增加单位面积的元件密度。According to the above solution, the effect of the present invention is remarkable: the above-mentioned image sensing module of the present invention has a wafer-level structure structure and a three-dimensional stacked structure of crystal grains, which can shorten the electrical connection distance of the image sensing module and reduce the The overall assembly area and height of the image sensing module can effectively increase the device density per unit area.

本发明前述的影像感测模块也可结合并堆叠无线射频元件(RFcomponent)、发光二极管元件、天线等主、被动元件，以进一步提供无线传输与自我照明的功能。The aforementioned image sensing module of the present invention can also combine and stack active and passive components such as radio frequency components (RF components), LED components, antennas, etc., to further provide functions of wireless transmission and self-illumination.

附图说明 Description of drawings

图1A至图1I为本发明具晶粒三维堆叠结构的影像感测模块的第一具体实施例的各工艺步骤对应的结构截面示意图。1A to 1I are structural cross-sectional schematic diagrams corresponding to various process steps of the first embodiment of the image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图2为本发明具晶粒三维堆叠结构的影像感测模块的第一具体实施例的结构截面示意图。FIG. 2 is a schematic structural cross-sectional view of a first embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图3为本发明具晶粒三维堆叠结构的影像感测模块的第二具体实施例的结构截面示意图。FIG. 3 is a schematic cross-sectional view of a second embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图4为本发明具晶粒三维堆叠结构的影像感测模块的第三具体实施例的结构截面示意图。FIG. 4 is a schematic cross-sectional view of a third embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图5为本发明具晶粒三维堆叠结构的影像感测模块的第四具体实施例的结构截面示意图。5 is a schematic cross-sectional view of a fourth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图6为本发明具晶粒三维堆叠结构的影像感测模块的第五具体实施例的结构截面示意图。6 is a schematic cross-sectional view of a fifth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图7为本发明具晶粒三维堆叠结构的影像感测模块的第六具体实施例的结构截面示意图。7 is a schematic cross-sectional view of a sixth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图8为本发明具晶粒三维堆叠结构的影像感测模块的第七具体实施例的结构截面示意图。8 is a schematic cross-sectional view of a seventh embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图9为本发明具晶粒三维堆叠结构的影像感测模块的第八具体实施例的结构截面示意图。9 is a schematic cross-sectional view of an eighth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图10为本发明具晶粒三维堆叠结构的影像感测模块的第九具体实施例的结构截面示意图。FIG. 10 is a schematic cross-sectional view of a ninth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图11为本发明具晶粒三维堆叠结构的影像感测模块的第十具体实施例的结构截面示意图。11 is a schematic cross-sectional view of a tenth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

图12为本发明具晶粒三维堆叠结构的影像感测模块的第十一具体实施例的结构截面示意图。12 is a schematic cross-sectional view of an eleventh embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention.

主要元件符号对照说明Description of main component symbols

10----------透光基材        12----影像传感器晶片10----------Light-transmitting substrate 12----Image sensor chip

12a、901----影像感测晶粒    14----影像处理晶粒12a, 901----image sensing die 14----image processing die

16、19------绝缘层材料      18----保护层16, 19------Insulation layer material 18------Protective layer

20、30、40、50、60、70、80、90、100、110、120----具晶粒三维堆叠结构的影像感测模块20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120----image sensing module with three-dimensional stacked structure of crystal grains

101---------黏着层                            121----感光区域101 --------- Sticky layer 121 ----- A sensing area

122---------金属层                            123----金属焊垫122---------Metal layer 123----Metal pad

124---------导通孔                            142----晶粒黏着薄膜124---------via hole 142----die attach film

143---------焊垫                              161、162----介层洞143---------pad

163、164----垂直、水平导电性内连线            165----重分布导线层163, 164----vertical and horizontal conductive interconnection 165----redistribution wire layer

166---------水平电性连接                      182----锡球焊垫开口166---------Horizontal Electrical Connection 182----Solder Ball Pad Opening

183---------导电性焊垫                        184----锡球凸块183---------Conductive pad 184----Solder ball bump

902存储器                                     903----无线电频元件902 memory 903----radio frequency components

904---------被动元件                          905----系统芯片晶粒904---------passive components 905----system chip die

906---------发光二极管元件                    907----导光通道906---------light-emitting diode element 907----light guide channel

908---------透镜元件                          909-----天线结构908---------lens element 909-----antenna structure

具体实施方式 Detailed ways

本发明具晶粒三维堆叠结构的影像感测模块利用三维晶圆级构装的制造方式完成。以下就一实施例举例说明本发明具晶粒三维堆叠结构的影像感测模块的晶圆级构装制造方法。The image sensing module with a three-dimensional stacked structure of crystal grains of the present invention is completed by a manufacturing method of three-dimensional wafer-level assembly. The following is an example to illustrate the wafer-level assembly manufacturing method of the image sensing module with the three-dimensional stacked structure of the crystal grains of the present invention.

图2为本发明具晶粒三维堆叠结构的影像感测模块的第一具体实施例的结构截面示意图。图1A至图1I为图2的具晶粒三维堆叠结构的影像感测模块20的各工艺步骤对应的结构截面示意图。首先，参见图1A，分别提供一透光基材10与一影像传感器晶片12。该透光基材10可以是一玻璃基材或高分子基材。该影像传感器晶片12包含多数个影像感测晶粒12a，例如CMOS影像感测晶粒，每一该影像感测晶粒12a具有一感光区域121及多数个金属层122形成于其上表面，以及多数个金属焊垫123，例如铝垫，分别形成于一该金属层122下方该影像感测晶粒12a中，并与该金属层122电性接触。本发明利用黏着层101将该透光基材10下表面与该影像传感器晶片12上表面接合在一起，该黏着层101可以是无机材料、高分子材料或它们组合成的材料，以形成图1B的结构，该透光基材10用以保护每一该影像感测晶粒12a。接着，仍参见图1B，利用研磨方式(grinding)薄化该影像传感器晶片12的背面。参见图1C，利用晶粒黏着薄膜(die attach film)142将多数个影像处理晶粒14以正面朝上的方式分别堆叠接合于每一该影像感测晶粒12a下表面。每一该影像处理晶粒14的下表面形成有多数个焊垫143。参见图1D，利用激光钻孔或蚀刻方式于该影像传感器晶片12内形成多数个导通孔(Through Silicon Via，TSV)124，每一该导通孔124贯通该影像传感器晶片12直至一该金属层122。参见图1E，将一绝缘层材料16以涂布或压合方式内埋该些影像处理晶粒14，并且该绝缘层材料16填入该影像传感器晶片12的该些导通孔124内。参见图1F，形成多数个介层洞161及162，每一该介层洞161贯通该绝缘层材料16与该影像传感器晶片12的一该导通孔124直至该金属层122。每一该介层洞162穿经该绝缘层材料16直至每一该影像处理晶粒14的一该焊垫143。接着，参见图1G，以溅镀或无电极电镀方式或电镀方式将导电性材料例如金属填入该些介层洞161及162内，以形成垂直导电性内连线163及水平导电性内连线164，并同时于该绝缘层材料16的表面形成重分布导线层(redistributed layer)165，进而建立每一该影像感测晶粒12a与一该影像处理晶粒14的焊垫143的垂直与水平的电性连接。参见图1H，以涂布或压合方式形成一保护层18于该绝缘层材料16下方，并于该保护层18内形成多数个锡球焊垫开182，分别位于一该垂直导电性内连线163或该水平导电性内连线164下方。参见图1I，形成一导电性焊垫183例如金属焊垫于每一该锡球焊垫开182中，接着以植球、印刷或电镀方式形成锡球凸块184于该导电性焊垫183下方。如此一来，即形成本发明晶圆级构装的影像感测模块，再沿着晶片切割线切割晶片，以将每一具晶粒尺寸构装形式的影像感测模块20从该晶片分离出来。每一该影像感测模块20截面结构如图2所示。前述影像感测模块20通过该些锡球凸块184即可直接组装在一印刷电路板(未示出)上。FIG. 2 is a schematic structural cross-sectional view of a first embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. 1A to 1I are structural cross-sectional schematic diagrams corresponding to each process step of the image sensing module 20 with a three-dimensional stacked structure of crystal grains in FIG. 2 . First, referring to FIG. 1A , a transparent substrate 10 and an image sensor chip 12 are respectively provided. The transparent substrate 10 can be a glass substrate or a polymer substrate. The image sensor chip 12 includes a plurality of image sensing dies 12a, such as CMOS image sensing dies, each of the image sensing dies 12a has a photosensitive area 121 and a plurality of metal layers 122 formed on its upper surface, and A plurality of metal pads 123 , such as aluminum pads, are respectively formed in the image sensing die 12 a under the metal layer 122 and are in electrical contact with the metal layer 122 . In the present invention, the lower surface of the light-transmitting substrate 10 and the upper surface of the image sensor chip 12 are bonded together by an adhesive layer 101, and the adhesive layer 101 may be an inorganic material, a polymer material, or a combination thereof, to form FIG. 1B structure, the transparent substrate 10 is used to protect each of the image sensing die 12a. Next, still referring to FIG. 1B , the backside of the image sensor wafer 12 is thinned by grinding. Referring to FIG. 1C , a plurality of image processing dies 14 are stacked and bonded to the lower surface of each image sensing die 12 a in a face-up manner by using a die attach film 142 . A plurality of bonding pads 143 are formed on the lower surface of each image processing die 14 . Referring to FIG. 1D, a plurality of through holes (Through Silicon Via, TSV) 124 are formed in the image sensor chip 12 by laser drilling or etching, and each of the through holes 124 penetrates the image sensor chip 12 until a metal Layer 122. Referring to FIG. 1E , an insulating layer material 16 is coated or pressed to embed the image processing dies 14 , and the insulating layer material 16 is filled into the via holes 124 of the image sensor chip 12 . Referring to FIG. 1F , a plurality of via holes 161 and 162 are formed, and each via hole 161 penetrates the insulating layer material 16 and a via hole 124 of the image sensor chip 12 to the metal layer 122 . Each via hole 162 passes through the insulating layer material 16 to a bonding pad 143 of each image processing die 14 . Next, referring to FIG. 1G, conductive material such as metal is filled into the via holes 161 and 162 by sputtering, electroless plating or electroplating to form vertical conductive interconnects 163 and horizontal conductive interconnects. line 164, and at the same time form a redistributed layer (redistributed layer) 165 on the surface of the insulating layer material 16, and then establish a vertical connection between each of the image sensing die 12a and a bonding pad 143 of the image processing die 14 horizontal electrical connections. Referring to FIG. 1H, a protective layer 18 is formed under the insulating layer material 16 by coating or pressing, and a plurality of solder ball pad openings 182 are formed in the protective layer 18, respectively located at one of the vertical conductive interconnects. line 163 or the horizontal conductive interconnect line 164 below. Referring to FIG. 1I, a conductive pad 183 such as a metal pad is formed in each of the solder pad openings 182, and then a solder bump 184 is formed below the conductive pad 183 by ball planting, printing or electroplating. . In this way, the image sensing module of the wafer-level structure of the present invention is formed, and then the wafer is diced along the wafer dicing line, so that each image sensing module 20 having a grain size structure is separated from the wafer. . The cross-sectional structure of each image sensing module 20 is shown in FIG. 2 . The aforementioned image sensing module 20 can be directly assembled on a printed circuit board (not shown) through the solder bumps 184 .

参见图2所示，本发明前述影像感测模块20具有晶粒三维堆叠结构特征，是利用前述晶粒黏着薄膜142使该影像感测晶粒12a与该影像处理晶粒14上下堆叠接合，而利用该影像感测晶粒12a的该些导通孔与该绝缘层材料16的该些介层洞填入导电性材料形成垂直导电性内连线163及水平导电性内连线164，并同时于该绝缘层材料16表面形成重分布导线层165电性连接该些垂直导电性内连线163及水平导电性内连线164，以建立该影像感测晶粒12a与该影像处理晶粒14的垂直与水平电性连接，进而缩短该影像感测模块20的电性连接距离，以降低能量的耗损。再者，该影像感测模块20的晶粒三维堆叠构装方式可减少整体组装面积及高度，而有效增加单位面积的元件密度，以降低制造成本。Referring to FIG. 2 , the aforementioned image sensing module 20 of the present invention has the feature of a three-dimensional stacked structure of dies. The aforementioned die adhesive film 142 is used to make the image sensing die 12a and the image processing die 14 stacked and bonded up and down, and The via holes of the image sensing die 12a and the via holes of the insulating layer material 16 are filled with conductive material to form vertical conductive interconnects 163 and horizontal conductive interconnects 164, and at the same time A redistribution wiring layer 165 is formed on the surface of the insulating layer material 16 to electrically connect the vertical conductive interconnects 163 and the horizontal conductive interconnects 164 to establish the image sensing die 12a and the image processing die 14 The vertical and horizontal electrical connections of the image sensing module 20 are shortened to reduce energy consumption. Furthermore, the three-dimensional stacking structure of the image sensor module 20 can reduce the overall assembly area and height, and effectively increase the device density per unit area to reduce manufacturing costs.

图3为本发明具晶粒三维堆叠结构的影像感测模块的第二具体实施例的结构截面示意图。在第二具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块30与第一具体实施例的具晶粒三维堆叠结构的影像感测模块20的差别在于先将该影像传感器晶片12背面先形成多数个凹槽，即每一该影像感测晶粒12a的背面先形成一凹槽，再将该影像处理晶粒14以正面朝上的方式放置于该凹槽中，并利用一晶粒黏着薄膜142接合该影像感测晶粒12a与该影像处理晶粒14。图4为本发明具晶粒三维堆叠结构的影像感测模块的第三具体实施例的结构截面示意图。在第三具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块40与第一具体实施例的具晶粒三维堆叠结构的影像感测模块20的差别在于该影像处理晶粒14是以背面与该影像感测晶粒12a接合，并且该影像感测晶粒12a与该影像处理晶粒14之间的水平电性连接通过形成于该影像处理晶粒14与该些锡球凸块184之间的重分布导线层165来建立。图5为本发明具晶粒三维堆叠结构的影像感测模块的第四具体实施例的结构截面示意图。在第四具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块50与第三具体实施例的具晶粒三维堆叠结构的影像感测模块40的差别在于该影像感测晶粒12a与该影像处理晶粒14之间的水平电性连接166是形成于该影像感测晶粒12a与该影像处理晶粒14之间。FIG. 3 is a schematic cross-sectional view of a second embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the second embodiment, the difference between the image sensing module 30 with the three-dimensional stacked structure of dies of the present invention and the image sensing module 20 with the three-dimensional stacked structure of dies in the first embodiment is that the image sensor chip 12, a plurality of grooves are first formed on the back, that is, a groove is first formed on the back of each image sensing chip 12a, and then the image processing chip 14 is placed in the groove with the front facing up, and is used A die attach film 142 bonds the image sensing die 12 a and the image processing die 14 . FIG. 4 is a schematic cross-sectional view of a third embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the third embodiment, the difference between the image sensing module 40 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 20 with a three-dimensional stacked structure of dies in the first embodiment is that the image processing die 14 The back side is bonded to the image sensing die 12a, and the horizontal electrical connection between the image sensing die 12a and the image processing die 14 is formed between the image processing die 14 and the solder bumps. The redistribution wire layer 165 between blocks 184 is established. 5 is a schematic cross-sectional view of a fourth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the fourth specific embodiment, the difference between the image sensing module 50 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 40 with a three-dimensional stacked structure of dies in the third embodiment is that the image sensing dies A horizontal electrical connection 166 between 12 a and the image processing die 14 is formed between the image sensing die 12 a and the image processing die 14 .

图6为本发明具晶粒三维堆叠结构的影像感测模块的第五具体实施例的结构截面示意图。在第五具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块60与第一具体实施例的具晶粒三维堆叠结构的影像感测模块20的差别在于该影像处理晶粒14与该影像感测晶粒12a的晶粒大小一致，而该影像处理晶粒14并未内埋于该绝缘层材料16中，并且多数个导通孔均贯通该影像感测晶粒12a与该影像处理晶粒14，再通过将导电性材料填入该些导通孔与该绝缘层材料16的介层洞形成水平导电性内连线164及垂直导电性内连线163，并同时在该绝缘层材料16表面形成的重分布导线层165，以建立该影像感测晶粒12a与该影像处理晶粒14的垂直与水平电性导通。换句话说，该影像感测晶粒12a与该影像处理晶粒14之间的水平电性连接是形成于该影像处理晶粒14与该些锡球凸块184之间。图7为本发明具晶粒三维堆叠结构的影像感测模块的第六具体实施例的结构截面示意图。在第六具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块70与第五具体实施例的具晶粒三维堆叠结构的影像感测模块60的差别在于该影像处理晶粒14是以背面接合于该影像感测晶粒12a下方，而该影像感测晶粒12a与该影像处理晶粒14之间的电性连接是透过垂直导电性内连线163及重分布导线层165并于该影像处理晶粒14背面侧完成。图8为本发明具晶粒三维堆叠结构的影像感测模块的第七具体实施例的结构截面示意图。在第七具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块80与第六具体实施例的具晶粒三维堆叠结构的影像感测模块70的差别在于该影像感测晶粒12a与该影像处理晶粒14之间夹有一层绝缘层材料19，并且该影像感测晶粒12a与该影像处理晶粒14之间的水平电性连接166是形成于该影像感测晶粒12a与该影像处理晶粒14之间的该绝缘层材料19中。6 is a schematic cross-sectional view of a fifth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the fifth embodiment, the difference between the image sensing module 60 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 20 with a three-dimensional stacked structure of dies in the first embodiment is that the image processing die 14 The grain size of the image sensing die 12a is the same, and the image processing die 14 is not embedded in the insulating layer material 16, and a plurality of via holes pass through the image sensing die 12a and the image sensing die 12a. image processing chip 14, and then form horizontal conductive internal connection 164 and vertical conductive internal connection 163 by filling conductive material into the via holes of these via holes and the insulating layer material 16, and at the same time The redistribution wiring layer 165 formed on the surface of the insulating layer material 16 is used to establish vertical and horizontal electrical conduction between the image sensing die 12 a and the image processing die 14 . In other words, the horizontal electrical connection between the image sensing die 12 a and the image processing die 14 is formed between the image processing die 14 and the solder bumps 184 . 7 is a schematic cross-sectional view of a sixth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the sixth embodiment, the difference between the image sensing module 70 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 60 with a three-dimensional stacked structure of dies in the fifth embodiment is that the image processing die 14 It is back-bonded under the image sensing die 12a, and the electrical connection between the image sensing die 12a and the image processing die 14 is through the vertical conductive interconnection 163 and the redistribution wiring layer 165 and is completed on the back side of the image processing die 14 . 8 is a schematic cross-sectional view of a seventh embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the seventh embodiment, the difference between the image sensing module 80 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 70 with a three-dimensional stacked structure of dies in the sixth embodiment is that the image sensing dies A layer of insulating layer material 19 is sandwiched between 12a and the image processing die 14, and the horizontal electrical connection 166 between the image sensing die 12a and the image processing die 14 is formed on the image sensing die 12 a and the image processing die 14 in the insulating layer material 19 .

再者，本发明前述各种实施例的具晶粒三维堆叠结构的影像感测模块也可结合并堆叠无线射频元件(RF component)、发光二极管元件、天线等主、被动元件(未示出)，以进一步提供无线传输与自我照明的功能。Furthermore, the image sensing module with a three-dimensional stacked structure of crystal grains in various embodiments of the present invention may also be combined and stacked with active and passive components (not shown) such as radio frequency components (RF components), LED components, antennas, etc. , to further provide the functions of wireless transmission and self-illumination.

此外，本发明也可将前述影像感测晶粒12a与影像处理晶粒14整合成一颗系统芯片(System On Chip，SOC)晶粒，而该系统芯片晶粒下层可以是存储器、无线射频元件、整合性被动元件(Integrated Passive Device，IPD)等元件或其组合的另一系统芯片晶粒。In addition, the present invention can also integrate the aforementioned image sensing die 12a and image processing die 14 into a system chip (System On Chip, SOC) die, and the lower layer of the system chip die can be a memory, a radio frequency element, Another system chip die of an integrated passive device (Integrated Passive Device, IPD) or other components or a combination thereof.

图9为本发明具晶粒三维堆叠结构的影像感测模块的第八具体实施例的结构截面示意图。在第八具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块90包含一透光基材10、一具影像处理功能的影像感测晶粒901、一整合有存储器、无线射频元件及整合性被动元件的系统芯片晶粒905、一绝缘层材料16、一保护层18及多数个锡球凸块184。该影像感测晶粒901具有一感光区域121，其通过黏着层101接合于该透光基材10下方。该系统芯片晶粒905内埋于该绝缘层材料16中并通过晶粒黏着薄膜142接合于该影像感测晶粒901的背面。该保护层18形成于该绝缘层材料16下方，而该些锡球凸块184位于该保护层18的焊垫开口(未示出)中，通过该些锡球凸块184使该具晶粒三维堆叠结构的影像感测模块90直接组装于一电路板上，例如印刷电路板上。9 is a schematic cross-sectional view of an eighth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the eighth embodiment, the image sensing module 90 with a three-dimensional stacked structure of dies of the present invention includes a light-transmitting substrate 10, an image sensing die 901 with image processing function, an integrated memory, radio frequency The system chip die 905 of components and integrated passive components, an insulating layer material 16 , a protection layer 18 and a plurality of solder ball bumps 184 . The image sensing die 901 has a photosensitive region 121 bonded under the transparent substrate 10 through the adhesive layer 101 . The SoC die 905 is embedded in the insulating layer material 16 and bonded to the backside of the image sensing die 901 through the die attach film 142 . The passivation layer 18 is formed under the insulating layer material 16, and the solder ball bumps 184 are located in the pad openings (not shown) of the passivation layer 18, and the die is formed through the solder ball bumps 184. The image sensing module 90 of the three-dimensional stack structure is directly assembled on a circuit board, such as a printed circuit board.

图10为本发明具晶粒三维堆叠结构的影像感测模块的第九具体实施例的结构截面示意图。在第九具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块100与第八具体实施例的具晶粒三维堆叠结构的影像感测模块90的差别在于存储器902、无线射频元件903及被动元件904是内埋于该绝缘层材料16中并通过晶粒黏着薄膜142分别接合于该影像感测晶粒901的背面。图11为本发明具晶粒三维堆叠结构的影像感测模块的第十具体实施例的结构截面示意图。在第十具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块110与第八具体实施例的具晶粒三维堆叠结构的影像感测模块90的差别在于将至少一个发光二极管元件906放置于该影像感测晶粒901上方，并于该透光基材10中对应每一该发光二极管元件906上方形成一导光通道907及一透镜元件908形成于该导光通道907顶端。如此一来，该具晶粒三维堆叠结构的影像感测模块110即具有自我照明的功能。图12为本发明具晶粒三维堆叠结构的影像感测模块的第十一具体实施例的结构截面示意图。在第十一具体实施例中，本发明具晶粒三维堆叠结构的影像感测模块120与第八具体实施例的具晶粒三维堆叠结构的影像感测模块90的差别在于该影像感测晶粒901的上表面是利用溅镀或电镀方式形成天线结构909，以使该具晶粒三维堆叠结构的影像感测模块120具有无线传输的功能。FIG. 10 is a schematic cross-sectional view of a ninth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the ninth embodiment, the difference between the image sensing module 100 with a three-dimensional stacked structure of crystal grains of the present invention and the image sensing module 90 with a three-dimensional stacked structure of crystal grains in the eighth embodiment lies in the memory 902, the radio frequency element 903 and the passive element 904 are embedded in the insulating layer material 16 and respectively bonded to the backside of the image sensing die 901 through the die attach film 142 . 11 is a schematic cross-sectional view of a tenth embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the tenth specific embodiment, the difference between the image sensing module 110 with a three-dimensional stacked structure of crystal grains of the present invention and the image sensing module 90 with a three-dimensional stacked structure of crystal grains in the eighth specific embodiment is that at least one light emitting diode element 906 is placed above the image sensing chip 901 , and a light guide channel 907 is formed on the light-transmitting substrate 10 corresponding to each of the LED elements 906 and a lens element 908 is formed on the top of the light guide channel 907 . In this way, the image sensing module 110 with the three-dimensional stacked structure of dies has the function of self-illumination. 12 is a schematic cross-sectional view of an eleventh embodiment of an image sensing module with a three-dimensional stacked structure of crystal grains according to the present invention. In the eleventh embodiment, the difference between the image sensing module 120 with a three-dimensional stacked structure of dies of the present invention and the image sensing module 90 with a three-dimensional stacked structure of dies in the eighth embodiment is that the image sensing die An antenna structure 909 is formed on the upper surface of the chip 901 by sputtering or electroplating, so that the image sensing module 120 with a three-dimensional stacked structure of chips has the function of wireless transmission.

以上所述仅为本发明的具体实施例而已，并非用以限定本发明的权利要求范围；凡其它未脱离本发明所揭示的精神下所完成的等效改变或修饰，均应包含在本发明的权利要求范围内。The above descriptions are only specific embodiments of the present invention, and are not intended to limit the scope of claims of the present invention; all other equivalent changes or modifications that do not deviate from the spirit disclosed in the present invention should be included in the present invention within the scope of the claims.

Claims (20)

1.一种具晶粒三维堆叠结构的影像感测模块，其特征在于，包括：1. An image sensing module with a three-dimensional stacked structure of grains, characterized in that it comprises: 至少一个影像感测晶粒；at least one image sensing die; 至少一个影像处理晶粒，该影像感测晶粒与该影像处理晶粒上下堆叠接合，其中该影像感测晶粒的一感测面朝上，该影像感测晶粒具有多数条垂直导线，借此以与该影像处理晶粒建立垂直与水平的电性导通；At least one image processing die, the image sensing die and the image processing die are stacked up and down, wherein a sensing surface of the image sensing die faces upward, the image sensing die has a plurality of vertical wires, Thereby establishing vertical and horizontal electrical conduction with the image processing die; 一透光基材，形成于该影像感测晶粒的该感测面上方；及a light-transmitting substrate formed above the sensing surface of the image sensing die; and 多数个导电性焊垫，形成于该影像感测模块背面。A plurality of conductive pads are formed on the back of the image sensing module. 2.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含一绝缘层，使该影像处理晶粒内埋于其中。2 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1 , further comprising an insulating layer in which the image processing dies are embedded. 3 . 3.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该影像感测晶粒背面具有一凹槽，以放置该影像处理晶粒。3 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1 , wherein a groove is formed on the back of the image sensing die for placing the image processing die. 4 . 4.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该影像处理晶粒是以正面朝上或正面朝下的方式堆叠于该影像感测晶粒下方。4. The image sensing module with a three-dimensional stacked structure of die as claimed in claim 1, wherein the image processing die is stacked under the image sensing die in a face-up or face-down manner . 5.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该影像感测晶粒与该影像处理晶粒的水平电性连接位于该影像处理晶粒与该些导电性焊垫之间或该影像处理晶粒与该影像感测晶粒之间。5. The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1, wherein the horizontal electrical connection between the image sensing die and the image processing die is located between the image processing die and the image processing die between some conductive pads or between the image processing die and the image sensing die. 6.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，至少一该垂直导线贯通该影像感测晶粒及该影像处理晶粒。6 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1 , wherein at least one vertical wire penetrates through the image sensing die and the image processing die. 7.如权利要求6所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该影像感测晶粒与该影像处理晶粒的水平电性连接是位于该影像处理晶粒与该些导电性焊垫之间或该影像处理晶粒与该影像感测晶粒之间。7. The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 6, wherein the horizontal electrical connection between the image sensing die and the image processing die is located between the image processing die and the image processing die between the conductive pads or between the image processing die and the image sensing die. 8.如权利要求6所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该影像处理晶粒是以正面朝上或正面朝下的方式堆叠于该影像感测晶粒下方。8. The image sensing module with a three-dimensional stacked structure of dies according to claim 6, wherein the image processing dies are stacked under the image sensing dies in a face-up or face-down manner . 9.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一个发光二极管元件位于该影像感测晶粒上方。9 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1 , further comprising at least one light emitting diode element located above the image sensing die. 10.如权利要求9所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一导光通道贯通该透光基材并形成于该发光二极管元件上方及至少一个透镜元件形成于该导光通道上方。10. The image sensing module with a three-dimensional stacked structure of crystal grains according to claim 9, further comprising at least one light guide channel penetrating through the light-transmitting substrate and formed above the light-emitting diode element and at least one lens Elements are formed above the light guiding channel. 11.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一个天线元件形成于该影像感测晶粒上方。11. The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1, further comprising at least one antenna element formed above the image sensing die. 12.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含一黏着层，以接合该影像感测晶粒与该影像处理晶粒。12 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 1 , further comprising an adhesive layer for bonding the image sensing die and the image processing die. 13 . 13.如权利要求1所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含多数个锡球凸块，每一个锡球凸块分别形成于每一个该导电性焊垫下方，而通过该些锡球凸块使该影像感测模块与外界产生电性导通。13. The image sensing module with a three-dimensional stacked structure of crystal grains according to claim 1, further comprising a plurality of solder ball bumps, each solder ball bump is formed on each of the conductive pads The image sensing module is electrically connected to the outside through the solder ball bumps. 14.一种具晶粒三维堆叠结构的影像感测模块，其特征在于，包括：14. An image sensing module with a three-dimensional stacked structure of crystal grains, characterized in that it comprises: 至少一个影像感测晶粒，内含有影像处理功能；At least one image sensing die containing image processing function; 一绝缘层，形成于该影像感测晶粒下方；an insulating layer formed under the image sensing die; 一系统芯片晶粒与该影像感测晶粒上下堆叠接合，其中该影像感测晶粒的一感测面朝上，该系统芯片内埋于该绝缘层中；A system chip die and the image sensing die are stacked up and down, wherein a sensing surface of the image sensing die faces upward, and the system chip is embedded in the insulating layer; 一透光基材，形成于该影像感测晶粒的该感测面上方；及a light-transmitting substrate formed above the sensing surface of the image sensing die; and 多数个导电性焊垫，形成于该影像感测模块背面。A plurality of conductive pads are formed on the back of the image sensing module. 15.如权利要求14所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，该系统芯片晶粒包含存储器、无线射频元件、整合性被动元件、独立的被动元件或它们的组合。15. The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 14, wherein the system-on-chip dies comprise memory, radio frequency components, integrated passive components, independent passive components, or combinations thereof . 16.如权利要求14所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一个发光二极管元件位于该影像感测晶粒上方。16 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 14 , further comprising at least one LED element located above the image sensing die. 17.如权利要求16所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一导光通道贯通该透光基材并形成于该发光二极管元件上方及至少一个透镜元件形成于该导光通道上方。17. The image sensing module with a three-dimensional stacked structure of crystal grains according to claim 16, further comprising at least one light guide channel penetrating through the light-transmitting substrate and formed above the light-emitting diode element and at least one lens Elements are formed above the light guiding channel. 18.如权利要求14所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含至少一个天线元件形成于该影像感测晶粒上方。18. The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 14, further comprising at least one antenna element formed above the image sensing die. 19.如权利要求14所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含一黏着层，以接合该影像感测晶粒与该系统芯片晶粒。19 . The image sensing module with a three-dimensional stacked structure of dies as claimed in claim 14 , further comprising an adhesive layer for bonding the image sensing die and the system chip die. 20.如权利要求14所述的具晶粒三维堆叠结构的影像感测模块，其特征在于，还包含多数个锡球凸块，每一个锡球凸块分别形成于每一个该导电性焊垫下方，而通过该些锡球凸块使该影像感测模块与外界产生电性导通。20. The image sensing module with a three-dimensional stacked structure of crystal grains as claimed in claim 14, further comprising a plurality of solder ball bumps, each of which is formed on each of the conductive pads The image sensing module is electrically connected to the outside through the solder ball bumps.
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