CN100585683C - display device - Google Patents

Abstract

In a display device that uses a current-driven light-emitting element, a conductive-type driving method that considers the TFT that controls the light-emitting operation of the light-emitting element is adopted. (40) When the second TFT (30) for which the drive current is supplied and disconnected is an N-channel type, the potential of the common power supply line (com) relative to the potential of the opposite electrode (op) of the light emitting element (40) is lowered to obtain a high The gate voltage (Vgcur). In this case, the first TFT (20) electrically connected to the gate of the second TFT (30) is a P-channel type, and when the potential of the holding electrode (st) at the time of lighting is used as a reference, the potential The low potential of the sustain electrode (st), the scan signal (Sgate) and the potential of the common power supply line (com) are of the same polarity. Therefore, within the range of the driving voltage of the display device (1), the potential of the image signal (data) for lighting is shifted to a direction in which the resistance becomes smaller when the first TFT (20) and the second TFT (30) are turned on. , it is possible to reduce the driving voltage and improve the display quality.

Description

display device

technical field

The present invention relates to an active matrix type display device which uses a light-emitting element such as an EL (Electroluminescence) element or an LED (Light Emitting Diode) that emits light when a driving current flows through a light-emitting thin film such as an organic semiconductor film, and a device for controlling the light-emitting element. Thin-film transistors (hereinafter referred to as TFTs) that work by emitting light. In more detail, it relates to the driving technology of each element constituted in this type of display device.

Background technique

There is an active matrix type display device using a current control type light emitting element such as an EL element or an LED element. Since the light-emitting elements used in this type of display device all emit light by themselves, unlike liquid crystal display devices, no backlight is required, and in addition, the dependence on viewing angle is also small, which is an advantage of this type of display device.

As an example of such a display device, Fig. 31 is a block diagram of an active matrix display device using a charge injection type organic thin film EL element. In the display device 1A shown in the figure, a plurality of scanning lines gate, a plurality of data lines sig extending in a direction intersecting with the extending direction of the scanning line gate, and a plurality of data lines sig parallel to these data lines sig are formed on a transparent substrate. A plurality of common power supply lines com, pixels 7 corresponding to intersection points of the data line sig and the scan line gate.

On each pixel 7, a first TFT 20 for supplying a scanning signal to a gate (first gate) via a scanning line gate, a storage capacitor cap for storing an image signal supplied from a data line sig via the first TFT 20, The image signal stored by the storage capacitor cap is supplied to the second TFT 30 of the grid (second grid), and when the second TFT 30 is electrically connected to the common power supply line com, the light-emitting element 40 is driven by the common power supply line com. (expressed as resistance).

In the display device 1A having the above configuration, conventionally, taking an N-channel type as an example, from the viewpoint of simplifying the manufacturing process, the first TFT 20 and the second TFT 30 have an equivalent circuit as shown in FIG. 32 , Both are configured as N-channel or P-channel TFTs. Therefore, if the N-channel type is taken as an example, as shown in Fig. 33 (A) and (B), the scanning signal Sgate supplied by the scanning line gate is at a high potential, and once the first TFT 20 is in a conductive state, once the data line sig When the high-potential image signal data is written into the holding capacitor cap, the second TFT 30 remains in the on state. As a result, the driving current in the direction indicated by the arrow E from the pixel electrode 41 to the counter electrode OP continuously flows through the light-emitting element 40 , and the light-emitting element 40 continuously emits light (on state). On the contrary, when the scanning signal Sgate supplied by the scanning line gate is at a high potential and the first TFT 20 is in a conducting state, if the potential of the common power supply line com and the opposite electrode OP are written into the holding capacitor cap by the data line sig If the image signal data whose potential is lower than a certain potential between the potentials, the second TFT 30 is turned off, and the light-emitting element 40 is turned off (light-off state).

In this display device 1A, semiconductor films, insulating films, electrodes, etc. constituting each element are composed of thin films deposited on a substrate, and the thin films are often formed by a low-temperature process in consideration of the heat resistance of the substrate. Therefore, due to the difference in physical properties between the thin film and the substrate body, etc., the film quality will be lowered due to many defects, etc. Therefore, in the case of TFT and the like, problems such as dielectric breakdown and aging are likely to surface.

Even if liquid crystal display devices using liquid crystals as light modulation elements are common in so-called thin films, since the light modulation elements are driven by AC in this case, aging of not only liquid crystals but also TFTs can be suppressed. . On the other hand, in the display device 1A using a current-controlled light-emitting element, TFTs are more prone to aging than liquid crystal display devices in terms of having to be driven by direct current. In order to solve such a problem, even in the display device 1A using a current control type light emitting element, it cannot be said that a product improved in the structure and process technology of the TFT has been sufficiently improved.

In addition, when liquid crystal is used as the light modulation element, the light modulation element is controlled by voltage, and current flows only instantaneously to each element, so that the electric power consumption is low. In contrast, in the display device 1A of the current-controlled light-emitting element, a driving current must be continuously passed through the light-emitting element for continuous lighting, so the power consumption is high, and dielectric breakdown and aging are likely to occur.

In a liquid crystal display device, one TFT for each pixel can be used to AC drive the liquid crystal, and in the display device 1A using a current-controlled light-emitting element, each pixel uses two TFTs 20 and 30 for DC-driving the light-emitting element 40, so the driving voltage increases. The problems of the so-called insulation breakdown and large power consumption are more significant. For example, as shown in FIG. 33(A), since the gate voltage Vg sw of the first TFT 20 is equivalent to the potential corresponding to the high potential of the scanning signal Sgate and the potential of the sustain potential electrode st (the potential of the sustain capacitor Cap) when a pixel is selected, or the potential difference between the gate potential of the second TFT 30), so when the potential of the sustaining potential electrode st is increased and the light-emitting element is lit with high brightness, and the gate voltage Vg cur of the second TFT 30 is increased, because the first TFT The gate voltage becomes lower, so it is necessary to increase the amplitude of the scanning signal Sgate, and as a result, the driving voltage of the display device 1A becomes higher. In addition, in the aforementioned display device 1A, when the light-emitting element 40 is turned off, the potential of the image signal data is lower than a certain potential between the potential of the common power supply line com and the potential of the counter electrode op, and the second TFT is turned off in turn. There is also a problem that the amplitude of the so-called image signal data is large. Therefore, in such a display device 1A, compared with a liquid crystal display device, special consideration must be given to the power consumption and the breakdown voltage of the TFT, but such considerations were insufficient in the conventional display device 1A.

Contents of the invention

Therefore, the object of the present invention is to provide a display device that can use a conductive type drive method that considers the TFT that controls the light-emitting operation of a current-driven light-emitting element, so that both the reduction of power consumption and the insulation due to the low voltage of the drive voltage can be used. Destruction, aging over time, and improved display quality.

In order to solve the above-mentioned problems, the invention related to claim 1 is: on the substrate, there are a plurality of scanning lines, a plurality of data lines intersecting with the scanning lines, a plurality of common power supply lines, and a matrix formed by the aforementioned data lines and the aforementioned scanning lines. Each pixel has: the first TFT that supplies the first grid with the scanning signal of the scanning line, the holding capacitor that stores the image signal supplied by the aforementioned data through the first TFT, and the image signal stored in the holding capacitor. The aforesaid image signal is supplied to the second TFT of the second grid, and the image electrode formed by each of the aforesaid pixels is electrically connected to the aforesaid common power supply line through the aforesaid pixel electrode and the luminescent film in the opposite direction through the aforesaid TFT. A light-emitting element in which a driving current flows between electrodes to make the light-emitting thin film emit light, wherein when the second TFT is an N-channel type, the potential of the common power supply line is set lower than that of the counter electrode.

In the display device of the present invention, since the gate voltage when the second TFT is turned on is equivalent to the difference between the potential of the common power supply line and the potential of the pixel electrode and the gate potential (the potential of the image signal), the gate voltage corresponding to the second TFT The conductivity type of the 2 TFT optimizes the potential of the common power supply line and the potential of the opposite electrode of the light-emitting element relative to each other, and the gate voltage of the second TFT is equivalent to the difference between the potential of the common power supply line and the potential holding electrode. For example, assuming that the second TFT is an N-channel type, the potential of the common power supply line is lowered relative to the potential of the counter electrode of the light emitting element. Since the potential of the common power supply line can be set to a sufficiently low value unlike the pixel electrode potential, a large conduction current can be obtained in the second TFT, and high-brightness display can be performed. In addition, assuming that a high gate voltage is obtained on the second TFT when the pixel is in a lighted state, the potential of the image signal can be lowered, so that the amplitude of the image signal can be reduced, and the driving voltage in the display device can be reduced. Therefore, the advantage is that in addition to reducing power consumption, the worrying withstand voltage problem of each element made of thin film will not be too obvious.

In the present invention, when the above-mentioned second TFT is an N-channel type, the potential of the image signal supplied from the data line corresponding to the pixel in the external lighting state is preferably lower than or equal to the potential of the aforementioned counter electrode. In the case of such a configuration, the amplitude of the image signal and the driving voltage in the display device can be reduced while keeping the second TFT on.

In the present invention, when the 2nd TFT is an N-channel type, the potential of the image signal supplied by the corresponding pixel in the extinguished state is preferably higher than the potential of the aforementioned common power supply line or equipotential (claim 5) . That is: when the pixel is in the off state, a gate voltage (image signal) as large as that which turns off the second TFT is not applied. Combined with the non-linear electrical characteristics of the light-emitting element, the extinguished state can be realized. Therefore, the amplitude of the image signal can be reduced, the driving voltage in the display device can be reduced, and the high frequency of the image signal can be promoted.

In the present invention, contrary to the above configurations, when the aforementioned second TFT is a P-channel type, the relative relationship of each potential is reversed. That is: in the case where the aforementioned second TFT is a P-channel type, it is characterized in that the aforementioned common power supply line is set at a potential higher than that of the aforementioned opposing electrode (claim 2). In this case, it is preferable that the potential of the image signal supplied from the data line corresponding to the pixel in the lighted state is higher than or equal to the potential of the counter electrode (claim 4). Furthermore, it is preferable that the potential of the image signal supplied from the data line is lower than or equal to the potential of the common power supply line corresponding to the pixels in the off state (claim 6).

In the present invention, it is preferable that the first TFT and the second TFT are formed of opposite conduction type TFTs (claim 7). That is: if the first TFT is an N-channel type, then the second TFT is a P-channel type; assuming that the first TFT is a P-channel type, then the second TFT is preferably an N-channel type. More details are described later related to claim 8. If this configuration is adopted, within the range of the driving voltage range of the display device, as long as the potential of the image signal of the illumination is changed in the direction in which the resistance becomes smaller when the first TFT is turned on, This can speed up the display operation. In addition, at this time, since the potential of the image signal for lighting up the pixel is changed in the direction in which the resistance of the second TFT becomes smaller when the second TFT is turned on, it is possible to promote an increase in luminance. Therefore, it is possible to achieve both reduction in driving voltage and improvement in display quality.

In other embodiments of the present invention (claim 8), that is: there are multiple scanning lines on the substrate, multiple data lines intersecting with the scanning lines, multiple common power supply lines, and Matrix-like pixels; each pixel has: the first TFT that supplies the first grid with the scanning signal of the aforementioned scanning line; the holding capacitor that stores the image signal supplied by the aforementioned data line through the first TFT; The aforementioned image signal stored by the capacitor is supplied to the second TFT of the second grid; and a light-emitting element with a light-emitting film, the layer between the pixel electrode formed by each of the aforementioned pixels and the opposite electrode opposite to the pixel electrode When the above-mentioned pixel electrode is electrically connected to the above-mentioned common power supply line through the above-mentioned second TFT, the driving current flowing between the above-mentioned pixel electrode and the above-mentioned opposite electrode makes the light-emitting film emit light, which is characterized by: the first TFT and the second TFT Consists of reverse conduction type TFT.

In the present invention, for example, assuming that the first TFT is N-type, it is desired that the second TFT is P-type, because the first TFT and the second TFT are reverse conduction types, so in order to improve the writing ability of the first TFT, it is necessary to increase the scanning signal. In order to reduce the on-resistance of the second TFT and increase the luminous brightness, the potential of the image signal must be reduced. The optimization of such scanning signal and image signal is for the gate voltage of the first TFT, during the pixel selection period, along with the image signal having a level for lighting the light-emitting element is written into the holding capacitor, and for the conduction to the TFT. Current flow increases the direction of the offset effect. Therefore, the image signal is smoothly written into the storage capacitor through the first TFT from the data line. Here, the gate voltage of the first TFT when selecting a pixel is equivalent to the potential corresponding to the high potential of the scanning signal and the potential of the potential sustaining electrode during lighting (the potential of the image signal for lighting, the potential of the holding capacitor or the potential of the second TFT The difference between the gate potential of the second TFT, the gate voltage of the second TFT is equivalent to the difference between the potential of the sustain potential electrode and the potential of the common power supply line when it is turned on, and when the potential of the potential sustain electrode at this time is used as a reference, it is equivalent to The potential of the high potential of the scanning signal is the same polarity as the potential of the common power supply line. Therefore, if the potential of the potential holding electrode at the time of lighting is changed (which is the image signal potential for lighting), the gate voltage of the first TFT and the gate voltage of the second TFT both move in the same direction to the same extent. Therefore, within the driving voltage range of the display device, if the potential of the image signal for lighting is moved in the direction of decreasing resistance when the first TFT is turned on, the display operation can be accelerated. In addition, since the potential of the image signal for lighting at this time is shifted in a direction in which the resistance of the second TFT is turned on, the brightness can be increased. Therefore, it is possible to achieve both reduction in driving voltage and improvement in display quality.

In the present invention, the polarity of the gate voltage applied on the aforesaid 2nd TFT of the extinguished state pixel is the same as that of the 2nd TFT in the conduction state, and is preferably at a value not exceeding the threshold voltage of the 2nd TFT (right Requirement 9). That is, when the pixel is in the off state, the gate voltage (image signal) to the extent that the second TFT is completely turned off is not applied. Therefore, the amplitude of the image signal can be reduced, and the frequency of the image signal can be increased.

In the case of the above configuration, if the first TFT is an N-channel type and the second TFT is a P-channel type, the signal potential and the potential of the common power supply line are scanned when the first TFT is in an on state. The same, and the gate electrode potential applied to the second TFT by the pixel in the off state is preferably a potential lower than the potential of the scanning signal when the first TFT is in the on state minus the threshold voltage of the first TFT (claim 10). On the contrary, if the aforementioned first TFT is of P-channel type and the aforementioned second TFT is of N-channel type, then the potential of the scanning signal when the aforementioned first TFT is in the on state is the same as the potential of the aforementioned common power supply line, and, in The gate potential applied to the second TFT by the pixel in the extinguished state is preferably a potential higher than the scanning signal potential of the first TFT in the on-state plus the threshold voltage of the first TFT (claim 11) . As mentioned above, if the potential of the scanning signal when the first TFT is on is equal to the potential of the common power supply line, the number of signal input terminals connected to the display device can be reduced because the level number of each driving signal is reduced. Reduce the number of power sources so that the power consumption can be reduced.

In the present invention, the electrode opposite to the electrode electrically connected to the second gate of the second TFT among the two electrodes of the above-mentioned holding capacitor is preferably supplied with a selection pulse delayed from the above-mentioned scanning signal, and the potential direction of the selection pulse is opposite to that of the selection pulse. direction pulse (claim 12). With this configuration, since the video signal can be supplementally written into the storage capacitor, the potential of the video signal applied to the second TFT gate can be shifted toward higher luminance without increasing the amplitude of the video signal.

In other embodiments of the present invention, there are a plurality of scan lines on the substrate, a plurality of data lines intersecting with the scan lines, a plurality of common power supply lines, the aforementioned data lines and the aforementioned scan lines form a matrix of pixels; The pixel has: the first TFT on the first gate is supplied with the scanning signal through the aforementioned scanning line; the holding capacitor for storing the image signal supplied by the aforementioned data line through the first TFT; the aforementioned image signal stored by the holding capacitor Supply the 2nd TFT on the 2nd grid; And the light-emitting element that has light-emitting thin film, between the pixel electrode that is formed by each pixel and the layer of the opposite electrode to the pixel electrode, the pixel electrode passes through the second TFT to the aforementioned When the common power supply line is electrically connected, the light-emitting film is made to emit light by the driving current flowing between the aforementioned pixel electrode and the aforementioned opposite electrode, which is characterized in that: in the two electrodes of the aforementioned holding capacitor, it is connected to the second grid of the aforementioned second TFT The electrode on the opposite side to the electrically connected electrode is supplied with a pulse delayed from the selection pulse of the scanning signal and having a potential in the opposite direction to the selection pulse (claim 13).

If adopt above-mentioned structure, then, can make the electric potential of the image signal that is applied on the grid of the 2nd TFT toward high luminance so can not increase the amplitude of the image signal because can supplement to the write-in of the image signal of holding capacity. to move.

In any of the above inventions, for example, an organic semiconductor film can also be applied as a light-emitting thin film (claim 14).

In any one of the inventions of the present invention, abnormal current flows through the light-emitting element through its operation in the saturation region to the second TFT, and cross-modulation distortion (cross-image) to other pixels can be prevented due to voltage drop. (claim 15).

In addition, it is possible to prevent the influence of the threshold voltage dispersion (deviation) on the display operation by operating in its linear region (claim 16).

Description of drawings

FIG. 1 is a plan view schematically showing a display device to which the present invention is applied.

Fig. 2 is a block diagram showing the basic configuration of a display device to which the present invention is applied.

FIG. 3 is an enlarged plan view showing a pixel of the display device shown in FIG. 2 .

Fig. 4 is a sectional view taken along line A-A' of Fig. 3 .

Fig. 5 is a sectional view taken along line B-B' of Fig. 3 .

6(A) is a cross-sectional view taken along line C-C' in FIG. 3, and FIG. 6(B) is an explanatory view for explaining the effect of the configuration shown in FIG. 6(A).

7(A) and (B) are cross-sectional views of light emitting elements used in the display device shown in FIG. 2, respectively.

8(A) and (B) are cross-sectional views of light emitting elements having a structure different from that of the light emitting element shown in FIG. 7, respectively.

Fig. 9 is a graph showing current-voltage characteristics of the light-emitting element shown in Fig. 7(A) and Fig. 8(B).

FIG. 10 is a graph showing the current-voltage characteristics of the light emitting element shown in FIG. 7(B) and FIG. 8(A).

FIG. 11 is a graph showing current-voltage characteristics of an N-channel TFT.

FIG. 12 is a graph showing current-voltage characteristics of a P-channel TFT.

Fig. 13 is a cross-sectional view showing steps of a method of manufacturing a display device to which the present invention is applied.

14(A) and (B) respectively show a plan view and a cross-sectional view of a pixel having a structure different from that of the pixel of the display device shown in FIGS. 3 to 6 .

FIG. 15 is an equivalent circuit diagram showing the pixel configuration of the display device according to Embodiment 1 of the present invention.

16(A) and (B) respectively show an explanatory diagram of the electrical connection state of each element constituting the pixel shown in FIG. 15 and a waveform diagram showing potential changes of driving signals and the like.

17 is an equivalent circuit diagram showing a pixel configuration of a display device according to a modification of Embodiment 1 of the present invention.

18(A) and (B) respectively show an explanatory diagram of the electrical connection state of each element constituting the pixel shown in FIG. 17 and a waveform diagram showing potential changes of a drive signal or the like.

19 is an equivalent circuit diagram showing a pixel configuration of a display device according to Example 2 of the present invention.

20(A) and (B) respectively show an explanatory diagram of the electrical connection state of each element constituting the pixel shown in FIG. 19 and a waveform diagram showing potential changes of driving signals and the like.

21 is an equivalent circuit diagram showing a pixel configuration of a display device according to Example 2 of the present invention.

22(A) and (B) respectively show an explanatory diagram of the electrical connection state of each element constituting the pixel shown in FIG. 21 and a waveform diagram showing potential changes of a drive signal or the like.

Fig. 23 is an equivalent circuit diagram showing a pixel configuration of a display device according to Embodiment 3 of the present invention.

24(A) and (B) respectively show waveform diagrams of signals driving the pixels shown in FIG. 23 and explanatory diagrams showing correspondence between these signals and equivalent circuits.

FIG. 25 is a signal waveform diagram for driving pixels of a display device according to Embodiment 2 of the present invention.

Fig. 26 is an equivalent circuit diagram showing a pixel configuration of a display device according to Embodiment 3 of the present invention.

27(A) and (B) respectively show waveform diagrams of signals driving the pixels shown in FIG. 26 and explanatory diagrams showing correspondence between these signals and equivalent circuits.

28(A) and (B) respectively show an equivalent circuit diagram of a pixel of a display device according to Embodiment 4 of the present invention and a waveform diagram of signals for driving it.

FIG. 29 is a block diagram of a scanning-side driving circuit for generating the signals shown in FIG. 28. FIG.

FIG. 30 is a waveform diagram of signals output from the scanning side drive circuit shown in FIG. 29 .

Fig. 31 is a block diagram of a display device.

FIG. 32 is an equivalent circuit diagram showing a conventional pixel configuration in the display device shown in FIG. 31 .

33(A) and (B) respectively show waveform diagrams of signals driving the pixels shown in FIG. 32 and explanatory diagrams showing correspondence between these signals and equivalent circuits.

34(A) and (B) respectively show a block diagram of the configuration of capacitors formed by adjacent gate lines and their gate voltage signal waveforms.

1 display device

2 Display

3 Data side drive circuit

4 scan side drive circuit

5 detection circuit

6 Mounting pads

7 pixels

10 transparent substrate

20th 1st TFT

21 Gate of the 1st TFT

30 2nd TFT

31 Gate of the second TFT

40 light emitting elements

41 pixel electrodes

42 hole injection layer

43 Organic semiconductor film

50 Gate insulating film

bank storage layer

cap hold capacitor

cline capacitor line

com public power line

gate scan line

op Opposite electrode

sig data line

st electrode for maintaining potential

Detailed ways

Embodiments of the present invention will be described with reference to the drawings. In addition, before describing each embodiment of the present invention, the common configuration of each embodiment will be described. Here, the same reference numerals are used for the common functional parts of the various embodiments to avoid duplication of description.

(Overall structure of active matrix substrate)

FIG. 1 is a block diagram schematically showing the overall layout of a display device. Fig. 2 is the equivalent circuit diagram of the active matrix formed by it.

As shown in FIG. 1 , in the display device 1 of the present embodiment, a central portion of a transparent substrate 10 as a base is taken as a display portion 2 . In the outer peripheral portion of the transparent substrate 10, a data-side drive circuit 3 and a detection circuit 5 for outputting image signals to the data line sig are respectively formed on the upper and lower sides of the drawing, and a scanning signal is output to the scanning line gate on the left and right sides of the drawing. The scan side drive circuit 4. These drive circuits 3 and 4 are composed of N-type TFTs and P-type TFTs to form complementary TFTs, and these complementary TFTs form shift register circuits, level shifter circuits, analog switch circuits, and the like. On the transparent substrate 10, a terminal group mounting module for inputting image signals, various potentials, and pulse signals is formed on the outer peripheral area from the data-side driving circuit 3.

On the display device 1, similar to the active matrix substrate of the liquid crystal display device, a plurality of scanning lines gate are formed on the transparent substrate 10, and a plurality of data lines sig are extended in the intersecting direction of the extending direction of the scanning line gate, as shown in FIG. 2 As shown, a large number of matrix pixels 7 are formed by the intersection of these data lines sig and scan lines gate.

A first TFT 20 is formed on each of these pixels 7, and a scanning signal is supplied to a gate 21 (first gate) of the first TFT through a scanning line gate. One of the source and drain regions of the TFT 20 is electrically connected to the data line sig, and the other source and drain region is electrically connected to the potential maintaining electrode st, that is, a capacitance line cline is arranged in parallel with the scanning line gate, and the capacitance line cline and the potential maintaining electrode st are arranged in parallel. A sustain capacitor cap is formed between the electrodes st. Therefore, it is selected by the scanning line, and if the first TFT 20 is in the conduction state, the image signal is written into the holding capacitor cap by the data line sig through the first TFT 20.

The potential maintaining electrode st is electrically connected to the gate 31 (second gate) of the second TFT 30, one of the source and drain regions of the second TFT 30 is electrically connected to the common power supply line com, and the other source and drain region is electrically connected to the One electrode of the light emitting element 40 (pixel electrode described later). The common supply line com maintains a constant potential. When the second TFT 30 is in the on state, the current of the common power supply line com flows through the second TFT 30 to the light emitting element 40 to make the light emitting element 40 emit light.

In the display device 1 configured as described above, since the current path through which the driving current flows is composed of the light emitting element 40, the second TFT 30, and the common power supply line com, the second TFT 30 is in an off state, and no current flows. However, in Embodiment 1, if selected by the scanning circuit, when the first TFT 20 is in the on state, the image signal is written into the holding capacitor cap from the data line sig through the first TFT 20. Therefore, even if the first TFT 20 is in the off state, the gate of the second TFT 30 is held at a potential equivalent to the image signal by the holding capacitor cap, so the second TFT 30 is kept in the on state. Therefore, the drive current continues to flow through the light emitting element 40, and the pixel remains lit. This state is maintained until new image data is written into the holding capacitor cap and the second TFT 30 is turned off.

There may be various configurations for the common power supply line com, the pixel 7 and the data line sig in the display device, but in this embodiment, on both sides of the common power supply line com, and between the common power supply line and the common power supply line. For the plurality of pixels 7 of the device, two data lines sig pass through the opposite side of the common power supply line com for these pixels 7 . That is, taking the data line sig, the pixel group connected thereto, one common power supply line com, the pixel group connected thereto, and the data line sig for supplying the pixel signal to the pixel group as a unit, the distance along the scanning line gate The extending direction is repeated, and a drive current is supplied to the pixels 7 in the two columns with one common power supply line. Therefore, in this embodiment, the first TFT 20, the second TFT 30, and the light-emitting element 40 are arranged symmetrically with the common power supply line com as the center line between the two pixels 7 disposed on the common power supply line com, so that these elements and The electrical connection between the wiring layers is easy to realize.

As described above, in this embodiment, since the pixels in two columns are driven by one common power supply line com, the number of common power supply lines com can be reduced by 1 compared with the case where the common power supply line com is formed for every pixel group in one column. /2, and at the same time, there is no need to ensure a gap between the common power supply line com and the data line sig formed between the same layers. Therefore, since the area for wiring on the transparent substrate 10 is narrowed, display performance such as brightness and contrast can be improved. In addition, since pixels in two columns are connected to the above-mentioned one common power supply line com, the data lines sig are arranged in parallel every two, and image signals are supplied to pixel groups in each column.

(composition of pixels)

Each pixel 7 of the display device 1 configured as described above will be described in detail with reference to FIGS. 3 to 6 .

3 is an enlarged plan view showing three pixels among the plurality of pixels 7 formed in the display device 1 of this embodiment, and FIGS. Profile and C-C' line profile.

First, at a position corresponding to the line of FIG. 3A-A', as shown in FIG. 4, an island-shaped silicon film 20 of the first TFT 20 is formed on each pixel 7 of the transparent substrate 10, and a gate insulating film 50 is formed on the surface thereof. A gate 21 (a part of the scanning line gate) is formed on the surface of the gate insulating film 50, and source/drain regions 22 and 23 are formed to match the gate 21 automatically. The first interlayer insulating film 51 is formed on the surface side of the gate insulating film 50, and the data line sig and the potential sustaining electrode st are electrically connected to the source/drain regions 22 and 23 respectively through the contact holes 61 and 62 formed in the interlayer insulating film. touch.

The capacitance line cline is formed between the same layer of the scanning line gate and the gate electrode 21 (between the gate insulating film 50 and the first interlayer insulating film 51), and the extended portion st1 of the potential holding electrode st of the first interlayer insulating film 51 The capacitance line cline overlaps so as to be parallel to the scanning line on each pixel 7 . Therefore, the capacitor line cline and the extended portion st1 of the potential sustaining electrode st constitute a sustain capacitor cap using the first interlayer insulating film 51 as a dielectric film. Further, a second interlayer insulating film 52 is formed on the surface side of the potential sustaining electrode st and the data line sig.

As shown in FIG. 5, the surfaces of the first interlayer insulating film 51 and the second interlayer insulating film 50 formed on the transparent substrate 10 correspond to the data lines sig of each pixel 7 at positions corresponding to the line of FIG. Form two parallel states.

As shown in FIG. 6(A), an island-shaped silicon film 300 for forming the second TFT 30 is formed at a position corresponding to the line of FIG. The substrate 10 straddles the two pixels 7 sandwiched by the common power supply line com. On the surface of the gate insulating film 50, a gate 31 is formed on each pixel 7, and source/drain regions 32, 33 are formed to match the gate 31 so as to sandwich a common power supply line com. A first interlayer insulating film 51 is formed on the surface side of the gate insulating film 50, and the relay electrode 35 is electrically connected to the source/drain region 62 through a contact hole 63 formed in the interlayer insulating film. On the one hand, the common supply line com is electrically connected to the portion constituting the common source/drain region 33 on the two pixels 7 in the center of the silicon film 30 through the contact hole 64 of the first interlayer insulating film 51 . The second interlayer insulating film 52 is formed on the surfaces of these common power supply lines com and the relay electrodes 35 . A pixel electrode 41 made of an ITO film is formed on the surface of the second interlayer insulating film 52 . The pixel electrode 41 is electrically connected to the relay electrode 35 through the contact hole 65 formed on the second interlayer insulating film 52, and is electrically connected to the source/drain region 32 of the second TFT 30 through the relay electrode 35.

(Characteristics of Light Emitting Elements)

Since the present invention is applicable even when any structure is used as the light-emitting element 40 , typical cases thereof will be described below.

First, the pixel electrode 41 made of the aforementioned ITO film constitutes one electrode (positive electrode) of the light emitting element 40 as shown in FIG. 7(A) . On the surface of the pixel electrode 41, a hole injection layer 42 and an organic semiconductor film 43 as a light-emitting thin film are laminated, and then on the surface of the organic semiconductor film 43, an opposing electrode OP made of a metal film such as aluminum or calcium containing lithium is formed. (negative electrode). The counter electrode OP should constitute a common electrode formed on the entire surface or stripe surface of the transparent substrate 10 and be kept at a constant potential. Contrary to this, when the driving current flows in the opposite direction to the light-emitting element 40 shown in FIG. ), a lithium-containing aluminum electrode 45 as thin as light-transmitting, an organic semiconductor layer 43, a hole injection layer 42, an ITO film 46, and an opposite electrode OP (positive electrode) composed of a metal film such as lithium-containing aluminum or calcium The case where the light-emitting element 40 is formed by stacking layers. According to the structure as described above, even if the driving currents of opposite polarities flow through the light-emitting elements 40 shown in FIGS. The layers have the same structure and therefore the same luminescent properties. These light-emitting elements 40 shown in FIG. 7(A) and (B) all have pixel electrodes 41 made of ITO films on the lower layer side (substrate side), and light passes through the pixel electrodes 41 and the transparent substrate 10 as indicated by arrow hv. It is emitted from the inner side of the transparent substrate 10 .

Conversely, when the light emitting element 40 is configured as shown in FIGS. 8(A) and (B), light passes through the counter electrode OP as indicated by arrow hv, and is emitted to the front side of the transparent substrate 10 . Namely: as shown in FIG. On the surface, an opposite electrode OP (positive electrode) made of an ITO film was formed. The opposite electrode OP is also an electrode plate on the entire surface or a strip-shaped common electrode, and is kept at a constant potential. On the contrary, when the driving current flows in the opposite direction to the light-emitting element shown in FIG. A pixel electrode 41 (positive electrode) made of a metal film such as aluminum, an ITO film layer 46, a hole injection layer 42, an organic semiconductor film 43, a lithium-containing aluminum electrode 45 as thin as light transmittance, and a pair made of an ITO film. The case where the electrode OP (negative electrode) constitutes the light emitting element 40 is used.

When forming the light-emitting element 40 having either structure, if the hole injection layer 42 and the organic semiconductor film 43 are formed inside the base layer bank by the inkjet method as described later, even if the upper and lower positions are reversed, the manufacturing process will not change. complex. In addition, even if the lithium-containing aluminum electrode 45 and the ITO film layer 46 are added as thin as the light-transmitting ones, the lithium-containing aluminum electrode 45 becomes a stacked structure in the same region as the pixel electrode 41, which does not hinder the display. The film layer 46 also has a laminated structure in the same region as the counter electrode OP, which does not hinder display. Therefore, the lithium-containing aluminum electrode 45 and the pixel electrode 41 may be separately imaged, but may be collectively patterned using the same mask. Similarly, the ITO film layer 46 and the counter electrode OP may be patterned separately, but they may be collectively patterned using the same mask. Of course, the lithium-containing aluminum electrode 45 and the ITO film layer 46 may be formed only in the inner region of the base layer bank.

The counter electrode OP may be formed of an ITO film, and the pixel electrode 41 may be formed of a metal film. In any case light should exit from the transparent ITO film.

The light-emitting element 40 that constitutes as above is used as the positive electrode and the negative pole to apply voltage to the opposite electrode OP and the pixel electrode 41 respectively, as shown in FIG. 9 ( FIG. characteristics), Fig. 10 (Fig. 7(B), the current-voltage characteristics of the light-emitting element 40 shown in Fig. potential) exceeding the threshold value is turned on, that is, in a low-resistance state, and the current (drive current) flowing through the organic semiconductor film 43 increases sharply. As a result, the light emitting element 40 emits light as an electroluminescence element or an LED element, and the light emitted from the light emitting element 40 is reflected on the counter electrode OP, and is emitted to the pixel electrode 41 and the transparent substrate 10 through the transparent pixel electrode OP. On the contrary, the region where the applied voltage (horizontal axis/potential of the opposite electrode 41) is lower than the threshold value is cut off, that is, in a high resistance state, no current (drive current) flows through the organic semiconductor film 43, and the light emitting element 40 off. Furthermore, in the examples shown in FIG. 9 and FIG. 10, the threshold voltages are around +2V and -2V respectively.

Here, the luminous efficiency tends to be slightly lowered, and the hole injection layer 42 may be omitted. In addition, instead of the hole injection layer 42 , an electron injection layer may be provided at a position opposite to the position where the hole injection layer 42 is formed on the organic semiconductor layer 43 . In addition, there are cases where both the hole injection layer 42 and the electron injection layer are provided.

(Characteristics of TFT)

As the TFT (the 1st TFT20 and the 2nd TFT 30 of Fig. 2) of the luminous TFT (the first TFT20 and the 2nd TFT30 of Fig. 2) that controls the light-emitting element 40 that constitutes as described above, Fig. 11 and Fig. 12 (the drain voltage of two figures all take 4V, 8V as an example and give) The current-voltage characteristics of N-channel and P-channel TFTs are given. As can be seen from these figures, a TFT is turned on and off by a gate voltage applied to the gate. That is, when the gate voltage exceeds the threshold voltage, the TFT is in an on state (low resistance state), and the leakage current increases. On the contrary, when the gate voltage is lower than the threshold voltage, the TFT is in an off state (high resistance state), and the leakage current decreases.

(Manufacturing method of display device)

For the manufacturing method of the display device 1 constituted as described above, since the manufacturing steps up to the manufacturing of the first TFT 20 and the second TFT 30 on the transparent substrate 10 are substantially the same as the steps of manufacturing the active matrix substrate of the liquid crystal display device 1, The outline thereof will be briefly described with reference to FIG. 13 .

FIG. 13 exemplarily shows a cross-sectional view of the process of forming each component of the display device 1 at a temperature below 600°C.

的氧化硅膜构成的衬底保护膜(未图示)。其次设定基板的温度为约350℃，在衬底保护膜的表面依靠等离子CVD法形成由厚度为约300～

的非晶硅膜构成的半导体膜100。其次对由非晶硅膜构成的半导体膜100进行激光退火或固相成长法等结晶化工序，使半导体膜100结晶化为多晶硅。在激光退火法中例如用受激二聚物激光器，其束形状的长尺寸用400mm的直线束，其输出强度例如为200mJ/cm²。使直线束进行扫描，以便对直线束而言在相当于其短尺寸方向激光强度峰值90％的部分在各区域重叠。That is: as shown in FIG. 13(A), the transparent substrate 10 is formed by plasma CVD method with a thickness of about 2000~

A substrate protection film (not shown) made of a silicon oxide film. Secondly, the temperature of the substrate is set to about 350°C, and the surface of the substrate protective film is formed by plasma CVD method with a thickness of about 300~

The semiconductor film 100 is composed of an amorphous silicon film. Next, a crystallization process such as laser annealing or a solid phase growth method is performed on the semiconductor film 100 made of amorphous silicon film to crystallize the semiconductor film 100 into polysilicon. In the laser annealing method, for example, an excited dimer laser is used, the long dimension of the beam shape is a straight beam of 400 mm, and the output intensity thereof is, for example, 200 mJ/cm ² . The rectilinear beams were scanned so that a portion corresponding to 90% of the peak laser intensity in the short dimension direction of the rectilinear beams overlapped in each area.

的氧化硅膜或氮化硅膜构成的栅绝缘膜50。Next, as shown in FIG. 13(B), the semiconductor film is processed to form a pattern. As island-shaped semiconductor films 200 and 300, the surface thereof is treated by plasma CVD using TEOS (tetraethoxysilane) and oxygen as raw material gases. Formed by the thickness of about 600 ~

The gate insulating film 50 is made of a silicon oxide film or a silicon nitride film.

Next, as shown in FIG. 13(C), after forming a conductive film made of metal films such as aluminum, tantalum, molybdenum, titanium, and tungsten by sputtering, it is patterned to form gate electrodes 21 and 31 as a part of the scanning line gate. . Capacitive lines cline are also formed in this step. Furthermore, 310 in the figure is an extended portion of the gate 31 .

Impurities such as high-concentration phosphorus ions or boron ions are implanted in this state, and source-drain regions 22, 23, 32, 33 are formed on the silicon films 200, 300 to automatically match the gate electrodes 21, 31. The portion not doped with impurities constitutes channel regions 27 and 37 . In this embodiment, as will be described later, TFTs of different conductivity types may be fabricated on the same substrate. region, while impurity doping is performed.

Next, as shown in FIG. 13(D), contact holes 61, 62, 63, 64, and 69 are formed after the first interlayer insulating film 51 is formed, and the data line sig, the capacitance line cline, and the extended portion of the gate electrode 31 are formed. 310 has the potential of the overlapping extended portion st1 to maintain the electrode st, the common power supply line com and the relay electrode 35 . As a result, the potential maintaining electrode st is electrically connected to the gate electrode 31 through the contact hole 69 and the extended portion 310 . In this way, the first TFT 20 and the second TFT 30 are formed. In addition, a sustain capacitor cap is formed by the capacitor line cline and the extended portion st1 of the potential sustain electrode st.

Next, as shown in FIG. 13(E), a second interlayer insulating film 52 is formed, and a contact hole 65 is formed in a portion corresponding to the relay electrode 35 on the interlayer insulating film. Next, a conductive film is formed on the entire surface of the second interlayer insulating film 52 to form a pattern, and a pixel electrode 41 electrically contacting the source/drain region 32 of the second TFT 30 is formed through the contact hole 65.

Next, as shown in FIG. 13(F), after forming a black resist layer on the surface side of the second interlayer insulating film 52, the resist layer is left so as to surround the organic semiconductor film 43 where the light-emitting element 40 is to be formed, and the holes. The region of the implant layer 42 forms the memory layer bank. Here, regardless of whether each pixel is independently formed into a box shape or formed into a stripe shape along the data line sig, the organic semiconductor film 43 can only form the storage layer bank according to its corresponding shape, and can be applied. The manufacturing method of this embodiment.

Next, the liquid material (precursor) for constituting the organic semiconductor film 43 is ejected from the inkjet head IJ to form the organic semiconductor film 43 in the inner area of the bank layer. Similarly, the liquid material (precursor) for constituting the hole injection layer 42 is ejected from the inkjet head IJ to the inner region of the memory layer bank, and the hole injection layer 42 is formed in the inner region of the memory layer bank. 7 (A), (B) and FIG. 8 (A), (B) described the structure of the light-emitting element 40, the order of forming the organic semiconductor film 43 and the hole injection layer 42 may be changed according to the structure.

Here, since the memory layer bank is composed of a resist layer, it is hydrophobic. On the contrary, since the organic semiconductor film 43 and the precursor of the hole injection layer 42 use a hydrophilic solvent, the coating area of the organic semiconductor film 43 is precisely defined by the bank layer, and will not be exposed on adjacent pixels. Also, once the bank layer bank is formed to a sufficiently high height, the organic semiconductor film 43 and the hole injection layer 42 can be formed in predetermined regions without using a coating method such as an inkjet method or a spin coating method.

In this embodiment, in order to improve the work efficiency when the organic semiconductor film 43 and the hole injection layer 42 are formed by the inkjet method, as shown in FIG. It is also equal to the center-to-center pitch of the formation region of the aforementioned organic semiconductor film 43 . Therefore, as shown by the arrow Q, the advantage is that the material of the organic semiconductor film 43 can be ejected from the inkjet head IJ at positions at equal intervals along the extending direction of the scanning line gate. In addition, since the inkjet IJ can be moved at equal intervals, the mechanism for moving the inkjet IJ is simple, and it is also easy to improve the injection accuracy of the inkjet head IJ.

After that, as shown in FIG. 13(G), an opposite electrode OP is formed on the surface side of the transparent substrate 10 . Here, the opposite electrode OP is formed over the entire surface or in a stripe shape. When the opposite electrode OP is formed in a stripe shape, a conductive film is formed on the entire surface of the transparent substrate 10 and then a stripe pattern is formed thereon.

TFTs are also formed on the data side driver circuit 3 or the scan side driver circuit 4 shown in FIG. Therefore, the TFTs constituting the driver circuit are also formed in the same layer as the TFTs of the pixels 7 .

In this embodiment, since the memory layer bank is made of black insulating resist, it remains intact and is used as an insulating layer for reducing black-matrix black matrix and parasitic capacitance.

That is, as shown in FIG. 1 , the aforementioned bank layer bank is formed even in the peripheral region of the transparent substrate 10 (the formation region is hatched). Therefore, since the data-side driver circuit 3 and the scan-side driver circuit 4 are covered by the memory layer bank, even if the opposing electrode OP overlaps the formation regions of these driver circuits, there will be no gap between the wiring layer and the opposing electrode OP of the driver circuit. The memory layer bank is also interposed between the electrodes OP. This can prevent parasitic capacitance on the drive circuits 3 and 4, so that the load on the data-side drive circuit 3 can be reduced, and low power consumption and high-speed display operations can be promoted.

In addition, in this embodiment, as shown in FIGS. 3 to 5 , the memory layer bank is formed so as to overlap the data line sig. Therefore, since the bank layer bank intervenes between the data line sig and the counter electrode op, parasitic capacitance on the data line sig can be prevented. As a result, the load on the driving circuit can be reduced, so that low power consumption and high-speed display operation can be promoted.

Next, in this embodiment, as shown in FIG. 3 , FIG. 4 and FIG. 6(A), a memory layer bank may also be formed in the overlapping region of the pixel electrode 41 and the relay electrode 35 . That is: as shown in FIG. 6(B), in the case where the memory layer bank is not formed in the overlapping region of the pixel electrode 51 and the relay electrode 35, for example, a driving current flows between the pixel electrode and the opposite electrode OP, so that The organic semiconductor film 43 emits light, but since the light is sandwiched between the relay electrode 35 and the counter electrode OP and cannot be emitted, it does not contribute to display. This part of the drive current that does not contribute to the display is called an ineffective current from the perspective of display. However, in the present embodiment, the part where such ineffective current should flow forms the bank layer bank, and the drive current is prevented from flowing there, so that useless current can be prevented from flowing in the common power supply line com. Therefore, the public power supply line width can be narrowed accordingly.

In addition, as mentioned above, once the memory bank made of black resist remains, the memory bank functions as a black matrix, and the display quality such as brightness and contrast can be improved. That is, in the display device 1 of this embodiment, since the opposing electrodes OP are formed in stripes over the entire surface side of the transparent substrate 10 or over a wide area, contrast is lowered by reflected light from the opposing electrodes OP. However, in this embodiment, since the memory bank layer bank, which has the function of suppressing parasitic capacitance, is formed of a black resist while defining the formation region of the organic semiconductor film 43, the memory bank layer also functions as a black matrix, covering the memory from the opposite bank. Ineffective reflected light from the electrode OP has the advantage of a so-called high contrast. In addition, because the memory layer bank can be used to self-matchingly define the light emitting area, the adjustment margin of the light emitting area that becomes a problem when the memory layer bank is not used as a black matrix and other metal layers are used as a black matrix is unnecessary. .

(Other structures of active matrix substrates)

The present invention is not limited to the above configuration, and can be applied to various active matrix substrates. For example, as described with reference to FIG. 31 , on the transparent substrate 1, one data line sig, one common power supply line com, and one column of pixels 7 are used as a unit for a display with a configuration overlapping in the direction of extending the scanning line gate. Device 1A is also applicable to the present invention.

In addition, the sustain capacitor cap may be formed between the common power supply line com and the potential sustaining electrode st without using a capacitor line. In this case, as shown in FIG. 14(A) and (B), the extended portion 310 of the gate electrode 31 for electrically connecting the potential maintaining electrode st and the gate electrode 31 is extended to the lower layer of the common power supply line com. On one side, a sustain capacitor cap is formed in which the first interlayer insulating film 51 located between the extended portion 310 and the common power supply line com is used as a dielectric film.

Also, the sustain capacitor cap is not shown in the figure, but it may be formed by a polysilicon film for forming TFTs, and it is not limited to the capacitor line or the common power supply line, and may be formed between the scanning line of the preceding stage.

(Example 1)

FIG. 15 is an equivalent circuit diagram showing the pixel configuration of the display device of this embodiment. 16(A) and (B) are an explanatory diagram showing the electrical connection state of each element formed on each pixel and a waveform diagram showing potential changes such as a driving signal, respectively.

As shown in Fig. 15, Fig. 16 (A), (B), in this embodiment, the first TFT 20 is an N-channel type. Therefore, when the scanning signal Sgate supplied by the scanning line is at a high potential, the first TFT 20 is in a conduction state, and the image signal data is written into the holding capacitor cap from the data line sig through the first TFT 20, and the scanning line gate The second TFT 30 is driven and controlled by the image signal data stored in the sustain capacitor cap when the supplied scanning signal Sgate is at a low potential.

In this embodiment, the second TFT 30 is also of the N-channel type. Therefore, the image signal date on the high potential side is written into the storage capacitor cap of the pixel to be turned on from the data line sig, and the image signal date on the low potential side is written into the storage capacitor cap of the pixel to be turned off.

Here, the gate voltage Vgcur of the second TFT 30 corresponds to the difference between the potential of the common power supply line com and the potential of the image pixel 30, whichever is lower, and the potential of the potential sustaining electrode st. However, in this embodiment, when the potential of the common power supply line com relative to the opposite electrode OP of the light-emitting element 40 is lowered so that the second TFT 30 is in a conductive state, as shown by arrow F, it constitutes a desired current flow from the light-emitting element 40 to one direction. The com side of the public power supply line flows through. Therefore, the gate voltage Vg cur of the second TFT 30 corresponds to the difference between the potential of the common power supply line com and the potential of the potential maintaining electrode st. The potential of the common power supply line com is different from the potential of the pixel electrode 30 corresponding to the potential between the potential of the common power supply line com and the potential of the counter electrode op, and can be set to a sufficiently low value. Therefore, in this embodiment, since the gate voltage Vgcur of the second TFT 30 can take a sufficiently high value, the conduction current of the second TFT 30 is large, so that high-brightness display can be performed. In addition, if the gate voltage Vgcur of the second TFT 30 has a high value during the period in which the pixel is turned on, the potential of the sustaining electrode st at this time, that is, the potential on the high potential side of the image signal date can be lowered accordingly. , so the amplitude of the image signal data and the driving voltage on the display device 1 can be reduced.

In addition, the conduction current of the second TFT 30 is not limited to the gate voltage Vgcur, but also depends on the drain voltage, but this does not change the above conclusion.

In addition, in this embodiment, the conduction current of the second TFT 30 is determined by the potential difference between the potential of the common power supply line com and the potential of the potential maintaining electrode st, and since it is not directly affected by the potential of the counter electrode op, it is lowered. The potential on the high potential side of the image signal data in the pixel-on state becomes lower than the potential of the counter electrode op, and the amplitude of the image signal is reduced, so that the driving voltage in the display device 1 is reduced in potential. In addition, it is also possible to lower the potential on the high potential side of the image signal data in the pixel lighting state to the same potential as the counter electrode op to lower the amplitude of the image signal.

Next, in this embodiment, the potential of the image signal data supplied from the data line sig to the pixels to be turned off is slightly higher than the potential of the common power supply line com. Since the second TFT 30 is an N-channel type, in order to completely turn it off, the gate voltage Vgcur of the second TFT 30 should be negative (lower potential than the common power supply line com). Alternatively, the potential on the low potential side of the image signal data is set high so that the absolute value of the gate voltage Vgcur of the second TFT 30 should be at a potential slightly lower than the absolute value of the threshold voltage of the second TFT 30. At this time, the gate voltage of the second TFT 30 on the pixel 7 in the off state has the same polarity as that of the second TFT 30 in the on state, and is set below the threshold voltage of the second TFT 30. At this time, even if the image signal data is set to have a high potential on the low potential side as described above, since the second TFT 30 is in a high resistance state, the conduction current is extremely small, so the light emitting element 40 is turned off. In addition, the potential of the image signal data supplied from the data line sig to the pixel to be turned off is equal to the potential of the common supply line com, so that the amplitude of the image signal data can be reduced.

If the potential on the low potential side of the image signal data is set to a high potential that does not exceed the threshold of the second TFT 30, the amplitude of the image signal data can be reduced, so the driving voltage of the image signal data can be reduced. However, as described above, since the potential on the high potential side of the image signal data in the pixel lighting state is lowered to a potential lower than the potential of the opposing electrode OP, the potential of the image signal data is restored to the value obtained by the opposing electrode OP and the potential of the opposing electrode OP. Within the range specified by the public power supply line. Therefore, the driving voltage in the display device 1 can be reduced, and the power consumption of the display device 1 can be reduced. In addition, the structure as described above does not cause low image quality, abnormal operation, and lower operating frequency. Its advantage is that the driving voltage of the display device 1 is low, so the worrying withstand voltage problem of the element made of thin film is not solved. will show up.

(Modification of Embodiment 1)

FIG. 17 is an equivalent circuit diagram showing the pixel configuration of the display device 1 of this embodiment. 18(A) and (B) are explanatory diagrams showing the electrical connection state of each element formed on each pixel, and waveform diagrams showing potential changes of driving signals and the like, respectively. In this embodiment, contrary to the first embodiment, both the first TFT 20 and the second TFT 30 are composed of P-channel TFTs. However, in this embodiment, each element is driven and controlled under the same technical idea as that of Embodiment 1, but the polarity of the driving signal described in Embodiment 1 is reversed. Since the other points have the same structure, only the structure Give a brief explanation.

As shown in Fig. 17, Fig. 18 (A), (B), in this embodiment, since the first TFT 20 is a P-channel type, so when the scanning signal Sgate supplied by the scanning line gate is at a low potential, the first TFT The TFT 20 is in a conduction state.

In this embodiment, the second TFT 30 is also of P-channel type. Therefore, from the data line sig, the image signal data on the low potential side is written into the pixel storage capacitor cap to be turned on, and the image signal data on the high potential side is written to the pixel storage capacitor cap to be turned off.

Here, the gate voltage Vgcur of the second TFT 30 corresponds to the difference between the potential of the common power supply line com and the potential of the pixel electrode 30, whichever is higher, and the potential of the potential sustaining electrode st. However, in this embodiment, the potential of the common power supply line com relative to the potential of the opposite electrode op of the light-emitting element 40 is increased, so that when the second TFT 30 is in a conductive state, as shown by arrow E, the current flows from the direction of the common power supply line com to the light-emitting element 40. square flow. Therefore, the gate voltage Vgcur of the second TFT 30 corresponds to the difference between the potential of the common supply line com and the potential of the potential maintaining electrode st. The potential of the common power supply line com is different from the potential of the pixel electrode corresponding to the potential between the potential of the common power supply line com and the potential of the counter electrode OP, and can be set to a sufficiently high value. Therefore, in this embodiment, since the gate voltage Vgcur of the second TFT 30 can take a sufficiently high value, the conduction current of the second TFT 30 is large, so it can be displayed at high brightness. In addition, during the period when the pixel is turned on, if the gate voltage Vgcur of the second TFT 30 can take a high value, the potential of the maintenance electrode st at this time can be increased correspondingly, that is, the low value of the image signal data The potential on the potential side can reduce the amplitude of the image signal data.

In addition, in this embodiment, since the conduction current of the second TFT 30 is not directly affected by the potential of the opposite electrode OP, the potential on the low potential side of the image signal data in which the pixel is in the lighted state has been raised to a higher potential than The potential of the counter electrode OP is slightly higher, and the amplitude of the image signal data is lowered. In addition, it is also possible to lower the amplitude of the image signal data by raising the potential on the low potential side of the image signal data in the on-state of the pixel until it reaches the potential equal to that of the counter electrode OP.

In this embodiment, the potential of the image signal data supplied from the data line sig to the pixels to be turned off is lowered to a potential slightly lower than the potential of the common power supply line com. That is, the potential on the high potential side of the image signal data is set low so that the absolute value of the gate voltage Vgcur of the second TFT 30 becomes a potential slightly lower than the absolute value of the threshold voltage of the TFT. Therefore, the conduction current of the second TFT 30 is extremely small, and the light emitting element 40 goes out. In addition, setting the potential of the image signal data supplied from the data line sig to the pixel to be turned off to be equal to the potential of the common power supply line com can also reduce the amplitude of the image signal data.

As described above, the potential on the low potential side of the image signal data is set high, and the potential on the high potential side of the image signal data in which the pixel is turned on is set low, so the potential of the image signal data returns to Within the level specified by the opposite electrode OP and the common power supply line com. Therefore, the driving voltage in the display device 1 can be reduced, and the power consumption of the display device 1 can be reduced, thereby achieving the same effects as those of the first embodiment.

(Example 2)

FIG. 19 is an equivalent circuit showing the pixel configuration of the display device 1 of this embodiment. 20(A) and (B) respectively show an explanatory diagram of the electrical connection state of each element formed on each pixel and a waveform diagram showing potential changes such as driving signals.

As shown in Fig. 19, Fig. 20 (A), (B), in this embodiment, the first TFT 20 is made of N-channel TFT, and the second TFT is made of P-channel TFT. Since the second TFT 30 is a P-channel type, the image signal data on the low potential side is written into the pixel holding capacitor cap that should be turned on by the data line sig, and the image signal data on the high potential side should be turned off. The state of the pixel maintains the capacitor cap. The gate voltage Vgcur of the second TFT 30 corresponds to the difference between the potential of the common power supply line com and the potential of the pixel electrode, whichever is higher, and the potential of the potential sustaining electrode st.

In this embodiment, the potential of the common power supply line com is set to be higher than the potential of the opposite electrode OP of the light emitting element 40, and the gate voltage of the second TFT is set to be equal to the difference between the potential of the common power supply line com and the potential of the potential maintaining electrode st. Since the potential of the common power supply line com can be set to a sufficiently high value compared with the image electrode 41, the conduction current of the second TFT 30 is large, and a display can be performed at high brightness. In addition, since the potential of the potential sustaining electrode st at this time, that is, the potential on the lower potential side of the image signal data can be raised accordingly, the amplitude of the image signal data can be reduced. In addition, since the conduction current of the second TFT 30 is not directly affected by the potential of the opposite electrode OP, the potential on the low potential side of the image signal data in which the pixel is in the lighted state rises to a potential higher than that of the opposite electrode OP. A high potential or equal thereto reduces the amplitude of the image signal data. Next, in the embodiment, the potential of the image signal data supplied from the data line sig to the pixel to be turned off is slightly lower than or equal to the potential of the common power supply line com, thereby reducing the amplitude of the image signal data. As a result, the potential of the image signal data is brought back within the range specified by the opposite electrode OP and the common power supply line com, thereby reducing the driving voltage of the display device 1, so the power consumption of the display device 1 can be reduced, achieving the embodiment. 1 or its variants have the same effect.

In this embodiment, since the first TFT 20 is of the N-channel type and is of the reverse conduction type with the second TFT 30, the potential of the scanning line gata (scanning signal Sgate) is high when a pixel is selected. The gate voltage Vgsw of the first TFT 20 at this time corresponds to the difference between the high potential of the scanning signal Sgate and the potential of the potential holding electrode st (the potential of the holding capacitor st, the potential of the gate electrode of the second TFT 30). Here, since the second TFT 30 is a P-channel type, the image signal data for lighting the pixel 7 is on the low potential side, and the potential of the potential sustaining electrode st decreases during the selection period of the pixel 7. Therefore, the gate voltage Vgsw of the first TFT 20 shifts in the direction of increasing the conduction current.

On the one hand, the gate voltage Vgcur of the second TFT 30 is equivalent to the potential difference between the common power supply line com and the potential sustaining electrode st. When the selected pixel 7 is in the lit state, the potential of the potential sustaining electrode st decreases during the selection period. Therefore, the gate voltage Vgcur of the second TFT 30 moves in the direction of increasing the conduction current.

As mentioned above, in this embodiment, since the first TFT 20 and the second TFT 30 are of the reverse conductivity type, in order to improve the writing ability of the first TFT 20, the selection pulse height of the scanning signal Sgate is increased, and in order to improve the light-emitting element For a brightness of 40, the on-resistance of the second TFT 30 should be reduced, thereby reducing the image signal data. During the selection period of the pixel 7, as the image signal of the level for lighting the light-emitting element 40 is written into the storage capacitor, the optimization of the selection pulse height of the scanning signal Sgate and the image signal data as described above is effective for the second pixel. It is effective to shift the on-current of the TFT to an increasing direction with respect to the gate voltage of the TFT 20. Therefore, the image signal is written into the holding capacitor cap from the data line sig through the first TFT 20. Here, the gate voltage Vgsw of the first TFT 20 during the selection period of the pixel 7 corresponds to the potential corresponding to the high potential of the scanning signal Sgate and the potential of the potential sustaining electrode st (the potential of the sustaining capacitor cap or the potential of the gate electrode of the second TFT 30 ), the gate voltage Vgcur of the second TFT 30 is equivalent to the difference between the potential of the common power supply line com and the potential of the potential maintaining electrode st, and is equivalent to the high potential of the scanning signal Sgate when the potential of the potential maintaining electrode st is used as a reference. The potential and the potential of the common power supply line com are of the same polarity. Therefore, when the potential of the potential maintaining electrode st is changed, both the gate voltage Vgsw of the first TFT 20 and the gate voltage Vgcur of the second TFT 30 move in the same direction by the same portion. Therefore, within the range of the drive voltage range of the display device 1, if the potential of the image signal data used for lighting is changed in a direction in which the resistance of the first TFT 20 is turned on, the speed of the display operation can be promoted. At the same time, since the potential of the image signal data used for lighting at this time changes in the direction in which the resistance becomes smaller when the second TFT 30 is turned on, the brightness can be increased. Therefore, it is possible to achieve both reduction in driving voltage and improvement in display quality.

(Modification of Embodiment 2)

FIG. 21 is an equivalent circuit showing the pixel configuration of the display device 1 of this embodiment. 22(A) and (B) are an explanatory diagram showing the electrical connection state of each element formed on each pixel and a waveform diagram showing potential changes of a driving signal and the like, respectively. Furthermore, in this embodiment, contrary to Embodiment 2, the first TFT 20 is of a P-channel type, and the second TFT 30 is formed of an N-channel type TFT. However, in this embodiment, each element is driven and controlled under the same technical idea as that of Embodiment 2, and only the polarity of the driving signal described in Embodiment 2 is reversed, so the structure is simply described.

As shown in Fig. 21 and Fig. 22 (A), (B), in this embodiment, as in Embodiment 1, since the second TFT 30 is an N-channel type, the image signal data on the high potential side is written from the data line sig. The image signal data on the low potential side is written into the holding capacitor cap of the pixel that should be in the lighted state. Here, the gate voltage Vgcur of the second TFT corresponds to the difference between the potential of the common power supply line com and the potential of the pixel electrode 30, whichever is lower, and the potential of the potential sustaining electrode st. However, in this embodiment, since the potential of the common power supply line com is lower than the potential of the counter electrode op of the light emitting element, the gate voltage Vgcur of the second TFT 30 is equivalent to the difference between the potential of the common power supply line com and the potential of the potential holding electrode st. . Since the potential of the common power supply line com can be sufficiently low, the conduction current of the second TFT 30 is large, enabling display at high brightness. Alternatively, when the luminance is high, the potential at this time is maintained at the potential of the electrode st, that is, the potential on the high potential side of the image signal data can be increased to reduce the amplitude of the image signal data. In addition, since the conduction current of the second TFT 30 is not directly affected by the potential from the opposite electrode OP, the potential on the high potential side of the image signal data for turning on the pixel is lowered to a level lower than that of the opposite electrode OP. A low potential or an equal potential lowers the amplitude of the image signal data. Furthermore, in this embodiment, the potential of the image signal data supplied from the data line sig to the pixel to be turned off is slightly higher or equal to the potential of the common power supply line com, thereby reducing the amplitude of the image signal data. As a result, the potential of the image signal data is brought back within the range defined by the counter electrode op and the common power supply line com, and the driving voltage in the display device 1 is lowered, so the power consumption of the display device 1 is also reduced. 1 and its variants have the same effect.

In this embodiment, the first TFT 20 is of the P-channel type, and the second TFT 30 is of the reverse conductivity type, so the potential of the scanning line gate (scanning signal Sgate) when selecting a pixel is a low potential. On the contrary, since the second TFT 30 is an N-channel type, the image signal data for lighting the pixel 7 is on the high potential side.

As mentioned above, in this embodiment, since the first TFT 20 and the second TFT 30 are of the reverse conductivity type, in order to improve the writing ability of the first TFT 20, the potential of the selection pulse of the scanning signal Sgate is lowered, and in order to improve the The luminance of 40 is lowered to lower the potential of the image signal data so as to lower the on-resistance of the second TFT 30. During the selection period of the pixel 7, the image signal data at the level for lighting the light-emitting element 40 is written into the holding capacitor cap, and the selection pulse height of the scanning signal Sgate and the optimal selection of the image signal data as described above are obtained. V has an effect on the shift of the gate voltage of the first TFT to the direction of increasing the conduction current of the TFT. Therefore, when the potential of the potential sustaining electrode st is used as a reference, since the potential corresponding to the low potential of the scanning signal Sgate is of the same polarity as the potential of the common power supply line com, if the potential of the potential sustaining electrode st is changed, the corresponding Both the gate voltage Vgsw of the first TFT 20 and the gate voltage Vgcur of the second TFT 30 move in the same direction by the same portion. Therefore, within the driving voltage range of the display device 1, if the potential of the image signal data used for lighting is changed in a direction in which the resistance of the first TFT 20 is turned on, the display operation can be accelerated. At this time, since the potential of the image signal data for lighting is changed in a direction in which the resistance of the second TFT 30 is turned on, the brightness can be increased. Therefore, similarly to the second embodiment, it is possible to achieve both reduction in driving voltage and improvement in display quality.

The optimum driving method in the above-mentioned Embodiment 2 and its modifications will be described with reference to FIG. 25 .

In Example 2, the first TFT is an N-channel type, and the second TFT is a P-channel type. As shown in FIG. 25, during the extinguishing period of the light-emitting element 40, the potential of the image signal data is raised higher than the potential of the common power supply line com, so that the second TFT 30 of the P-channel type is turned off. In this embodiment, as shown in FIG. 25 This shows that even when the light emitting element 40 is turned off, the second TFT 30 is not completely turned off. That is: in this embodiment, since the second TFT 30 is a P-channel type, in order to make it completely cut off, the gate voltage Vgcur should be 0V (same potential as the common power supply line com) or a positive potential (higher than the common power supply line com). However, in this embodiment, the potential when the image signal data is turned off is set low so that the gate voltage Vgcur of the second TFT 30 is at a level slightly higher than the threshold voltage Vthp(cur) of the TFT. potential. Therefore, the gate voltage applied to the second TFT 30 of the pixel 7 in the off state has the same polarity as that of the second TFT 30 in the on state, and has a value exceeding the threshold voltage of the second TFT 30. For example, if the threshold voltage (Vthp(cur)) of the second TFT 30 is -4V, the gate voltage applied to the second TFT 30 in the off state is -3V.

As mentioned above, when the first TFT is N-type and the second TFT is P-type, if the potential on the extinguished side of the image signal data is set lower than conventional ones, the amplitude of the image signal data can be reduced. Low voltage and high frequency of image signal data can be promoted. In addition, even if the potential on the extinguished side of the image signal data is set to be low as described above, since the second TFT 30 of the P-channel type is at a level slightly higher than the threshold voltage Vthp (cur) Potential, so the current flowing when it is turned off is extremely small. Also, if the voltage applied to the light emitting element 40 is low, only a very small driving current flows. Therefore, there is substantially no problem in turning off the light emitting element 40 .

In addition, in this embodiment, if the potential of the image signal data when it is turned off does not need to exceed the potential of the common power supply line com, the potential of the common power supply line com can be set higher. Therefore, in this embodiment, the potential of the common power supply line com is made equal to the potential of the scanning signal Sgate when the first TFT 20 is turned on. Therefore, the signal level for the high potential of the scanning signal Sgate on the scanning side driving circuit can be supplied to the common power supply line com as it is, so in the display device 1 of this embodiment, the number of levels of the driving signal used can be small. , the number of terminals for inputting drive signals to the display device 1 can be reduced. In addition, since the number of power supplies can be reduced, it is possible to promote low power consumption and space saving of the power supply circuit.

In this case, since the first TFT 20 is of the N-channel type and the second TFT 30 is of the P-channel type, the potential of the gate electrode applied to the second TFT 30 of the pixel 7 in the off state becomes proportional to The potential obtained by subtracting the threshold potential Vthn(sw) of the first TFT 20 from the potential of the scanning signal gate when the first TFT 20 is in the on state is lower than the potential. That is, the absolute value of the potential difference Voff between the image signal data (the potential of the potential sustaining electrode st) and the common power supply line com when the pixel 7 is turned off is expressed by the following equation,

Vthn(sw) ＜|Voff|

Setting it higher than the threshold voltage Vthn(sw) of the first TFT 20 can prevent a failure in the writing operation of the first TFT 20 when the pixel 7 is selected.

In the case where the first TFT 20 of the modified example of Embodiment 2 is a P-channel type, and the second TFT 30 is an N-channel type, as described later with reference to FIG. 26 and FIG. 27 (A) and (B), exchange The relative levels of the signals described in this embodiment reverse the polarities of the voltages applied to the first TFT 20 and the second TFT 30. Even in this case, as shown in this embodiment, if the second TFT 30 is not completely turned off when the light-emitting element is turned off, the image signal data can be lowered in voltage and increased in frequency. In addition, by making the potential of the common power supply line com equal to the potential of the scanning signal Sgate when the second TFT 20 is turned on, the number of power sources can be reduced. In this case, the potential of the gate electrode applied to the second TFT 30 of the pixel 7 in the off state is higher than the potential of the scanning signal gate when the first TFT 20 is in the on state plus the threshold voltage of the first TFT 20. Vthn(sw) is set at a higher potential so as not to hinder the writing operation of the first TFT 20 when the pixel 7 is selected.

(Example 3)

In this embodiment, as shown in the equivalent circuit shown in FIG. 23 , as in Embodiment 2, the first TFT 20 in each pixel 7 is an N-channel type, and the second TFT 30 is a P-channel type. An example of Also, in the display device 1 of this embodiment, since the second TFT 30 is a P-channel type, the potential of the common power supply line com is higher than the potential of the counter electrode OP of the light emitting element 40. Therefore, when the second TFT 30 is in the on state, as indicated by the arrow E, a current flows from the common power supply line com to the light emitting element 40 side. Since it is the same as that of Embodiment 2, description of the common points will be omitted, and only the different points will be described. In the second embodiment, a holding capacitor is provided, but in this embodiment, there is a difference in that there is no holding capacitor cap. With such a configuration, it is possible to increase the potential change of the sustain electrode st at the output end.

In the case where the first TFT 20 is a P-channel type and the second TFT 30 is an N-channel type, as will be described later with reference to FIG. 26 and FIG. The relative level of the signal reverses the polarity of the voltage applied to the first TFT 20 and the second TFT 30. Even in this case, in order to improve the writing ability of the first TFT 20, the potential of the selection pulse of the scanning signal is lowered, and the potential of the image signal is increased in order to reduce the on-resistance of the second TFT 30 and increase the luminance.

(Modification of Embodiment 3)

In the above-mentioned embodiment 3, it is illustrated that in any pixel 7, the first TFT 20 is an N-channel type, and the second TFT 30 is a P-channel type situation. As shown in the equivalent circuit shown in FIG. 26, the second TFT 20 Although it is a P-channel type, the second TFT 30 may be configured as an N-channel type. In the example shown in the figure, the potential of the common power supply line com is lower than the potential of the opposite electrode OP of the light-emitting element 40, and when the second TFT 30 is in the conductive state, the current flows from the opposite electrode OP of the light-emitting element 40 as indicated by the arrow F. The side of the set electrode OP flows to the side of the common power supply line com.

When constructing the image 7 as described above, as shown in FIGS. 27(A) and 27(B), the polarities of the driving signals of the waveforms shown in FIG. 24(A) should be reversed.

In Embodiment 3, when the first TFT 20 is an N-channel type and the second TFT 30 is a P-channel type, the potential of the common power supply line com is lower than the potential of the opposite electrode OP of the light-emitting element 40. In the second When the TFT 30 is in the ON state, there may be cases where it is desired that current flow from the opposite electrode OP side of the light emitting element 40 to the common power supply line com side. Even in the case of the above configuration, the effect of making the first TFT 20 and the second TFT 30 of the reverse conductivity type can be obtained. In contrast, when the first TFT 20 is a P-channel type and the second TFT 30 is an N-channel type, the potential of the common power supply line com to the OP potential of the opposite electrode of the light-emitting element 40 is increased, and the second TFT 30 is turned on. state, the effect of making the first TFT 20 and the second TFT 30 of the reverse conductivity type can also be obtained in the configuration where the current flows from the direction of the common power supply line com to the direction of the light emitting element 40.

(Example 4)

In the above-mentioned Embodiments 1, 2, and 3, as described with reference to FIGS. It is also possible to supply one electrode with a pulse delayed by the selection pulse of the scanning signal gate, and a pulse in the opposite direction to the selection pulse potential.

In the example shown here, as shown in FIG. 28(A), among the two electrodes of the sustain capacitor cap, the electrode on the other side of the electrode electrically connected to the gate of the second TFT 30 with the pass potential sustain electrode st is extended by The provided capacitance line cline is configured so as to be parallel to the scanning line gate.

As shown in FIG. 28(B), a potential stg including a pulse signal Pstg is supplied to the capacitance line cline. The pulse signal Psrg is delayed by the selection pulse Pgate of the scanning signal Sgate and has a potential bias opposite to the selection pulse Pgate.

After the selection pulse Pgate is in the non-selection state, the pulse signal Pstg shifts the potential of the image signal data by the capacitive coupling of the sustain capacitor cap. Accordingly, a signal corresponding to the potential of the image signal data plus the potential of the pulse signal Pstg is held in the holding capacitor cap where the pixel 7 is in the off state. Since the on-resistance of the first TFT 20 is large, it is difficult to sufficiently write the signal on the high potential side of the image signal data within a limited time. In this example, it cannot be turned on when writing cannot be sufficiently performed. However, by using this embodiment, it is possible to supplementally write the image signal data into the storage capacitor cap. Therefore, there is no need to expand the maximum range of the potential of the drive signal.

In this way, when the pulse signal Pstg is added to the capacitance line cline, as shown in FIG. The output signal of the shift register 40 is output to the scanning line gate as the scanning signal Sgate through the NAND gate circuit and the inverter, and on the other hand, the output signal of the shift register 40 is delayed while passing through the NAND gate circuit and the two-stage inverter, as shown in Figure 30 As shown, the potential level on the high potential side is shifted from Vdd to Vccy, and output to the capacitance line cline is also acceptable.

In the above-mentioned embodiments and their modifications, it has been described that a cline-type light-emitting element is provided when a holding capacitor is added. However, the present embodiment is not limited to the configuration in which such a capacitor line cline is provided, and it may be configured by a gate line adjacent to one electrode of the storage capacitor. Fig. 34 (A) and (B) respectively show an example of such a configuration, a circuit block diagram and a gate voltage waveform in the scanning direction of the gate line pair. As described above, by using the adjacent gate line as one electrode of the storage capacitor, there is an effect that it is not necessary to specially provide the capacitor line cline for the pixel.

(other embodiments)

The above-mentioned embodiments do not describe the operation of the current-voltage characteristics of the second TFT 30 in each region. If the second TFT operates in its saturation region, the weak constant current characteristics of the TFT can be used to prevent abnormal flow in the light-emitting element 40. current. For example, when a pinhole void occurs in the organic semiconductor film constituting the light emitting element 40 , even in this case, current flow in the defective light emitting element is restricted, and a dead short circuit between electrodes of the light emitting element 40 is not formed.

On the contrary, if the second TFT 30 is operated in its linear region, it is possible to prevent the fluctuation of its threshold voltage from affecting the display operation.

The structure of the TFT is not limited to the unipolar type, but the bipolar type is also possible, and its manufacturing method is not limited to the low-temperature process.

(Availability of Invention)

As described above, in the display device according to claims 1 to 7 of the present invention, since the gate voltage when the second TFT is turned on corresponds to the potential of the common power supply line and the potential of the pixel electrode, whichever is higher, and the potential of the gate electrode (the potential of the image signal), so the relative height of the potential of the common power supply line and the potential of the opposite electrode of the light-emitting element is set according to the conductivity type of the second TFT, and the gate voltage of the second TFT is equivalent to the common The difference between the potential of the supply line and the potential of the potential maintaining electrode. For example, if the second TFT is an N-channel type, lower the potential of the common power supply line to the potential of the counter electrode of the light emitting element. Since the potential of the common power supply line and the potential of the pixel electrodes can be set to a sufficiently low value, a large conduction current can be obtained in the second TFT, and a display can be performed at high brightness. In addition, if a high gate voltage is obtained as the second TFT when the pixel is turned on, the potential of the image signal at this time can be reduced accordingly, so the amplitude of the image signal can be reduced, and the voltage in the display device can be reduced. driving voltage. Therefore, there is an advantage in that power consumption can be reduced, and at the same time, the problem of withstand voltage which is worrying about each element made of a thin film does not appear.

In addition, in the display device described in claims 7 to 11 of the present invention, since the first TFT and the second TFT are of the reverse conductivity type, the pulse of the scanning signal used for pixel selection and the image signal used to light the light-emitting element The potential has the opposite relationship. Therefore, when the potential of the potential sustaining electrode (the potential of the image signal for lighting) at the time of lighting is used as a reference, since the potential corresponding to the high potential of the scanning signal and the potential of the common power supply line are of the same polarity, if When the potential of the potential holding electrode (the potential of the image signal for lighting) is changed during lighting, the gate voltage of the first TFT and the gate voltage of the second TFT are moved in the same direction by the same amount. Therefore, within the range of the drive voltage of the display device, if the potential of the image signal for lighting is moved to the direction where the resistance of the first TFT is turned on, the speed of the display operation can be promoted, and at the same time because the light is turned on The potential of the image signal used should move in the direction in which the resistance becomes smaller when the second TFT is turned on, so that the brightness can be increased. Therefore, it is possible to achieve both reduction in driving voltage and improvement in display quality.

Furthermore, in the display device according to claim 11 or 12 of the present invention, since the pulse is supplied to the electrode on the other side of the electrode electrically connected to the second gate electrode of the second TFT among the two electrodes of the storage capacitor, the pulse Since the selection pulse of the scanning signal is delayed and shifted in the opposite direction to the potential of the selection pulse, writing of the image signal to the storage capacitor can be compensated. Therefore, without increasing the amplitude of the video signal, the potential of the video signal applied to the gate electrode of the second TFT can be shifted toward higher luminance.

Claims (4)

1. An organic EL device, characterized in that, comprising: Substrate; a transistor formed on the substrate; a first interlayer insulating film formed on the transistor and provided with a first contact hole; a relay electrode connected to the transistor through the first contact hole; a second interlayer insulating film formed on the relay electrode and the first interlayer insulating film and provided with a second contact hole; a pixel electrode connected to the relay electrode through the second contact hole; a memory layer formed over the interlayer insulating film; an organic semiconductor film formed in a light emitting region on the pixel electrode; and a counter electrode formed over the organic semiconductor film and the storage layer, The storage layer is disposed to surround the light emitting region and is disposed in a region where the pixel electrode and the relay electrode overlap. 2. The organic EL device according to claim 1, characterized in that: further comprising a power supply line for supplying current to the organic semiconductor film via the transistor, The power supply line is formed under the memory layer and the second interlayer insulating film. 3. The organic EL device according to claim 1 or 2, characterized in that: further comprising a data line supplying a signal for controlling a current flowing through the organic semiconductor film to the transistor, The data line is formed under the memory layer and the second interlayer insulating film. 4. The organic EL device according to claim 1 or 2, characterized in that: The storage layer is composed of an insulating layer.

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