CN100576579C - A kind of method for preparing indium column - Google Patents
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- 229910052738 indium Inorganic materials 0.000 title claims abstract description 85
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 title claims abstract description 85
- 238000000034 method Methods 0.000 title claims abstract description 51
- 229910052751 metal Inorganic materials 0.000 claims abstract description 30
- 239000002184 metal Substances 0.000 claims abstract description 30
- 238000000576 coating method Methods 0.000 claims abstract description 29
- 238000001704 evaporation Methods 0.000 claims abstract description 29
- 230000008020 evaporation Effects 0.000 claims abstract description 29
- 238000005516 engineering process Methods 0.000 claims abstract description 28
- 239000003292 glue Substances 0.000 claims abstract description 26
- 239000011248 coating agent Substances 0.000 claims abstract description 22
- 238000005566 electron beam evaporation Methods 0.000 claims abstract description 20
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 15
- 238000012545 processing Methods 0.000 claims abstract description 10
- 238000011161 development Methods 0.000 claims abstract description 9
- 238000004026 adhesive bonding Methods 0.000 claims abstract description 4
- 238000002360 preparation method Methods 0.000 claims abstract description 4
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 4
- 238000007738 vacuum evaporation Methods 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 238000005096 rolling process Methods 0.000 claims 1
- 238000000206 photolithography Methods 0.000 abstract description 10
- 238000010894 electron beam technology Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000013461 design Methods 0.000 description 4
- 238000002207 thermal evaporation Methods 0.000 description 4
- 239000002313 adhesive film Substances 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000003331 infrared imaging Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- HHAVHBDPWSUKHZ-UHFFFAOYSA-N propan-2-ol;propan-2-one Chemical compound CC(C)O.CC(C)=O HHAVHBDPWSUKHZ-UHFFFAOYSA-N 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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Abstract
本发明公开了一种制备铟柱的方法,它应用于半导体器件和电路制备工艺。本发明的方法包括工艺流程为芯片处理、前烘、涂胶、对位、曝光、显影、坚膜的正性胶光刻工艺以及工艺流程为芯片处理、装片、抽真空、蒸发、取片、剥离的电子束蒸发铟膜和微超声剥离技术,在进行涂胶工序时,在正性胶涂层中间制备一层金属膜或者其它介质膜,使涂层成为“正性胶厚层-介质或金属膜-正性胶薄层”的结构;然后将上层的薄胶光刻成图形,再用湿法腐蚀掉图形窗口内的介质或金属膜,最后将底层的厚胶通过显影方法去除干净并采用电子束蒸发铟膜、铟膜微超声波剥离技术对铟膜进行剥离。采用本发明的技术制备的铟柱的形貌的精确度明显高于用现有技术制备的铟柱的形貌。
The invention discloses a method for preparing an indium column, which is applied to the preparation process of semiconductor devices and circuits. The method of the present invention includes the process of chip processing, pre-baking, gluing, alignment, exposure, development, film hardening of the positive photolithography process and the process of chip processing, chip loading, vacuuming, evaporation, and chip removal. , The stripped electron beam evaporated indium film and micro-ultrasonic stripping technology, during the glue coating process, a layer of metal film or other dielectric film is prepared in the middle of the positive glue coating, so that the coating becomes a "positive glue thick layer-medium Or metal film-positive photoresist thin layer” structure; then photolithographically pattern the upper layer of thin photoresist, and then wet-etch the dielectric or metal film in the graphic window, and finally remove the bottom layer of thick photoresist by developing method The indium film is peeled off by electron beam evaporation indium film and indium film micro-ultrasonic stripping technology. The accuracy of the shape of the indium column prepared by the technology of the present invention is obviously higher than that of the indium column prepared by the prior art.
Description
技术领域 technical field
本发明涉及一种半导体器件和电路制备工艺,尤其是涉及一种量子阱红外焦平面探测器中的铟柱的探测方法。The invention relates to a semiconductor device and a circuit preparation process, in particular to a detection method for an indium column in a quantum well infrared focal plane detector.
背景技术 Background technique
量子阱红外焦平面探测器是近几年发展起来的一种新型红外探测器,是目前红外传感技术的发展方向,它具有响应速度快,可变波长,热稳定性和均匀好等优点,在军事和民用方面占有重要地位,已成为国际上极为重视的高技术研究前沿课题。Quantum well infrared focal plane detector is a new type of infrared detector developed in recent years. It is the development direction of infrared sensing technology at present. It has the advantages of fast response speed, variable wavelength, thermal stability and good uniformity. Occupying an important position in military and civilian use, it has become a frontier topic of high-tech research that is highly valued internationally.
红外焦平面阵列是现代红外成像系统的核心部件,其制造过程是首先分别制备探测器和信号处理电路,然后再互连在一起。互连工艺通常采用的是铟柱倒装互连焊接,即在探测器芯片和信号处理电路芯片上均制备出相同图形的铟柱,然后将二者铟柱对准焊接。要使互连的成功率达到最高,制备高质量的铟柱尤为重要,它直接影响到焦平面器件的光电性能和成像质量。Infrared focal plane array is the core component of modern infrared imaging system. Its manufacturing process is to prepare the detector and signal processing circuit separately first, and then interconnect them together. The interconnection process usually adopts indium column flip-chip interconnection welding, that is, indium columns with the same pattern are prepared on both the detector chip and the signal processing circuit chip, and then the two indium columns are aligned and welded. To maximize the success rate of interconnection, it is particularly important to prepare high-quality indium pillars, which directly affect the photoelectric performance and imaging quality of focal plane devices.
目前普遍采用的铟柱制备工艺是正性胶光刻和热蒸发镀膜工艺。正性胶是光刻工艺最常用的抗蚀剂,耐酸性好,分辨率较高,一般胶膜厚度不超过2微米;若套刻精度要求不高时,最大胶膜厚度可采用分次涂覆达到5微米。但是当铟膜厚度增加时,由于铟这种金属很“粘”,常规的有机溶剂加热法剥离非常困难,容易导致光刻胶已溶解掉,而铟膜却仍粘在芯片上未去除掉。一般铟柱要求的高度是7微米,胶膜厚度又至少大于铟柱高度2微米,才能满足金属镀膜后的剥离工序,即胶膜厚至少应为9微米。如此厚度的胶膜就需要专门涂覆的厚胶涂胶台、曝光机等设备,因此需要投入过高的成本;尤其是由于厚胶时需要的显影时间较长,当窗口内部的胶通过显影去除干净时,往往窗口上部的几何尺寸也已大大超出了设计要求,且其剖面呈脸盆状,不能形成理想的“剪刀口”形状,这样就造成剥离时很困难,成品率低。正性胶光刻工艺的工艺流程如下:The currently widely used indium column preparation processes are positive resist photolithography and thermal evaporation coating processes. Positive resist is the most commonly used resist in photolithography. It has good acid resistance and high resolution. Generally, the film thickness does not exceed 2 microns. If the overlay accuracy is not high, the maximum film thickness can be applied in batches. up to 5 microns. However, when the thickness of the indium film increases, because the metal indium is very "sticky", it is very difficult to peel it off by conventional organic solvent heating method, which may easily lead to the dissolution of the photoresist, but the indium film is still stuck on the chip and has not been removed. Generally, the required height of the indium column is 7 microns, and the thickness of the adhesive film is at least 2 microns greater than the height of the indium column, so as to meet the peeling process after the metal coating, that is, the thickness of the adhesive film should be at least 9 microns. A film of such thickness requires special equipment such as a thick glue coating station, exposure machine, etc., so it needs to invest too much cost; especially because the thick glue requires a long development time, when the glue inside the window passes through the development When it is removed cleanly, the geometric dimension of the upper part of the window has also greatly exceeded the design requirements, and its section is in the shape of a washbasin, which cannot form an ideal "scissors' shape", which makes it difficult to peel off and the yield is low. The process flow of the positive resist lithography process is as follows:
芯片处理→前烘→涂胶→对位→曝光→显影→坚膜。Chip processing→pre-baking→glue coating→alignment→exposure→development→film hardening.
热蒸发镀膜是目前国内外普遍采用的方法。设备较为简单,利用电阻丝将源加热,蒸发速率快;但是其缺点是不可控,每次蒸发所用的铟源需一次用完,所以铟膜厚度的控制完全依赖于铟源的装填量,不易精确控制膜厚,且无法对铟源表面进行预处理。热蒸发镀膜的工艺流程如下:Thermal evaporation coating is a method commonly used at home and abroad. The equipment is relatively simple, and the source is heated by a resistance wire, and the evaporation rate is fast; but its disadvantage is that it is uncontrollable, and the indium source used for each evaporation needs to be used up once, so the control of the thickness of the indium film depends entirely on the filling amount of the indium source, which is not easy Precise control of film thickness without pretreatment of the indium source surface. The process flow of thermal evaporation coating is as follows:
芯片处理→装片→抽真空→蒸发→取片→剥离。Chip processing→mounting→vacuumizing→evaporating→taking out→peeling off.
发明内容 Contents of the invention
本发明需要解决的技术问题是提供一种制备精确的铟柱图形的工艺方法。The technical problem to be solved by the present invention is to provide a process method for preparing precise indium column patterns.
为解决上述技术问题,本发明所采用的技术方案是:In order to solve the problems of the technologies described above, the technical solution adopted in the present invention is:
本发明所用的设备为普通的涂胶台、曝光机,其方法包括三层叠加正性胶光刻工艺、电子束蒸发铟膜和微超声剥离技术。The equipment used in the present invention is an ordinary gluing station and an exposure machine, and the method includes a three-layer stacked positive photolithography process, electron beam evaporation of indium film and micro-ultrasonic stripping technology.
正性胶光刻工艺的工艺流程为:芯片处理→前烘→涂胶→对位→曝光→显影→坚膜;蒸发镀膜的工艺流程为:芯片处理→装片→抽真空→蒸发镀膜→取片→剥离。The process flow of the positive resist lithography process is: chip processing→pre-baking→glue coating→alignment→exposure→developing→film hardening; the process flow of evaporation coating is: chip processing→loading→vacuumizing→evaporation coating→taking slice → peel off.
本发明所述的正性胶光刻工艺为三层叠加光刻技术,即是在进行涂胶工序时,在正性胶涂层中间制备一层金属膜或者其它化合物介质的涂层,使涂层成为“正性胶-介质或金属膜-正性胶”的三层结构;然后对上层薄胶进行光刻,使其成为精确的图形,再用湿法腐蚀掉上述图形窗口内的介质或金属膜,最后将底层厚胶通过显影方法去除干净。然后采用电子束蒸发铟膜,并采用铟膜微超声剥离技术对铟膜进行剥离。The positive resist photolithography process described in the present invention is a three-layer stacked photolithography technology, that is, when performing the glue coating process, a layer of metal film or other compound medium coating is prepared in the middle of the positive resist coating, so that the coated The layer becomes a three-layer structure of "positive photoresist-dielectric or metal film-positive photoresist"; then the upper layer of thin photoresist is photoetched to make it a precise pattern, and then the medium or medium in the above pattern window is etched away by wet method Metal film, and finally remove the bottom thick glue by developing method. Then electron beams are used to evaporate the indium film, and the indium film is peeled off by micro-ultrasonic stripping technique of indium film.
上述技术方案的进一步改进在于,三层叠加光刻技术的涂胶的工艺要求为:第一层正性胶根据工艺要求涂覆厚胶,第二层为80~200纳米介质或金属膜,第三层为400~1000纳米正性胶。The further improvement of the above technical solution lies in that the process requirements for the coating of the three-layer superimposed photolithography technology are as follows: the first layer of positive resist is coated with thick glue according to the process requirements, the second layer is 80-200 nanometer dielectric or metal film, and the third layer is The three layers are 400-1000 nanometer positive glue.
上述技术方案的进一步改进在于:上述介质和金属为不与显影液反应、且具有一定延展性的介质或者金属;其中介质为氮化硅、二氧化硅的其中一种;金属膜为钛、铂、金的其中一种或几种的混合。The further improvement of the above-mentioned technical solution is that: the above-mentioned medium and metal are medium or metal that do not react with the developer and have certain ductility; wherein the medium is one of silicon nitride and silicon dioxide; the metal film is titanium, platinum , Gold, or a mixture of several.
本发明的电子束蒸发厚铟膜和微超声剥离技术是采用电子束蒸发技术来制备铟柱。电子束蒸发可通过晶振控制仪对蒸发速率、膜厚实时精确控制;首先进行预蒸发,将铟源表面残留的氧化层和杂质挥发掉;在电子束蒸发台上的数个坩埚可蒸发数种金属,使接触电极和铟柱一次蒸发形成;电子束蒸发采用行星旋转夹具固定芯片,蒸发源到芯片的蒸发距离大于30厘米;采用高真空蒸发,在真空度达到9×10-5Pa时启动蒸发程序,蒸发结束后继续将真空抽至10-5Pa时关高真空阀。The electron beam evaporation thick indium film and the micro-ultrasonic stripping technology of the present invention adopt the electron beam evaporation technology to prepare the indium column. Electron beam evaporation can accurately control the evaporation rate and film thickness in real time through the crystal oscillator controller; firstly, pre-evaporation is performed to volatilize the residual oxide layer and impurities on the surface of the indium source; several crucibles on the electron beam evaporation table can evaporate several Metal, so that the contact electrode and indium column are evaporated at one time; the electron beam evaporation uses a planetary rotating fixture to fix the chip, and the evaporation distance from the evaporation source to the chip is greater than 30 cm; using high-vacuum evaporation, start when the vacuum degree reaches 9×10 -5 Pa Evaporation procedure, after the evaporation is completed, continue to pump the vacuum to 10 -5 Pa and close the high vacuum valve.
上述工艺完成后将芯片取出,采用微超声剥离技术剥离铟膜。After the above process is completed, the chip is taken out, and the indium film is peeled off by micro-ultrasonic stripping technology.
上述微超声剥离技术剥离铟膜的具体方法是:将蒸发好的芯片放入已加热的丙酮溶液里,浸泡30~60秒,待光刻胶膨胀而未完全溶解时,将芯片小功率超声8~12秒,使铟膜产生裂纹,而后用水枪将多余的金属铟冲去。The specific method for peeling off the indium film by the above-mentioned micro-ultrasonic stripping technology is: put the evaporated chip into the heated acetone solution, soak for 30-60 seconds, and when the photoresist expands and is not completely dissolved, the chip is ultrasonicated with low power for 8 ~ 12 seconds, the indium film is cracked, and then the excess metal indium is washed away with a water gun.
由于采用了上述技术方案,本发明取得的技术进步是:Owing to having adopted above-mentioned technical scheme, the technical progress that the present invention obtains is:
上层薄胶可以光刻出精确的图形,然后用湿法腐蚀掉窗口内的介质或金属膜,最后将底层厚胶显影干净。此项技术的关键是利用介质(如:氮化硅、二氧化硅)或金属膜(如:钛、铂、金)不与显影液反应、且有一定应力(即延展性)的特性,精确限制窗口的几何尺寸和形状,使其形成理想的“剪刀口”,以利于金属化后的剥离工序。该介质膜的应用,有效地解决了原有光刻工艺中由于厚胶膜的过度曝光和显影引起的图形窗口胶边缘塌陷,致使窗口上部几何尺寸大大超出设计要求,且其剖面呈脸盆状,无法形成“剪刀口”的弊病。The upper layer of thin glue can be photoetched to produce precise patterns, and then the dielectric or metal film in the window is etched away by wet method, and finally the bottom layer of thick glue is developed and cleaned. The key to this technology is to use the characteristics of the medium (such as silicon nitride, silicon dioxide) or metal film (such as titanium, platinum, gold) that do not react with the developer and have a certain stress (ie ductility). Limit the geometric size and shape of the window to form an ideal "scissors' mouth" to facilitate the stripping process after metallization. The application of this dielectric film effectively solves the problem of the collapse of the glue edge of the graphics window caused by the overexposure and development of the thick film in the original photolithography process, resulting in the geometric size of the upper part of the window greatly exceeding the design requirements, and its section is in the shape of a washbasin , unable to form the disadvantage of "scissors' mouth".
本发明采用了电子束蒸发技术来制备铟柱,电子束蒸发可以对蒸发速率、膜厚进行实时精确控制,且能进行预蒸发,将铟源表面残留的氧化层和杂质挥发掉,更有效地保证了铟膜的质量;且电子束蒸发台有数个坩埚,可以方便地一次蒸发数种金属,即接触电极和铟柱可一次蒸发形成,简化了工艺流程,缩短了工艺用时,提高了焊接精度。The invention adopts the electron beam evaporation technology to prepare the indium column. The electron beam evaporation can precisely control the evaporation rate and film thickness in real time, and can perform pre-evaporation to volatilize the residual oxide layer and impurities on the surface of the indium source, and more effectively The quality of the indium film is guaranteed; and the electron beam evaporation table has several crucibles, which can easily evaporate several metals at one time, that is, the contact electrode and the indium column can be formed by one evaporation, which simplifies the process flow, shortens the process time, and improves the welding accuracy. .
电子束蒸发采用行星旋转夹具固定芯片,蒸发源到芯片的蒸发距离大于30厘米,保证了蒸发的垂直性和均匀性;采用高真空蒸发,保证了铟膜不被氧化。采用微超声剥离技术对厚的铟膜进行剥离,保证了铟柱剥离成品率在95%以上。Electron beam evaporation uses a planetary rotating fixture to fix the chip, and the evaporation distance from the evaporation source to the chip is greater than 30 cm, which ensures the verticality and uniformity of evaporation; high-vacuum evaporation is used to ensure that the indium film is not oxidized. The thick indium film is stripped by micro-ultrasonic stripping technology, which ensures that the stripping yield of the indium column is above 95%.
我们将采用本发明的技术制备的铟柱的形貌和采用现有技术制备的铟柱的形貌都拍摄了照片,经过两种技术制成的铟柱形貌的对比,可以看出,采用本发明的技术制备的铟柱的形貌的精确度明显高于用现有技术制备的铟柱的形貌。We have taken photos of the appearance of the indium column prepared by the technology of the present invention and the appearance of the indium column prepared by the prior art. After comparing the appearance of the indium column made by the two technologies, it can be seen that the use of The accuracy of the shape of the indium column prepared by the technology of the present invention is obviously higher than that of the indium column prepared by the prior art.
附图说明 Description of drawings
图1是本发明的涂层结构示意图;Fig. 1 is a schematic view of the coating structure of the present invention;
图2是用现有技术制备的铟柱的照片;Fig. 2 is the photo of the indium column prepared with prior art;
图3是采用本发明的技术制备的铟柱照片;Fig. 3 is the photo of the indium column prepared by the technology of the present invention;
图4是利用本发明技术制备的探测器光敏芯片的铟柱俯视图片;Fig. 4 is the top view picture of the indium column of the detector photosensitive chip prepared by the technology of the present invention;
图5是利用本发明的技术制备的读出电路芯片的铟柱俯视图片。Fig. 5 is a top view picture of the indium column of the readout circuit chip prepared by the technology of the present invention.
具体实施方式 Detailed ways
下面结合实施例对本发明做进一步详细说明:Below in conjunction with embodiment the present invention is described in further detail:
我们制备的铟柱具有下列要求:The indium column we prepared has the following requirements:
1)铟柱高度7~8微米,光刻胶膜厚不少于10微米;1) The height of the indium column is 7-8 microns, and the thickness of the photoresist film is not less than 10 microns;
2)光刻成品率不低于95%,窗口几何尺寸为设计值±2微米;2) The photolithographic yield rate is not less than 95%, and the geometric size of the window is ±2 microns from the design value;
3)铟膜厚度分布的均匀性为设计值±10%,金属表面光滑、不被氧化;3) The uniformity of indium film thickness distribution is ±10% of the design value, and the metal surface is smooth and not oxidized;
4)铟膜附着力强,剥离后铟柱成品率不低于95%。4) The indium film has strong adhesion, and the yield of the indium column after peeling off is not less than 95%.
制备上述铟柱的工艺流程为:The process flow for preparing the above-mentioned indium column is as follows:
1.光刻工艺1. Photolithography process
1)芯片处理:丙酮-异丙醇依次浸泡数分钟;1) Chip treatment: Soak in acetone-isopropanol for several minutes;
2)前烘:100~180℃,3分钟;2) Pre-baking: 100-180°C, 3 minutes;
3)涂第一层胶:10微米左右3) Apply the first layer of glue: about 10 microns
4)坚膜:80~140℃,1~5分钟;4) Hardening film: 80~140℃, 1~5 minutes;
5)淀积金属膜或介质膜:80~200纳米5) Deposit metal film or dielectric film: 80-200 nanometers
6)涂第二层胶:500~1000纳米6) Apply the second layer of glue: 500-1000 nanometers
7)坚膜:80~140℃,1~5分钟;7) Hardening film: 80~140℃, 1~5 minutes;
8)对位8) Counterpoint
9)曝光9) Exposure
10)一次显影:将铟柱图形内的第二层胶去除干净10) One-time development: remove the second layer of glue in the indium column pattern
11)腐蚀:将铟柱图形内的介质膜去除干净11) Corrosion: remove the dielectric film in the indium column pattern
12)二次显影:将铟柱图形内的第一层胶去除干净12) Second development: remove the first layer of glue in the indium column pattern
2.铟柱金属化2. Indium pillar metallization
1)装片:将芯片固定在电子束蒸发台内的行星夹具上;1) Chip loading: fix the chip on the planetary fixture in the electron beam evaporation table;
2)抽真空、热蒸发镀膜:真空度达到9×10-5Pa时启动蒸发程序;2) Vacuuming and thermal evaporation coating: start the evaporation process when the vacuum degree reaches 9×10 -5 Pa;
3)冷却:蒸发完成后,将真空抽至10-5Pa,然后关高真空阀;3) Cooling: After the evaporation is completed, the vacuum is pumped to 10 -5 Pa, and then the high vacuum valve is closed;
4)放气,取片:待冷却后,进行放气,并将芯片取出;4) Deflate and take the chip: after cooling, deflate and take out the chip;
5)剥离:将蒸发好的芯片放入已加热的丙酮溶液里,浸泡30~60秒,待光刻胶膨胀而未完全溶解时,将芯片小功率超声10秒,使铟膜产生裂纹,而后用水枪将多余的金属铟冲去。5) Stripping: Put the evaporated chip into the heated acetone solution and soak for 30-60 seconds. When the photoresist expands but is not completely dissolved, ultrasonicate the chip with low power for 10 seconds to cause cracks in the indium film, and then Flush off excess indium metal with a water jet.
涂胶采用的是“正性胶-介质或金属膜-正性胶”结构的涂覆方式。涂胶后对上层薄胶进行光刻,使其成为精确的图形,再用湿法腐蚀掉上述图形窗口内的介质或金属膜,最后将底层厚胶通过显影方法去除干净。然后采用电子束蒸发铟膜,并采用铟膜微超声剥离技术对铟膜进行剥离。The glue coating adopts the coating method of "positive glue-medium or metal film-positive glue". After gluing, photolithography is carried out on the upper layer of thin glue to make it into a precise pattern, and then the medium or metal film in the above pattern window is etched away by wet method, and finally the bottom layer of thick glue is removed by developing method. Then electron beams are used to evaporate the indium film, and the indium film is peeled off by micro-ultrasonic stripping technique of indium film.
电子束蒸发镀膜的具体方法是:电子束蒸发铟膜所用设备为晶振控制仪和电子束蒸发台,电子束蒸发采用行星旋转夹具固定芯片,蒸发源到芯片的蒸发距离大于30厘米,保证了蒸发的垂直性和均匀性;采用高真空蒸发,在真空度达到9×10-5Pa时启动蒸发程序,蒸发结束后继续将真空抽至10-5Pa时关高真空阀;并采用铟膜微超声剥离技术对铟膜进行剥离。The specific method of electron beam evaporation coating is: the equipment used for electron beam evaporation of indium film is crystal oscillator controller and electron beam evaporation table, electron beam evaporation adopts planetary rotating fixture to fix chip, and the evaporation distance from evaporation source to chip is more than 30 cm, which ensures the evaporation verticality and uniformity; use high vacuum evaporation, start the evaporation program when the vacuum degree reaches 9×10 -5 Pa, and close the high vacuum valve when the vacuum is continued to 10 -5 Pa after evaporation; and use indium film micro Ultrasonic stripping technology strips the indium film.
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CN103413814B (en) * | 2013-07-30 | 2015-07-29 | 中国科学院上海技术物理研究所 | The preparation method of infrared focal plane device high density fine indium styletable face leveling |
CN106024982A (en) * | 2016-07-11 | 2016-10-12 | 中国科学院上海技术物理研究所 | Preparation method for indium column of infrared focal plane chip |
CN112652540B (en) | 2020-07-01 | 2022-04-22 | 腾讯科技(深圳)有限公司 | Indium column welding spot preparation method, chip substrate and chip |
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Assignee: Shijiazhuang Development Zone North-China Integrated Circuit Design Co.,Ltd. Assignor: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY Group Corp. Contract record no.: 2010130000122 Denomination of invention: Method for manufacturing indium column Granted publication date: 20091230 License type: Exclusive License Open date: 20080227 Record date: 20101228 |
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