Disclosure of Invention
The invention aims to provide an automatic frequency correction method and device for a time division wireless communication system receiver, so that the local oscillator frequency of the receiver and the oscillator frequency in a transmitter can be quickly and accurately synchronized under the condition of low SINR and the condition of time dispersion and frequency dispersion of a communication channel.
In order to achieve the above object, the present invention provides an automatic frequency correction method for a receiver of a time division wireless communication system, the method comprising the following steps:
a training sequence acquisition step, in which a receiver acquires a data sequence pattern by cell search or system notification, and the data sequence pattern appears in a received signal according to a certain mode, for example, periodically; and
a fine frequency correction step, which can be carried out on a frame-by-frame basis on a number of consecutive or non-consecutive frames until desynchronization or a new automatic frequency correction starts, each time comprising the following steps:
a signal data extraction step of extracting reception data corresponding to the training sequence portion;
a channel estimation and path search step, which is used for obtaining the amplitude and phase information corresponding to each channel time delay tap in a batch of current frames and selecting a plurality of effective paths according to the channel estimation results of the current frame and a plurality of previous frames;
path merging and correlation step, which is used for merging the received data corresponding to the training sequence part on the effective paths in the maximum proportion according to the channel estimation value and the path selection result, and then correlating with the training sequence;
a frequency offset estimation calculation step, configured to perform a frequency offset estimation once according to the output sequence obtained in the path merging and correlation step to obtain a frequency offset estimation value;
a signal-to-interference-and-noise ratio estimation step, which is used for obtaining the signal-to-interference-and-noise ratio estimation result in the current frame;
a Kalman gain factor calculation step, which is used for obtaining a gain factor applied to the frequency offset estimation in the current frame according to the signal-to-interference-and-noise ratio estimation result;
a loop filtering step, which is used for carrying out first-order loop filtering according to the frequency offset estimation value and the Kalman gain factor to obtain an accumulated frequency offset estimation value; and
and a local oscillator fine tuning step, which is used for controlling the output frequency of the local oscillator by using the accumulated frequency offset estimated value so as to finish one fine frequency correction in the current frame.
In another aspect, the present invention provides an automatic frequency correction method for a receiver of a time division wireless communication system, including the following steps:
the first step of initial cell search, which is to obtain rough frame synchronization information and detect the primary synchronization code with the strongest signal by performing correlation processing or similar processing on all candidate primary synchronization code words and received signal sequences;
a coarse frequency correction step, using the primary synchronization code word detected in the first step of the initial cell search as the training sequence of the step; this step can be continued on a frame-by-frame basis over several consecutive or non-consecutive frames until desynchronization or a new automatic frequency correction starts, each time comprising the following steps:
a signal data extraction step for extracting the received data in the corresponding search window containing the training sequence;
a step of calculating sliding correlation and phase offset estimation, which is used for obtaining a phase offset estimation sequence in the search window;
a multi-frame combination step, which is used for combining the phase offset estimation sequences obtained in a plurality of frames according to a certain mode;
a time delay envelope generating step, namely performing modular calculation according to the multi-frame combined phase offset estimation sequence to obtain a time delay envelope in a search window;
a path selection step, namely performing path selection in the search window according to the time delay envelope;
a phase offset estimation combination step, which is used for carrying out multi-path combination on the phase offset estimation values on the selected paths;
a frequency offset estimation calculation step, which is used for obtaining frequency offset estimation according to the phase offset estimation after the multipath combination; and
a local oscillator frequency coarse tuning step, which is used for controlling the output frequency of the local oscillator by the obtained frequency offset estimation, thereby completing a coarse frequency correction process.
The second step of initial cell search, which is to obtain the code group corresponding to the primary synchronization code according to the primary synchronization code detected in the first step of initial cell search; meanwhile, according to the rough frame synchronization information and the system frame structure, the rough position of the secondary synchronization code receiving signal is obtained; then, after all the candidate secondary synchronization code words in the code group and the received secondary synchronization code signal are subjected to correlation processing or similar processing, which secondary synchronization code word is adopted by the system is detected;
fine frequency correction step, using the secondary synchronous code word detected in the second step of initial cell search as the training sequence of the step; the method comprises the following steps that the following steps can be continuously carried out in each received signal frame or non-continuously carried out frame by frame until the synchronization is lost or a new automatic frequency correction is started;
a signal data extraction step of extracting reception data corresponding to the training sequence portion;
a channel estimation and path search step, which is used for obtaining the amplitude and phase information corresponding to each channel time delay tap in a batch of current frames and selecting a plurality of effective paths according to the channel estimation results of the current frame and a plurality of previous frames;
path merging and correlation step, which is used for merging the received data corresponding to the training sequence part on a plurality of effective paths in the maximum proportion according to the channel estimation value and the path selection result, and then correlating with the training sequence;
a frequency offset estimation calculation step, which is used for carrying out frequency offset estimation once according to the output sequence obtained in the path combination and correlation step to obtain a frequency offset estimation value;
a signal-to-interference-and-noise ratio estimation step, which is used for obtaining the signal-to-interference-and-noise ratio estimation result in the current frame;
a Kalman gain factor calculation step, which is used for obtaining a gain factor applied to the frequency offset estimation in the current frame according to the signal-to-interference-and-noise ratio estimation result;
a loop filtering step, which is used for carrying out first-order loop filtering according to the frequency offset estimation value and the Kalman gain factor to obtain an accumulated frequency offset estimation value; and
and a local oscillator fine tuning step, which is used for controlling the output frequency of the local oscillator by using the accumulated frequency offset estimated value so as to finish one fine frequency correction in the current frame.
Further, the present invention provides an automatic frequency correction apparatus for a receiver of a time division wireless communication system, comprising a training sequence acquisition means and a fine frequency correction means connected thereto, wherein,
a training sequence acquisition device, wherein the receiver acquires a data sequence pattern by cell search or system notification, and the data sequence pattern appears in a certain mode, for example, periodically, in the received signal; and
the fine frequency correction apparatus includes:
a frequency conversion demodulator for frequency conversion demodulating the radio frequency signal;
a signal data extractor for extracting the received data corresponding to the training sequence portion from the radio frequency signal processed by the frequency conversion demodulator;
a channel estimation and path searcher connected with the signal data extractor for obtaining amplitude and phase information corresponding to each channel delay tap in a current frame and selecting a plurality of effective paths according to the channel estimation results of the current frame and a plurality of previous frames;
a path merging and correlator for receiving the channel estimation value and path selection result of the channel estimation and path searcher, merging the received data corresponding to the training sequence part on several effective paths from the signal data extractor in the maximum proportion, and then correlating with the training sequence;
a frequency offset estimation calculator, receiving the output sequence obtained from the path combination and correlator, and performing a frequency offset estimation to obtain a frequency offset estimation value;
a signal-to-interference-and-noise ratio estimator connected with the channel estimation and path searcher for determining the signal-to-interference-and-noise ratio estimation result in the current frame;
a Kalman gain factor calculator connected with the signal-to-interference-and-noise ratio estimator connected with the channel estimation and path searcher, and used for receiving the signal-to-interference-and-noise ratio estimation result of the signal-to-interference-and-noise ratio estimator and obtaining a gain factor applied to the frequency offset estimation in the current frame;
a loop filter for receiving the frequency offset estimation value signal from said frequency offset estimation calculator and the Kalman gain factor signal from said Kalman gain factor calculator, and performing a first-order loop filtering to obtain an accumulated frequency offset estimation value; and
and the local oscillator is connected with the loop filter and used for controlling the output frequency of the local oscillator by using the accumulated frequency offset estimation value to perform one-time fine frequency correction in the current frame.
In another aspect, the present invention provides an automatic frequency correction device for a receiver of a time division wireless communication system, comprising:
an initial cell searching first device, which obtains rough frame synchronization information by performing correlation processing or the like on all candidate primary synchronization code words and a received signal sequence, and simultaneously detects the primary synchronization code word with the strongest signal;
a coarse frequency correction means coupled to said initial cell search first means, comprising
A signal data extractor for extracting received data within a corresponding search window containing a training sequence;
a sliding correlation and frequency offset estimator coupled to said signal data extractor for obtaining a phase offset estimation sequence within said search window;
a multi-frame combiner for receiving the phase offset estimation sequences from the sliding correlation and frequency offset estimator and combining the phase offset estimation sequences obtained in a plurality of frames according to a certain mode;
a modulus value device connected with the multi-frame merger, which carries out modulus calculation on the phase shift estimation sequence of the multi-frame merger to obtain a time delay envelope in a search window;
a path selector for receiving the delay envelope from said modulus calculator and for performing path selection within said search window;
a phase offset estimation combiner for receiving the phase offset estimation value signal from the path selector and combining the multipath signals;
a phase extractor for receiving the phase offset estimate from the phase offset estimate combiner to obtain a frequency offset estimate; and
a local oscillator for receiving the frequency offset estimation signal from the phase extractor, controlling the output frequency of the local oscillator, and performing a coarse frequency correction process;
an initial cell searching second device connected with the rough frequency correction device, obtaining a code group corresponding to the main synchronous code according to the code word of the main synchronous code, and obtaining the rough position of the secondary synchronous code receiving signal according to the rough frame synchronization information and the system frame structure; then, after all the candidate secondary synchronization code words in the code group and the received secondary synchronization code signal are subjected to correlation processing or similar processing, which secondary synchronization code word is adopted by the system is detected; and
a fine frequency correction device coupled to said initial cell search second means, comprising,
a signal data extractor which extracts reception data corresponding to the training sequence portion from the frequency-variable demodulator of the radio frequency signal;
a channel estimation and path searcher connected with the signal data extractor for obtaining amplitude and phase information corresponding to each channel delay tap in a current frame and selecting a plurality of effective paths according to the channel estimation results of the current frame and a plurality of previous frames;
a path merging and correlator for receiving the channel estimation value and path selection result of the channel estimation and path searcher, merging the received data corresponding to the training sequence part on several effective paths from the signal data extractor in the maximum proportion, and then correlating with the training sequence;
a frequency offset estimation calculator, receiving the output sequence obtained from the path combination and correlator, and performing a frequency offset estimation to obtain a frequency offset estimation value;
a signal-to-interference-and-noise ratio estimator connected with the channel estimation and path searcher for determining the signal-to-interference-and-noise ratio estimation result in the current frame;
a Kalman gain factor calculator connected with the signal-to-interference-and-noise ratio estimator connected with the channel estimation and path searcher, and used for receiving the signal-to-interference-and-noise ratio estimation result of the signal-to-interference-and-noise ratio estimator and obtaining a gain factor applied to the frequency offset estimation in the current frame;
a loop filter for receiving the frequency offset estimation value signal from said frequency offset estimation calculator and the Kalman gain factor signal from said Kalman gain factor calculator, and performing a first-order loop filtering to obtain an accumulated frequency offset estimation value; and
and the local oscillator is connected with the loop filter and is used for controlling the output frequency of the local oscillator by using the accumulated frequency offset estimation value to perform one-time fine frequency correction in the current frame.
The automatic frequency correction method and the automatic frequency correction device for the time division wireless communication system receiver, which are realized by the invention, can quickly and accurately realize the purpose of automatic frequency correction in the time division system under the condition of very low SINR. In particular, the invention can maintain excellent performance under two severe channel conditions, namely frequency diffusion and time diffusion, which are common in a broadband mobile communication system. In particular, the gain factor in the fine frequency correction AFC loop can adaptively adjust the loop gain according to the SINR condition at the time, so that the fine frequency correction AFC loop can maintain good performance under various complicated and varied wireless communication channel conditions.
Objects and advantages of the present invention will become more apparent from the following description of an automatic frequency correction method and apparatus implemented at a User Equipment (UE) in a TD-SCDMA system, which is a time division mode wireless communication system.
Detailed Description
Fig. 1 shows a block diagram of a conventional digital transceiver in the prior art. Referring to fig. 1, a received rf signal is down-converted into an analog baseband signal by a Mixer (Mixer)100, and then passes through an analog-to-digital converter (ADC)101, an Automatic Gain Controller (AGC)102, and an RRC filter 103 to obtain a digital baseband signal. Through a series of digital signal processing, the synchronization module 104 obtains synchronization information, including frame synchronization and system synchronization information. After synchronization is established, the demodulator 105 performs despreading, demodulation, and the like to recover the transmission information. On the other hand, the transmission information passes through the RRC shaping filter 109, a digital-to-analog converter (DAC)110, and is up-converted by a mixer 111 to obtain a transmission rf signal.
In the block diagram of the digital transceiver shown in fig. 1, the reference frequency signals of the mixers 100, 111 for transceiving data are generated by the output of a local voltage controlled oscillator 108 through a series of frequency multipliers and frequency dividers (not shown in fig. 1), and the voltage controlled oscillator is controlled by the output of an Automatic Frequency Correction (AFC) module 106 through a digital-to-analog converter (DAC)107, so as to keep the reference frequency generated by the local oscillator consistent with the carrier center frequency of the received signal — if there is a frequency deviation, a phase rotation of the received digital baseband signal will be caused, and the performance of the receiver will deteriorate and even cause communication failure. For the transmit part, if the carrier frequency generated by the local oscillator is greatly deviated, serious Out-of-band Interference (Out-of-band Interference) is also caused. On the other hand, the local oscillator also provides reference frequency signals for a plurality of clock sources of the digital transceiver, such as receiving sampling clocks, etc., so the frequency deviation also affects the accuracy of the clock signals output by the clock sources, and may seriously affect the system performance. Therefore, AFC module design is one of the key issues to be solved to ensure good performance of digital transceivers.
Generally, the AFC module 106 generates a control signal at regular intervals by using a training sequence and a corresponding digital baseband receiving signal to control the output frequency of the local voltage controlled oscillator 108. Measuring an AFC performance includes two important indicators, namely convergence performance and tracking performance. Wherein, convergence performance refers to the time from the start of AFC operation to the time when the frequency deviation between the transmitting end and the receiving end is lower than a predetermined small frequency value (e.g. 0.1 ppm): the shorter the time, the better the convergence performance. Tracking performance refers to the ability of the AFC control signal output to track local oscillator frequency drift-the frequency drift referred to may be due to a variety of causes, such as temperature changes, etc., which drift is generally slow. The convergence performance indicator is relatively more challenging for AFC design, since it directly determines the synchronization time, e.g., the duration of the cell search procedure. For tracking capability, the requirement is generally met as long as the bandwidth of the loop filter in AFC is greater than the frequency drift speed.
Fig. 2 shows a block diagram of a sliding correlation method commonly used in a synchronization module in the prior art. The received analog baseband signal passes through the sampling module 20 and a digital filter (not shown in fig. 2) to obtain a baseband digital signal. In order to overcome the performance degradation caused by the sampling time deviation, the sampling Rate of the sampler should be higher than the Chip Rate (Chip Rate) of the system, i.e. an Oversampling (Oversampling) method is adopted. Here, an oversampling rate of a multiple of 2 is recommended, i.e. two samples per chip. Although the performance is (limited) further improved by using a higher oversampling rate, its corresponding digital signal processing complexity is much higher.
The received baseband digital signal then passes through a series of delays 21
1-21
2*N-2. Corresponding to the 2 × speed sampling clock, there are 2 × (N-1) delays in fig. 2, whose input clocks coincide with the sampling clock. At the i-th moment, the input of the first delayer from the left and the outputs of the 2 nd, 4 th, and 2x (N-1) form a sequence r with the length of N: { r
i-2(N-1),r
i-2(N-2),…,r
iWhich corresponds to the received data samples within the most recent N chips. On the other hand, by pilot code or
synchronisationThe code generator 23 generates another sequence of code words s of length N: { s
1,s
2,…,s
NIts index (code word serial number) is given by the higher layer of the system or detected by other modules. The codeword sequence is passed through a conjugating
unit 24 to obtain another sequence s of length N
*:
Then, a signal sequence r and a sequence of conjugated codewords s are received
*After element-by-element multiplication by N
complex multipliers 22, an output sequence y of length N is obtained
i:{y
i,1,y
i,2,…,y
i,N}。
The above-mentioned correlation process is performed in a "sliding" manner: every other sampling clock, the received sequence is shifted to the right by one sampling interval, i.e. the received sequence of length N for correlation updates one data sample in time, while the correlator outputs a batch of N correlated data (sequence y)i). By further digital signal processing of the output correlation data, a series of synchronization information can be obtained.
Fig. 3 shows a block diagram of a frequency offset estimator based on partial correlation and differential phase detection in the prior art. A Frequency Offset Estimator (FOE) performs a series of digital signal processing on a training sequence and a corresponding received signal sequence to obtain a Frequency Offset (difference) estimate between the output carrier Frequency of a local oscillator and the carrier Frequency of the received signal. The AFC will then further use the frequency offset estimate for correlation processing to derive a control signal for controlling the local oscillator. Therefore, the frequency offset estimator is a very important module in the AFC, and its performance directly determines the performance index of the AFC.
The frequency offset estimator shown in fig. 3 is a commonly used frequency offset estimation technique, which corresponds to the case where N is 64. Referring to FIG. 3, a sequence y is inputi:{yi,1,yi,2,…,yi,64Are generated by the sliding correlator shown in fig. 2.Firstly, the length of N is carried outpPartial correlation of 16, co-production of M N/Np4 segment partial correlation outputs. The partial correlation is calculated as follows: subsequence(s) <math> <mrow> <mo>{</mo> <msub> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> <mo>×</mo> <msub> <mi>N</mi> <mi>p</mi> </msub> <mo>+</mo> <mn>1</mn> </mrow> </msub> <mo>,</mo> <msub> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> <mo>×</mo> <msub> <mi>N</mi> <mi>p</mi> </msub> <mo>+</mo> <mn>2</mn> </mrow> </msub> <mo>,</mo> <mo>·</mo> <mo>·</mo> <mo>·</mo> <mo>,</mo> <msub> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mrow> <mo>(</mo> <mi>k</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> <mo>×</mo> <msub> <mi>N</mi> <mi>p</mi> </msub> </mrow> </msub> <mo>}</mo> </mrow></math>
By means of an adder 30kSumming to obtain a partial correlation output ci,kWherein k is 0, 1, …, M-1. The next step is Differential Combining (Differential Combining), which is performed by a series of conjugators 310-31M-2Multiplier 320-32M-2And an adder 33 for outputting the phase offset estimate ci,diffCan be expressed as:
<math> <mrow> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>diff</mi> </mrow> </msub> <mo>=</mo> <munderover> <mi>Σ</mi> <mrow> <mi>k</mi> <mo>=</mo> <mn>0</mn> </mrow> <mrow> <mi>M</mi> <mo>-</mo> <mn>2</mn> </mrow> </munderover> <msup> <mrow> <mo>(</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> </mrow> </msub> <mo>)</mo> </mrow> <mo>*</mo> </msup> <mo>·</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> <mo>+</mo> <mn>1</mn> </mrow> </msub> <mo>=</mo> <msup> <mrow> <mo>(</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>1</mn> </mrow> </msub> <mo>)</mo> </mrow> <mo>*</mo> </msup> <mo>·</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>2</mn> </mrow> </msub> <mo>+</mo> <msup> <mrow> <mo>(</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>2</mn> </mrow> </msub> <mo>)</mo> </mrow> <mo>*</mo> </msup> <mo>·</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>3</mn> </mrow> </msub> <mo>+</mo> <msup> <mrow> <mo>(</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>3</mn> </mrow> </msub> <mo>)</mo> </mrow> <mo>*</mo> </msup> <mo>·</mo> <msub> <mi>c</mi> <mrow> <mi>i</mi> <mo>,</mo> <mn>4</mn> </mrow> </msub> </mrow></math>
the frequency estimate may be derived from the phase offset estimate: first extract c using a phaser 34i,diffThen through a multiplier 35 and a constant KFOEThe multiplication results in a frequency offset estimate. Wherein, constant KFOEIs estimated by a frequency offset algorithmAnd a system chip width TcDecided, for the frequency offset estimator shown in fig. 3: kFOE=1/(2πTcNp). For such a frequency offset estimator, the frequency offset estimation range is set by
<math> <mrow> <mrow> <mo>|</mo> <mi>Δf</mi> <mo>|</mo> </mrow> <mo><</mo> <mfrac> <mn>1</mn> <mrow> <mn>2</mn> <msub> <mi>T</mi> <mi>c</mi> </msub> <msub> <mi>N</mi> <mi>p</mi> </msub> </mrow> </mfrac> </mrow></math>
In the decision-making process,
frequency offsets beyond the frequency estimation range will be small to be accurately estimated; when the SINR is low, the frequency offset estimation range is further narrowed. Therefore, it is sometimes necessary to reduce the partial correlation length NpTo increase the frequency offset estimation range. But on the other hand if NpThe smaller the value, the less the frequency estimation accuracy will be. Corresponding to chip rate 1/TcRecommended N in the case of 1.28Mcps, based on several different initial frequency offset rangespThe values are as follows: (1) initial frequency offset within ± 5 kHz: n is a radical ofp64; (2) initial frequency offset within ± 10 kHz: n is a radical ofp32; (3) initial frequency offset within ± 20 kHz: n is a radical ofp=16。
FIG. 4 shows a prior art method for calculating L based on normalized correlation function&A block diagram of an R frequency offset estimator. L is&The R Frequency offset estimator was first proposed by lewis (m.luise) and regini (r.regganini) in the paper entitled "Carrier Frequency Recovery in All-Digital models for Burst-mode transmission" on IEEE transmission on Communication journal, 3 months 1995. Refer to fig. 4. First, the output sequence y of the sliding correlator
i:{y
i,1,y
i,2,…,y
i,NSequentially goes through a conjugation device 40 and a batch of M time-delay devices 41
1-41
MWherein the value of M is more than or equal to 1 and less than or equal to N. At the k-th time, the input element is y
i,k(k is 1, 2, …, N) and in the initial state the output of each delay is 0, i.e. for the time k ≦ 0 y
i,k0. At the k-th moment, the outputs of the M time delayers are sequentially respectively
They are respectively passed through M multipliers 42 with a sequence of weighting factors {1/(N-1), 1/(N-2), …, 1/(N-M) }
1-42
MMultiplied respectively and then all the multiplied results are added by an adder 43. The output of the adder and the current input element y
i,kAnd multiplied by another multiplier 44, the output of which is readily available can be expressed as:
<math> <mrow> <msub> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> </mrow> </msub> <mo>·</mo> <munderover> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>M</mi> </munderover> <mfrac> <msubsup> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> <mo>-</mo> <mi>j</mi> </mrow> <mo>*</mo> </msubsup> <mrow> <mi>N</mi> <mo>-</mo> <mi>m</mi> </mrow> </mfrac> </mrow></math>
the result is then accumulated from time k 1 to time k N by an accumulator 45, the output phase offset estimate of which is denoted ci,L&RIt can be expressed as:
wherein, <math> <mrow> <msub> <mi>R</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>norm</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>m</mi> <mo>)</mo> </mrow> <mo>=</mo> <mfrac> <mn>1</mn> <mrow> <mi>N</mi> <mo>-</mo> <mi>m</mi> </mrow> </mfrac> <munderover> <mi>Σ</mi> <mrow> <mi>k</mi> <mo>=</mo> <mi>m</mi> <mo>+</mo> <mn>1</mn> </mrow> <mi>N</mi> </munderover> <msub> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> </mrow> </msub> <msubsup> <mi>y</mi> <mrow> <mi>i</mi> <mo>,</mo> <mi>k</mi> <mo>-</mo> <mi>m</mi> </mrow> <mo>*</mo> </msubsup> </mrow></math>
for M ═ 1, 2, …, M
Is an input sequence yi:{yi,1,yi,2,…,yi,NThe normalized autocorrelation function of. Finally, the output frequency offset estimate is also extracted by the phase extractor 46 to obtain the phase offset estimate ci,L&RThen through a multiplier 47 and a constant KFOEThe multiplication results in a frequency offset estimate. Wherein, constant KFOEIs formed by a frequency offset estimation algorithm and a system chip width TcDetermined for L&R frequency offset estimator: kFOE=1/[πTc(M+1)]. Can prove that L&The optimal value of the parameter M in the R frequency offset estimator is M-N/2. L is&The frequency offset estimation range of the R frequency offset estimator is
<math> <mrow> <mrow> <mo>|</mo> <mi>Δf</mi> <mo>|</mo> </mrow> <mo><</mo> <mfrac> <mn>1</mn> <mrow> <msub> <mi>T</mi> <mi>c</mi> </msub> <mrow> <mo>(</mo> <mi>M</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </mfrac> <mo>.</mo> </mrow></math>
Wherein T iscIs the system chip width. Corresponding to chip rate 1/TcIn the case of 1.28Mcps and N64, if the initial frequency offset is within ± 20kHz, M may take its optimum value of M-N/2-32.
Both prior art frequency offset estimators shown in fig. 3 and 4 are based on correlation methods, and they are suitable for use in situations where the training sequence occurs non-periodically, as is the case in many time-division systems. One common feature of both frequency offset estimators is that they output (c) phase offset estimatesi,diffAnd ci,L&R) The phase value of (a) contains frequency offset information; and the modulus value corresponds to the signal power, reflecting the reliability of the estimated value. This feature can be exploited to perform a combination of phase offset estimation between multiple frames and multiple paths.
Fig. 5 is a diagram of a frame structure in a TD-SCDMA system. The structure is according to LCR-TDD mode (1.28Mcps) in 3GPP specification TS 25.221(Release 4), or given in CWTS specification TSM 05.02(Release 3). Referring to fig. 5, the chip rate of the system is 1.28Mcps, per radio frame 500、501The length of (Radio Frame) is 5ms, i.e., 6400 chips. Each radio frame can be divided into 7 time slots TS 0-TS 6, two synchronous time slots downlink pilot synchronization time slots DwPTS and uplink pilot time slot UpPTS, and another Guard interval (Guard). Further, TS0 time slot 510Used for carrying system broadcast channels and other possible downlink traffic channels; and TS 1-TS 6 time slots 511-516It is used to carry the uplink and downlink traffic channels. The uplink pilot time slot UpPTS time slot 53 and the downlink pilot time slot DwPTS time slot 52 are used to establish initial uplink and downlink synchronization, respectively. The time slots TS 0-6 are each 0.675ms or 864 chips in length, and include two 352-chip DATA segments DATA1 and DATA2, and a 144-chip Midamble code word, i.e., a Midamble training sequence, in the middle. The training sequence has significance in TD-SCDMA, including cellIt is used by modules such as identification, channel estimation and synchronization (including frequency synchronization). The downlink pilot timeslot DwPTS contains a primary synchronization code codeword downlink synchronization code 54, SYNC-DL, of 64 chips length, which is used for cell identification and initial synchronization establishment. The uplink pilot timeslot UpPTS contains a downlink synchronization code 55SYNC-UL of 128 chips.
The preferred embodiment of the present invention will be described in detail in connection with an automatic frequency control application at a user terminal (UE) in a TD-SCDMA system. The reason why the user terminal is selected instead of the base station (base station) is that in consideration of economic factors, the frequency stability of the local oscillator adopted at the user terminal is generally poor (e.g., 3-13 ppm), so the problem of frequency synchronization at the user terminal has a greater challenge.
The automatic frequency control procedure, and particularly the initial frequency synchronization procedure (convergence procedure) thereof, is closely coupled to the initial downlink synchronization procedure of the user terminal. An Initial downlink synchronization process of a ue, also referred to as an Initial Cell Search (Initial Cell Search) process, includes a series of sub-processes of frame synchronization, code synchronization, Multi-frame (Multi-frame) synchronization, and frequency synchronization. Therefore, the automatic frequency correction procedure of the user terminal in TD-SCDMA system will be described herein in connection with its initial cell search procedure.
According to the relevant definitions in 3GPP specification TS 25.224(Release 4) or CWTS specification TSM 05.08(Release 3), the initial cell search procedure in TD-SCDMA system can be divided into the following four steps:
first Step1(DwPTS search): after the correlation processing or the similar processing is carried out on the total 32 SYNC-DL code words and the received signal sequence, the synchronization information of the DwPTS time slot is obtained, and the SYNC-DL code word with the strongest signal is detected;
second Step 2 (scrambling and Midamble code detection): after obtaining the DwPTS position information, the user equipment can receive the Midamble partial reception signal on the P-CCPCH channel on TS0 according to the TD-SCDMA frame structure. Since each SYNC-DL codeword corresponds to a code group (CodeGroup) and includes 4 candidate Midamble codewords, which Midamble codeword is adopted by the system can be detected by correlating the 4 candidate codewords with the received signal of Midamble portion on TS0 or the like; because the Scrambling Code (Scrambling Code) and the Midamble Code have a one-to-one correspondence relationship, the Scrambling Code can be obtained at the same time;
third Step3 (control multiframe synchronization): in the TD-SCDMA system, QPSK four-phase modulation is carried out on SYNC-DL codes, and the start of a control multiframe is determined according to a modulation phase pattern on SYNC-DL in continuous four frames. The user terminal determines control multiframe synchronization by detecting a modulation phase pattern on SYNC-DL;
fourth Step 4 (reading BCCH information): after the control multiframe synchronization is obtained, the BCCH system broadcast messages on the frames can be known; the user terminal demodulates (demodulating) and decodes (Decoding) the received data on the P-CCPCH of the frames, and then performs CYCLIC REDUNDANCY CHECK (CRC CHECK); if the check is passed, the block BCCH information is considered valid and passed to the higher layer, and the initial cell procedure is successfully ended.
As will be described below, according to the present invention, the automatic frequency correction process is performed across the entire initial cell search process, and the influence of the frequency offset on each cell search step is reduced to the maximum extent, so that the frequency synchronization is completed while the cell search success probability is increased and the total search time is reduced.
Fig. 6 is a flow chart illustrating a method for performing automatic frequency correction during initial cell search in a TD-SCDMA system according to the present invention. It is assumed here that the frequency deviation of the local oscillator of the user terminal from the oscillator of the base station is large, for example higher than 3ppm (in the 2GHz carrier band, this corresponds to an initial frequency deviation higher than ± 6 kHz). In this case, since the initial large frequency offset may exceed the maximum frequency estimation range of the fine frequency correction process, the coarse frequency correction process needs to be performed first, and the coarse frequency adjustment process needs to be performed first.
Referring to fig. 6, first, the ue performs the initial cell search first Step 1. Since the initial frequency offset of the local oscillator may be relatively large, a Partial Correlation (Partial Correlation) technique or the like may be adopted in the first Step1 to resist the influence of the large frequency offset (e.g., a frequency offset greater than 3 ppm). After the first Step1 is finished, the user terminal obtains the DwPTS position synchronization information and the SYNC-DL code word information. According to the present invention, the first stage of AFC, i.e., the coarse frequency correction process, will start immediately after the end of the first Step 1. The rough frequency correction algorithm and the device take SYNC-DL code words detected by using the Step1 of the first Step as training sequences by receiving continuous NAFC1The SYNC-DL data (and its surrounding data) on the frame is followed by frequency offset estimation and related frequency control. By the rough frequency correction method and the rough frequency correction device, the parameter N is adopted near the working point of various channel propagation conditionsAFC1The recommended value of (2) is 5 to 10, and the frequency deviation can be controlled within about +/-2 kHz (+/-1 ppm). The determination of the target value is determined by the operations involved in the second Step 2: if a full correlation (FullCorrelation) method is adopted when carrying out Midamble code word correlation in Step 2, the maximum frequency offset required by the method is about 1 ppm; otherwise, the second Step 2 must use partial correlation or similar methods to resist the effect of large frequency offsets — related simulations show that under the same conditions, the degradation of these methods is around 2dB and will further affect the performance of the whole initial cell search compared to when full correlation methods are used with small frequency offsets. Therefore, when the initial frequency offset is large, for example, higher than 1ppm, it is reasonable and necessary to perform a coarse frequency correction between the first Step1 and the second Step 2.
After the coarse frequency correction process is completed, the initial cell search Step 2 starts to detect the Midamble code. If the second Step 2 detection is successful, the second phase of the AFC, i.e., the fine frequency correction process, starts immediately after the second Step 2 ends. The fine frequency correction process uses the Midamble code word detected in the second Step 2 as a training sequence, and performs frequency offset estimation and related frequency control processes frame by receiving Midamble partial data of the P-CCPCH channel on TS0, so that the frequency offset gradually converges to the range required by the specification (e.g., ± 0.1 ppm). Although the SYNC-DL codeword is also used as the training sequence, the length (64 chip length) of the SYNC-DL codeword is less than half of the length (144 chips) of the Midamble codeword, so the frequency offset estimation accuracy obtained based on the SYNC-DL is much lower than that obtained based on the Midamble; in other words, even if the SYNC-DL part is used for frequency control at the same time, the resulting additional gain is small compared to using only the Midamble reception part. Therefore, it is proposed here to use only the Midamble part on TS0 for fine frequency correction.
Fine frequency correction requires a total of processing NAFC2The frame completes the basic convergence process. By the fine frequency correction method and the fine frequency correction device, the parameter N is adopted near the working point of various channel propagation conditionsAFC2The value is between 10 and 15, so that the expected frequency deviation can be controlled within +/-200 Hz (+/-0.1 ppm) according to a larger probability. The target value is determined by relevant TD-SCDMA specifications, on the other hand, the maximum frequency offset required by the Step3 algorithm is about 200-300 Hz, otherwise, the detection of the modulation phase on SYNC-DL is unreliable because the large phase rotation is generated from the Midamble part on TS0 to the SYNC-DL part on DwPTS due to the influence of the frequency offset. Performing N in a fine frequency correction processAFC2After the frame, the third Step3 of initial cell search starts to work, namely, the detection of the SYNC-DL code modulation phase pattern is completed, and the synchronization of the control multiframe is realized. During the third Step, Step3, the fine frequency correction process continues, ensuring that the frequency offset is controlled within the target range and tracking frequency drifts that may be caused by other environmental factors.
It should be noted that if the user terminal uses a local oscillator with better frequency stability, for example, the initial frequency offset is less than ± 1ppm, the coarse frequency correction procedure is not necessary. It is anticipated that as technology continues to evolve, the frequency stability of the local oscillator will also continue to increase, in which case only the fine frequency correction process described is necessary. In this case, the first Step1 before the fine frequency correction Step may be a training sequence acquisition Step, in which the receiver knows a data sequence pattern by performing a cell search, or by a system notification, and the like, and the data sequence pattern appears in a certain manner, for example, periodically, in the received signal.
However, in the currently available techniques, the frequency stability of the local oscillator typically used in the user terminal is not good for economic reasons, and the initial frequency offset is typically around 2.5ppm or higher, for example. On the other hand, as mentioned above, in the second Step 2 of cell search in TD-SCDMA system, in order to achieve better performance by using the full correlation method, the maximum frequency deviation is also required to be controlled to be, for example, about ± 1 ppm. At this time, it is still recommended to perform a frequency coarse tuning process of the local oscillator once by using the coarse frequency correction method, so that the maximum frequency deviation is controlled to be, for example, about ± 1ppm, which is beneficial to improve the performance of the whole cell search.
Fig. 7 shows a flow chart of a method for coarse frequency correction in a TD-SCDMA system according to the present invention. Fig. 8 is a block diagram of an apparatus for implementing coarse frequency correction in a TD-SCDMA system according to the present invention. A method for implementing coarse frequency correction in TD-SCDMA system and a corresponding apparatus thereof according to the present invention will be described with reference to fig. 7 and 8. Refer to fig. 7 and 8. First, corresponding to step 700, a frame counter m is set to 1. Next, in step 701, the ue receives a training sequence, such as SYNC-DL, and its neighboring data in the "search window" through the signal data extractor 800. Wherein, according to the DwPTS position given by the initial cell search first Step1, the received SYNC-DL data samples with a length of, for example, 64 chips can be obtained. However, it is also necessary to receive data samples within several chips before and after the SYNC-DL part due to the following considerations:
(1) the DwPTS position synchronization information provided in the first Step1 may not be very accurate, and there may be synchronization deviation within a range of several chips; at this time, a so-called "search window" needs to be established near the SYNC-DL synchronization point to solve the possible synchronization deviation problem;
(2) for fast multipath fading channels, the strength of each path changes faster, and there is a possibility that the (strongest) path detected in the previous first Step1 has faded away, while other new strong paths appear nearby; at this time, a "search window" is also needed to be established to capture the strong paths that may occur near the SYNC-DL synchronization point, so as to ensure the AFC performance.
Typically, the search window should contain the sampled data in L chips before the SYNC-DL part and R chips after the SYNC-DL part, thus, in total, containing the data samples in L + R +64 chips. Since oversampling at, for example, 2 times the speed is proposed to solve the sampling time offset problem, a total of 2x (L + R +64) data samples are received. The parameters L and R are integers greater than or equal to zero, and their values are determined by system design, actual working environment, and other factors, and the recommended value is L ═ R ═ 16.
Next, corresponding to step 702, the 2x (L + R +64) data samples are sequentially sent to the sliding correlator 801 shown in FIG. 2, wherein the correlation length is the length of SYNC-DL code word, i.e. 64. This results in a total of 2 (L + R +1) batches of sliding correlation outputs, where each batch contains 64 multiplication results. The 2 (L + R +1) sets of sliding correlation outputs are sequentially fed into the frequency offset estimator 802 and the corresponding phase offset estimation sequence is obtained. The frequency offset estimator 802 may adopt a structure as shown in fig. 3 or fig. 4 (N ═ 64), or adopt another frequency offset estimator implemented based on a correlation method.
In output order, all 2 × (L + R +1) phase offset estimates constitute a phase offset estimation sequence containing 2 × (L + R + 1). For convenience of description, the phase offset estimation sequence is recorded as
Where the superscript indicates that the sequence is derived based on the received data in the mth frame.
Next, the phase offset estimation sequence calculated in the mth frame is stored in a
memory 803, corresponding to step 703. Then, step 704 increments the frame counter M, and step 705 determines whether the data in M frames has been processed: if condition m>If M is false, the procedure returns to step 701 to continue processing the related data in the next frame; on the contrary, if the condition m>M is true indicating that the data in the frame has been processed, at which point M sets of phase offset estimation sequences have been stored in the
memory 803
Wherein M is 1, 2, …, M. In the corresponding arrangement shown in fig. 8, this determination is used to control a switch 804: the switch is initially open until it is closed after processing M frames of data so that the
multi-frame combiner 805 can read the phase offset estimation sequence from the
memory 803.
After processing the data in the frame, corresponding to step 706, the multi-frame combiner 805 combines the phase offset estimation sequences in M frames read from the memory 803 in a certain manner to obtain a combined phase offset estimation sequence q of 2 × (L + R +64) for one multi-frame: { q ] q1,q2,…,q2×(L+R+1)}. The merging mode can be various modes, including:
(1) adding directly. That is, the values corresponding to the same position in all M phase offset estimation sequences are added in sequence, and the formula can be expressed as follows:
<math> <mrow> <msub> <mi>q</mi> <mi>k</mi> </msub> <mo>=</mo> <munderover> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>M</mi> </munderover> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>,</mo> </mrow></math>
for k ═ 1, 2, …, 2 × (L + R +1)
(2) The combining is performed according to the "majority notation criterion". I.e. for a total of M phase shift estimates at each position k ( k 1, 2, …, 2x (L + R +1))(M-1, 2, …, M), discarding phase offset estimates where the phase value signs are inconsistent with most of the M values, and adding the remaining phase offset estimates. To achieve this, first, a majority of phase value symbols s are obtained for each position k ( k 1, 2, …, 2 × (L + R +1))k:
<math> <mrow> <msub> <mi>s</mi> <mi>k</mi> </msub> <mo>=</mo> <mi>sgn</mi> <mrow> <mo>(</mo> <munderover> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>M</mi> </munderover> <mi>sgn</mi> <mrow> <mo>{</mo> <mi>arg</mi> <mrow> <mo>(</mo> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>)</mo> </mrow> <mo>}</mo> </mrow> <mo>)</mo> </mrow> </mrow></math>
Wherein the function arg represents the operation of taking the phase value of the complex value, whose value range is [ -pi, pi); the function sgn represents the operation that signs the real operand, i.e.:
then, the following frame number set S is obtained corresponding to each position kk:
And finally, carrying out multi-frame combination according to the following formula to obtain a sequence q:
<math> <mrow> <msub> <mi>q</mi> <mi>k</mi> </msub> <mo>=</mo> <munder> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>∈</mo> <msub> <mi>S</mi> <mi>k</mi> </msub> </mrow> </munder> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> </mrow></math>
for k ═ 1, 2, …, 2x (L + R +1)
(3) And combining according to a weighting method. I.e. shifting each phase by an estimated value
Weighted and then accumulated, e.g. by selecting the corresponding weight
Is composed of
The modulus value of (a) is:
then, combining according to the following formula to obtain a sequence q:
<math> <mrow> <msub> <mi>q</mi> <mi>k</mi> </msub> <mo>=</mo> <munderover> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>M</mi> </munderover> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>×</mo> <msubsup> <mi>w</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>,</mo> </mrow></math>
for k ═ 1, 2, …, 2 × (L + R +1)
Wherein the symbol "| · |" represents a modulo operation.
(4) And merging according to the comparison result with a certain threshold. Firstly, in M frames obtained by calculationMean value c of the modulus values of the phase offset estimate at all positionsavg:
<math> <mrow> <msub> <mi>c</mi> <mi>avg</mi> </msub> <mo>=</mo> <munderover> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>=</mo> <mn>1</mn> </mrow> <mi>M</mi> </munderover> <munderover> <mi>Σ</mi> <mrow> <mi>k</mi> <mo>=</mo> <mn>1</mn> </mrow> <mrow> <mn>2</mn> <mo>×</mo> <mrow> <mo>(</mo> <mi>L</mi> <mo>+</mo> <mi>R</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </munderover> <mrow> <mo>|</mo> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>|</mo> </mrow> </mrow></math>
Then, at cavgMultiplying by a predetermined parameter T on the basiscObtain the threshold value cavg·TcAnd corresponding to each position k, obtaining the following frame number set Rk:
<math> <mrow> <msub> <mi>R</mi> <mi>k</mi> </msub> <mo>=</mo> <mrow> <mo>{</mo> <mi>m</mi> <mo>|</mo> <mrow> <mo>|</mo> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> <mo>|</mo> </mrow> <mo>></mo> <msub> <mi>c</mi> <mi>avg</mi> </msub> <mo>·</mo> <msub> <mi>T</mi> <mi>c</mi> </msub> <mo>}</mo> </mrow> </mrow></math>
And finally, carrying out multi-frame combination according to the following formula to obtain a sequence q:
<math> <mrow> <msub> <mi>q</mi> <mi>k</mi> </msub> <mo>=</mo> <munder> <mi>Σ</mi> <mrow> <mi>m</mi> <mo>∈</mo> <msub> <mi>R</mi> <mi>k</mi> </msub> </mrow> </munder> <msubsup> <mi>c</mi> <mi>k</mi> <mi>m</mi> </msubsup> </mrow></math>
for k ═ 1, 2, …, 2 × (L + R +1)
Parameter T herecBeing a positive real number, e.g. preferably Tc=2。
In the above merging methods (2) to (4), various special methods are used to enhance the accuracy of the merged multiple frames and avoid the possible adverse effect of some erroneous phase offset estimation in a certain frame on the accuracy of the estimation result of the merged multiple frames. The erroneous phase offset estimate may be due to when the SINR is too low or in a deep fading condition. Of course, even with the simplest combining method (1), i.e., the direct addition method, generally better estimation performance can be obtained.
Next, corresponding to step 707, a delay envelope in the search window is calculated according to the phase offset estimation sequence obtained by combining the multiple frames. The delay envelope is obtained by another modulo-value calculator 806 by modulo the elements of the input sequence q sequentially, using another sequence d of length 2 × (L + R + 1):
{d1,d2,…,d2×(L+R+1)denotes the delay envelope, then:
dk=|qkfor k ═ 1, 2, …, 2 × (L + R +1)
Then, corresponding to step 708, a path selection process is performed based on the delay envelope. First, the maximum value P in the delay envelopemaxAnd mean value PmeanCalculated by a maximum and mean calculator 807To, in which <math> <mrow> <msub> <mi>R</mi> <mi>max</mi> </msub> <mo>=</mo> <munder> <mi>max</mi> <mrow> <mn>1</mn> <mo>≤</mo> <mi>k</mi> <mo>≤</mo> <mn>2</mn> <mo>×</mo> <mrow> <mo>(</mo> <mi>L</mi> <mo>+</mo> <mi>R</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </munder> <mrow> <mo>{</mo> <msub> <mi>d</mi> <mi>k</mi> </msub> <mo>}</mo> </mrow> </mrow></math>
<math> <mrow> <msub> <mi>P</mi> <mi>mean</mi> </msub> <mo>=</mo> <mfrac> <mn>1</mn> <mrow> <mn>2</mn> <mo>×</mo> <mrow> <mo>(</mo> <mi>L</mi> <mo>+</mo> <mi>R</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </mfrac> <munderover> <mi>Σ</mi> <mrow> <mi>k</mi> <mo>=</mo> <mn>1</mn> </mrow> <mrow> <mn>2</mn> <mo>×</mo> <mrow> <mo>(</mo> <mi>L</mi> <mo>+</mo> <mi>R</mi> <mo>+</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </munderover> <msub> <mi>d</mi> <mi>k</mi> </msub> </mrow></math>
Then, based on PmaxAnd PmeanAnd two other parameters T1And T2The path selection step 708 and its corresponding path selector 808 will find a threshold TPSIt can be expressed as:
TPS=max{Pmax-T1,Pmean+T2}
two of which are parameters T1And T2For binding PmaxAnd PmcanTo determine the threshold value TPSThey are both greater than 0, note that here they are all in dB. T is1And T2Should be determined according to design requirements and other settings of relevant parameter values. For example, when setting the L-R-16 parameters and combining the parameters by using the majority notation criterion, the recommended parameter T is1And T2Is set as follows: t is16dB and T2=6dB。
Referring to fig. 9, a method for path selection during coarse frequency correction according to the present invention is shown. The path selection step 708 and the corresponding path selector 808 are implemented by comparing the delay envelope sequence d with a threshold TPSTo perform path selection, i.e. only at tap d in the delay envelopekGreater than TPSThen, the corresponding path is selected, so as to obtain a set of valid path positions S, which can be expressed as:
S={k|dk>TPS,1≤k≤2×(L+R+1)}
note that if the valid path position set S obtained by the above method is found to be an empty set, the position of the path corresponding to the maximum value in the delay envelope is added to the set S.
On the other hand, the limitation on the maximum number of selection paths may be further: if the number of paths contained in the set S is greater than a parameter LPThen only d therein is retainedkL with the largest valuepA strip path; otherwise the set S remains unchanged. After this processing, the number of paths included in the set S is at most LpAnd (3) strips. Here, the parameter is a positive integer, and L is recommendedpThe value is between 2 and 6. Parameter LpShould be determined according to specific implementation and design goals.
As a special case, the path corresponding to the maximum value in the delay envelope can be simply taken as the output of the path selection(i.e., L)P1) the relevant simulations show that good performance can be obtained also in this special case.
Next, in step 709, the phase offset estimation combiner 809 combines the phase offset estimation values on the selected path to obtain a phase offset estimation mark q after multipath combinationcombIt can be expressed as:
<math> <mrow> <msub> <mi>q</mi> <mi>comb</mi> </msub> <mo>=</mo> <munder> <mi>Σ</mi> <mrow> <mi>k</mi> <mo>∈</mo> <mi>S</mi> </mrow> </munder> <msub> <mi>q</mi> <mi>k</mi> </msub> </mrow></math>
next, corresponding to step 710, a frequency offset estimate is derived from the multipath combined phase offset estimate, which is extracted by the phase extractor 810 as a phase offset estimate qcombThen passes through the multiplier 811 and a constant KFOEMultiplying to obtain the final frequency offset estimation value FOestIt can be expressed as:
FOest=arg(qcomb)×KFOE
wherein the function arg (-) represents the extraction phase operation, and KFOEThen the frequency offset estimation algorithm and the system chip width T are usedcThe decision is as described above.
Finally, corresponding to step 711, the frequency offset estimate FO is obtainedestAccording to the voltage-controlled characteristic of the local oscillator, the voltage is converted into a control voltage, and the local oscillator is controlled through the DAC, so that a coarse frequency correction process is completed.
According to the invention, because a search window is adopted to overcome the influence of synchronous deviation and multipath propagation, the frequency offset estimation performance under a fast fading channel is improved by weighting processing, and two modes of multi-frame combination and multipath combination are adopted to realize time diversity and multipath diversity, the rough frequency correction method and the rough frequency correction device provided by the invention can keep good performance under various severe mobile communication channel propagation conditions so as to ensure the normal work of a related module in a receiver.
Fig. 10 is a block diagram of fine frequency correction in a TD-SCDMA system according to the present invention. The fine frequency correction process is implemented by a first order loop based on Kalman filter theory. First, a received rf signal is converted into a digital baseband signal through a down-conversion demodulator 1010 and an ADC, AGC, and RRC filter, and then a signal data extractor 1011 extracts sampling data in a Midamble receiving portion with a length of 144 chips in a P-CCPCH channel on TS0 according to frame synchronization information, and extracts 144 × 2 ═ 288 Midamble data samples corresponding to a 2-time oversampling situation. The segment of data samples plays an important role in system synchronization and is used in the channel estimation, path search, SINR estimation and frequency offset estimation modules. A corresponding Midamble training sequence of length 144 is generated by Midamble codeword generator 1012, whose codeword index is detected by the second Step 2 of the previous initial cell search.
The section of Midamble data samples is then fed into channel estimation and path searcher 1013. The module obtains a set of channel estimates by (cyclic) correlating Midamble data samples with corresponding Midamble training sequences. Note that since the coarse frequency correction procedure implemented according to the present invention already controls the frequency offset to be small, the correlation operation in the channel estimation can be guaranteed to be in a fully correlated manner (corresponding to a partially correlated manner), which improves the estimation accuracy of the channel estimation module. The power value of the channel estimation value calculated in the current frame forms a Delay envelope (Delay Profile) of the current frame, and the path search is to determine which paths are effective paths according to the Delay envelope of the current frame and the Delay envelopes of a plurality of previous frames and according to some preset thresholds and the current maximum path power and the average noise power. Note that since 2 times sampling is used, the resolution accuracy of the path is 1/2 chips wide. Since channel estimation and path search are widely used in various wireless communication systems, particularly in mobile communication systems, related algorithms and implementation methods thereof are well known to those skilled in the art, and thus will not be described herein in detail. Here, the channel estimation will output the amplitude and phase values of all paths within a so-called "channel estimation window", for example, the channel estimation window width may be set to 16 chips, corresponding to 2 times oversampling, and the estimation window generates 16 × 2 — 32 paths together. Wherein each path represents a Delay Tap (Delay Tap). Meanwhile, the channel estimation also outputs all channel estimation values outside a channel estimation window in the correlation length, and the channel estimation values are provided for the measurement modules and the like to be used when parameters such as SINR and the like are estimated. On the other hand, the path searching module outputs the position information of the effective path in the channel estimation window. It is assumed here that the path search module generates at most L pieces of valid path location information. Other modules in the receiver, including a Demodulation (Demodulation) module, a Synchronization (Synchronization) module, and a Measurement (Measurement) module, will use the valid path location information and the channel estimation value to do related work.
Referring again to fig. 10, a path Combining and correlator (module) 1014 performs Combining of multiple paths in a Maximum Ratio Combining (MRC) manner using the path information and corresponding channel estimation values. Fig. 11 is a block diagram of an apparatus for path merging during fine frequency correction as shown in fig. 10 according to the present invention, which performs path merging by using the following method:
(a) a group of sampling values of a receiving signal corresponding to a training sequence pass through a group of delayers to obtain a group of data sequences, wherein the delay value of the delayer is determined by path position information generated by a path searching module;
(b) deleting a plurality of data of the head part of the batch of data sequences obtained in the step (a) after a batch of deleters to obtain a batch of new data sequences, wherein the length of the new data sequences is equal to the length of the training sequence multiplied by the oversampling multiple;
(c) passing a batch of data sequences obtained in the step (b) through a batch of downsamplers to obtain another batch of data sequences, wherein the lengths of the data sequences are equal to the length of the training sequence;
(d) multiplying a batch of data sequences obtained in the step (c) by conjugate values of channel estimation values of corresponding paths, and then adding element by element, namely obtaining a data sequence in a maximum proportion combining mode, wherein the length of the data sequence is equal to that of a training sequence;
(e) and (d) multiplying the data sequence obtained in the step (d) by the conjugate of the code word of the training sequence element by element to obtain a new data sequence as an output, wherein the length of the new data sequence is equal to that of the training sequence.
According to the method described above, the block performs chip level combining using a structure similar to a RAKE receiver. The input to this block is 288 Midamble data samples, which will first pass through a set of delays 11011-1101L. Therein, a delayer 1101kCorresponding to the k path with the time delay value of Tmax-1-Tk(in units of sampling intervals, i.e., 1/2 chips) is the kth path position information T generated by the path search modulekPasses through a subtractor 1102kAnd then produced. Wherein the first path is generally the first path in the channel estimation window, and its relative delay T10 and the relative delay of the other paths satisfies 1<Tk<=Tmax-1 (for 2 ═ 1<k<L); wherein T ismaxIt represents the width of the channel estimation window, which is also in units of sampling intervals (i.e., 1/2 chips), e.g., T may be takenmax2 × 16-32, corresponding to 16 chip widths. The purpose of this set of delays is to "align" the data on each path again based on the path location information. The output of each delay is 288+ T max1 sample, noting that due to the effect of the delay, the beginning and end of the delayed data generated on each path may need to be zero-padded. Then, the L sets of the heads T of the outputs of the delayersmax-1 data pass through respectivelyErasure 11031-1103LDeleted leaving L batches of 288 samples long data. Then, through a batch of 2-fold down-samplers 11041-1104LThe odd number of data in each batch of data requires sampling data, i.e., 144 samples of data1, 3, 5,. 287, are retained, and the rest are discarded. Then, the L data are respectively passed through the multiplier 11051-1105LMultiplying by a batch of weighting factors; wherein, the weighting factor h of the kth pathTk *Is the relative position T resulting from the channel estimationkThe channel estimate h on that pathTkThrough a choke 1106kAnd (4) the final product. Then, all the L batches of weighted data are combined by adder 1107 to obtain a group of sequences containing 144 data samples. Finally, the data sample sequence and 144-long Midamble training sequence conjugated by the conjugation 1109 are multiplied element by a multiplier 1108 to finally obtain 144-long correlation outputs.
Another apparatus for implementing path merging and correlation is shown in fig. 12. The method comprises the following steps:
(a) separating the path location information generated from the path search module by parity; meanwhile, separating the channel estimation values on the path positions according to the parity of the path positions;
(b) the training sequence code words pass through a batch of delayers to obtain a batch of data sequences; the delay values of the delayers are respectively determined by odd position paths;
(c) multiplying the data sequences obtained in the step (b) by the channel estimation values of the corresponding paths respectively to obtain a new data sequence;
(d) adding the data sequences obtained in the step (c) element by element to obtain a new data sequence;
(e) deleting a plurality of data at the tail part of the data sequence obtained in the step (d) by a deleter, and obtaining a new data sequence after conjugation, wherein the length of the new data sequence is equal to that of the training sequence;
(f) the training sequence code words pass through a batch of delayers to obtain a batch of data sequences; the delay values of the delayers are respectively determined by even position paths;
(g) repeating the steps (c) to (e) on a batch of data sequences obtained in the step (f) to obtain another new data sequence with the length equal to that of the training sequence;
(h) the signal sampling value of the received corresponding training sequence is processed by a splitter according to the odd-even sequence number to obtain two data sequences, and the lengths of the two data sequences are equal to the length of the training sequence;
(i) respectively multiplying the two data sequences corresponding to the parity numbers obtained in the step (h) by the two data sequences obtained in the step (e) and the step (g) element by element to obtain two new data sequences;
(j) (ii) adding the two sequences obtained in step (i) element by element to obtain a new data sequence as output, wherein the length of the new data sequence is equal to that of the training sequence.
According to the above method, referring to fig. 12, first, a Midamble part with a length of 288 is inputted to receive data samples, and is divided into two sequences with a length of 144 according to odd and even serial numbers through a
splitter 1200. Meanwhile, there are L pieces of path position information { T) from the channel estimation and path searcher
1,T
2,...,T
L}(0=<T
k<=T
max-1) divided into two paths by parity through a
separator 1201, denoted as { T } respectively
odd,1,T
odd,2,...,T
odd,L1And { T }
even,1,T
even,2,...,T
even,L2L1 and L2 are the number of paths whose position values are odd and even, respectively. Accordingly, the input channel estimation result h
T1,h
T2,...,h
TLThe parity of the corresponding path position is also divided into two paths: { h
Todd,1,h
Todd,2,...,h
Todd,L1H and
Teven,1,h
Teven,2,...,h
Teven,L2}. Then, 144 Midamble input data are passed through a batch delay 1202
1-1202
L1And a set of multipliers 1203
1-1203
L1And through an
accumulator 1206
1After all additions, a Convolution (Convolution) process with the odd-position path channel estimation sequence is implemented. Note that here the delayer delays the control parameter T for the input
kWill delay the input data
Data unit (symbol therein)
Representing a rounding operation) and zero padding, if necessary, at the head end and the tail end, to make the output data segment length equal to
To align the data paths. Thus,
accumulator 1206
1The output is of length
Is passed through a
remover 1207
1Delete its last
After one data, a data sequence with the length of 144 is left; the sequence then passes through a
conjugator 1208
1After conjugation, the result is passed through a
multiplier 1209
1Element-by-element multiplication is performed on the odd numbered data samples output by
splitter 1200 to obtain a set of 144-length correlated data outputs derived from the odd position path channel estimation. Similarly, by a bank of delays 1204
1-1204
L1A set of multipliers 1205
1-1205
L1 An accumulator 1206
2 Erasure device 1207
2And a
choke 1208
2And passed through
multiplier 1209
2The even numbered data samples output by the
splitter 1200 are multiplied element by element to obtain another set of correlation data output with
length 144 corresponding to the even position path channel estimation. Finally, the two paths are respectively corresponding to odd number position path channels and even number position path channelsThe estimated correlation data are summed by
summer 1210 to obtain a correlation output of
length 144.
Then, referring to fig. 10, the batch of multipath combined Midamble received data and the locally generated Midamble code word are fed into the frequency offset estimator 1015, and the frequency offset estimate is output
. The frequency offset estimator (N144) of fig. 3 or fig. 4, or other types of frequency offset estimators, may be selected here according to implementation constraints and design requirements. Wherein the
extraction phaser 34 or 46 may be simplified as follows. For the input phase offset estimate c ═ c
real+j*c
imagThe conventional method is as follows:
<math> <mrow> <mi>θ</mi> <mo>=</mo> <mi>arctan</mi> <mrow> <mo>(</mo> <mfrac> <msub> <mi>c</mi> <mi>real</mi> </msub> <msub> <mi>c</mi> <mi>imag</mi> </msub> </mfrac> <mo>)</mo> </mrow> </mrow></math>
and obtaining the phase value according to a ten thousand method such as table lookup. However, when creal/cimagWhen the value is small, only the first term in the above Taylor-series expansion can be taken as an approximation, that is:
<math> <mrow> <mi>θ</mi> <mo>≈</mo> <mrow> <mo>(</mo> <mfrac> <msub> <mi>c</mi> <mi>real</mi> </msub> <msub> <mi>c</mi> <mi>imag</mi> </msub> </mfrac> <mo>)</mo> </mrow> <mo>,</mo> </mrow></math>
if it is not <math> <mrow> <mfrac> <msub> <mi>c</mi> <mi>real</mi> </msub> <msub> <mi>c</mi> <mi>imag</mi> </msub> </mfrac> <mo>≤</mo> <mi>λ</mi> </mrow></math>
Wherein, crealA purchase unit for phase estimation values; c. CimagThe imaginary part of the phase estimate.
For both frequency offset estimator configurations shown in fig. 3 and 4, the recommended values of λ are 1.0 and 0.5 (corresponding to frequency offset values of 5.66kHz and 5.58kHz, respectively). On the other hand, if c is calculatedreal/cimagAnd when the value is larger than the lambda, directly setting the value of the output phase estimation theta as lambda. Simulations show that this simplification has little effect on AFC performance. By adopting the method, the phase estimation value can be approximately obtained only by adopting one division operation and one comparison operation, and the complexity and the storage capacity of the method are much simpler than those of the method for directly calculating the arctan function arctan.
It is to be noted that here the multipath combining is performed before the frequency offset estimation. In many other AFC methods and devices, the order of the two is often reversed. For example, in european patent EP1300962 entitled "Automatic Frequency correction apparatus and Automatic Frequency correction Method" (Automatic Frequency Control Device and Automatic Frequency Control Method), Frequency offset estimation is performed on each path separately, and then combined in a maximum ratio combining manner. In the invention, because the multipath combination is carried out before the frequency offset estimation, the invention only needs to carry out the frequency offset estimation once; according to the above cited invention, the frequency offset estimation needs to be performed a number of times, which is equal to the number of paths, and thus the complexity is much higher than that of the corresponding structure in the present invention. On the other hand, relevant simulations show that the performances achieved by these two structures are very close.
Referring to fig. 10, the path information and the channel estimation result output from the channel estimation and path searcher 1013 are fed to the SINR estimator module 1016 to generate the SINR estimation value of the current frame. The SINR estimator also derives an SINR estimate for the current frame based on the Midamble code in the P-CCPCH channel at TS 0. Fig. 13 is a flowchart illustrating a method of SINR estimation using channel estimation and path search results in the fine frequency correction process shown in fig. 10 according to the present invention. In step 130, the SINR estimator adds the powers of the channel estimation values of the current frame on the paths according to the effective path location information provided by the path search module, so as to obtain a signal power estimation value S. On the other hand, in step 131, based on the noise path position information (i.e. all non-effective paths in the correlation window) provided by the path search module, the SINR estimator adds the powers of the channel estimation values of the current frame on these paths, so as to obtain the interference and noise power estimation value N. Finally, in step 132, the SINR estimate for the current frame is calculated as follows:
SINRk=S/N/D
wherein, D represents the 'channel estimation correlation length', which represents the length of the training sequence adopted when the channel estimation is carried out; for the preferred embodiment described herein, i.e. the case in TD-SCDMA systems, this value may be equal to 128-since the channel estimation uses data samples within the last 128 chips of 144-chip Midamble data, and the SINR value to be estimated is the ratio of the received power within each chip to the power spectral density of the in-band interference noise. Variable SINRkThe index k of (a) represents that this is the SINR estimate obtained in the kth frame.
Fig. 14 shows a flow chart of another method of SINR estimation during fine frequency correction as shown in fig. 10 according to the present invention. Referring to fig. 14, the input of the SINR estimation method is from intermediate output points a to F in the block diagram of the path merging and correlation apparatus shown in fig. 12. Wherein the data from points a and B are the channel results on the odd and even position active paths, respectively, which pass through the signal power calculator 1421And 1422Then, the signal power value S1 and the signal on the effective path corresponding to the odd and even positions are obtainedThe power value S2. The signal power calculator 1421-2The corresponding signal power can be obtained by summing the power values of all its input channel estimates. On the other hand, the input from each point C to F in fig. 12 is a data sequence with length 144 obtained in each frame, wherein the output sequences obtained by convolving the training sequence with the odd-numbered and even-numbered position path estimates respectively are respectively obtained at point C and point E; while points D and F are two corresponding receive sequences obtained after passing through the separator 1201. Referring to fig. 14, the data sequence from point C and the data sequence from point D pass through a subtractor 1411Then, the difference sequence passes through the noise power calculator 1431Then, calculating to obtain a noise power value N1; similarly, the data sequence from point E and the data sequence from point F are passed through a subtractor 1412Then, the difference sequence passes through the noise power calculator 1432Thereafter, a noise power value N2 is calculated. The noise power calculator 1431-2The corresponding noise power can be obtained by calculating the average power value of its input data sequence. Finally, the signal power values S1 and S2 and the noise power values N1 and N2 are combined by the combiner 144 to obtain an SINR estimate output of the current frame. The combiner 144 may adopt one of the following combining methods:
(1) the merging method 1:
(2) the merging method 2:
(3) the merging method 3:
(wherein the symbol MAX represents the operation of maximum value)
Referring to fig. 10, the Kalman gain factor calculator 1017 updates the first-order loop gain factor using the SINR estimate of the current frame. The updated parameters include: measuring the noise variance RkEstimate variance PkAnd Kalman gain factor KkWhere the subscript k represents the sequence number of the current frame. FIG. 15 is a flow chart illustrating a method of Kalman gain factor calculation during fine frequency correction as shown in FIG. 10 in accordance with the present invention. In the initial state (i.e. before entering the fine frequency correction process), in step 1501, P0Is given an initial value, typically, P0Should be set according to the variance of the frequency offset before entering fine frequency correction. According to the invention, P0Should be determined based on the variance of the output frequency offset of the coarse frequency correction, the recommended value is P0=(2000)2(ii) a Furthermore, P0Or may be determined based on the SINR value measured at the time.
Next, the fine frequency correction means starts operating, and in step 1502, the initial value of the frame counter k is set to 1. Then, in step 1503, the frequency offset estimation variance R of the current framekSINR estimated value SINR based on current framekThe specific calculation formula is as follows:
<math> <mrow> <msub> <mi>R</mi> <mi>k</mi> </msub> <mo>=</mo> <msub> <mi>K</mi> <mi>R</mi> </msub> <mo>×</mo> <mfrac> <mn>1</mn> <msub> <mi>SINR</mi> <mi>k</mi> </msub> </mfrac> </mrow></math>
the formula is obtained for TD-SCDMA systems according to the improved Cramer-Rao bound, since relevant simulations show that the frequency offset estimator as shown in fig. 3 or fig. 4 can well approach this performance bound under medium or high SINR conditions. Wherein, according to the Cramer-Rao bound, the value of the constant KR is determined according to the related system parameters:
<math> <mrow> <msub> <mi>K</mi> <mi>R</mi> </msub> <mo>=</mo> <mfrac> <mn>3</mn> <mrow> <mn>2</mn> <msup> <mi>π</mi> <mn>2</mn> </msup> <msubsup> <mi>T</mi> <mi>c</mi> <mn>2</mn> </msubsup> </mrow> </mfrac> <mo>·</mo> <mfrac> <mn>1</mn> <mrow> <mi>N</mi> <mrow> <mo>(</mo> <msup> <mi>N</mi> <mn>2</mn> </msup> <mo>-</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow> </mfrac> </mrow></math>
wherein, TcRepresents the system chip width and N represents the length of the training sequence used. For TD-SCDMA systems, 1/TcK is obtained from the length N of the Midamble code word used, which is 1.28Mcps and 144R=(288.8)2. Specific information on The improved Cramer-Rao kingdom can be readily understood by one of ordinary skill in The art by reference to The paper entitled "The Modified Cramer-Rao Bound and Its Applications to synchronization Parameters", published by Anje (A.N.D.' Andrea) et al in The journal of IEEE Transaction on Communication, 1994.
Next, in step 1504, a Kalman gain factor KkR calculated from the current framekP calculated from previous framek-1Calculating, according to Kalman filtering theory, KkThe formula of (1) is:
Kk=Pk-1(Pk-1,+Rk)-1
next, in step 1505, the calculated K is determinedkWhether the value is less than a predetermined value KLOWIf K isk<KLOWProceed to step 1507 to change KkMake it equal to KLOWSimultaneously order Pk=Pk-1(ii) a On the contrary, if Kk>=KLOWThen go to step 1506 according to Kalman filtering theory
K calculated for current framekValue, and previous frame calculation results in Pk-1Value to calculate PkThe value:
Pk=(1-Kk)Pk-1
here, for KkThe purpose of the lower clipping is: when the loop gain is too small, it is difficult to track faster frequency drift; therefore, the loop gain K is requiredkThe lower clipping is performed to ensure that the upper frequency offset can be tracked. Recommended lower limit amplitude KLOWIs 1/64 or 1/128-KLOWThe preferred values of (a) should be determined by the particular implementation and operating environment.
Then, in step 1508, the Kalman gain factor K calculated for the current frame is outputkTo the loop filter. Next, in step 1509, the frame counter k is incremented by 1 in preparation for updating the parameters in the next frame.
Next, referring to FIG. 10, the first order loop filter 1018 will be based on the input
(frequency offset estimation of current frame calculation) and K
k(Kalman gain factor calculated by the current frame), first-order filtering is carried out, and the accumulated frequency offset estimation value of the current frame is output
Referring to fig. 16, there is shown a block diagram of an implementation structure of a first order loop filter in the fine frequency correction structure shown in fig. 10 according to the present invention. Wherein, input
Firstly, the Kalman gain factor K is calculated
kMultiplied by a
multiplier 161 and then multiplied by the output in the previous frame
The outputs obtained by adding up with an
adder 162 can be expressed as follows:
<math> <mrow> <msub> <mover> <mi>f</mi> <mo>^</mo> </mover> <mi>k</mi> </msub> <mo>=</mo> <msub> <mover> <mi>f</mi> <mo>^</mo> </mover> <mrow> <mi>k</mi> <mo>-</mo> <mn>1</mn> </mrow> </msub> <mo>+</mo> <msub> <mi>K</mi> <mi>k</mi> </msub> <mi>Δ</mi> <msub> <mover> <mi>f</mi> <mo>^</mo> </mover> <mi>k</mi> </msub> </mrow></math>
the function of the
delay 163 is to save the output of the current frame
And feedback is used in the next frame.
Alternatively, as a simplification, the loop gain may be fixed to some specified value, such as {1.0, 0.5, 0.1, 0.05, 0.01}, and the output K of the set closest to the Kalman gain factor calculator may be takenkAs the current frame control loop gain value. This simplifies the handling in question without a major loss of performance.
In addition, according to the estimated variance PkThe value of (2) can be used for judging whether the current AFC adjustment process is converged. Alternatively, the frequency offset estimates for the next few frames may be averaged, and then whether convergence is achieved may be determined based on the average. Because the Kalman filtering theory is adopted in the invention to adaptively adjust the gain of the loop filter, the method is different from some AFC methods which adopt convergence judgment resultsThe convergence determination step is not essential in the present invention since the gain of the loop filter is adjusted. However, as an alternative, the convergence determination method can be used to assist in determining whether the AFC loop has converged — if it is found within a certain time that the AFC loop has not yet reached convergence, the fine frequency correction method can be re-executed, or the previous synchronization steps can be re-executed (since the AFC loop does not converge and possibly because of errors in the synchronization information or training sequence input by other modules in the receiver).
Finally, referring to fig. 10, the output of the first-order loop filter 1018 is converted into a control voltage according to the voltage control characteristic of the local oscillator 1019, and the local voltage controlled oscillator 1019 is controlled through the DAC, thereby completing the fine frequency correction process within the current frame. In the next frame, the fine frequency correction process described above will be repeated. Thus, as the number of processing frames increases, the output control of the loop filter is continuously updated and the output carrier frequency of 1019 of the local oscillator is made to increase
The actual carrier frequency fk of the input signal is continuously approximated and the difference between them, i.e. the residual frequency offset value, is brought to a target value (e.g. 0.1ppm or less as specified by the specifications) that ensures proper operation of the other modules in the receiver.
The invention adopts an optimal estimator, namely a Kalman filter to realize a first-order loop structure of fine frequency correction, so that the invention can keep excellent performance under different channel conditions. Those skilled in the art will appreciate that Kalman filtering theory is an optimal estimation theory published as early as "transmission of the ASME" 82 of the american society of mechanical engineers "in 1960 by r.e. Kalman, and has been widely applied in the fields of control, communication, and the like. The method and the device designed by adopting the Kalman filtering theory can obtain excellent performance. However, this theory is rarely used in practical AFC applications, perhaps for the following reasons:
(1) how to obtain the relevant estimation parameters needed in the Kalman Filter in the AFC loop, e.g. the estimated variance value RkEtc.;
(2) AFC loops using Kalman filter structure designs may appear more complex than other approaches.
However, the present invention converts the SINR estimate output to the measured noise variance value R by adding an SINR estimator in the AFC loop and passing through the MCRB performance boundkValue, and estimate the variance PkInitial value P of0The Kalman filter is simply implemented in AFC applications, determined according to the mean square prediction of the input frequency deviation. In addition, according to the invention, the complexity of the fine frequency correction process designed according to the Kalman filtering theory is low, and the required signal processing work can be simply realized in software. This is because:
(1) first, according to the present invention, the updating of the relevant parameters in the Kalman Filter includes measuring the noise variance RkEstimate variance PkAnd Kalman gain factor KkAnd the like, are updated only once per frame, and the calculation is limited to a plurality of multiplication and division operations and addition and subtraction operations. Generally, the length of a frame in a wireless communication system is relatively large, for example, the length of a frame in TD-SCDMA is 5 ms. Therefore, the updating frequency of the relevant parameters in the Kalman filter and the calculation complexity in each updating process are low;
(2) secondly, according to the invention, to calculate the measurement noise variance RkThe implementation of the used SINR estimator is also simple. For example, with the SINR estimator implemented as shown in fig. 13, it can be obtained by using only the channel estimation and path search results in the current frame and performing some simple operations (hundreds of square sum addition operations). On the other hand, other receiver modules, such as the measurement (measurement) module, may also calculate this value, in which case no additional SINR estimate calculation is needed for the AFC module alone.
In particular, according to the present invention, the loop gain factor dynamically adjusts the gain of the frequency offset estimation value of the current frame according to the SINR value estimated by the current frame — generally, the higher the SINR value is, it indicates that the more reliable the current frequency offset estimation value is, the higher the gain thereof is; conversely, a lower SINR value indicates that the current frequency offset estimate is less reliable, and thus the gain is lower. Therefore, compared with some other AFC loop structures with fixed loop filter gain factors, the fine frequency adjustment method and apparatus provided by the present invention can adaptively adjust the loop gain according to the current channel condition to achieve the best loop convergence performance, so that the frequency synchronization work can be completed quickly. This is significant for shortening the initial cell search time of the TD-SCDMA system.
Thus, a preferred embodiment of the present invention has been described in detail with reference to the accompanying drawings. Those of ordinary skill in the art will appreciate that the various logical units, modules, circuits, algorithm steps, and the like, used in the description of the present invention, may be implemented using electronic hardware (electronic hardware), computer software (computer software), or combinations thereof. The various elements, units, modules, circuits, and steps described herein are generally implemented as functions of their respective hardware or software, depending on the particular application and design constraints imposed on the overall system. Those skilled in the art will recognize the interchangeability of hardware and software under certain circumstances and will best be able to implement an automatic frequency correction method of the type described herein in a manner that is optimal for the particular application.
For example, the various logical units, modules, circuits, algorithm steps, etc., used herein to describe the invention can be implemented in the following manner, or combinations thereof, including: digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete logic gate (gate) or transistor (transistor) logic, discrete hardware components such as registers and FIFOs, processors executing a series of firmware instructions, conventional programmable software (processors), and associated processors (processors), among others. The processor may be a microprocessor (microprocessor), a conventional processor, a controller, a microcontroller, a state machine (state machine), or the like; a software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other presently known storage medium.
It is obvious and understood by those skilled in the art that the preferred embodiments of the present invention are only for illustrating the present invention and not for limiting the present invention, and the technical features of the embodiments of the present invention can be arbitrarily combined without departing from the idea of the present invention. The disclosed invention can be modified in many ways and many embodiments other than the preferred ones specifically set forth above are possible in accordance with the disclosed method and apparatus for automatic frequency correction in a time division radio communication system. Therefore, any method or improvement that can be made by the idea of the present invention is included in the scope of the claims of the present invention. The scope of the invention is defined by the appended claims.