CN100536027C - NAND flash memory reading method - Google Patents
NAND flash memory reading method Download PDFInfo
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- CN100536027C CN100536027C CNB2006100863181A CN200610086318A CN100536027C CN 100536027 C CN100536027 C CN 100536027C CN B2006100863181 A CNB2006100863181 A CN B2006100863181A CN 200610086318 A CN200610086318 A CN 200610086318A CN 100536027 C CN100536027 C CN 100536027C
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Abstract
This method includes: (1) According to the instruction 'read' with address, CPU reads the corresponding page data (CPD) from the and-not flash memory. (2) In order to check error from CPD, this method generates a correct ECC value and compares this value with the ECC value of the corresponding page (CP). (3) If the comparing result discovers one byte error in CP, this method corrects it and renews the corresponding error page list. (4) When the number of occurring one byte error exceeds the preset norm number, CPD are stored into the preset booking area (PBA). (5) If the comparing result discovers two byte errors in CP, and if there are CPD in PBA, this CPD are read out and step 2 is executed again.
Description
Technical field
The present invention relates to the read method with non-(NAND) flash memory, relate in particular to read with non-flash memory in the process of storage data in realize contingent mistake minimum and stable and non-flash memory reading performance with read method non-flash memory.
Background technology
Recently, in multimedia devices such as PDA, MP3 player, be extensive use of flash memories.Especially when the capacity of medium is big, need to use and non-flash memory.
Flash memories be divided into or non-(NOR) flash memory and with two kinds of non-flash memories.Or the non-price of flash memory is relatively more expensive, can carry out XIP (Execute In Place: carry out in the chip); Cheap with the non-price of flash memory, but owing to utilize demand paging (Demand Paging), so substitute the possibility that XIP exists performance to descend.Here, we describe XIP.Even so-called XIP is a kind of implementation code of storing in the flash memory file system that do not load in random access memory, technology that also can executable operations, this technology not only can reduce the memory requirement amount of random access memory, and can move a plurality of application programs simultaneously.
With the demand paging of using in the non-flash memory be that data that the user is needed are from reading definite part with non-flash memory, and store technology among the SDRAM (synchronous mode dynamic RAM) into, because the space of operable SDRAM is restricted, so from non-flash memory the data volume that once reads and few, compare with the time of reading of data, its system performance reduces.
Fig. 1 is common and structural representation non-flash memory.Common generally is made of the spare area of 512 bytes [Bytes] master data that constitutes and 16 bytes that comprise error correction code (Error Correction Code: hereinafter to be referred as " ECC ") with non-flash memory.
Fig. 2 be said structure that constitute with synoptic diagram non-flash memory reading of data method.Below, the process of reading of data is described.
At first, for read with non-flash memory in the data of storing, central processing unit (CPU) input reading command, and input that will read with address non-flash memory.
After receiving the instruction and address of CPU input with non-flash memory, the output related data, for whether the data that detect above-mentioned and non-flash memory output exist mistake, CPU generates correct error correction code value, and the error correction code value that will generate with the error correction code value and the above-mentioned CPU of non-flash memory output data compares.
To above-mentioned error correction code value relatively, when two error correction code are worth when identical, finish to read process; When two error correction code values not simultaneously, have mistake to CPU report.
Comparison through above-mentioned two error correction code values, when there is mistake in the data with non-flash memory output, for example, if with least unit-512 byte page of non-flash memory output data in have 1 byte error, then CPU utilize from non-flash memory error correction code value that receives and the error correction code value that among CPU, generates, find 1 byte error, and the mistake of 1 byte is corrected.
But, if with the data of non-flash memory output in have 2 byte errors owing to can only judge 2 byte errors have taken place, can not find errors present or improper value, have to 2 byte errors take place to the CPU report, re-execute and read action.If 2 byte errors take place once more in the action, there is not the method that solves in reading of re-executing at all.
That is, during the data of in reading existing and non-flash memory, storing, when there is 1 byte error in 512 bytes, can find errors present, and improper value is corrected.But, but feel simply helpless for 2 byte errors.Certainly, the probability that 2 byte errors take place is very low, still, along with using being on the increase of high capacity and non-flash memory device, reads action and also can increase, and therefore, the probability that the above fatal error of 2 bytes takes place must increase.
Summary of the invention
In order to address the above problem, the present invention aims to provide a kind of read method of and non-flash memory, promptly, when 1 byte error takes place when, the wrong page complete list that the management that has had is taken place the 1 byte error page upgrades, if exist the number of times that 1 byte error takes place to surpass the page of the frequency benchmark of having set, then will be in the reservation zone of having set above the data storage of the frequency benchmark page, in when, in the page that is storing the reservation zone into 2 byte errors taking place when, utilization is stored in the page in reservation zone and repairs, the wrong repair ability of the 2 byte error pages improve to take place, and strengthens and non-flash memory reading performance and read method non-flash memory.
To achieve these goals, the feature of the read method of the present invention and non-flash memory comprises the steps: step 1, and instruction and address that the CPU input is read are from reading the related pages data with non-flash memory; Step 2 in order to detect in above-mentioned related pages data whether have mistake, generates correct error correction code value, and the error correction code value of generation and the error correction code value of above-mentioned related pages are compared; Step 3, when the comparative result of above-mentioned two error correction code values is when in above-mentioned related pages 1 byte error taking place, after 1 byte error that takes place corrected, the wrong page complete list that the management that has had is taken place the 1 byte error page upgrades, when the number of times that takes place when 1 byte error of above-mentioned related pages surpasses the frequency benchmark number of times of having set, with the data storage of related pages in the reservation zone of having set; Step 4, when the comparative result of above-mentioned two error correction code values is when 2 byte errors take place above-mentioned related pages, whether judgement exists the data of related pages in above-mentioned reservation zone, if there are the data of related pages in above-mentioned reservation zone, then read in the related pages data of storing in the reservation zone, and return execution in step 2.
As mentioned above, read method of the present invention and non-flash memory has feature: when 1 byte error takes place, the wrong page complete list that the management that has had is taken place the 1 byte error page upgrades, if exist the number of times that 1 byte error takes place to surpass the page of the frequency benchmark of having set, then will be in the reservation zone of having set above the data storage of the page of frequency benchmark, in when, in the page that is storing the reservation zone into 2 byte errors taking place when, utilization is stored in the page in reservation zone and repairs, improve the wrong repair ability of the page that 2 byte errors take place with this, improve reading performance with non-flash memory.
Description of drawings
Fig. 1 is common and synoptic diagram non-flash memory structure.
Fig. 2 is the order block diagram of an embodiment of the read method of existing and non-flash memory.
Fig. 3 is the order block diagram of an embodiment of the read method of of the present invention and non-flash memory.
Embodiment
Embodiment to the read method of the present invention with above feature and non-flash memory is elaborated below with reference to accompanying drawings.
Of the present invention focusing on, carrying out and the reading in the course of action of non-flash memory, when with the page of non-flash memory output on when 1 byte error takes place, except 1 byte error is repaired, complete list to the page that 1 byte error usually takes place continues management, after, when 2 byte errors take place, 2 byte errors are repaired.
The method of repairing when above-mentioned 2 byte errors take place is, by complete list the page that 1 byte error usually takes place is continued management, if the number of times that 1 byte error takes place surpasses the frequency benchmark number of times of having set, then related pages is stored into subregion with non-flash memory--in the reservation zone set, after, if 2 byte errors take place the related pages that is stored in the reservation zone, read the same page that is stored in the reservation zone, and repair.
Possibility that takes place along with prediction error and reservation area size different, there is very big-difference in performance of the present invention, and the optimum value of above-mentioned two parameters can be according to the system performance of using with non-flash memory, by the test acquisition.
Fig. 3 is the precedence diagram of an embodiment of the read method of of the present invention and non-flash memory.As shown in the figure, comprise following step: step 1, instruction and address that the CPU input is read are from reading the related pages data with non-flash memory; Step 2, the CPU generation error is corrected code value, and the error correction code value of generation and the error correction code value of above-mentioned related pages are compared; Step 3, when the comparative result of above-mentioned two error correction code values is when in above-mentioned related pages 1 byte error taking place, after 1 byte error that takes place corrected, upgrade wrong page complete list, when the number of times that takes place when 1 byte error of above-mentioned related pages surpasses the frequency benchmark number of times of having set, with the related pages data storage in the reservation zone of having set; Step 4, when the comparative result of above-mentioned two error correction code values is when 2 byte errors take place above-mentioned related pages, if there are the data of related pages in above-mentioned reservation zone, then read in the related pages data of storing in the reservation zone, and return execution in step 2.
And, also comprise with the read method of non-flash memory: when above-mentioned 2 byte errors take place,, then report the step of 2 byte errors to CPU if there are not the data of the related pages that 2 byte errors take place in the reservation zone.
Below, the action of the present invention that above step is constituted is elaborated.
At first, for read with non-flash memory in the data of storing, CPU imports reading command, and input that will read with address non-flash memory.
CPU is from reading corresponding related pages data of instruction and address with above-mentioned input with non-flash memory, in order to detect in the related pages data of exporting with non-flash memory whether have mistake, generate correct error correction code value, will compare with it with the error correction code value of the related pages data of non-flash memory output.
To above-mentioned error correction code value relatively,,, finish to read process owing to do not have mistake at related pages when two error correction code are worth when identical, when two error correction code values not simultaneously, have mistake to the CPU report.
Through more above-mentioned two error correction code values, if with the data of non-flash memory output in have 1 byte error, CPU just utilize from non-flash memory error correction code value that receives and the error correction code value that among CPU, generates, find 1 byte error, and the mistake of 1 byte is corrected.
1 byte error to above-mentioned related pages is corrected, and the corresponding faulty page surface information to the wrong page complete list set upgrades then.That is, above-mentioned wrong page complete list comprises the number of times of the 1 byte error generation that the 1 byte error page takes place, if 1 byte error takes place the page that is stored in the above-mentioned complete list once more, just increases the wrong frequency of the page, upgrades complete list.And, when 1 byte error frequency of the page in being stored in above-mentioned wrong page complete list is identical, on the page that takes place recently, weighted value is set and manages.This be since when with non-flash memory in storage during data, the similarity of life period, most recently used data probably continue the cause of use during certain.
After finishing the above-mentioned wrong page complete list of renewal, judge whether the number of times of the mistake generation of the respective page that 1 byte error takes place surpasses the frequency benchmark of having set.When above-mentioned judged result is, if the number of times that takes place with 1 byte error of the respective page of non-flash memory output surpasses the frequency benchmark, then with the data storage of respective page in the reservation zone of having set.At this moment, the reservation area size forms with page unit according to reading action, and the reservation area size of page unit is provided with more getting final product, but usually, remove at needs under the situation of action, because its base unit is the piece that is made of 32 pages, the size in reservation zone is preferably block size.And the reservation area size is regulation not, and along with the size of the capacity of memory storage is different with the action usually carried out, the reservation area size is difference also.
On the contrary, when the comparative result of above-mentioned two error correction code values is, if with the respective page of non-flash memory output on have 2 byte errors, whether judgement exists the page data identical with related pages in the reservation zone, when not having the page data identical with related pages, the same with existing technology, after there are 2 byte errors in the CPU report, tenth skill; Otherwise, when having the page data identical, read in the data of the respective page of storing in the reservation zone with generation 2 byte error respective page in the reservation zone.
If read in the data of the respective page of storing in the reservation zone, read action owing to carry out, in order to detect the mistake of respective page, in CPU, generate correct error correction code value, and operate in the process that the error correction code value that generates among the error correction code value of the respective page that reads in above-mentioned reservation zone and the above-mentioned CPU compares again.
Since the present invention by the respective page that relatively in the reservation zone, reads the error correction code value and CPU in the error correction code value that generates, carry out error correcting, even with the respective page of non-flash memory output on 2 byte errors take place, also can repair, have the advantage of raising the efficiency mistake.
And, owing to be difficult to grasp the error property of the low page of usage frequency, thus the present invention in initialization procedure, once read with non-flash memory in the data of the full page stored, grasp the read error characteristic of all pages.
Claims (4)
1, a kind of read method of and non-flash memory is characterized in that, comprises the steps:
Instruction and address that step 1, CPU input read are from reading the data of related pages with non-flash memory;
Whether step 2 exists mistake in order to detect in above-mentioned related pages data, generate correct error correction code value, and the error correction code value of generation and the error correction code value of above-mentioned related pages are compared;
Step 3, when the comparative result of above-mentioned two error correction code values is when in above-mentioned related pages 1 byte error taking place, after 1 byte error that takes place corrected, the wrong page complete list that the management that has had is taken place the 1 byte error page upgrades, when the number of times that takes place when 1 byte error of above-mentioned related pages surpasses the frequency benchmark number of times of having set, with the related pages data storage in the reservation zone of having set;
Step 4, when the comparative result of above-mentioned two error correction code values is when 2 byte errors take place above-mentioned related pages, whether judgement exists the data of related pages in above-mentioned reservation zone, if there are the data of related pages in above-mentioned reservation zone, then read in the related pages data of storing in the reservation zone, and return execution in step 2.
2, according to claim 1 with the read method of non-flash memory, it is characterized in that: when above-mentioned 2 byte errors take place in above-mentioned respective page,, then report 2 byte errors to CPU if there are not the data of related pages in the reservation zone.
3, the read method of as claimed in claim 1 and non-flash memory, it is characterized in that: above-mentioned reservation area size is the block size that is made of 32 pages.
4, the read method of as claimed in claim 1 and non-flash memory, it is characterized in that: above-mentioned wrong page complete list comprises the number of times that 1 byte error of the page that 1 byte error takes place takes place, if 1 byte error takes place in the page once more that be stored in the above-mentioned complete list, just increase the wrong frequency of the page, and upgrade.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006100863181A CN100536027C (en) | 2006-07-07 | 2006-07-07 | NAND flash memory reading method |
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| CNB2006100863181A CN100536027C (en) | 2006-07-07 | 2006-07-07 | NAND flash memory reading method |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101645026B (en) * | 2008-08-07 | 2011-11-16 | 创惟科技股份有限公司 | Storage device and method for updating flash page according to error correction code |
| CN101510173B (en) * | 2008-10-10 | 2010-12-29 | 慧帝科技(深圳)有限公司 | A data storage method and device for reducing storage times |
| CN101923570B (en) * | 2010-07-21 | 2012-07-04 | 中国电子科技集团公司第三十八研究所 | Method for establishing large-page NAND Flash storage system under Windows CE condition |
| CN102455979B (en) * | 2010-10-18 | 2014-08-20 | 英业达股份有限公司 | Data protection method for damaged memory cell |
| US8793552B2 (en) * | 2012-11-14 | 2014-07-29 | International Business Machines Corporation | Reconstructive error recovery procedure (ERP) for multiple data sets using reserved buffer |
| US9053748B2 (en) | 2012-11-14 | 2015-06-09 | International Business Machines Corporation | Reconstructive error recovery procedure (ERP) using reserved buffer |
| US8810944B1 (en) | 2013-07-16 | 2014-08-19 | International Business Machines Corporation | Dynamic buffer size switching for burst errors encountered while reading a magnetic tape |
| US9141478B2 (en) | 2014-01-07 | 2015-09-22 | International Business Machines Corporation | Reconstructive error recovery procedure (ERP) using reserved buffer |
| US9582360B2 (en) | 2014-01-07 | 2017-02-28 | International Business Machines Corporation | Single and multi-cut and paste (C/P) reconstructive error recovery procedure (ERP) using history of error correction |
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