CN100525025C - Start-up circuit with feedforward compensation for power converter - Google Patents

Abstract

The invention relates to a starting circuit of a power converter, which comprises a leakage resistor based on a safety regulation power converter so as to discharge an electromagnetic interference filter of the power converter. In order to save power and reduce the number of elements, the invention further uses a bleeder resistor for start-up and feed-forward compensation. The invention comprises an input end for coupling with a bleeder resistor; a voltage divider coupled to the input terminal; a sampling and holding circuit for sampling and holding a voltage signal from the voltage-dividing circuit; a low pass filter coupled to the sample and hold circuit for generating an offset signal according to the voltage signal, the offset signal being transmitted to a limiting circuit for generating a limiting signal for limiting the switching current of the power converter.

Description

Start-up circuit with feed-forward compensation for power converters

technical field

The present invention relates to a power converter, in particular to a control circuit of a switching power converter.

Background technique

Press, switching power converter is a traditional technology, used to control the output power to achieve the purpose of regulation. Generally speaking, a power converter has built-in various protection functions, such as over-voltage protection and over-current protection, to protect the power converter and connected circuits from permanent damage. The output power limit function is generally used for overload protection and short circuit protection.

Please refer to FIG. 1 , which is a circuit diagram of a conventional switching power converter. As shown in the figure, the conventional switching power converter uses a control circuit 50 . When the power is turned on, an input voltage V _DC charges a startup capacitor 65 via a series startup resistor 30 to provide a supply voltage V _CC . The startup capacitor 65 is coupled to the supply terminal VCC of the control circuit 50 . When the supply voltage V _CC reaches the critical voltage, the power converter starts to operate and the output terminal OUT of the control circuit 50 starts to output a switching signal V _PWM to drive the power converter. After the power converter starts up, an auxiliary winding of a transformer 20 provides a supply voltage V _CC through a rectifier 60 .

A power transistor 10 is coupled to the primary winding of the transformer 20 and the output terminal OUT of the control circuit 50. The power transistor 10 switches the transformer 20 according to the switching signal V _PWM to control the output power of the power converter. A resistor 15 is connected in series with the power transistor 10 to determine the maximum output power of the power converter. This method is to couple a resistor 40 to the current sensing terminal VS of the control circuit 50 . If the voltage V _S exceeds a maximum threshold, the control circuit 50 will disable the switching signal V _PWM to limit the maximum output power of the power converter. However, the maximum output power will be affected by a response time _TD , which means that when the voltage _VS at the current sensing terminal VS is detected to be higher than the maximum critical value, the switching signal V _PWM of the control circuit 50 will pass through It ends after a delay time _TD . The delay time T _D is based on the change of the input voltage V _DC to cause different over-power protection.

A resistor 35 is coupled between the input voltage V _DC and the current sensing terminal VS for feed-forward compensation. The feed-forward compensation is used to compensate the output power inconsistency caused by the input voltage V _DC and the delay time T _D . By properly selecting the resistance value of the resistor 35 , a consistent output power limit can be obtained when inputting low line voltage and high line voltage. Significant power loss is caused by resistors 30 and 35, especially at high line voltage inputs. Therefore, it is proposed to use a resistor for feed-forward compensation and startup, which is disclosed in US Patent No. 6,611,439 "PWM controller for controlling output power limit of a power supply" proposed by Mr. Yang et al. In addition, the "Integrated start-upcircuit with reduced power consumption" of US Patent No. 6,906,934 proposed by Mr. Yang et al. can further reduce power loss. However, the technology disclosed in US Patent No. 6,906,934 cannot be applied to the circuit disclosed in US Patent No. 6,611,439.

Therefore, the present invention proposes a start-up circuit for a power converter to solve the above conventional technical problems. In order to save power and reduce the number of components, the present invention uses a resistor to achieve start-up, feed-forward compensation and safety regulations.

Contents of the invention

The main purpose of the present invention is to provide a start-up circuit of a power converter, which realizes start-up, feed-forward compensation and safety regulations by using a resistor, so as to achieve the purpose of saving power loss of the power converter and reducing the number of components.

In order to save power and reduce the number of components, the present invention uses a bleeder resistor for start-up and feed-forward compensation. Based on safety regulations, the power converter must be equipped with a bleed resistor to bleed the EMI filter of the power converter. The circuit of the present invention comprises an input terminal coupled to the discharge resistor for starting; a voltage divider circuit coupled to the input terminal; a sample and hold circuit coupled to the voltage divider circuit for sampling and sampling from the voltage divider circuit. A voltage signal is saved; then, a low-pass filter is used to filter the line frequency ripple and generate an offset signal according to the voltage signal, and the low-pass filter is a sampling filter. The offset signal is sent to a limiting circuit to generate a limiting signal, and the limiting signal is used to limit a switching current of the power converter.

The beneficial effect of the invention is: using a resistor to achieve start-up, feed-forward compensation and safety regulation can save the power loss of the power converter and reduce the number of components.

Description of drawings

FIG. 1 is a circuit diagram of a conventional switching power converter;

Fig. 2 is the circuit diagram of the switching power converter of the present invention;

Fig. 3 is the circuit diagram of the starting circuit of tool feedforward compensation of the present invention;

Fig. 4 is the circuit diagram that the present invention produces the generation circuit of sampling signal;

Fig. 5 is a waveform diagram of the sampling signal of the present invention.

Description of figure number:

10 Power Transistor 15 Resistor

17 Power Transistor 19 Resistor

20 Transformer 25 Transformer

30 Start Resistor 35 Resistor

40 Resistor 50 Control circuit

51 Zener diode 53 Resistor

55 Optocoupler 57 Rectifier

59 Filter Capacitor 60 Rectifier

65 Start capacitor 67 Diode

69 Starting Capacitor 70 Bleeding Resistor

90 bridge circuit 100 control circuit

110 First Comparator 120 Second Comparator

150 Oscillator 160 NAND Gate

180 RS flip-flop 200 Start circuit

205 Diode 207 Voltage divider circuit

210 resistor 220 resistor

225 Switch 230 Sample and hold circuit

231 First sampling switch 235 First capacitor

240 Low-pass filter 241 Second sampling switch

245 Second Capacitor 250 Limiting Circuit

255 Adder 260 Reference Voltage

300 counter 310 and gate

350 First Click Circuit 360 Second Click Circuit

FB Feedback Terminal GND Ground Terminal

I _P Switching Current N _S Secondary Winding

OUT output port PLS pulse signal

S ₁ The first sampling signal S ₂ The second sampling signal

T ₁ delay time T ₂ pulse width

V _AC input voltage V _CC supply voltage

V _IN input terminal V _LIMIT limit signal

V ₀ output voltage V _PWM switching signal

V _S Sensing Voltage VCC Supply Terminal

VS current sense terminal

Detailed ways

In order to enable the examiner to have a further understanding and understanding of the structural features and the achieved effects of the present invention, a preferred embodiment and a detailed description are provided, as follows:

Please refer to FIG. 2 , which is a circuit diagram of the switching power converter of the present invention. As shown in the figure, a control circuit 100 includes a startup circuit 200 , a first comparator 110 , a second comparator 120 , a NAND gate 160 , an RS flip-flop 180 and an oscillator 150 . Wherein, the oscillator 150 provides a pulse signal PLS to the RS flip-flop 180 . Based on safety regulations, the power converter must be provided with a bleeding resistor (bleeding resistor) 70 for bleeding the EMI filter of the power converter.

In order to save power and reduce the number of components, the present invention further uses the bleeder resistor 70 for start-up and feed-forward compensation. The bleeder resistor 70 is coupled between an input voltage V _AC and an input terminal V _IN of the control circuit 100 for startup. A bridge circuit 90 is coupled between the input voltage V _AC and the discharge resistor 70 , and the bridge circuit 90 is further coupled to a primary winding of a transformer 25 . Once the power converter is started, the input voltage V _AC is transmitted to the start-up circuit 200 through the bleeder resistor 70 , and starts to charge a start-up capacitor 69 to provide a supply voltage V _CC to a supply terminal VCC of the control circuit 100 . When the voltage of the startup capacitor 69 reaches the critical voltage, the control circuit 100 starts to operate and outputs a switching signal V _PWM . Then, the auxiliary winding of the transformer 25 provides the supply voltage V _CC through a diode 67 .

A limit signal V _LIMIT generated by the startup circuit 200 is used to determine a maximum current sensing voltage, which is transmitted to the positive input terminal of the first comparator 110 . The positive input terminal of the second comparator 120 is coupled to a feedback terminal FB of the control circuit 100 for adjusting the output of the power converter. An optical coupler 55 is coupled between the secondary winding of the transformer 25 and the feedback terminal FB to form a feedback control loop. The output voltage V ₀ of the power converter is transmitted to the optocoupler 55 through a Zener diode 51 and a resistor 53 . The secondary winding of the transformer 25 outputs the output voltage V ₀ through a rectifier 57 . A filter capacitor 59 is coupled to the rectifier 57 and the secondary winding of the transformer 25 .

The negative input terminals of the first comparator 110 and the second comparator 120 are coupled together and connected to the source of a power transistor 17 through a current sensing terminal VS of the control circuit 100 . The output terminals of the first comparator 110 and the second comparator 120 are respectively coupled to the two input terminals of the NAND gate 160 , and the output terminal of the NAND gate 160 is coupled to the reset terminal of the RS flip-flop 180 . The output terminal of the RS flip-flop 180 is coupled to the gate of the power transistor 17 and outputs the switching signal V _PWM . The source of the power transistor 17 is coupled to the primary winding of the transformer 25 .

A switching current IP flows through a resistor 19 to generate a sensing voltage V _S at the resistor 19 , and the first comparator 110 compares the sensing voltage V _S with the voltage of the limit signal V _LIMIT . When the sensing voltage V _S is greater than the voltage of the limit signal V _LIMIT , the first comparator 110 will output a low-level logic signal to the input end of the NAND gate 160 . Therefore, the NAND gate 160 will output a high-level logic signal to the RS flip-flop 180 to reset the RS flip-flop 180 , and disable the switching signal V _PWM to turn off the power transistor 17 . In this way, the purpose of limiting the output power can be achieved.

Please refer to FIG. 3 , which is a circuit diagram of a preferred embodiment of the startup circuit of the present invention. As shown in the figure, the input terminal V _IN of the control circuit 100 is coupled to the input voltage V _AC of the power converter through the bleed resistor 70 . A diode 205 is coupled to the input terminal V _IN of the control circuit 100 and the supply terminal VCC of the control circuit 100 for providing power to the control circuit 100 of the power converter. A voltage dividing circuit 207 includes resistors 210 and 220 , the resistor 210 and the resistor 220 are connected in series. The voltage dividing circuit 207 is coupled to the input terminal V _IN through a switch 225 . A sample-and-hold circuit 230 is coupled to the voltage dividing circuit 207 for sampling and storing a voltage signal from the voltage dividing circuit 207 . A low-pass filter 240 is coupled to the sample-and-hold circuit 230 to generate an offset signal according to the voltage signal. A limit circuit 250 is coupled to the low-pass filter 240 to generate a limit signal V _LIMIT according to a reference signal 260 and an offset signal.

The limiting circuit 250 includes an adder 255 and a reference signal 260 , the reference signal 260 is coupled to the positive input of the adder 255 , and the offset signal is coupled to the negative input of the adder 255 . Therefore, the limit signal V _LIMIT decreases according to the increase of the offset signal, so as to limit the switching current I _P of the power converter. Therefore, the purpose of feed-forward compensation can be achieved. Moreover, when the input voltage V _AC increases, the switching current I _P of the power converter will decrease. From the above, it can be known that the start-up circuit of the present invention is a circuit with detection, which is used to detect the line voltage.

Referring again to FIG. 3 , the sample and hold circuit 230 includes a first sampling switch 231 and a first capacitor 235. The first sampling switch 231 is coupled to the voltage divider circuit 207, and the first capacitor 235 is coupled to the first sampling switch 231. to generate a voltage signal. The first sampling switch 231 is controlled by a first sampling signal S ₁ , which is separated from the switching signal V _PWM of the power converter. In addition, the first sampling signal S ₁ also controls the switch 225 . The low-pass filter 240 includes a second sampling switch 241 and a second capacitor 245, the second sampling switch 241 is coupled to the first capacitor 235 of the sample-and-hold circuit 230, and the second capacitor 245 is coupled to the second sampling switch 241 , to generate an offset signal. The second sampling switch 241 is controlled by a second sampling signal S ₂ which is synchronized with the first sampling signal S ₁ . In order to complete low-pass filtering, the capacitance of the second capacitor 245 is higher than that of the first capacitor 235 .

Please refer to FIG. 4 , which is a circuit diagram of a generating circuit for generating the first sampling signal _S1 and the second sampling signal _S2 according to the present invention. As shown in the figure, the input terminal of a counter 300 is coupled to the output terminal of the RS flip-flop 180 to receive the switching signal V _PWM , and the output terminal of the counter 300 is coupled to the input terminal of an AND gate 310 and the gate 310 The other input terminal is also coupled to the output terminal of the RS flip-flop 180 to receive the switching signal V _PWM , and the output terminal of the AND gate 310 generates the first sampling signal S ₁ . A first one-shot circuit 350 receives the first sampling signal S ₁ , the output terminal of the first one-shot circuit 350 is coupled to the input terminal of a second one-shot circuit 360 . The second click circuit 360 generates the second sampling signal S ₂ , wherein the first click circuit 350 as shown in FIG. 5 determines a delay time T ₁ according to the falling edge of the first sampling signal S ₁ , and the second The click circuit 360 determines a pulse width T ₂ of the second sampling signal S ₂ . The waveforms of the first sampling signal _S1 and the second sampling signal _S2 are shown in FIG. 5 .

Based on the foregoing, it can be seen that the voltage of the limit signal V _LIMIT is a function of the input voltage V _AC , and the change of the maximum switching current _IP is inversely proportional to the offset of the input voltage V _AC . The low-pass filter 240 filters out the line-frequency ripple of the input voltage V _AC , so the bleeder resistor 70 can be used to start the circuit to save power. By properly selecting the resistance value of the bleeder resistor 70 , the same limited output power can be achieved at low line voltage and high line voltage input, such as 90Vac and 264Vac.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the implementation scope of the present invention. For example, all equivalent changes and modifications are made according to the shape, structure, characteristics and spirit described in the scope of the claims of the present invention. All should be included in the scope of rights of the present invention.

Claims (12)

1. A starting circuit, characterized in that it comprises: an input terminal, which is coupled to an input voltage of a power converter through a bleeder resistor; a diode coupled between the input terminal and a supply terminal of a control circuit of the power converter to provide power to the control circuit; a voltage divider circuit, which is coupled to the input end through a switch; a sample and hold circuit, which is coupled to the voltage divider circuit, samples and saves a voltage signal from the voltage divider circuit; A low-pass filter, coupled to the sample-and-hold circuit, generates an offset signal according to the voltage signal; an adder, coupled to the low-pass filter, generates a limit signal according to a reference signal and the offset signal; Wherein, the limit signal limits a switching current of the power converter. 2. The start-up circuit as claimed in claim 1, wherein the voltage divider circuit comprises a plurality of resistors connected in series. 3. The start-up circuit according to claim 1, characterized in that the sample and hold circuit comprises: a first sampling switch coupled to the voltage divider circuit; a first capacitor coupled to the first sampling switch to generate the voltage signal; Wherein, the first sampling switch is controlled by a first sampling signal, which is separated from a switching signal of the power converter. 4. The start-up circuit according to claim 3, wherein the low-pass filter comprises: a second sampling switch coupled to the first capacitor of the sample-and-hold circuit; a second capacitor coupled to the second sampling switch to generate the offset signal; Wherein, the second sampling switch is controlled by a second sampling signal which is synchronized with the first sampling signal. 5. The start-up circuit as claimed in claim 4, wherein the capacitance of the second capacitor is higher than that of the first capacitor. 6. A starting circuit with line voltage detection, characterized in that it includes: an input terminal, which is coupled to an input voltage of a power converter through a bleeder resistor; a voltage divider circuit coupled to the input terminal; A sample and hold circuit, which is coupled to the voltage divider circuit, samples and saves a voltage signal from the voltage divider circuit; A low-pass filter, coupled to the sample-and-hold circuit, generates an offset signal according to the voltage signal; A limiting circuit, coupled to the low-pass filter, generates a limiting signal according to the offset signal; Wherein, the limit signal limits a switching current of the power converter. 7. The start-up circuit as claimed in claim 6, wherein the voltage dividing circuit comprises a plurality of resistors. 8. The start-up circuit according to claim 6, wherein the sample and hold circuit comprises: a first sampling switch coupled to the voltage divider circuit; and a first capacitor coupled to the first sampling switch to generate the voltage signal; Wherein, the first sampling switch is controlled by a first sampling signal, which is separated from a switching signal of the power converter. 9. The start-up circuit according to claim 8, wherein the low-pass filter comprises: a second sampling switch coupled to the first capacitor of the sample-and-hold circuit; a second capacitor coupled to the second sampling switch to generate the offset signal; Wherein, the second sampling switch is controlled by a second sampling signal which is synchronized with the first sampling signal. 10. The start-up circuit as claimed in claim 9, wherein the capacitance of the second capacitor is higher than that of the first capacitor. 11. A starting circuit with detection, characterized in that it includes: an input terminal coupled to an input voltage of a power converter; a voltage divider circuit coupled to the input terminal; a sample and hold circuit, which is coupled to the voltage divider circuit, samples and saves a voltage signal from the voltage divider circuit; and a limiting circuit, which generates a limiting signal according to the voltage signal; Wherein, the limit signal limits a switching current of the power converter. 12. The start-up circuit according to claim 11, wherein the sample and hold circuit comprises: a first sample hold switch coupled to the voltage divider circuit; and a first capacitor coupled to the first sample and hold switch to generate the voltage signal; Wherein, the first sample-hold switch is controlled by a first sample signal, which is separated from a switching signal of the power converter.

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