CN100508126C - A kind of preparation method of porous buffer layer for releasing stress - Google Patents

Abstract

The invention discloses a growing method of a porous buffer layer, and belongs to the field of thin film preparation. The utility model is characterized in that metal alloy is used to prepare the porous buffer layer. The method includes the steps that a thin film deposition apparatus is utilized, and a metal alloy thin layer deposits on the single crystal substrate to form a nitride porous mask layer; a layer of unformed epitaxial materials deposit on the mask layer, and through the annealing and other epitaxial means, nano columns grow at net holes of the mask layer only; subsequently, growth conditions are changed to cause the array of the nano columns to combine into a flat surface, and the porous buffer layer is formed; at last, a high-quality thin film of required thickness is grown from the flat surface. The synthetic method of the porous buffer layer is simple, a thin film or a device made by the method has the advantages of small defect density, long service life and high period performance.

Description

A kind of preparation method of porous buffer layer for releasing stress

technical field

The invention relates to a method for growing thin film materials, in particular to a method for improving the quality of thin film materials by preparing a porous buffer layer in situ.

Background technique

Since the end of the last century, III-V nitride semiconductors have developed rapidly. The market size in the field of blue light and green light has reached tens of billions of dollars, but there is still a distance from the requirements of white light lighting. One of the problems is material defects. The density is high, and the device life is short. In addition, there are very few applications in the ultraviolet band (wavelength 210-370nm). The main problem is that the density of material defects generally makes the power of ultraviolet devices not high. It can be seen that the inherent defects of raw materials limit the further development of III-V nitride semiconductors.

Due to the hexagonal symmetry of sapphire, the melting point is 2050°C, the working temperature can reach up to 1900°C, it has good high temperature stability and mechanical properties, and the production technology is mature, so sapphire is mostly used as the epitaxial lining in the manufacture of Group III nitride semiconductors. end. When epitaxially growing III-nitride films on sapphire substrates, due to the large difference in lattice constant and thermal expansion coefficient between the film and the substrate, a low-temperature growth and non-single-crystal buffer layer is usually inserted in the middle to release the stress, but The buffer layer prepared by the traditional method has a dense structure and limited stress release ability, and the obtained nitride film still has a large stress and a high crystal defect density.

In order to solve the stress release problem encountered in the preparation of thin film materials by epitaxial growth, U.S. Patent No. 6579359 proposes a method for absorbing internal stress by using a porous buffer layer to absorb lattice mismatch, heat The stress caused by the mismatch, the patent is realized by anodic oxidation on the silicon carbide substrate, but it is difficult to realize the sapphire insulating substrate. South Korea’s Samsung Corning Company disclosed an epitaxial growth method in Chinese patent application CN1832110A, in which an etching method is used to convert the grown buffer layer into a porous buffer layer. This method can reduce the defect density, stress and bending degree of the material, but It has the disadvantages of many process steps and high cost.

Therefore, it is necessary to find a new epitaxial growth method to solve the problem of stress release, and this method should be applicable to various single crystal substrate materials such as sapphire substrates.

Contents of the invention

The purpose of the present invention is to provide a simple in-situ synthesis method of a porous buffer layer, so that the thin film or device prepared by the method has the characteristics of low defect density, long service life and high device performance.

In order to achieve the above object, the technical solution adopted in the present invention is: a method for preparing a porous buffer layer for stress relief, comprising the following steps:

(1) Deposit a thin layer of metal on a single crystal substrate;

(2) Convert the thin metal layer into an amorphous porous mesh mask by means of in situ reconstruction;

(3) growing a nano-column array at the pores of the porous mesh mask, and the height of the array is greater than the thickness of the porous mask;

(4) Merge the nano-column arrays to form a flat surface by lateral epitaxy technology, and obtain the required porous buffer layer;

(5) A nitride semiconductor thin film is grown to a desired thickness on the above flat surface.

Among the above technical solutions, the in-situ growth technology can be realized by using existing technologies and equipment. Commonly used technologies such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (HVPE) can be used to achieve these The equipment of the method is all prior art. The lateral epitaxy technique is a conventional technique for epitaxial growth of nitride semiconductors, and is usually used to block defects on the surface of the substrate, such as "Journal of Semiconductors" 2006 03, page 419 "In the lateral epitaxial GaN on the sapphire substrate Dislocation Reduction" article discloses a method for lateral epitaxial growth on a sapphire substrate. During the growth process of the porous mesh mask layer, the mask thickness and mask aperture can be controlled by controlling the growth time, and the pore distribution and pore density can be controlled by controlling the growth rate.

In the above technical solution, the growth method of the nanopillar array is as follows: first deposit a layer of metal material on the single crystal substrate, and partially decompose the amorphous material on the mask by means of in-situ reconstruction to form a porous The network structure, followed by nucleation and growth in the gaps of the mask and the oriented growth of nano-columns, controls the proportion of each component in the raw material gas, so that the upward growth rate of nano-columns is greater than the lateral growth rate, thereby forming a one-dimensional nano-column array.

The thickness of the alloy thin layer is between 10 nanometers and 1000 nanometers, the aperture of the mask is between 100 nanometers and 1000 nanometers; the height of the nano column is between 100 nanometers and 5000 nanometers.

The single crystal substrate is selected from one of single crystal Si, GaAs, SiC, GaN or sapphire.

The metal thin layer is selected from one of the metal materials titanium (Ti), chromium (Cr), aluminum (Al), zirconium (Zr), cobalt (Co), copper (Cu), magnesium (Mg) or a combination thereof Material.

The porous mesh mask material is metal nitride titanium nitride (TiN), chromium nitride (CrN), aluminum titanium nitride (TiAlN), zirconium nitride (ZrN), cobalt nitride (CoN), nitride One of copper (CuN) or their composite materials.

The nano-column array material and the semiconductor thin film material use III-V nitride materials; the same material can be used, or not the same material; usually, during the preparation process, the III-V group material reacts with ammonia gas Generated. Group III nitride materials are preferably used.

Since the present invention utilizes existing epitaxy materials, conventional epitaxy techniques and lateral epitaxy techniques are used to prepare high-quality films with porous buffer layers through existing film growth equipment, those skilled in the art can select parameters required for relevant reactions according to their own needs , such as: raw material ratio, reaction temperature, time and so on.

Taking GaN as a material for porous masks, nanopillar arrays, and thin films as an example, the above technical solutions are further explained as follows:

1. Deposit a thin layer of titanium-aluminum alloy on the sapphire single crystal substrate, which can be carried out in epitaxy equipment, or it can be made by sputtering or PVD (Physical Vapor Deposition) equipment, and the alloy thickness and composition can be controlled by controlling the deposition time point.

2. Put the above-mentioned alloy substrate into the epitaxial equipment, heat up and pass in hydrogen and ammonia gas to form a titanium aluminum nitride (TiAlN) porous mask, and control the mask thickness and mask aperture by controlling the temperature and nitriding time . The growth of the porous mask layer can be realized by MOCVD equipment.

3. On the above-mentioned TiAlN mask layer, feed ammonia and trimethylgallium sources to deposit a layer of amorphous GaN, and then heat up for annealing. During this time, the amorphous GaN on the mask will gradually decompose, and the amorphous GaN on the mask will gradually decompose. Amorphous GaN at the film void (in contact with the sapphire substrate) gradually nucleates to form hexagonal single crystal seeds. Continue to feed ammonia gas and trimethylgallium source, and the GaN seed crystals located in the gaps of the mask begin to develop and grow to form nanocolumns. By controlling the ratio of ammonia gas and trimethylgallium source, the growth rate of GaN nanocolumns is increased. Greater than the lateral growth rate, a one-dimensional nanocolumn array is formed, leaving gaps between the nanocolumn arrays.

4. After the above-mentioned one-dimensional nanopillar array grows to a certain height, change the ratio of temperature, ammonia gas and trimethylgallium source, so that the lateral growth rate of GaN is greater than the upward growth rate, and the heads of the nanopillar array gradually merge to form a flat surface .

5. Epitaxial growth on the combined flat surface to obtain the desired GaN film.

Due to the use of the above-mentioned technical solutions, the present invention has the following advantages compared with the prior art:

1. The present invention obtains a buffer layer with a porous structure by first preparing a porous mask layer, and thus can utilize existing epitaxy materials, existing epitaxy equipment, and use existing epitaxy techniques and lateral epitaxy techniques to realize, optimize the production process;

2. Due to the preparation of the porous buffer layer, the stress generated between the grown film and the substrate due to the difference in thermal expansion coefficient and lattice constant can be fully released, so the prepared film or device has low defect density, long life, and excellent device performance. advanced features;

3. Since the present invention adopts the porous mask layer to realize the preparation of the buffer layer, the whole process adopts the epitaxy technology and the lateral epitaxy technology to realize the in-situ synthesis. Compared with the anodic oxidation method used in the prior art, the substrate material is not required to be conductive , which can be applied to a variety of substrate materials including sapphire.

Description of drawings

Fig. 1 is a schematic diagram of an alloy thin layer in Example 1.

Fig. 2 is a schematic diagram of the porous mask structure of the first embodiment.

Fig. 3 is a schematic diagram of the nanopillar array obtained in Example 1.

FIG. 4 is a schematic diagram of the lateral epitaxy of nanopillars in Embodiment 1. FIG.

Fig. 5 is a schematic diagram of two-dimensional film growth obtained in Example 1.

Among them: 1. Single crystal substrate; 2. Alloy thin layer; 3. Metal nitride thin layer; 4. Metal nitride porous mask; 5. Nano column array; 6. Platform; 7. Two-dimensional thin film.

Detailed ways

The present invention will be further described below in conjunction with accompanying drawing and embodiment:

Embodiment 1: A method for preparing a high-quality gallium nitride thin film on a silicon substrate

(1) Referring to the accompanying drawing 1, the in-situ deposition of a thin layer of titanium (Ti) metal is first carried out.

Using silicon as a single crystal substrate, using MOCVD equipment and Tetrakis (dimethylamido) titanium as a source to deposit a thin layer of titanium (Ti) metal at 1,200-300 ° C, and controlling the thickness to 80 nanometers by adjusting the growth time.

(2) Referring to Figure 2, the above alloy substrate 2 is used, the reaction of MOCVD equipment is raised to 400-500° C., and hydrogen and ammonia are introduced to convert the metal Ti thin layer into a titanium nitride polycrystalline film 3 .

(3) Referring to Figure 2, the aperture and distribution of the porous mask are controlled by controlling the temperature and time. The preparation method is as follows: using MOCVD equipment, raising the temperature to 500-650°C, feeding hydrogen and ammonia gas, and forming a titanium nitride porous mask 4 on the single crystal silicon substrate 1; the thickness of the mask is 10-650°C. 80 nanometers, and the mask aperture is about 100-500 nanometers.

(4) Referring to Figures 3 and 4, the gallium nitride nanopillar arrays are grown and merged.

Using MOCVD equipment, using the TiN porous mask obtained in step (3), control the temperature at 550-650°C, feed ammonia gas and trimethylgallium source, deposit for 6-8min, then raise the temperature to 1050°C for 15min and anneal for 15min. The amorphous GaN in the gap of the mask gradually nucleates to form a hexagonal phase seed crystal, the temperature is lowered to 950°C, ammonia gas and trimethylgallium source are introduced, and the GaN seed crystal grows upward for 5 to 10 minutes, making the GaN nanocolumn 5. When the height reaches 600-800nm, raise the temperature to 1100°C, adjust the source flow of ammonia gas and trimethylgallium, merge the tops of GaN nanopillars, generate a top platform 6, and finally form a flat surface.

(5) As shown in FIG. 5 , epitaxial growth is performed on the combined flat surface to obtain a group III semiconductor gallium nitride (GaN) thin film 7 .

Example 2: A method for preparing a high-quality aluminum nitride film on a sapphire substrate

(1) Deposition of titanium-aluminum alloy thin layer

On the sapphire single crystal substrate, a thin layer of titanium-aluminum (TiAl) alloy is deposited by PVD, the thickness is controlled at 80-100 nanometers, and the deposition time is controlled to control the thickness and composition gradient of the alloy.

(2) Put the above alloy substrate into the MOCVD epitaxy equipment, raise the temperature to 400-600°C, and pass in hydrogen and ammonia gas to convert the thin layer of metal TiAl alloy into a porous mask of aluminum titanium nitride (TiAlN). The temperature and nitriding time are used to control the mask thickness and mask aperture.

(3) On the above-mentioned TiAlN porous mask layer, pass through ammonia gas and trimethylgallium aluminum at 800-900°C, deposit for 6-8 minutes, and anneal at 1400°C for 15 minutes, and the amorphous aluminum nitride ( AlN) gradually nucleates to form hexagonal phase seeds. Lower the temperature to 1100-1200°C, feed ammonia gas and trimethylaluminum source, the AlN seed crystal grows upward, the upward growth rate is greater than the lateral growth rate, grows for 8-12 minutes, and the height of the AlN nano-column reaches 800-1200nm. The ratio of ammonia gas to trimethylgallium aluminum makes the AlN nanocolumns form a one-dimensional nanocolumn array, leaving gaps between the nanocolumn arrays.

(4) After the above-mentioned one-dimensional nanopillar array grows to a certain height, the temperature is raised to 1400°C, and the ratio of ammonia gas and trimethylaluminum source is changed, so that the lateral growth rate of AlN is greater than the upward growth rate, and the nanopillar array head The parts are gradually merged to form a flat film, which continues to grow for 240 minutes, and finally a crack-free AlN film with a thickness of 10 microns is obtained.

Claims (7)

1. a making method of multi-hole buffer layer that is used to discharge stress is characterized in that comprising the following steps:

(1) deposition layer of metal thin layer on single crystalline substrate;

(2) by original position reconstruct means thin metal layer is changed into unformed holey mask;

(3) at described holey mask hole place growing nano post array, the array height is greater than the porous mask thicknesses;

(4) by the epitaxial lateral overgrowth technology nano column array is merged the formation flat surface, obtain required multi-hole buffer layer;

(5) on above-mentioned flat surface, grow the nitride semiconductor thin film of desired thickness.

2. preparation method according to claim 1, it is characterized in that: the growing method of described nano column array is, at first make the amorphous material that is positioned on the mask partly decompose disappearance by original position reconstruct means, be positioned at backing material nucleation, the growth of mask gap, the ratio of each composition in the control unstripped gas, make nano-pillar make progress the speed of growth, thereby form 1-dimention nano post array greater than cross growth speed.

3. preparation method according to claim 2 is characterized in that: the thickness of described holey mask layer is between 10 nanometers, 100 nanometers, and the mask aperture is between 10 nanometer to 1000 nanometers; The height of described nano-pillar is between 100 nanometers, 1000 nanometers; Regulate mask pore size and distribution by control reconstruct technology as required.

4. preparation method according to claim 1 is characterized in that: described single crystalline substrate is selected from a kind of in single crystalline Si, GaAs, SiC, GaN or the sapphire.

5. preparation method according to claim 1 is characterized in that: described thin metal layer is selected from a kind of in metal material titanium, chromium, aluminium, zirconium, cobalt, copper, the magnesium or their composite material.

6. preparation method according to claim 1 is characterized in that: described holey mask material is a kind of in titanium nitride, chromium nitride, TiAlN, zirconium nitride, cobalt nitride, the copper nitride or their composite material.

7. preparation method according to claim 1 is characterized in that: described nano column array material and semiconductor film material adopt the III-V group nitride material.

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