CN100499755C - Unit for recovering symbol clock in digital TV - Google Patents

Abstract

The present invention is related to the symbol clock recovery device of digital television TV, especially when the residual carrier component that is not completely cleared by the carrier recovery part is input, the residual carrier can be eliminated by using two squarers and an accumulator; and the output of the accumulator Carry out the square again, and in the case that there is no fs/2 frequency part signal of the synchronization signal caused by ghosting and other reasons, a new fs/2 part signal can also be generated to recover the symbol clock. Therefore, no matter whether the carrier recovery is not completed Even when there is no signal of 1/2 the frequency (fs/2) of the clock frequency due to ghosting, etc., the symbol clock can be recovered stably and correctly. Therefore, not only the performance of the symbol clock recovery algorithm is improved, but also the Improve overall system performance.

Description

Symbol clock recovery device for digital TV

technical field

The present invention is related to a digital television TV receiver, especially an invention related to a symbol clock recovery device for recovering a symbol clock from received data.

Background technique

At present, most of the digital transmission systems are in the ATSC (Advanced Television Systems Committee) 8VSB (Vestigial Side Band) transmission system proposed by the American digital transmission mode. In order to improve the frequency efficiency, only the transmission signal is loaded Numbers are sent. That is, clock information necessary for data recovery at the receiving end is not transmitted. Also, in order to recover these data from the digital signal received at the receiving end, it is necessary to generate the same clock as that used at the time of transmission. The part that completes these functions is the symbol clock recovery part.

FIG. 1 is a block diagram showing the configuration of a general digital TV receiver having such a symbol clock recovery unit. The tuner 102 that receives the radio frequency RF (Radio Frequency) signal modulated with the vestigial sideband VSB mode through the antenna 101 only selects the specific channel frequency desired by the user; then the residual of the radio frequency (RF) frequency band in the selected channel frequency will be loaded The sideband VSB signal is converted into a first intermediate frequency (IF) band and output to the analog signal processing unit 103 . The analog signal processing section 103 performs control such as passband filtering and amplification on the first intermediate frequency (IF) signal output by the tuner 102, converts the first intermediate frequency (IF) signal into a second intermediate frequency (IF) signal, and converts the first intermediate frequency (IF) signal to a second intermediate frequency (IF) signal. It is output to the analog/digital A/D conversion unit 104 . The analog/digital A/D conversion unit 104 samples the second intermediate frequency (IF) signal at a fixed frequency (the fixed frequency is different from the symbol clock frequency, usually 25 MHz), and outputs it to the phase separator 105 . That is, data sampled at a frequency of 21.52 MHz, which is twice the symbol clock frequency (fs), is transmitted at the transmitting end; and data output at the analog/digital A/D converter 104 is digital data sampled at a frequency of 25 MHz.

Phase separator 105 separates the digital signal into passband signals of real number component (r(t)) and imaginary number component (i(t)) whose phases are −90 degrees from each other, and outputs it to carrier recovery unit 106 . Here, for convenience of explanation, the real number component (r(t)) signal output from the phase separator 105 is called I signal, and the imaginary number component (i(t)) signal is called Q signal.

Carrier recovery section 106 converts the I, Q passband digital signals output by phase separator 105 into I, Q baseband digital signals, then transforms the signal lines that have been recovered for symbols, and outputs it to re-sampling section (Re sampler) 107 .

The resampling section 107 basically functions to change the sampling rate. That is, the received data sampled at a frequency of 21.52 MHz is converted into a sample output at a frequency of 25 MHz in the analog/digital A/D conversion unit 104; output.

For this reason, the re-sampling unit 107 uses the output frequency of the symbol clock recovery unit 108 to convert the baseband digital signal output from the analog/digital A/D conversion unit 104 and the carrier recovery unit 106 into a digital frequency synchronized with twice the symbol clock frequency. The signal is interpolated and output to the symbol clock recovery section 108, and output to the digital processing section 109 for channel equalization, phase tracking, error correction, and the like.

The symbol clock recovery unit 108 obtains the synchronization error of the current symbol, and then generates a frequency proportional to the synchronization error and outputs it to the re-sampling unit 107 .

FIG. 2 is a general configuration block diagram of the above-mentioned carrier recovery unit 106, which uses a so-called frequency phase locked loop FPLL (Frequency Phase Locked Loop). That is, the carrier recovery unit 106 composed of a frequency phase-locked loop FPLL demodulates the passband I and Q signals output from the analog/digital A/D conversion unit 104 into baseband I and Q signals, and uses the signals to lock the frequency and phase.

105 . Input the digitized passband I and Q signals to the complex multiplier 201 of the carrier recovery unit 106 .

At this time, the real number component (real) signal r(t) and the imaginary number component (imaginary) signal i(t) output from the phase separator 105 are the same as Mathematical Expression 1 below.

【Mathematical formula 1】

r(t)＝{I(t)+P}cos(w _c t+ψ)—Q(t)sin(w _c t+ψ)

i(t)={I(t)+P}sin(w _c t+ψ)+Q(t)cos(w _c t+ψ)

Here, I(t) is a data signal before modulation (modulation); P is a pilot signal inserted in the transmission part for carrier recovery. Also, w _c is the frequency of the carrier signal present in the input signal; ψ is the phase of the carrier signal present in the input signal. Q(t) is the quadrature signal component of the I(t) signal.

On the one hand, the complex multiplier 201 of the carrier recovery unit 106 multiplies the passband I and Q signals as in the above-mentioned mathematical formula 1 by the reference carrier signal (the digitally controlled oscillator real number component signal NCOI) output by the digitally controlled oscillator NCO 205 , digitally controlled oscillator imaginary number component signal NCOQ), and convert the above-mentioned passband I, Q signals into baseband I, Q signals I ¹ (t), Q ¹ (t) as in the following mathematical formula 2.

【Mathematical formula 2】

I ¹ (t)＝{I(t)+P}cos(△w _c t+ψ)—Q(t)sin(△w _c t+ψ)

Q ¹ (t)＝{I(t)+P}sin(△w _c t+ψ)+Q(t)cos(△w _c t+ψ)

Here, Δw _c is the reference carrier signal generated at the receiving end (digitally controlled oscillator real number component signal NCOI, digitally controlled oscillator imaginary number component signal NCOQ) and the carrier signal (w _c ) frequency error (beat frequency) components.

The baseband I and Q signals are output to the low-pass filter 202 and then output to the symbol clock recovery unit 108 and the digital processing unit 109 through the re-sampling unit 107 .

The low-pass filter 202 low-pass-filters the baseband I and Q signals, extracts only the carrier component, and outputs it to the error detection unit 203 . That is, in the carrier recovery unit 106 that recovers the carrier, since only the peripheral signal of the main control frequency (P) needs to exist in the bandwidth of 6 MHz, the low-pass filter 202 converts the remaining frequency components that have data components from the I, Q signal and prevent performance degradation of the carrier recovery section according to the data.

The error detection unit 203 detects a carrier residual error from the carrier signal, and outputs it to the low-pass filter 204 . That is, in order to prevent momentary erroneous detection of the carrier residual error detected from the error detection unit 203, it is output to the numerically controlled oscillator NCO 205 through the low-pass filter 204. The digitally controlled oscillator NCO 205 outputs the new reference carrier signal (real number component NCOI of the digitally controlled oscillator, imaginary component NCOQ of the digitally controlled oscillator) generated from the output of the low-pass filter 204 to the complex multiplier 201.

When the carrier recovery is completely formed in the carrier recovery unit 106, both Δw _c and ψ are '0', and at this time, the above-mentioned formula 2 becomes the same as the following formula 3.

【Mathematical formula 3】

I ¹ (t)=I(t)+P

Q ¹ (t)=Q(t)

Then, the symbol clock recovery unit 108 recovers the symbol clock using the signal of Mathematical Expression 3, and generates a clock that can be used in all data fields at the receiving end.

However, if the carrier recovery is not completed in the carrier recovery unit 106, the symbol clock recovery unit 108 receives the carrier signal used in the transmission unit and receives The influence of the frequency and phase errors △ _wc and ψ between the reference carrier signals generated at the end makes it difficult to recover the normal symbol clock.

That is, as shown in FIG. 1, if the carrier recovery unit and the symbol clock recovery unit are connected in sequence, the performance of the carrier recovery unit has a greater impact on the performance of the symbol clock recovery unit. Therefore, the symbol clock recovery unit is affected by the The influence of residual carrier frequency and phase errors that flow in without being completely cleared by the carrier recovery unit has a bad influence on the overall performance of the symbol clock recovery unit.

This is because the symbol clock recovery unit is usually located behind the carrier recovery unit; and when the symbol clock recovery unit is designed, it is designed on the premise that all functions of the carrier recovery unit are completed. It can be seen that if the carrier recovery is not completed, the symbol clock recovery is difficult to realize.

Fig. 3 is the compositional block diagram of the digital television TV receiver that comprises symbol clock recovery part, as can be seen from the figure, utilize two squarers 401, 402 and accumulator 403 to eliminate the frequency and phase error caused by not completing carrier recovery.

That is, in the carrier recovery section 303, since the residual phase error can also be eliminated by the first and second squarers 401, 402 and the accumulator 403 when the carrier recovery is not completed, the output to the pre-filter In the 404 signal, no residual phase error is included. This means that the symbol clock recovery unit 400 can work regardless of the residual phase error output by the carrier recovery unit 303; it also means that the symbol clock recovery can be realized more stably.

The prefilter 404 allows only a specific frequency band to pass through the output signal of the accumulator 403 , and outputs it to the synchronization error detection unit 405 .

The synchronous error detection part 405 is used as the synchronous error detection part of the general Gardner (Gardner, name) mode or the corrected Gardner (personal name) mode, and is usually output by the pre-filter 404 to detect the symbol clock synchronous error, that is, the phase error . The synchronous error signal is input to the digitally controlled oscillator NCO 407 through the low-pass filter 406; and the digitally controlled oscillator NCO 407 generates a new compensated double symbol clock frequency (2fs, fs is symbol clock frequency), and output it to the resampling unit 304.

FIG. 4 shows that when the synchronization error detection unit 405 of the symbol clock recovery unit 400 detects the synchronization error in the corrected Gardner (personal name) mode, the carrier recovery is completed and the real component (real) signal and preamble input to the symbol clock recovery unit 400 are completed. Frequency characteristics of filters (pre-filter, band pass filter).

Generally, when using the vestigial sideband VSB (modulation) mode, which is a digital TV transmission mode standard in the United States and Korea, 1 of the symbol clock frequency (fs) is extracted from the frequency characteristics of the real number signal. Restoring the symbol clock with a /2 frequency (fs/2) signal is the basic operation of the symbol clock recovery unit using the corrected Gardner (person's name) mode.

That is, the correction Gardner (personal name) synchronization error detection unit 405 usually utilizes the zero-crossing (zero-crossing) characteristic of the data. The so-called zero-crossing characteristic has such information at the nesting position of the spectrum of two consecutive symbols from the spectrum point of view. ; In other words, the frequency of the above-mentioned two consecutive symbol spectrum overlapping parts is around the fs/2 frequency; the information needed to obtain the synchronization error by using the zero-crossing characteristics of the data received in the corrected Gardner (personal name) mode is only in this location (spectrum nesting location). In addition, in the symbol clock recovery unit 400 , in order to more accurately detect synchronization errors in this part, that is, to obtain a required zero-cross signal, a pre-filter 404 for filtering a band path is used. Therefore, it is the main function of the pre-filter 404 to decimate the frequency (fs/2) signal at 1/2 the symbol clock frequency.

Fig. 5 is the symbol clock recovery part that is not affected by the carrier recovery part, using squarers 401, 402 and accumulator 403 to the real number (real) signal and the imaginary number (imaginary) signal respectively squared and added signal frequency characteristics and for detecting Gardner ( The pre-filter characteristic used for the phase error of the human name) mode.

It can be seen from Fig. 4 and Fig. 5 that if there is no linear noise in the signal input to the antenna, the frequency characteristic of the real signal in the case of completing the carrier recovery and the frequency of the added signal after the square of the real signal and the imaginary signal The characteristics are almost the same, so even the synchronization error detection unit using the Gardner (person's name) mode can operate normally.

However, if there is no frequency (fs/2) signal of 1/2 the symbol clock frequency among the signals input to the symbol clock recovery unit 400, it is impossible to restore signal synchronization. For example, if there is heavy linear noise in the transmission channel and there is no signal at frequency 1/2 of the symbol frequency (fs/2), it is impossible to achieve symbol clock recovery.

Figure 6 shows the frequency characteristics when in-phase linear noise with the same magnitude as the original signal and correctly delayed by 1 symbol exists on the transmission channel.

FIG. 7 shows the frequency characteristics of each signal in the case where the magnitude is the same as that of the original signal and there is correct quadrature phase (quadrature) linear noise delayed by 2 symbols.

It can be seen from FIG. 6 and FIG. 7 that there is no case of a 1/2 frequency (fs/2) signal of the symbol clock frequency at all. In this case symbol clock recovery cannot be achieved in corrected Gardner mode.

Contents of the invention

The present invention is proposed to solve the above-mentioned existing problems, and its object is to provide a digital television TV receiver that can correctly recover the symbol clock even when the fs/2 frequency portion of the synchronization signal is distorted by ghosting or the like. symbol clock device.

Proposed in order to achieve the above object according to the symbol clock recovery device of the digital television TV of the present invention is made of the following parts: the analog passband signal is sampled with the analog/digital A/D clock frequency and converted into a digital passband signal An analog/digital A/D conversion section; a carrier recovery section that multiplies a digital passband signal by a reference carrier signal generated through a carrier recovery process and converts it into a digital baseband signal; in a digital television TV receiver including a carrier recovery section Among them, the symbol clock recovery part adds the real number component and the imaginary number component signal of the digital baseband that the carrier recovery part outputs and outputs the operation part of the result after square addition; The squarer that squares the output of the square operation part again; According to the squarer output to Symbol time recovery part; in the digital television TV receiver comprising the carrier recovery part, the symbol clock recovery part adds the real number component and the imaginary number component signal of the digital baseband output by the carrier recovery part to the arithmetic unit which outputs the result after square addition; to The squaring unit outputs a squarer for re-squaring; a pre-filter for filtering around 1/2 of the symbol clock frequency based on the output of the squarer; the difference between two symbol samples passed through the pre-filter is multiplied by an intermediate sample value, and detects the Gardner (person's name) synchronization error detection part of the signal related to the synchronization error; in the synchronization error signal output by the Gardner (person's name) synchronization error detection part, only low-frequency band signal component filtering is performed, and according to the filtered synchronization error signal Low-band signal content, resulting in a new double symbol clock frequency filter and oscillator that is compensated.

The computing section adds the squares of the digital passband real number component and imaginary number component signals output from the analog/digital A/D conversion section, and outputs the result.

The calculation unit adds the absolute values of the real number component and the imaginary number component of the digital baseband output from the carrier recovery unit, and outputs the result.

The computing section adds the absolute values of the digital passband real number components and imaginary number components output from the analog/digital A/D conversion section, and outputs the result.

If the analog/digital A/D clock frequency of the analog/digital A/D conversion section is a fixed frequency, the real number component and the imaginary number component of the digital baseband output by the carrier recovery section are set between the carrier recovery section and the symbol clock recovery section The signal is re-sampled at twice the clock frequency and interpolated by each re-sampling unit (that is, there is one more re-sampling unit); and the double-symbol clock frequency generated by the symbol clock recovery unit is output to the re-sampling unit.

The analog/digital A/D conversion unit uses twice the symbol clock frequency generated by the symbol clock recovery unit as the analog/digital A/D clock frequency.

The advantages of the present invention are as above-mentioned, according to the digital TV TV symbol clock recovery device of the present invention, new information thereby carries out the recovery of the symbol clock; also can be in the situation that carrier recovery is finished, or the 1/2 frequency of the symbol clock frequency of reason such as ghosting In the absence of (fs/2) information, the correct symbol clock recovery can still be performed stably, so not only the performance of the symbol clock recovery algorithm is improved, but also the overall performance of the system can be improved.

Description of drawings

Figure 1 is a block diagram of a general digital TV receiver.

FIG. 2 is a general configuration diagram of the carrier recovery unit in FIG. 1 .

Fig. 3 is a block diagram showing an example of the symbol clock recovery unit in Fig. 1 .

Fig. 4 is the synchronous error detection part of the symbol clock recovery part in Fig. 1, in the case of detecting the synchronization error in the corrected Gardner (personal name) mode, the real number signal and the pre-filter frequency input to the symbol clock recovery part after the carrier recovery is completed characteristic map.

5 is a signal frequency characteristic of the square addition of the real number signal and the imaginary number signal in the symbol clock recovery part of FIG. 1 and a characteristic diagram of a prefilter used for phase error detection in the Gardner (person's name) mode.

Figure 6 shows the frequency characteristics of the real signal in the symbol clock recovery part of Figure 1 and the real and imaginary signals in the case that the same phase (in phase) linear noise with a correct delay of 1 symbol exists on the transmission channel. The frequency characteristics of the respective square-summed signals, and the frequency characteristics of the pre-filter.

Figure 7 shows the frequency characteristics of the real signal in the symbol clock recovery part of Figure 1 and the squared addition signals of the real and imaginary signals in the case of the same magnitude as the original signal and the existence of correct quadrature noise with a delay of 2 symbols The frequency characteristics of , and the frequency characteristics of the pre-filter.

FIG. 8 is a block diagram of a digital television TV receiver having a symbol clock recovery unit according to the present invention.

Figure 9 shows the output frequency characteristics of the accumulator in the symbol clock recovery part of Figure 8 and the output of the third squarer in the case that the signal has the same magnitude and is correctly delayed by 1 symbol in phase (in phase) linear noise exists on the transmission channel Frequency characteristics, and the output frequency characteristics diagram of the pre-filter.

Explanation of symbols for main parts of drawings:

801: Analog/digital A/D conversion unit; 802: Phase separator;

803: Carrier Recovery Department; 804: Resampling Department;

900: symbol clock recovery unit; 901, 902, 904: squarer;

903: accumulator; 905: pre-filter;

906: Correct the Gardner (name) synchronization error detection unit;

907: low-pass filter; 908: digitally controlled oscillator NCO.

Detailed ways

Other objects, features, problems, and the like of the present invention can be understood by describing examples with reference to the accompanying drawings.

Hereinafter, the structure and function of the example of the present invention will be described with reference to the drawings. It is carried out according to at least one or more examples of the structure and function of the present invention described on the drawings, but it is not limited by these descriptions of the technical idea of the present invention and its core structure and function.

FIG. 8 is a block diagram of a digital television TV receiver including a symbol clock recovery device according to the present invention. The analog/digital A/D conversion unit 801 converts the input analog passband signal into a digital passband signal, and outputs it to the phase separator 802 . The phase separator 802 separates the real number component (I) and imaginary number component (Q) signals of the digital passband signal, and outputs the signals to the carrier recovery unit 803 . The carrier recovery unit 803 multiplies the digital passband I and Q signals by the reference carrier signal, converts the passband I and Q signals into digital baseband I and Q signals, and outputs them to the resampling unit 804 . The resampling unit 804 samples the baseband I and Q signals at twice the symbol clock frequency (2fs) output by the symbol clock recovery unit 900 and outputs the interpolated signals to the symbol clock recovery unit 900 .

The symbol clock recovery part 900 is composed of the following parts: the first squarer 901 for squaring the digital passband real number component signal (I"(t)) output by the re-sampling part 804; the imaginary number component signal (Q"(t)) The second squarer 902 for squaring; the accumulator 903 for adding the two squared values output by the first and second squarers 901 and 902; the third squarer 904 for re-squaring the output of the accumulator 903; The pre-filter 905 that allows the edge part of the spectrum to be output by the 3rd squarer 904; the Gardner (person's name) synchronization error detection section 906 of the signal related to the synchronization error detected by the signal passing through the pre-filter 905; after correcting the Gardner (person's name) In the synchronous error signal output by the synchronous error detection section 906, the low-pass filter 907 that only filters the low-band signal component; The digitally controlled oscillator NCO 908 which is adjusted by the synchronous sampling of 804 constitutes.

The first squarer 901 of the symbol clock recovery part 900 of the present invention having the above-mentioned structure squares the I signal (I"(t)) of the output baseband which has been interpolated by the resampling part 804; and the second squarer 902 squares The interpolated output baseband Q signal (Q″(t)) of the resampling unit 804 is squared and output to the accumulator 903 . When the two squared signals are added in the accumulator 903, they are converted into baseband I and Q signals in which the carrier component is removed.

At this time, when the input {I"(t), Q"(t)} of the first and second squarers 901, 902 is expressed by a mathematical formula, if all carrier recovery is completed, it is the same as the above-mentioned mathematical formula 3; if If the carrier recovery operation is not completed, it is the same as Mathematical Expression 2 above.

And, when all carrier recovery is completed, the outputs of the first and second squarers 901 and 902 are the same as Mathematical Expression 4 below.

【Mathematical formula 4】

{I"(t)} ² ＝{I(t)+P} ² ＝I ² (t)+P ² +2PI(t)

{Q"(t)} ² = Q ² (t)

If the carrier recovery has not been completed, the outputs of the first and second squarers (901, 902) are the same as Mathematical Expression 5 below.

【Mathematical formula 5】

{I"(t)} ² ＝[{I(t)+P}cos(△w _c t+ψ)—Q(t)sin(△w _c t+ψ)] ²

＝{I(t)+P} ² cos ² (△w _c t+ψ)+Q ² (t)sin ² (△w _c t+ψ)

—2{I(t)+P}Q(t)cos(△w _c t+ψ)sin(△w _c t+ψ)

{Q"(t)} ² ＝[{I(t)+P}sin(△w _c t+ψ)+Q(t)cos(△w _c t+ψ)] ²

＝{I(t)+P} ² sin ² (△w _c t+ψ)+Q ² (t)cos ² (△w _c t+ψ)

+2{I(t)+P}Q(t)sin(△w _c t+ψ)cos(△w _c t+ψ)

However, the output of the accumulator (903) that adds up the outputs of the first and second squarers (901, 902) is the same as the following Mathematical Expression 6 regardless of whether the carrier recovery is fully completed or not.

【Mathematical formula 6】

X(t)＝I ² (t)+Q ² (t)+P ² +2P I(t)

That is, if the symbol clock is recovered from the output of the accumulator 903, the symbol clock is recovered without being affected by any carrier.

In addition, the output of the accumulator 903 that cancels the carrier frequency and phase error components output by the carrier recovery unit 803, in order to recover the symbol clock even when there is no information of 1/2 frequency (fs/2) of the symbol clock frequency, set It is input to the third squarer 904 for squaring. The output of the squarer 904 is input to a corrected Gardner (person's name) synchronization error detection unit 906 through a pre-filter 905 that allows only the edge portion of the spectrum to pass.

Fig. 9 is the same as the original signal magnitude, and the accumulator 903 output characteristic, the output frequency characteristic of the 3rd squarer 904 under the situation that the same phase (in phase) linear noise of correctly delaying one symbol exists on the transmission channel, and The prefilter 905 outputs frequency characteristics. It can be seen from FIG. 9 that the 1/2 frequency (fs/2) information of the symbol clock frequency does not exist in the frequency characteristic of the output signal of the accumulator 903 at all. However, in the frequency characteristic output from the third squarer 904, there is new information of a frequency 1/2 (fs/2) of the symbol clock frequency. This is because the 1/4 frequency (fs/4) component of the symbol clock frequency is shifted while the output of the accumulator 903 is squared. The pre-filter 905 filters the vicinity of 1/2 frequency (fs/2) of the symbol clock frequency output from the third squarer 904, and outputs it to the corrected Gardner (person's name) synchronization error detection unit 906 .

Furthermore, since the corrected Gardner (person's name) synchronization error detection unit 906 can extract the synchronization error signal of the symbol clock, recovery of the symbol clock can be performed.

That is, the corrected Gardner (person's name) synchronization error detection unit 906 multiplies the difference between two symbol samples passed through the prefilter 905 by one intermediate sample value to detect a synchronization error signal. The synchronization error signal detected by the Gardner (person's name) synchronization error detection unit 906 is input to the digitally controlled oscillator NCO 908 through the low-pass filter 907. The digitally controlled oscillator NCO 908 generates a new compensated double symbol clock frequency (2fs, where fs is the symbol clock frequency) from the low-pass filtered synchronization error signal, and outputs it to the resampling unit 804.

At this time, instead of using the first and second squarers 901, 902 and accumulator 903, only the squarer 904 is used to square the real number component signal output by the resampling section 804, and then input to the pre-filter to obtain the same Figure 9 is almost the same result; but at this time, since the influence of the carrier signal component contained in the real number component also moves at the same time, it is impossible to normally perform the symbol clock recovery operation without completing the carrier recovery.

On the one hand, the symbol clock recovery unit 900 of the present invention recovers the symbol clock, and if two squarers 901, 902 and accumulator 903 are used, it will not be affected by any carrier recovery unit at all; as another example of the present invention, by The symbol clock recovery unit 900 can recover the symbol clock without passing the band signal through the carrier recovery unit 803 .

As yet another example of the present invention, if instead of the first and second squarers 901 and 902, two absolute value calculation sections that respectively obtain the absolute values of the I and Q signals of the baseband are used, then it is possible to constitute not only reducing The hardware load generated when squared, and constitutes a symbol clock recovery unit that is not affected by the carrier recovery unit.

In addition, the analog/digital A/D conversion unit 801 of the present invention utilizes a fixed frequency output from a fixed oscillator (not shown in the figure) or a double symbol clock output from a variable oscillator (not shown in the figure). Frequency (2fs), can convert analog passband signal to digital passband signal. At this time, since the fixed frequency generated by the fixed oscillator is higher than twice the symbol clock frequency (2fs) and cannot be adjusted, it is necessary to set a digital A resampling unit 804 for interpolating the baseband signal at twice the symbol clock frequency (2fs); if a variable oscillator is used, the resampling unit 804 is not required.

For other examples as mentioned above, if the present invention additionally arranges a squarer between the accumulator and the pre-filter, the result obtained as in Fig. 9 can be obtained; The recovery of the symbol clock can also be carried out when there is a large distortion near the symbol clock frequency 1/2 frequency (fs/2) or there is no such frequency.

Through the content of the above description, it is conceivable that there are many improvements and modifications in the same industry without departing from the technical scope of the present invention.

In addition, the technical scope of the present invention is not limited by the content of the description of the examples, but determined by the claims.

Claims (6)

1. A symbol clock recovery device for digital television is characterized in that it includes an analog/digital converter that samples an analog passband signal with an analog/digital clock frequency and converts it into a digital passband signal; The signal is multiplied by the reference carrier signal generated by the carrier recovery process, and converted into a carrier recovery part of the digital baseband signal; An operation unit that outputs the result after adding the squares of the real number component and imaginary number component signals of the digital baseband output by the carrier recovery unit; A squarer for re-squaring the output of the operation unit; A pre-filter that filters 1/2 the symbol clock frequency in the squarer output signal; A Gardner (Gardner) synchronization error detection unit that detects a synchronization error signal by multiplying two sampling differences of the pre-filter by an intermediate sampling value; In the synchronous error signal output by the Gardner (Gardner) synchronous error detection unit, only the low frequency band signal component is filtered, and a new compensated 2 times symbol clock frequency is generated according to the filtered synchronous error signal low frequency band signal component filters and oscillators; The symbol clock recovery part is composed of the operation part, squarer, pre-filter, Gardner (Gardner) synchronization error detection part, filter and oscillator. 2. The symbol clock recovery device of digital television according to claim 1, characterized in that said computing unit is to the digital passband real number component and imaginary number component signal output by the analog/digital conversion unit, output after the respective square addition as a result. 3. the symbol clock recovery device of digital television according to claim 1, it is characterized in that described operation part is to the digital baseband real number component and the imaginary number component signal of carrier recovery part output, respectively get its absolute value and add and output its result. 4. The symbol clock recovery device of digital television according to claim 1, characterized in that said computing unit is for the digital passband real number component and imaginary number component signals output by the analog/digital conversion unit, respectively get its absolute value phase Output the result after adding. 5. the symbol clock recovery device of digital television according to claim 1, is characterized in that if the clock frequency of the analog/digital of analog/digital conversion part is fixed frequency, then between carrier recovery part and symbol clock recovery part, Add a digital baseband real number component and imaginary number component signal output by the carrier recovery part, re-sample and interpolate a re-sampling part with 2 times the symbol clock frequency, that is, have one more re-sampling part; and the 2 symbols clock recovery part produces times the symbol clock frequency is output to the resampling unit. 6. The symbol clock recovery device of digital television according to claim 1, characterized in that said analog/digital conversion unit uses twice the symbol clock frequency generated by the symbol clock recovery unit as the analog/digital clock frequency.

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