CN100492231C - Six degrees of freedom real-time active vibration control system based on DSP control card - Google Patents
Six degrees of freedom real-time active vibration control system based on DSP control card Download PDFInfo
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Abstract
基于DSP控制卡的六自由度实时主动振动控制系统,包括:基座、六自由度减振平台、电荷放大器和低通滤波器、功率放大器、信号调理电路和DSP控制卡,六个加速度传感器检测来自干扰源传递到减振平台的6路误差信号,这6路误差信号分别通过6路电荷放大器和6路低通滤波器,以及干扰源的扰动信号共7路信号进入DSP控制卡;DSP控制卡控制两个A/D转换器采集这7路信号,再通过其控制算法进行实时分析和控制计算,将待控制的6路数字量输出到两个D/A转换器,D/A转换的数字信号经过6路功率放大器放大之后,提供给六根超磁致伸缩作动器,使作动器产生相应的伸长或收缩,通过六个加速度传感器检测,低通滤波器反馈到DSP控制卡中,如此反复进行,实现六自由度实时主动振动控制。本发明具有快速、实时和高精度控制的优点,有效地提高了系统的抗干扰能力。
Six degrees of freedom real-time active vibration control system based on DSP control card, including: base, six degrees of freedom vibration reduction platform, charge amplifier and low-pass filter, power amplifier, signal conditioning circuit and DSP control card, six acceleration sensor detection The 6-way error signals transmitted from the interference source to the vibration reduction platform, these 6-way error signals pass through 6-way charge amplifiers and 6-way low-pass filters, and a total of 7 signals of disturbance signals from the interference source enter the DSP control card; DSP control The card controls two A/D converters to collect the 7-channel signals, and then performs real-time analysis and control calculation through its control algorithm, and outputs the 6-channel digital quantities to be controlled to the two D/A converters. After the digital signal is amplified by the 6-way power amplifier, it is provided to the six giant magnetostrictive actuators, so that the actuators produce corresponding elongation or contraction, detected by six acceleration sensors, and fed back to the DSP control card by the low-pass filter , so repeated, real-time active vibration control with six degrees of freedom is realized. The invention has the advantages of fast, real-time and high-precision control, and effectively improves the anti-interference ability of the system.
Description
技术领域 technical field
本发明涉及一种用于六自由度振动控制系统,特别是一种基于DSP控制卡的六自由度实时主动振动控制系统,用于对微幅高精度主动振动控制。The invention relates to a six-degree-of-freedom vibration control system, in particular to a six-degree-of-freedom real-time active vibration control system based on a DSP control card, which is used for micro-amplitude high-precision active vibration control.
背景技术 Background technique
在工业领域中的一些精密仪器上,控制系统对基座稳定的要求十分高,比如半导体加工、精密光学仪器加工等,对基座振动的水平要求平动以微米计,转动以微弧度计。在对基座的振动输入和基座平台的响应进行实时测量、实时测试的基础上,通过计算机提供的控制算法,和超磁致伸缩作动器使其在基座低频微幅振动的环境中保持稳定状态。现有的控制系统多由工业控制机、A/D和D/A卡组成,体积庞大,抗干扰能力差,且不具有实时、快速控制功能。In some precision instruments in the industrial field, the control system has very high requirements on the stability of the base, such as semiconductor processing, precision optical instrument processing, etc. The vibration level of the base is required to be measured in microns for translation and micro-radians for rotation. On the basis of real-time measurement and real-time testing of the vibration input of the base and the response of the base platform, through the control algorithm provided by the computer and the giant magnetostrictive actuator, it can be used in the environment of low-frequency micro-amplitude vibration of the base. Hold steady. Most of the existing control systems are composed of industrial control machines, A/D and D/A cards, which are bulky, have poor anti-interference ability, and do not have real-time and fast control functions.
发明内容 Contents of the invention
本发明的技术解决问题:克服现有技术的不足,提供一种快速、实时和高精度控制,而且有效地提高了系统的抗干扰能力的基于DSP控制卡的六自由度实时主动振动控制系统。The technical problem of the present invention is to overcome the deficiencies of the prior art, provide a fast, real-time and high-precision control, and effectively improve the anti-interference ability of the system, a six-degree-of-freedom real-time active vibration control system based on a DSP control card.
本发明的技术解决方案:基于DSP控制卡的六自由度实时主动振动控制系统,其特点在于包括:基座、六自由度减振平台、电荷放大器和低通滤波器、功率放大器、信号调理电路和DSP控制卡,六自由度减振平台位于基座上,六自由度减振平台中的六个加速度传感器检测来自干扰源传递到减振平台的6路误差信号,这6路误差信号分别通过6路电荷放大器和6路低通滤波器,以及干扰源的扰动信号经过低通滤波器后,共7路信号进入DSP控制卡;DSP控制卡控制两个A/D转换器采集这7路信号,再通过DSP控制卡的控制算法进行实时分析和控制计算,将待控制的6路数字量输出到两个D/A转换器,变换成6路模拟量输出到后置6路低通滤波器中,变换成平滑的模拟量输出,这6路模拟量经过6路功率放大器放大之后,提供给六根超磁致伸缩作动器,使作动器产生相应的伸长或收缩,平台的上平面保持相对稳定,再通过六个加速度传感器检测,进而再通过低通滤波器反馈到DSP控制卡中,如此反复进行,从而实现六自由度实时主动振动控制。The technical solution of the present invention: a six-degree-of-freedom real-time active vibration control system based on a DSP control card, which is characterized in that it includes: a base, a six-degree-of-freedom vibration damping platform, a charge amplifier and a low-pass filter, a power amplifier, and a signal conditioning circuit and DSP control card, the six-degree-of-freedom vibration-damping platform is located on the base, and the six acceleration sensors in the six-degree-of-freedom vibration-damping platform detect the 6-way error signals transmitted from the interference source to the vibration-damping platform, and the 6-way error signals pass through the 6-way charge amplifier and 6-way low-pass filter, and after the disturbance signal of the interference source passes through the low-pass filter, a total of 7-way signals enter the DSP control card; the DSP control card controls two A/D converters to collect these 7-way signals , and then conduct real-time analysis and control calculation through the control algorithm of the DSP control card, output the 6 digital quantities to be controlled to two D/A converters, convert them into 6 analog quantities and output them to the rear 6 low-pass filters After being amplified by the 6-way power amplifier, the 6-way analog quantity is provided to the six giant magnetostrictive actuators, so that the actuators can elongate or contract accordingly, and the upper plane of the platform Keep relatively stable, and then detect through six acceleration sensors, and then feed back to the DSP control card through a low-pass filter, and so on, so as to realize real-time active vibration control with six degrees of freedom.
所述的DSP控制卡包括DSP电路、电源管理电路、A/D转换器、D/A转换电路、逻辑时序控制电路、异步串口RS232转换电路,电源管理电路为DSP电路提供稳定的供电电路,使DSP电路能够正常工作;A/D转换器,它与DSP电路相接,将输入的模拟信号转换成数字信号;D/A转换电路,与DSP电路相接,将数字信号转换成模拟信号;逻辑时序控制CPLD电路分别与DSP电路、A/D转换器、D/A转换器和总线发送接收器相接,用于A/D转换器、D/A转换器和总线发送接收器的逻辑时序控制;异步串口RS232电平转换电路分别与DSP电路和上位计算机相接,用于将数据传至上位计算机。Described DSP control card comprises DSP circuit, power management circuit, A/D converter, D/A conversion circuit, logic sequence control circuit, asynchronous serial port RS232 conversion circuit, power management circuit provides stable power supply circuit for DSP circuit, makes The DSP circuit can work normally; the A/D converter, which is connected with the DSP circuit, converts the input analog signal into a digital signal; the D/A conversion circuit, connected with the DSP circuit, converts the digital signal into an analog signal; logic Timing control CPLD circuit is connected with DSP circuit, A/D converter, D/A converter and bus transmitter and receiver respectively, and is used for logic timing control of A/D converter, D/A converter and bus transmitter and receiver ; The asynchronous serial port RS232 level conversion circuit is connected with the DSP circuit and the upper computer respectively, and is used to transmit the data to the upper computer.
所述的DSP控制卡包括核心板电路和扩展板电路,核心板的插针与扩展板的插座相接,使二者成为一体:核心板电路包括DSP电路、电源管理电路,DSP电路分别与核心板电源管理电路、同步动态随机存储器和快擦写存储器相接;扩展板电路包括两个A/D转换器、两个D/A转换器、逻辑时序控制CPLD电路、异步串口RS232电平转换电路和扩展板电源管理电路,核心板电源管理电路为DSP电路提供稳定的供电电路,使DSP电路能够正常工作;通过核心板和扩展板之间的插针和插座,A/D转换器,与DSP电路相接,将输入的模拟信号转换成数字信号;D/A转换器,与DSP电路相接,将数字信号转换成模拟信号;逻辑时序控制CPLD电路分别与DSP电路、A/D转换器、D/A转换器和总线发送接收器相接,用于A/D转换器、D/A转换器和总线发送接收器的逻辑时序控制;异步串口RS232电平转换电路分别与DSP电路和上位计算机相接,用于将数据传至上位计算机。Described DSP control card comprises core board circuit and expansion board circuit, and the pin of core board joins with the socket of expansion board, makes the two become one: core board circuit comprises DSP circuit, power supply management circuit, and DSP circuit is connected with core respectively. Board power management circuit, synchronous dynamic random access memory and flash memory are connected; expansion board circuit includes two A/D converters, two D/A converters, logic timing control CPLD circuit, asynchronous serial port RS232 level conversion circuit And the expansion board power management circuit, the core board power management circuit provides a stable power supply circuit for the DSP circuit, so that the DSP circuit can work normally; through the pins and sockets between the core board and the expansion board, the A/D converter, and the DSP The circuit is connected to convert the input analog signal into a digital signal; the D/A converter is connected to the DSP circuit to convert the digital signal into an analog signal; the logic sequence control CPLD circuit is connected to the DSP circuit, A/D converter, The D/A converter is connected with the bus transmitter and receiver for logic sequence control of the A/D converter, D/A converter and bus transmitter and receiver; the asynchronous serial port RS232 level conversion circuit is connected with the DSP circuit and the host computer respectively It is used to transmit data to the host computer.
本发明与现有技术相比的优点在于:采用基于DSP控制卡,六自由度减振平台在微幅(微米级)、低频(10~100Hz)下的减振功能得以实现;而且减小了主控设备的体积,提高了系统的抗干扰能力,工作稳定;实验证明减振效果达到95%以上。另外,采用基于DSP控制卡,使硬件电路数字化、集成化,输入电压范围可切换成在±5V或±10V,实现了高性能的DSP控制卡电路。此外,本发明的DSP还可以采用层叠式结构,即DSP电路和其他电路不在同一电路板上,具有互换性强的特点,可以根据实际控制需要,只更换核心板或扩展板而不必全部更换电路板即可,特别易于维护。Compared with the prior art, the present invention has the advantages that: the damping function of the six-degree-of-freedom damping platform at a slight amplitude (micron level) and low frequency (10-100 Hz) can be realized by adopting a DSP-based control card; The volume of the main control equipment improves the anti-interference ability of the system, and the work is stable; the experiment proves that the vibration reduction effect reaches more than 95%. In addition, the DSP-based control card is used to digitize and integrate the hardware circuit, and the input voltage range can be switched to ±5V or ±10V, realizing a high-performance DSP control card circuit. In addition, the DSP of the present invention can also adopt a stacked structure, that is, the DSP circuit and other circuits are not on the same circuit board, and has the characteristics of strong interchangeability. According to actual control needs, only the core board or the expansion board can be replaced without replacing all of them. The circuit board is enough, especially easy to maintain.
附图说明 Description of drawings
图1为本发明的结构框图;Fig. 1 is a block diagram of the present invention;
图2为本发明的DSP控制卡电路结构框图;Fig. 2 is the block diagram of DSP control card circuit structure of the present invention;
图3为本发明的DSP控制卡工作程序流程图;Fig. 3 is a flow chart of the DSP control card work program of the present invention;
图4为本发明的CPLD逻辑、时序控制电路的框图;Fig. 4 is the block diagram of CPLD logic of the present invention, sequence control circuit;
图5为本发明的DSP芯片通过CPLD控制A/D转换器、总线发送接收器的逻辑时序控制图;Fig. 5 is that DSP chip of the present invention controls the logic sequence control figure of A/D converter, bus transmitter receiver by CPLD;
图6为本发明的DSP芯片通过CPLD控制D/A转换器、总线发送接收器的逻辑时序控制图;Fig. 6 is that DSP chip of the present invention controls the logic sequence control figure of D/A converter, bus transmitter receiver by CPLD;
图7为本发明的电源管理电路框图;Fig. 7 is a block diagram of the power management circuit of the present invention;
图8为本发明的异步串口RS232转换电路原理图;Fig. 8 is a schematic diagram of the asynchronous serial port RS232 conversion circuit of the present invention;
图9为普通自适应滤波器LMS原理框图;Fig. 9 is the functional block diagram of common adaptive filter LMS;
图10为本发明的LMS控制原理图;Fig. 10 is the LMS control schematic diagram of the present invention;
图11为本发明的LMS控制算法流程图;Fig. 11 is the flow chart of the LMS control algorithm of the present invention;
图12、图13为本发明的控制效果图,其中图12是控制过程中A/D采集的六个误差信号,图13是控制过程中D/A输出的六个控制输出量。Figure 12 and Figure 13 are control effect diagrams of the present invention, wherein Figure 12 shows six error signals collected by A/D during the control process, and Figure 13 shows six control output quantities output by D/A during the control process.
具体实施方式 Detailed ways
如图1所示,本发明包括:基座、六自由度减振平台、电荷放大器和低通滤波器、功率放大器、信号调理电路和DSP控制卡,六自由度减振平台位于基座上,六自由度减振平台中的六个加速度传感器检测来自干扰源传递到减振平台的6路误差信号,这6路误差信号分别通过6路电荷放大器和6路低通滤波器,以及干扰源的扰动信号经过低通滤波器后,共7路信号进入DSP控制卡;DSP控制卡控制两个A/D转换器采集这7路信号,再通过DSP控制卡的控制算法进行实时分析和控制计算,将待控制的6路数字量输出到两个D/A转换器,变换成6路模拟量输出到后置6路低通滤波器中,变换成平滑的模拟量输出,这6路模拟量经过6路功率放大器放大之后,提供给六根超磁致伸缩作动器,使作动器产生相应的伸长或收缩,平台的上平面保持相对稳定,通过六个加速度传感器检测后通过低通滤波器反馈到DSP控制卡中,如此反复进行,从而实现六自由度实时主动振动控制。As shown in Figure 1, the present invention comprises: base, six-degree-of-freedom vibration-damping platform, charge amplifier and low-pass filter, power amplifier, signal conditioning circuit and DSP control card, and six-degree-of-freedom vibration-damping platform is positioned on the base, The six acceleration sensors in the six-degree-of-freedom vibration damping platform detect 6 error signals transmitted from the interference source to the vibration damping platform. The 6 error signals pass through the 6 charge amplifiers and 6 low-pass filters respectively, and After the disturbance signal passes through the low-pass filter, a total of 7 signals enter the DSP control card; the DSP control card controls two A/D converters to collect these 7 signals, and then performs real-time analysis and control calculation through the control algorithm of the DSP control card. Output the 6 channels of digital quantities to be controlled to two D/A converters, convert them into 6 channels of analog outputs, and send them to the rear 6 channels of low-pass filters to convert them into smooth analog outputs. The 6 channels of analog quantities are passed through After the 6-way power amplifier is amplified, it is provided to six giant magnetostrictive actuators, so that the actuators can elongate or contract accordingly, and the upper plane of the platform remains relatively stable. After being detected by six acceleration sensors, it passes through a low-pass filter. Feedback to the DSP control card, so repeated, so as to achieve real-time active vibration control of six degrees of freedom.
如图2所示,所述的DSP控制卡包括DSP电路、电源管理电路、A/D转换器、D/A转换电路、逻辑时序控制电路、异步串口RS232转换电路,电源管理电路为DSP电路提供稳定的供电电路,使DSP电路能够正常工作;A/D转换器,它与DSP电路相接,将输入的模拟信号转换成数字信号;D/A转换电路,与DSP电路相接,将数字信号转换成模拟信号;逻辑时序控制CPLD电路分别与DSP电路、A/D转换器、D/A转换器和总线发送接收器相接,用于A/D转换器、D/A转换器和总线发送接收器的逻辑时序控制;异步串口RS232电平转换电路分别与DSP电路和上位计算机相接,用于将数据传至上位计算机。As shown in Fig. 2, described DSP control card comprises DSP circuit, power management circuit, A/D converter, D/A conversion circuit, logic sequence control circuit, asynchronous serial port RS232 conversion circuit, power management circuit provides DSP circuit A stable power supply circuit enables the DSP circuit to work normally; A/D converter, which connects with the DSP circuit, converts the input analog signal into a digital signal; D/A conversion circuit, connects with the DSP circuit, converts the digital signal Converted into analog signals; logic timing control CPLD circuit is connected with DSP circuit, A/D converter, D/A converter and bus transmitter and receiver respectively, for A/D converter, D/A converter and bus transmission Receiver's logic timing control; asynchronous serial port RS232 level conversion circuit is connected with DSP circuit and host computer respectively, and is used to transmit data to host computer.
此外,本发明的DSP控制卡还可以采用层叠式结构,即DSP电路和其他电路不在同一电路板上,它主要包括核心板电路和扩展板电路,核心板的插针与扩展板的插座相接,使二者成为一体:核心板电路包括DSP电路、电源管理电路,DSP电路分别与核心板电源管理电路、同步动态随机存储器和快擦写存储器相接;扩展板电路包括两个A/D转换器、两个D/A转换器、逻辑时序控制CPLD电路、异步串口RS232电平转换电路和扩展板电源管理电路,核心板电源管理电路为DSP电路提供稳定的供电电路,使DSP电路能够正常工作;通过核心板和扩展板之间的插针和插座,A/D转换器,与DSP电路相接,将输入的模拟信号转换成数字信号;D/A转换器,与DSP电路相接,将数字信号转换成模拟信号;逻辑时序控制CPLD电路分别与DSP电路、A/D转换器、D/A转换器和总线发送接收器相接,用于A/D转换器、D/A转换器和总线发送接收器的逻辑时序控制;异步串口RS232电平转换电路分别与DSP电路和上位计算机相接,用于将数据传至上位计算机。In addition, the DSP control card of the present invention can also adopt a stacked structure, that is, the DSP circuit and other circuits are not on the same circuit board, and it mainly includes a core board circuit and an expansion board circuit, and the pins of the core board are connected with the sockets of the expansion board. , so that the two become one: the core board circuit includes a DSP circuit, a power management circuit, and the DSP circuit is connected to the core board power management circuit, synchronous dynamic random access memory and flash memory respectively; the expansion board circuit includes two A/D converters device, two D/A converters, logic timing control CPLD circuit, asynchronous serial port RS232 level conversion circuit and expansion board power management circuit, the core board power management circuit provides a stable power supply circuit for the DSP circuit, so that the DSP circuit can work normally ; Through the pins and sockets between the core board and the expansion board, the A/D converter is connected with the DSP circuit, and the input analog signal is converted into a digital signal; the D/A converter is connected with the DSP circuit, and the The digital signal is converted into an analog signal; the logic timing control CPLD circuit is connected with the DSP circuit, A/D converter, D/A converter and bus transmitter and receiver respectively, and is used for the A/D converter, D/A converter and The logic timing control of the bus transmitter and receiver; the asynchronous serial port RS232 level conversion circuit is connected with the DSP circuit and the upper computer respectively, and is used to transmit the data to the upper computer.
如图3所示,DSP控制卡的工作程序流程:(1)DSP控制卡加电;(2)引导程序加载(把引导程序从Flash ROM中复制到内存的0地址处);(3)DSP芯片初始化配置,红、绿指示灯闪亮;(4)等待上位计算机通过串口通信修改参数。红、绿指示灯亮;(5)是否接收到参数修改的控制字:若接收到,进行下一步,若没有接收到,返回到(4);(6)使能定时器中断。绿色指示灯灭,红色指示灯常亮。开始用LMS算法进行控制;(7)是否接收到非正常退出的命令字:若接收到,返回到(4),若没有接收到,进行下一步;(8)中断到来,运行LMS算法:A/D采样,数据处理,发送数据到D/A;(9)处理所得的数据与相关的条件相比较:若条件符合,进行下一步,控制完成,若条件不符合,返回到(7);(10)关闭定时器中断。红、绿指示灯亮;(11)保存数据:通过异步串口通信,将A/D采样所得数据和处理后发送到D/A的数据传送到上位计算机;(12)红、绿指示灯交替闪亮,系统控制过程完成。As shown in Figure 3, the working program flow of the DSP control card: (1) power on the DSP control card; (2) bootloader loading (copy the bootloader from the Flash ROM to address 0 of the memory); (3) DSP Chip initialization configuration, red and green indicator lights flashing; (4) Wait for the upper computer to modify parameters through serial port communication. The red and green indicator lights are on; (5) whether the control word for parameter modification is received: if received, go to the next step; if not received, return to (4); (6) enable the timer interrupt. The green indicator light is off, and the red indicator light is always on. Start to control with the LMS algorithm; (7) whether to receive the command word of abnormal exit: if received, return to (4), if not received, proceed to the next step; (8) interrupt arrival, run the LMS algorithm: A /D sampling, data processing, sending data to D/A; (9) comparing the processed data with relevant conditions: if the conditions are met, proceed to the next step, and the control is completed; if the conditions are not met, return to (7); (10) Turn off the timer interrupt. The red and green indicator lights are on; (11) Save data: through asynchronous serial communication, the data sampled by the A/D and the data sent to the D/A after processing are sent to the host computer; (12) The red and green indicator lights flash alternately , the system control process is completed.
本发明的DSP电路包括DSP芯片、同步动态随机存储器SDRAM、快擦写存储器Flash ROM及时钟电路,同步动态随机存储器用作存储数据,快擦写存储器用作存储启动程序。DSP芯片使用的型号是美国TI公司的TMS320C6000系列,具有超长指令字结构;同步动态随机存储器SDRAM采用4Banks×4M×16bits的HY57V561620CT或HY57V561620CLT或HY57V561620CTP或HY57V561620CLTP系列;快擦写存储器Flash ROM采用512K×16bits的MBM29LV800TE或MBM29LV800BE系列。本发明的DSP控制卡技术指标为:DSP芯片工作频率:160MHz;采样频率:1000Hz;输入电压范围:±5V;输出电压范围:±10V;异步串口波特率:115200bps;最大电流:0.5A。The DSP circuit of the present invention comprises a DSP chip, a synchronous dynamic random access memory SDRAM, a flash memory Flash ROM and a clock circuit, the synchronous dynamic random access memory is used for storing data, and the flash memory is used for storing a starting program. The DSP chip used is the TMS320C6000 series of American TI Company, which has a super-long instruction word structure; the synchronous dynamic random access memory SDRAM adopts 4Banks×4M×16bits HY57V561620CT or HY57V561620CLT or HY57V561620CTP or HY57V561620CLTP series; the flash memory Flash ROM adopts 512K× 16bits MBM29LV800TE or MBM29LV800BE series. The technical indicators of the DSP control card of the present invention are: DSP chip operating frequency: 160MHz; sampling frequency: 1000Hz; input voltage range: ±5V; output voltage range: ±10V; asynchronous serial port baud rate: 115200bps; maximum current: 0.5A.
本发明中的A/D转换器需要两个AD1和AD2,每个A/D转换器为分辨率12位、四通道同时转换、并行数据输出,其型号可以为AD7864AS。D/A转换电路也需要两个DA1和DA2,每个D/A的分辨率为12位、四通道电压输出、并行数据输入,其芯片型号可以为DAC8412;总线发送接受器,用于不同器件的电平匹配,而且可以控制总线传送数据的方向,其型号可以为74LV16245系列;逻辑时序控制电路采用复杂可编程逻辑器件CPLD芯片,其型号可以为XC9500XL系列,DSP芯片与A/D转换器数据管脚和D/A转换器数据管脚并行对应连接,通过复杂可编程逻辑器件CPLD对A/D转换器、D/A转换器和总线发送接受器进行使能、转换、读写控制等逻辑时序控制,如图4所示。The A/D converter in the present invention needs two AD1 and AD2, and each A/D converter has a resolution of 12 bits, simultaneous conversion of four channels, and parallel data output, and its model can be AD7864AS. The D/A conversion circuit also needs two DA1 and DA2, each D/A has a resolution of 12 bits, four-channel voltage output, and parallel data input, and its chip model can be DAC8412; the bus receiver is used for different devices The level matching of the bus can control the direction of the data transmitted by the bus. Its model can be 74LV16245 series; the logic sequence control circuit uses a complex programmable logic device CPLD chip, and its model can be XC9500XL series. DSP chip and A/D converter data The pins are connected in parallel with the data pins of the D/A converter, and the complex programmable logic device CPLD performs logic such as enabling, converting, reading and writing control of the A/D converter, D/A converter and bus transceiver Timing control, as shown in Figure 4.
如图5所示,DSP芯片通过复杂可编程逻辑器件CPLD控制两个A/D转换器和总线发送接受器的逻辑时序控制过程如下:AD1和AD2的CONVST由高-低-高电平,表示DSP芯片通知AD1和AD2即将开始转换。AD1和AD2在CONVST稳定为高电平时,开始采集数据(两个AD同时采集,所以实际的时间只是一个AD的转换时间),并完成模拟量到数字量的转换。转换完成后,AD1的CS由高变低,AD1的RD经过四个——高-低-高电平,在RD(AD1)为低电平期间,OE(16245)为低电平,转换好的数据量数据出现在数据总线上(总线方向是从AD1到DSP芯片),此时DSP芯片可以顺次读取这四个数据,然后CS(AD1)、RD(AD1)和OE(16245)变高电平。对于AD2,也是同样道理,只是读取三个数据。一共读取七个数据。一次AD转换完成。CONVST、CS和RD均为低电平有效。As shown in Figure 5, the logic timing control process of the DSP chip controlling the two A/D converters and bus transceivers through the complex programmable logic device CPLD is as follows: CONVST of AD1 and AD2 is high-low-high, indicating The DSP chip notifies AD1 and AD2 that conversion is about to begin. AD1 and AD2 start to collect data when CONVST is stable at high level (two ADs are collected at the same time, so the actual time is only the conversion time of one AD), and complete the conversion from analog to digital. After the conversion is completed, the CS of AD1 changes from high to low, and the RD of AD1 goes through four levels—high-low-high. During the period when RD (AD1) is low, OE (16245) is low, and the conversion is complete. The amount of data appears on the data bus (the direction of the bus is from AD1 to the DSP chip), at this time the DSP chip can read the four data in sequence, and then CS(AD1), RD(AD1) and OE(16245) become high level. The same is true for AD2, just read three data. A total of seven data are read. One AD conversion is completed. CONVST, CS, and RD are all active low.
如图6所示,DSP芯片通过CPLD控制两个D/A转换器和总线发送接受器的逻辑时序控制如下:由于每次DA都是输出一个通道(程序会判断哪个DA的哪一个通道输出),所以就以其中一个DA加以说明。DA的RESET由高-低-高电平,使DA1和DA2的四个输出通道输出电压为零,这只在程序开始和控制完成后,才要用到,程序运行期间,不对它进行操作。LDAC和CS由高-低电平,DA开始新的模拟量输出。此时R/W变低电平,在此之前,A0和A1要选定哪个DA通道输出。在R/W为低电平期间,DSP芯片通过数据总线把待输出的数字量写道DA的转换寄存器中。之后,R/W、CS和LDAC依次变高电平。一次DA转换输出完成。LDAC、CS和R/W均为低电平有效。As shown in Figure 6, the logic timing control of the DSP chip controlling the two D/A converters and the bus transceiver through the CPLD is as follows: Since each DA outputs a channel (the program will determine which channel of which DA is output) , so one of the DAs is used to illustrate. The RESET of DA changes from high-low-high level, so that the output voltage of the four output channels of DA1 and DA2 is zero, which is only used after the program starts and the control is completed, and it is not operated during the program running. LDAC and CS are high-low, and DA starts a new analog output. At this time, R/W becomes low level. Before that, A0 and A1 should select which DA channel to output. During the period when R/W is low, the DSP chip writes the digital quantity to be output into the conversion register of DA through the data bus. After that, R/W, CS and LDAC become high level in turn. A DA conversion output is completed. LDAC, CS, and R/W are all active low.
如图7所示,本发明的DSP控制卡外部供电电源为+5V,此+5V电源经过电源插座后,直接为A/D转换器件提供+5V电源;使用定电压隔离稳压模块电源NR5D15将+5V转换成±15V,为D/A转换器和D/A转换器的电压参考器件提供±15V电源;使用LDO线性稳压器件LM1086将+5V转换成+3.3V,为CPLD和总线发送接受器提供+3.3V电源;使用LDO线性稳压器件TPS62046将+5V转换成+3.3V,为DSP芯片、同步动态随机存储器和快擦写存储器提供+3.3V电源;使用LDO线性稳压器件TPS62040将+5V转换成+1.2V,为DSP芯片+1.2V电源。As shown in Figure 7, the external power supply of the DSP control card of the present invention is +5V, and this +5V power supply directly provides +5V power supply for the A/D conversion device after the power socket; Convert +5V to ±15V to provide ±15V power for D/A converters and voltage reference devices of D/A converters; use LDO linear voltage regulator LM1086 to convert +5V to +3.3V for CPLD and bus transmission and reception The device provides +3.3V power; use the LDO linear voltage regulator TPS62046 to convert +5V into +3.3V, and provide +3.3V power for the DSP chip, synchronous dynamic random access memory and flash memory; use the LDO linear voltage regulator TPS62040 to convert +5V is converted into +1.2V, which is the +1.2V power supply for the DSP chip.
如图8所示,本发明的异步串口RS232转换电路原理图。DSP芯片进行串口通信时是使用它的多通道缓冲串口McBSP,是一种同步串行接口,不支持通用异步收发器(UART)标准。然而,通过软件设置,只要简单改动DSP芯片上的串行寄存器,可以实现DSP芯片与上位计算机的异步串行通信。具体连接方式如图所示,它的McBSP的数据输入DR和帧同步输入FSR都与UART的发送数据线Tx相连,UART的接收数据线Rx要与McBSP的数据输出线DX相连。As shown in FIG. 8 , it is a schematic diagram of the asynchronous serial port RS232 conversion circuit of the present invention. When the DSP chip performs serial communication, it uses its multi-channel buffer serial port McBSP, which is a synchronous serial interface and does not support the Universal Asynchronous Receiver Receiver (UART) standard. However, through software settings, as long as the serial register on the DSP chip is simply changed, the asynchronous serial communication between the DSP chip and the host computer can be realized. The specific connection method is shown in the figure. Its McBSP data input DR and frame synchronization input FSR are connected to the UART transmission data line Tx, and the UART reception data line Rx is connected to the McBSP data output line DX.
如图9所示,自适应滤波器LMS原理框图,说明:延迟单元个数(N)称为滤波器的抽头,每个延迟单元用单位延迟算子z-1表示。特别的,当对x(k)进行z-1运算时,其结果输出是x(k-1)。wi(k)是抽头权值,i=0,1,...,N-1。k指某一时刻,则As shown in FIG. 9 , the functional block diagram of the adaptive filter LMS illustrates that the number of delay units (N) is called a tap of the filter, and each delay unit is represented by a unit delay operator z −1 . In particular, when performing z -1 operation on x(k), the resulting output is x(k-1). w i (k) is the tap weight, i=0, 1, . . . , N-1. k refers to a certain moment, then
输入向量为
其中X(k)指时间序列x(k),x(k-1),...,x(k-N+1)为元素组成的向量,权向量W(k)指抽头权值w0(k),w1(k),...,wN-1(k)组成的向量。Where X(k) refers to the time series x(k), x(k-1), ..., x(k-N+1) is a vector composed of elements, and the weight vector W(k) refers to the tap weight w 0 (k), w 1 (k), ..., w N-1 (k) is a vector.
如图10所示,为本发明的LMS控制原理图,AD采集的是x(k)(为扰动)和e0(k)、e1(k)、e2(k)、e3(k)、e4(k)和e5(k)(为误差),共七个AD输入通道,DA输出的是f0(k)、f1(k)、f2(k)、f3(k)、f4(k)和f5(k)(为控制输出量),共六个DA输出通道。图10应用六个自适应滤波器LMS算法实现系统辨识功能的原理框图。同样,也是由于不知道整个系统和作动器的具体控制模型,所以采用六个LMS算法对六个作动器在线建模,并对被控系统进行控制。通常的多输入多输出系统一般存在输入输出耦合现象,即:e0(k)、e1(k)、e2(k)、e3(k)、e4(k)、e5(k)与f0(k)、f1(k)、f2(k)、f3(k)、f4(k)、f5(k)不是一一对应的关系,像f0(k)可能与e0(k)、e1(k)、e2(k)、e3(k)、e4(k)、e5(k)都存在输入输出关系,本发明解决了这一问题,把系统的输入输出解耦了,使e0(k)、e1(k)、e2(k)、e3(k)、e4(k)、e5(k)与f0(k)、f1(k)、f2(k)、f3(k)、f4(k)、f5(k)建立了一一对应的关系。这样,本发明就可以采用六个单输入单输出的控制方法进行控制,体现在控制方法的流程上,就是六个LMS控制算法分别、独立地对相应的作动器进行控制。As shown in Figure 10, it is the LMS control schematic diagram of the present invention, and what AD collects is x(k) (for disturbance) and e0(k), e1(k), e2(k), e3(k), e4( k) and e5(k) (for error), a total of seven AD input channels, DA output is f0(k), f1(k), f2(k), f3(k), f4(k) and f5( k) (to control the output), a total of six DA output channels. Fig. 10 is a functional block diagram of implementing system identification function by applying six adaptive filter LMS algorithms. Similarly, because the specific control model of the entire system and actuators is unknown, six LMS algorithms are used to model the six actuators online and control the controlled system. Common multiple-input multiple-output systems generally have input-output coupling phenomena, namely: e0(k), e1(k), e2(k), e3(k), e4(k), e5(k) and f0(k) , f1(k), f2(k), f3(k), f4(k), f5(k) are not one-to-one correspondence, like f0(k) may be related to e0(k), e1(k), e2 (k), e3(k), e4(k), and e5(k) all have input-output relations, and the present invention solves this problem, decoupling the input-output of the system, so that e0(k), e1(k ), e2(k), e3(k), e4(k), e5(k) and f0(k), f1(k), f2(k), f3(k), f4(k), f5(k ) establishes a one-to-one correspondence. In this way, the present invention can use six single-input and single-output control methods for control, which is reflected in the flow of the control method, that is, the six LMS control algorithms control the corresponding actuators separately and independently.
如图11所示,本发明的加入判断采样中断LMS控制算法的流程图,具体的单输入单输出LMS控制算法如下:具体的六输入六输出LMS控制算法的基本流程与单输入单输出相似,只不过在1ms内,DSP控制卡要完成六个单输入单输出的计算,具体的六输入六输出LMS控制算法如下:As shown in Figure 11, the flow chart of the LMS control algorithm for adding, judging, sampling and interrupting in the present invention, the specific single-input and single-output LMS control algorithm is as follows: the basic flow of the specific six-input and six-output LMS control algorithm is similar to that of single-input and single-output, However, within 1ms, the DSP control card needs to complete six single-input and single-output calculations. The specific six-input and six-output LMS control algorithm is as follows:
如图12、13所示,为本发明的控制效果图像。前1000个采样时间(1ms)对隔振平台未施加LMS控制算法,用来对比施加LMS控制算法前后的效果。其中图12是A/D采集的误差信号e0(k)、e1(k)、e2(k)、e3(k)、e4(k)和e5(k),依次与图中的第1、2、3、4、5和6通道的误差信号图像对应;图13是D/A输出的控制输出量f0(k)、f1(k)、f2(k)、f3(k)、f4(k)和f5(k),依次与图中的第1、2、3、4、5和6通道的控制信号图像对应。从第1001采样时间开始,同一个采样时间间隔,对应的误差信号ei(k)和控制输出信号fi(k)是在同一个采样周期内完成(i=0,1,...,5),共采样8000次,实际控制时间是7s。由图12可以看出,施加LMS控制算法和未施加LMS控制算法的效果很明显。As shown in Figures 12 and 13, they are control effect images of the present invention. The first 1000 sampling times (1 ms) did not apply the LMS control algorithm to the vibration isolation platform, which was used to compare the effect before and after applying the LMS control algorithm. Figure 12 shows the error signals e0(k), e1(k), e2(k), e3(k), e4(k) and e5(k) collected by A/D, which are sequentially compared with the first and second in the figure , 3, 4, 5 and 6 channel error signal image corresponding; Figure 13 is the control output of D/A output f0(k), f1(k), f2(k), f3(k), f4(k) and f5(k), corresponding to the control signal images of
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CN101235716B (en) * | 2008-02-22 | 2012-07-04 | 中国海洋石油总公司 | Prealarming method and method for avoiding oil gas well drilling neighbouring wellbore collision |
CN105047041B (en) * | 2015-07-24 | 2018-01-12 | 北京市星光凯明动感仿真模拟器中心 | Wave heaves systems stabilisation and its control method |
CN110632879B (en) * | 2019-10-09 | 2025-02-07 | 西安航空制动科技有限公司 | A Data Acquisition System Based on DSP and CPLD |
CN112114596A (en) * | 2020-08-24 | 2020-12-22 | 中国科学院长春光学精密机械与物理研究所 | Embedded Active Vibration Isolation Acquisition Control System |
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