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CN100485861C - Thin film etching method - Google Patents

Thin film etching method Download PDF

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Publication number
CN100485861C
CN100485861C CNB2005101374205A CN200510137420A CN100485861C CN 100485861 C CN100485861 C CN 100485861C CN B2005101374205 A CNB2005101374205 A CN B2005101374205A CN 200510137420 A CN200510137420 A CN 200510137420A CN 100485861 C CN100485861 C CN 100485861C
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Prior art keywords
etching
film
etching method
photoresist
plural layers
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CN1992150A (en
Inventor
许嘉哲
施雅钟
郑勉仁
吴承昌
张瑞宗
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Chunghwa Picture Tubes Ltd
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Chunghwa Picture Tubes Ltd
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Abstract

The invention relates to a film etching method, which is applied to the film manufacturing process of a semiconductor or a thin film transistor array (TFTArray) and is used for improving the problem of chamfer (underrout) generated after the existing etching or enabling the shape of the etched film to be more perfect. The film etching method is characterized in that the existing etching manufacturing process is divided into two stages to be carried out, and an etching manufacturing process of removing photoresist is inserted between the two stages of etching manufacturing processes.

Description

Film etching method
Technical field
The present invention is a kind of film etching method, is meant especially in a kind of thin film fabrication flow process that is applied to semiconductor or thin film transistor (TFT) array, in order to eliminate the chamfering that produces after the etching or to improve the faulty film etching method of etching rear film shape.
Background technology
When utilizing thin film technique to make electronic building brick or lead, generally all can be according to the characteristic of manufacturing assembly, and the manufacturing process such as film forming, photoresist and etching of multiple tracks are arranged, and wherein etching is material to be used chemical reaction or physical shock effect and the technology that removes, by film being formed specific planform, so just can reach specific function by etching.Lithographic technique can be divided into " wet etching " (Wet Etching) and " dry etching " (Dry Etching) two classes.In wet etching, be to use chemical solution, via chemical reaction reaching the purpose of etching, and dry etching, (Plasma Etching) is comparatively universal for normally a kind of plasma etching.
With regard to wet corrasion, the material that is etched that each is specific, usually can find a kind of " etching agent " of and unlikely other material of etching fast effective to it, therefore, wet usually etching can have quite high " selectivity " (Selectivity) to different materials.Because chemical reaction can't have any preference to specific direction, therefore wet etching is a kind of " waiting tropism's etching " (Isotropic Etching) in essence.Mean that Deng tropism's etching wet etching not only can vertically carried out etching, and has horizontal etching effect.Lateral etching can cause what is called " chamfering " phenomenon (Undercut) to take place.Opposite, in plasma etching, plasma is a kind of by positive charge (ion), the part that negative electrical charge (electronics) and neutral free radical (Radical) the are constituted gas that dissociates.Its biggest advantage promptly is " anisotropic etching " (Anisotropic Etching).Yet the selectivity of dry etching but specific humidity etching is come lowly, and this is because the etching mechanism of dry etching is a kind of physical interaction basically; Therefore the bump of ion not only can etched film, also can carry out etching to photoresist simultaneously.
Shown in Figure 1A, be to be a film liquid crystal display gate electrode manufacturing process, the structural representation after photoetching (photolithography).Shown in Figure 1B, be gate electrode manufacturing process for Figure 1A, carry out the schematic diagram of etch step (Etching Step).Shown in Fig. 1 C, be gate electrode manufacturing process for Figure 1B, divest the structural representation behind the photoresist.Array (Array) manufacturing process of general Thin Film Transistor-LCD (TFT-LCD) panel, the manufacturing of its first road grid electrode, earlier with physical vapour deposition (PVD) (PVD, Physical Vapor Deposition) method is deposited on the first film 21 of formation one neodymium aluminium alloy (AlNd) on the substrate 10 and second film 22 of a nitrogenize neodymium aluminium alloy (AlNdN), form the double layer of metal membrane structure altogether, come out by the pattern definition of gold-tinted photolithographic fabrication flow process again grid.Then under the effect of photoresist 30,, design transfer to film, is passed through the stripping program at last, promptly finish the first road manufacturing process of array with the method for wet etching.Yet, in wet etching process because the etch rate of nitrogenize neodymium aluminium alloy (AlNdN) be slow than neodymium aluminium alloy (AlNd) etch rate, cause grid corner (Taper) bad, even the bad shape appearance of chamfering arranged.
Shown in Fig. 2 A, 2B and 2C, be etching manufacturing process schematic diagram for a single thin film structure.Shown in Fig. 3 A, 3B and 3C, be etching manufacturing process schematic diagram for a three-layer thin-film structure.Wherein Fig. 2 A and 3A are the structural representation after the photoetching, and Fig. 2 B and 3B are the schematic diagram of etch step.Fig. 2 C and 3C then are the structural representation that divests behind the photoresist.Learn by above diagram,, when single thin film etching or plural layers etching, also have the bad problem of etching except duplicature etching shown in Figure 1A, 1B and the 1C has the problem of chamfering or shape defect.
The shortcoming that above-mentioned bad shape and structure causes comprises: 1. formed chamfering, therefore because be the conductor structure of a tool, the effect of point discharge is arranged easily by sharp type, and cause electrostatic breakdown and make component failures.2. during stripping, cause liquid or foreign matter to be piled up in the position of chamfering easily, make cleaning not exclusively, thereby cause epithelium coating ability variation, thereby it is bad to form the floating or film stripping of film etc.3. above bad phenomenon when being positioned at conductor structures such as scan line or data wire, tends to the phenomenon that causes circuit bad.
Summary of the invention
Purpose of the present invention, it is the step that to adjust thin film fabrication, by moved back the etching manufacturing process of photoresist together by increase, the area that makes film contact with the etching material increases, and therefore can eliminate chamfering or the faulty problem of film shape that existing etching manufacturing process is produced.
In order to achieve the above object, the invention provides a kind of film etching method, be to be applied in the thin film fabrication flow process of a semiconductor or a thin film transistor (TFT) array, it comprises the following steps: at first to provide a substrate, and be formed with the film of one deck at least on this substrate, and be formed with a photoresist in the top of the top this film of one deck; Then use first etching agent that this film is carried out etching; Use second etching agent that this photoresist is carried out etching then; And use first etching agent that this film is carried out etching once more.
Film is carried out the method for etching, can use general existing lithographic method, when the film etching proceeds to because of the photoresist covering, and make this film and etching material contact area reduce, thereby cause the etch rate between different films to be tending towards inconsistent, or have the chamfering phenomenon to produce, or when phenomenons such as the shape of film is imperfect are arranged, then can carry out the manufacturing process of photoresist etching.By by etching to the photoresist appropriateness, make photoresist be covered in the minimizing of the area appropriateness of film, cause the bad phenomenon of film etching to improve photoresist.After photoresist caused the bad factor of etching to be excluded, can carry out etching to film once more this moment, so can eliminate the problem of chamfering and make film obtain good etching shape.
By by enforcement of the present invention, can reach following effect at least:
One, can improve and eliminate chamfering problem when film shaped.
Two, to avoid line bad or put bad problem and produce.
Three, can make film shaped shape meet that we are required, not have acute angle or irregular shape and produce.
Four, eliminate chamfering after, can avoid because point discharge, cause electrostatic breakdown and make component failures.
Five, eliminate chamfering after, can not cause liquid or foreign matter to be piled up in the position of chamfering, make epithelium coating capability improving, thereby do not have bad problem such as the floating or film stripping of film.
For making purpose of the present invention, structural feature and function thereof there are further understanding, cooperate graphic now and related embodiment is described in detail as follows:
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as the qualification to the wood invention.
Description of drawings
Figure 1A is a film liquid crystal display gate electrode manufacturing process, the structural representation after photoetching;
Figure 1B is the gate electrode manufacturing process for Figure 1A, carries out the schematic diagram of etch step;
Fig. 1 C is the gate electrode manufacturing process for Figure 1B, divests the structural representation behind the photoresist;
Fig. 2 A is a single thin film structure, the structural representation after photoetching;
Fig. 2 B is for a single thin film structure, in the schematic diagram that carries out etch step;
Fig. 2 C is a single thin film structure, the structural representation after divesting photoresist;
Fig. 3 A is a three-layer thin-film structure, the structural representation after photoetching;
Fig. 3 B is for a three-layer thin-film structure, in the schematic diagram that carries out etch step;
Fig. 3 C is a three-layer thin-film structure, the structural representation after divesting photoresist;
Fig. 4 is a film etching method embodiment flow chart of the present invention;
Fig. 5 A is the structural representation of pair of lamina membrane structure after photoetching;
Fig. 5 B is the double-layer film structure for Fig. 5 A, carries out the schematic diagram of phase I etching;
Fig. 5 C is the double-layer film structure for Fig. 5 B, carries out the schematic diagram of second stage etching;
Fig. 5 D is the double-layer film structure for Fig. 5 C, carries out the schematic diagram of phase III etching;
Fig. 5 E is the double-layer film structure for Fig. 5 D, the schematic diagram after the phase III etching;
Fig. 5 F is the double-layer film structure for Fig. 5 E, divests the structural representation behind the photoresist;
Fig. 6 A is the structural representation of a single thin film structure after photoetching;
Fig. 6 B is the single thin film structure for Fig. 6 A, carries out the schematic diagram of phase I etching;
Fig. 6 C is the single thin film structure for Fig. 6 B, carries out the schematic diagram of second stage etching;
Fig. 6 D is the single thin film structure for Fig. 6 C, carries out the schematic diagram of phase III etching;
Fig. 6 E is the single thin film structure for Fig. 6 D, divests the structural representation behind the photoresist;
Fig. 7 A is the structural representation of a three-layer thin-film structure after photoetching;
Fig. 7 B is the three-layer thin-film structure for Fig. 7 A, carries out the schematic diagram of phase I etching;
Fig. 7 C is the three-layer thin-film structure for Fig. 7 B, carries out the schematic diagram of second stage etching;
Fig. 7 D is the three-layer thin-film structure for Fig. 7 C, carries out the schematic diagram of phase III etching;
Fig. 7 E is the three-layer thin-film structure for Fig. 7 D, divests the structural representation behind the photoresist.
Wherein, Reference numeral
10 substrates
21 the first films
22 second films
23 the 3rd films
30 photoresists
Step S1 provides a substrate, is formed with at least one layer film on this substrate, and is formed with a photoresist in the top of the top this film of one deck
Step S2 uses first this film of etching agent etching
Step S3 uses second this photoresist of etching agent etching
Step S4 uses first etching agent this film of etching once more
Embodiment
As shown in Figure 4, be to be a film etching method embodiment flow chart of the present invention.This film etching method, be to be applied in the thin film fabrication flow process of a semiconductor or a thin film transistor (TFT) array, it comprises the following steps: to provide a substrate, is formed with at least one layer film on this substrate, and is formed with a photoresist (step S1) in the top of the top this film of one deck; The phase I etching is to use first etching agent that this film is carried out etching (step S2); The second stage etching is after the phase I etching, uses second etching agent that this photoresist is carried out etching (step S3); And the phase III etching, be after the second stage etching, use first etching agent that this film is carried out etching (step S4) once more.
Shown in Fig. 5 A, be to be the structural representation of pair of lamina membrane structure after photoetching.Shown in Fig. 5 B, be double-layer film structure for Fig. 5 A, carry out the schematic diagram of phase I etching.Shown in Fig. 5 C, be double-layer film structure for Fig. 5 B, carry out the schematic diagram of second stage etching.Shown in Fig. 5 D, be double-layer film structure for Fig. 5 C, carry out the schematic diagram of phase III etching.Shown in Fig. 5 E, be double-layer film structure for Fig. 5 D, the schematic diagram after the phase III etching.Shown in Fig. 5 F, be double-layer film structure for Fig. 5 E, divest the structural representation behind the photoresist.Present embodiment is an example with the array manufacturing process of a LCD panel of thin-film transistor at first, when its first road grid electrode is made, at first provide-glass substrate 10, and on this glass substrate 10, form the double layer of metal film, it is respectively the first film 21 of a neodymium aluminium alloy (AlNd) and second film 22 of a nitrogenize neodymium aluminium alloy (AlNdN), and, form a photoresist 30 in the top of this second film 22.
The phase I etching is to use general existing wet etching, and this first film 21 and second film 22 are carried out etching.Because the characteristic of tropism's etchings such as wet etching has, just wet etching not only can be vertical After two films 22 carry out a period of time with different etch rates, under the effect of lateral etching, can cause the phenomenon of what is called " chamfering " to produce.Because the pattern that this moment, distance second metal will be finished at last still has a segment distance, therefore the space of revising is once more arranged.When the phase I etching proceeds to, because of covering, photoresist 30 make the first film 21 and the area of etching materials chemistry reaction reduce, and the etch rate that causes the first film 21 and second film 22 is tending towards inconsistent or have the chamfering phenomenon to produce or when phenomenons such as the shape of film is imperfect are arranged, then can carry out the second stage etching.
The second stage etching is after the phase I etching, and this photoresist 30 is carried out etching, generally speaking, when the phase I " chamfering " phenomenon takes place during etching " chamfering " phenomenon maybe will take place, then can carry out the second stage etching.This second stage etching is particularly carried out with a kind of dry etching method, and particularly a kind of oxygenous plasma etching method of this dry etching method (02 Plasma).By educating the characteristic of " anisotropic etching " by the dry etching tool, removing photoresist 30 partly, thereby second film 22 is reduced by the area that photoresist 30 covers, so can increase the chemical action area of second film 22 when wet etching.Therefore this second stage etching mainly is that to make this photoresist 30 not cover the chamfering (Undercut) that this phase I etching produces be principle.
The phase III etching is after the second stage etching, and this film is carried out etching once more.It uses the mode of etching is identical with the wet etching method of phase I etching, after through the second stage etching, because partly photoresist 30 has been removed, therefore second film 22 is reduced by the area that photoresist 30 covers, therefore also make the phase III during etching, second film 22 is increased by the chemical reaction area of wet etching, makes the chemical reaction rate of the win metal and second metal identical, and what both were same approximately reaches 2100
Figure C200510137420D0008103710QIETU
/ minute, therefore can improve because of chemical reaction rate not simultaneously, the problem of the chamfering that causes.
As shown in Figure 6A, be to be the structural representation of a single thin film structure after photoetching.Shown in Fig. 6 B, be single thin film structure for Fig. 6 A, carry out the schematic diagram of phase I etching.Shown in Fig. 6 C, be single thin film structure for Fig. 6 B, carry out the schematic diagram of second stage etching.Shown in Fig. 6 D, be single thin film structure for Fig. 6 C, carry out the schematic diagram of phase III etching.Shown in Fig. 6 E, be single thin film structure for Fig. 6 D, divest the structural representation behind the photoresist.Present embodiment is the film etching method embodiment that is applicable to the single thin film structure for, it at first provides a substrate 10, and on this substrate 10, form a first film 21, it is the metallic film of chromium metal (Cr) or molybdenum (Mo) for example, and, form a photoresist 30 in these the first film 21 tops.
Then carry out phase I etching, second stage etching and phase III etching, wherein first and the phase III etching, mainly be to carry out etching, and the second stage etching is mainly carried out etching to this photoresist 30 at this first film 21.And the method for relevant first, second and third stage etching and principle, be same with the first, second and third stage etching phase of double-layer film structure lithographic method embodiment, do not repeat them here, by enforcement by this single thin film structure etching method embodiment, also can eliminate the chamfering problem that is produced after the single thin film etching, and the film shape of this first film 21 that makes is more perfect.
Shown in Fig. 7 A, be to be the structural representation of a three-layer thin-film structure after photoetching.Shown in Fig. 7 B, be three-layer thin-film structure for Fig. 7 A, carry out the schematic diagram of phase I etching.Shown in Fig. 7 C, be three-layer thin-film structure for Fig. 7 B, carry out the schematic diagram of second stage etching.Shown in Fig. 7 D, be three-layer thin-film structure for Fig. 7 C, carry out the schematic diagram of phase III etching.Shown in Fig. 7 E, be three-layer thin-film structure for Fig. 7 D, divest the structural representation behind the photoresist.Present embodiment is the film etching method embodiment that is applicable to membrane structure more than three layers or three layers for.With the three-layer thin-film structure is example, it at first provides a substrate 10, and on this substrate 10, form the three-layer metal film, it is respectively the first film 21 of a molybdenum (Mo), second film 22 of an aluminum metal (Al) and the 3rd film 23 of a molybdenum (Mo), and, form a photoresist 30 in the top of the 3rd film 23.Above-mentioned the first film 21, second film 22 and the 3rd film 23 can also be respectively chromium metal (Cr), aluminum metal (Al), chromium metal (Cr) or other material.
Then carry out phase I etching, second stage etching and phase III etching, wherein first and the phase III etching, mainly be that metallic film at this first film 21, second film 22 and the 3rd film 23 carries out etching, and the second stage etching is mainly carried out etching to this photoresist 30.And about the method and the principle of first, second and third stage etching, be same with the first, second and third stage etching phase of double-layer film structure lithographic method embodiment, do not repeat them here, by enforcement by this three-layer thin-film structure etching method embodiment, also can eliminate the problem of the chamfering that produces after the film etching, and the shape of this metallic film that makes is more perfect.
More than employed first etching agent and second etching agent, if wherein the first film 21 and second film, 22 aluminum or aluminum alloy, then the main component of employed etching agent is the mixed solution of phosphoric acid, nitric acid and acetic acid.
Only the above only is preferred embodiment of the present invention, when can not with limit the scope of the invention.Be that every equalization of being done according to the present patent application claim changes and modification, will do not lose main idea of the present invention place, also without departing from the spirit or scope of the invention, the former capital should be considered as further enforcement situation of the present invention.

Claims (12)

1. a film etching method is to be applied in the thin film fabrication flow process of a semiconductor or a thin film transistor (TFT) array, and it comprises the following steps:
One substrate is provided, is formed with plural layers on this substrate, and be formed with a photoresist in this plural layers the top one deck;
Use first these plural layers of etching agent etching, the step of these these plural layers of etching is a wet etching method;
Use this photoresist of the second etching agent etched portions, to expose these plural layers of part, the step of this this photoresist of etching is a dry etching method; And
As etching mask, use first etching agent these plural layers of exposing of etching once more with remaining this photoresist, this once more the step of these plural layers of etching be a wet etching method.
2. film etching method as claimed in claim 1 is characterized in that, the dry etching method of the step of this this photoresist of etching comprises an oxygenous plasma etching method.
3. film etching method as claimed in claim 1 is characterized in that, the step of this this photoresist of etching is to make this photoresist not cover the chamfering that step produced of these these plural layers of etching.
4. film etching method as claimed in claim 1 is characterized in that, these plural layers are metallic film.
5. film etching method as claimed in claim 1 is characterized in that, this first etching agent is the mixed solution of a phosphoric acid, nitric acid and acetic acid.
6. film etching method as claimed in claim 1 is characterized in that, these plural layers on this substrate are double-layer film structure.
7. film etching method as claimed in claim 6 is characterized in that this double-layer film structure includes the first film of neodymium aluminium alloy.
8. film etching method as claimed in claim 6 is characterized in that, this double-layer film structure includes second film of nitrogenize neodymium aluminium alloy.
9. film etching method as claimed in claim 1 is characterized in that, these plural layers on this substrate are the three-layer thin-film structure.
10. film etching method as claimed in claim 9 is characterized in that this three-layer thin-film structure includes the first film of molybdenum.
11. film etching method as claimed in claim 9 is characterized in that, this three-layer thin-film structure includes second film of aluminum metal.
12. film etching method as claimed in claim 9 is characterized in that, this three-layer thin-film structure includes the 3rd film of molybdenum.
CNB2005101374205A 2005-12-30 2005-12-30 Thin film etching method Expired - Fee Related CN100485861C (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103173767B (en) * 2013-03-26 2014-12-31 广东工业大学 Etching method
CN103255416B (en) * 2013-05-14 2015-08-12 广东工业大学 A kind of engraving method and etch-polish liquid used thereof
CN103325678B (en) * 2013-05-20 2015-10-28 扬州晶新微电子有限公司 Integrated circuit 2 micron thickness aluminum etching process
CN106803485A (en) * 2017-03-21 2017-06-06 深圳市华星光电技术有限公司 A kind of thin film transistor (TFT) and preparation method thereof, display
CN115917726A (en) * 2021-05-28 2023-04-04 京东方科技集团股份有限公司 Metal wire and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5183533A (en) * 1987-09-28 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Method for etching chromium film formed on substrate
US5385854A (en) * 1993-07-15 1995-01-31 Micron Semiconductor, Inc. Method of forming a self-aligned low density drain inverted thin film transistor
US5876614A (en) * 1997-04-18 1999-03-02 Storage Technology Corporation Method of wet etching aluminum oxide to minimize undercutting

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5183533A (en) * 1987-09-28 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Method for etching chromium film formed on substrate
US5385854A (en) * 1993-07-15 1995-01-31 Micron Semiconductor, Inc. Method of forming a self-aligned low density drain inverted thin film transistor
US5876614A (en) * 1997-04-18 1999-03-02 Storage Technology Corporation Method of wet etching aluminum oxide to minimize undercutting

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