CN100483958C - Comunication method of high data-rate wireless local network - Google Patents

Abstract

A device and method for data communication between at least two data devices, suitable for use in a wireless local area network, capable of providing robust data communication over radio frequency communication channels interfered with by multipath interference, particularly at high data rates Robustness when communicating. A preferred embodiment of the present invention represents data as a sequence of Walsh function waveforms (66) encoded by pseudonoise direct sequence spread spectrum modulation (70). Walsh function encoding of the data provides long symbol durations, thereby making it possible for spread spectrum modulation to provide high data rates while providing sufficient processing gain to substantially overcome multipath interference.

Description

Communication Method for High Data Rate Wireless Local Area Network

This application is a divisional application of 95191641.6.

field of invention

Generally speaking, the present invention relates to various high data rate wireless local area networks, and more particularly, to communication methods applied to high data rate wireless local area networks subject to multipath interference.

Background of the invention

Computer communication networks, which allow computers to communicate data with each other, have become commonplace. For example, a user of a first computer can send and receive files and real-time data with a second computer. A local area network (LAN) is a computer communication network that provides computer communication between computers located in a common area. For example, a typical situation is that a LAN is used to interconnect multiple personal computers or workstations in an office or school building, or to interconnect multiple computers located in several buildings in a campus or office district. A typical situation is that multiple computers connected to a LAN communicate with each other, and they usually communicate with one or several computers equipped with output devices (such as printers) and large-capacity data storage (such as file servers). Central or specialized computers (such as host computers) communicate with each other.

A computer communication network, such as a LAN, utilizes some transmission medium to communicate data signals between multiple data devices in the network. Typically, the transmission medium is a network of wires. Wires can be cumbersome, presenting ongoing maintenance issues, taking up space, requiring installation time, restricting the movement of computers connected to the network, and more.

In order to overcome the problems associated with systems that use wires as the transmission medium, multiple radio transceivers may be used in a computer communication network to communicate radio signals carrying data information between computers. Due to low data transfer rates and/or low reliability, the use of radio transceivers has hitherto been less accepted. Typically, reliability can be improved if the data transfer rate is reduced. Alternatively, a high data transfer rate can be obtained, but with reduced reliability.

A major obstacle to high data rate transfers between computers in a WLAN is an interference phenomenon known as "multipathing." A radio signal often takes multiple paths on its way to a receiver. For example, reflections from some surfaces in the propagation environment may lead to multiple propagation paths. Some of these paths are longer than others. Thus, since the signal travels at the same speed on each path, signals traveling along some paths arrive at the receiver later than signals traveling along other paths. Sometimes when a later signal arrives at the receiver it interferes with an earlier arriving signal, degrading the signal.

Multipath delay dispersion refers to the time between the arrival time of the transmitted signal arriving at the receiver earliest and the time of arrival of the transmitted signal arriving at the receiver latest.

In order to understand multipath effects and the present invention, it is helpful to discuss the term "symbol". One or more symbols can be combined to form a message that conveys a meaning. Each symbol is selected and uniquely identified from a set of possible symbols called the symbol table. The number of symbols in a symbol table is called the "order" of that symbol table. For example, the letters "a", "b", and "c" are several symbols in the English symbol table (alphabet), where the order of the English symbol table is 26. The numbers "0" and "1" are two symbols in the binary number system, which is of order 2.

It is possible to use a symbol from the second symbol table to represent a sequence of symbols from the first symbol table, for example the symbol "a" to represent the binary symbol sequence "101". The sequence of binary symbols consists of three binary symbols. Since each binary symbol can be either of two possible symbols, there are 8 possible mutually different sequences of binary symbols in a sequence of three binary symbols. Thus, in order to represent these 8 possible mutually different sequences containing three binary symbols, a symbol table of order 8 is required. Generally speaking, in order to represent M= ^2N possible mutually different sequences containing N binary symbols, a symbol table of order M= ^2N is required. Just as binary signaling can be called binary signaling, a signaling system that uses a symbol table of order 8 to represent a sequence of three-bit binary numbers is called 8-valued signaling. In the terminology of communication system design, the representation of an 8-valued symbol is said to use "3 bits per symbol" to represent each symbol.

Generally speaking, a signaling system that uses a symbol table of order M= ^2N to represent an N-bit binary symbol sequence is called M-valued signaling. In M-value signaling, the equivalent binary data rate R is equal to the symbol rate S multiplied by the number of bits per symbol N, that is, R=S·N. The number N of bits per symbol is equal to log 2 ^M . Therefore, for 8-value signaling there is N=3, so that the equivalent binary data rate is three times the symbol rate (assuming no error correction codes and no leader bits).

In binary signaling, since M=2 and the number of bits per symbol N=1, the equivalent binary data rate is equal to the symbol rate, that is, R=S. Thus, "bit" and "symbol" are often used interchangeably in discussions of binary signaling.

In radio communications, a transmitter contains a modulator which produces a transmitted signal representative of the information presented to it. Conversely, the receiver contains a demodulator which receives the transmitted signal and ideally returns the original information represented by the transmitted signal. Typically, the information provided to the modulator consists of symbols, where each symbol is selected from a limited set of symbols. For each symbol provided to the modulator, the modulator generates a corresponding symbol waveform selected from a set of discrete symbol waveforms, which is then transmitted on a communication channel for reception by at least one receiver .

Each transmitted symbol waveform is subject to distortion and noise such that each received symbol waveform differs from the corresponding original transmitted symbol waveform and becomes more similar to other symbol waveforms that were not actually transmitted. It is then necessary to determine which of the known sets of discrete symbols is the most likely symbol to be transmitted. This determination is made in the receiver's demodulator, the output of which is a sequence of symbols selected from the known set of symbols, which represents the best estimate of the transmitted symbol sequence.

To determine what sequence of symbols was transmitted, for each transmitted symbol, the demodulator processes the corresponding received symbol waveform for a period of time called the coherent integration time. Importantly, each coherent integration time should coincide with each received symbol waveform, thus giving correct synchronization. Without proper synchronization, the symbolic content of the received waveform will be misinterpreted.

To further illustrate the concept of multipath interference, consider the case of sending a message with a binary data modulated waveform, where each message symbol consists of a single bit. When the multipath delay spread is greater than the duration of one symbol waveform, the symbol waveform arriving first in the received signal will overlap with another symbol waveform in the received signal that is too far ahead. This phenomenon is called Inter-Symbol Interference (ISI).

For example, in a typical indoor or campus radio network environment, the delay spread may be greater than 500ns. Because in binary data modulation, the data rate is the inverse multiple of the symbol duration, the delay spread of 500 ns means that even when the data rate is much less than 2 Mbps (2 megabits per second), it will cause interference caused by intersymbol interference. Obvious data error.

In addition to intersymbol interference, certain multipath reflections can also cause delay spreads that are less than the duration of the symbol waveform. This form of multipath interference is called intra-symbol interference, which can cause significant degradation in amplitude of the overall received signal.

In intra-symbol interference, the multipath delay spread is smaller than the symbol waveform duration. Thus, the first arriving symbol waveform in the received signal will overlap the non-corresponding portion of the same symbol waveform arriving later. As a result, large amplitude reflected signals will cause periodic amplitude nulls in the spectrum of the overall received signal due to coherent cancellation at certain frequencies. The bandwidth of amplitude zero is inversely proportional to the lag time of the interfering corresponding signal. This phenomenon is called "frequency selective fading" and it basically destroys the reliability of the communication between the transmitter and receiver.

Diversity is usually used to overcome frequency selective fading. These methods are space diversity, polarization diversity and frequency diversity. Space diversity and polarization diversity require at least two receivers, each with a separate receive antenna, so that the frequency selection pattern for each antenna is different.

Frequency diversity receivers can share a wideband receive antenna, but the transmitted signal is duplicated and sent on two carrier signals whose frequencies differ by a bandwidth greater than the null frequency width. A frequency diversity receiver unit consists of multiple receivers, each tuned to a respective carrier frequency. The attenuation patterns of the outputs of the individual receivers are independent of each other, and this allows the outputs to be combined into one output by one of several known methods. Since this approach uses a separate receiver for each diversity channel used, it is costly to implement.

There are known methods of reducing intersymbol interference caused by multipath effects while maintaining a high data rate. The first method uses a highly directional line-of-sight (LOS) microwave link with high antenna gain, based on the fact that the most lagging signals tend to arrive at the antenna along paths with large deviation angles from the central axis of the microwave antenna . One problem with this approach is that to get high antenna gain, the antenna must be large, mounted on a fixed platform, and carefully oriented. Installing and moving such antennas is therefore complicated and expensive. Large antennas are especially inappropriate for small-scale indoor or campus environments.

The second way to reduce the inter-symbol interference caused by multipath effects while maintaining a high data rate is to use echo cancellation techniques implemented by adaptive filters. However, the high data rates required by the highly dynamic environment of radio communications make the cost and computational requirements of adaptive filters prohibitive.

The third method is to divide the transmitted waveform into multiple channels, each channel has a different carrier frequency, and its bandwidth is smaller than that of a single channel (thus using a longer symbol duration). Since each channel requires a separate receiver, the cost of this approach is too high.

The fourth method is the least commonly used method, which utilizes M-value orthogonal signaling, and the length of its symbol is log 2M times the length of the binary symbol. According to the orthogonal property, the projection of the waveform representing each symbol on the waveform of any other symbol in the symbol table from which the symbols constituting the message are selected is zero. Each symbol in the symbol table is thus more distinguishable from other symbols in the symbol table than if there were no orthogonality.

The effect of multipath can be reduced if the symbol duration of the orthogonal signal is much longer than the multipath delay spread, for example, one of many methods is to use M-value frequency shift keying (MFSK) modulation to convert The high-order symbol table is coded into one of M frequencies. Orthogonal signaling still requires a diversity receiver to overcome inter-symbol interference. Also, quadrature signaling requires greater bandwidth to implement than ordinary communication channels and thus would typically be prohibited by government regulations.

In general, all these methods of reducing inter-symbol interference caused by multipath effects while maintaining high data rates must also include means for diversity reception to reduce intra-symbol interference, necessitating the use of two receivers as a result.

Direct Sequence Spread Spectrum (DSSS) modulation is a multiplicative modulation technique that can be used to resolve and discriminate multipath interference. A common but unsatisfactory way to mitigate multipath effects is to use a combination of direct sequence spread spectrum modulation and binary data modulation, where the direct sequence spread function of the DSSS modulation is a pseudonoise (PN) waveform. The reason this approach is unsatisfactory is that it cannot provide a data rate high enough to support the throughput requirements of a LAN when sufficient processing gain is applied to overcome multipath effects.

The processing gain of the diffusion spectrum waveform modulated by binary data is the ratio of the diffusion bandwidth of the DSSS modulation to the data bandwidth. Diffusion bandwidth is often limited due to constraints of government regulations or constraints of signal processing technology deficiencies. Reducing the binary data rate can increase the processing gain, thereby increasing fault tolerance, but at the same time sacrifices the data throughput.

The ability to reduce intersymbol and intrasymbol interference caused by multipath effects depends on the processing gain of the spread spectrum waveform and the receiver, while the ability to resolve adjacent paths depends only on the spread bandwidth and has nothing to do with the symbol rate.

It is known that code division multiple access (CDMA) can be implemented using walsh function waveforms. CDMA is used to improve the channel capacity of a spread spectrum system in which multiple transmitters have the same frequency spectrum. Walsh function modulation is used to provide separable signals. Ensuring this separability is difficult due to limited processing gain and thus usually requires precise transmitter power adjustments. It would be desirable to further improve the gain.

Gilhousen in US Patent No. 5,103,459 specifically describes a cellular telephone system that utilizes spread spectrum coding to distinguish individual signals from multiple users. This capability is a CDMA application of what is known as spread spectrum signaling. It does not address the reduction of multipath interference. In the forward channel, Walsh function signaling is used to improve CDMA performance, not for data modulation. In addition, the Walsh function signaling is not used to increase the CDMA processing gain by extending the symbol duration, but only to provide a better CDMA waveform than that provided by pseudo-noise DSSS alone, because its processing makes the Orthogonality occurs between multiple users sharing the same frequency band, rather than between data symbols. Although the above-mentioned US patent of Gilhousen discusses the use of Walsh function data modulation in the reverse channel, the patent clearly states that the purpose of the Walsh function signaling is to obtain good Gaussian noise characteristics in the Rayleigh fading multipath channel. This precludes the use of modulations that require a coherent phase reference signal for demodulation, such as binary phase shift keying modulation. The above-mentioned Gilhousen patent says that differential phase shift keying will not work well in a Rayleigh fading multipath environment, and that some means of quadrature signaling is needed to overcome the lack of a phase reference. Moreover, since the multipath channels discussed in the aforementioned Gilhousen patent are Rayleigh fading, this patent does not resolve and identify multipath interference. Also, in the above-mentioned Gilhousen patent, the use of Walsh function signaling for data modulation is independent of the use of spread spectrum coding. The above-mentioned Gilhousen patent explicitly states that binary quadrature signaling is also workable because no coherent phase reference is required. The receiver described in the aforementioned Gilhousen patent requires the use of all forward and reverse channels to synchronize the mobile units in time. In fact, a satellite-borne timing system is required to maintain timing alignment between the various cells. Thus, the system disclosed in the above-identified Gilhousen patent is clearly a time-synchronized CDMA cellular telephone communication system and is therefore not intended, or suitable, for use as a high data rate radio-frequency inter-computer communication system.

U.S. Patent Nos. 4,635,221 and 5,001,723 to Kerr describe a system that takes advantage of the bandwidth achievable in surface acoustic wave convolvers, which typically have much higher processing bandwidth than the achievable bandwidth of signal transmission bandwidth. The received signal is multiplexed on several carrier frequencies, each of which is processed independently within the convolver. The convolution device is used to simultaneously compare the received signal with M orthogonal reference waveforms composed of Walsh functions and PN-DSSS waveforms. Patent No. 5,001,723 describes a variation that replaces the Walsh functions of Patent No. 4,635,221 with orthogonal sine functions. The scope of these two patents is relatively narrow in the sense that they specifically deal with methods for demodulating multiple signals using convolvers, and do not disclose any implementation of high data rate wireless radios suitable for use in multipath environments. LAN means.

Groth in US Patent No. 4,494,238 discloses the use of a pseudonoise direct sequence spread spectrum across multiple non-contiguous carrier frequencies that is coherently processed in a receiver. In this system, the Walsh function is used to generate some signals for phase calculation in the receiver instead of transmitting on the communication channel which is subject to multipath interference.

US Patent No. 4,872,182 to MacRae et al. provides a method of determining a useful frequency band for operating a high frequency radio communication network. Each receiver is identified by its pseudo-noise direct-sequence spread-spectrum reference code, although the word "CDMA" is not explicitly mentioned, which implies that spread-spectrum coding is used for CDMA purposes. Walsh function modulation is used to specify control information that is used to scan the available frequency bands until a useful frequency band is found.

purpose of invention

A general object of the present invention is to provide a wireless LAN of a type which can overcome the above-mentioned various problems of the prior art.

A more specific object of the present invention is to provide a wireless LAN capable of achieving high data rates while providing reliable communications.

Another object of the present invention is to overcome intersymbol and intrasymbol interference caused by multipath effects, thereby providing higher data rates with better error tolerance (robustness) than previously possible.

Another object of the present invention is to provide a practical means for realizing a high reliability, high data rate wireless local area network.

Summary of the invention

The present invention provides an apparatus and method that give a high data rate in a wireless local area network data communication environment even in the presence of multipath interference. In order to achieve this, the present invention combines a high-order signaling symbol table such as an orthogonal signal group with a direct sequence spread spectrum modulation (DSSS) to provide a signal capable of suppressing intra-symbol interference caused by multipath effects and Intersymbol interference processing gain, while also providing the high data throughput required for wireless LANs. Furthermore, the use of DSSS at such high data rates reduces the effects of intrasymbol interference to such an extent that the need for various diversity methods is greatly reduced.

Using the high-order signaling symbol table makes the length of a symbol waveform log 2M times the equivalent binary signaling waveform, where M is the order of the high-order signaling symbol table. The longer duration symbol waveforms of the higher order signaling symbols are modulated together with the DSSS waveform, giving increased processing gain for a given data rate without increasing the spread spectrum transmission bandwidth. The increased processing gain results in high fault tolerance at data rates high enough to support practical wireless LANs.

For some applications, the use of non-orthogonal high-order signaling symbol tables will yield acceptable performance, which means a low bit error rate for a given signal-to-noise ratio. Examples of non-orthogonal symbol groups are: quadrature amplitude modulation (QAM) signal constellations, and M-value phase shift keying groups when transmitting symbols with more than 2 bits per symbol.

In a preferred practical example, the symbols in the high-order symbol table used are mutually orthogonal. The use of M-valued orthogonal signaling to implement high-order symbol tables is generally not admissible for the available narrowband channel allocations; to transmit n bits per symbol, the required bandwidth would be M times the symbol rate, where The value of M is 2n. As indicated by the exponential relationship between n and M, the fine structure (high frequency content) required to support M quadrature waveforms results in an exponential increase in bandwidth requirements. For example, for a given symbol rate, increasing the number of transmitted bits per symbol from 4 to 5 increases throughput (data rate) by 25%, but requires a 100% increase in transmitter bandwidth.

An example of an orthogonal signaling set that is adapted to the bandwidth of a direct-sequence spreading code, ie can be supported by this bandwidth, is the set of Walsh function waveforms. As a high-order symbol table, these waveforms can be directly modulated by pseudo-noise spread-spectrum modulation without exceeding the transmission bandwidth required for spread-spectrum signaling alone. Since the frequency allocation of the spread-spectrum and spread-spectrum transmitter-receiver equipment is broadband in nature, it does not require additional bandwidth when Walsh waveform sets are used in conjunction with DSSS coding, although this is more efficient than using only the Walsh function Encoding a signal requires a large bandwidth.

As a result, the terms "diffusion" and "de-diffusion" can be interpreted as modulation and demodulation, respectively, of a DSSS encoded waveform regardless of the presence or absence of bandwidth variations due to the DSSS waveform. For the case of a Walsh function waveform whose bandwidth is smaller than that of a DSSS encoded waveform, "diffusion" and "dediffusion" can be understood in a more general sense.

The present invention employs a Walsh function waveform comprising a plurality of mutually orthogonal binary waveforms that can be simultaneously modulated on a spread spectrum code such that all of the Walsh function waveform and the spread spectrum waveform The transitions of the binary values of all occur simultaneously with the transitions of a common clock signal. The frequency of the clock signal is chosen to support the finest possible pulse structures in the Walsh function and in the spread spectrum function. The finest pulse structure possible in a waveform determines the bandwidth of that waveform. Therefore, the clock frequency determines the bandwidth of the waveform. As long as transitions in the waveform signal occur at the edges of the clock pulses, the multiplicative combination of the Walsh function and the diffusion spectrum waveform requires no additional bandwidth beyond that of its two constituent waveforms. A Walsh function waveform having a bandwidth less than or equal to the bandwidth of the DSSS waveform can then be used without increasing the bandwidth of the combined Walsh function/DSSS waveform.

In another preferred embodiment, the quadrature signal set is supplemented with an antipodal signal set to form a bi-orthogonal signal set, which further increases the data rate for a given DSSS processing gain. Other embodiments are: non-coherent signaling spanning two symbols like differential phase shift keying (PSK) to perform bio-orthogonal signaling; coherent signaling combined with quadrature signaling within a single symbol and non-coherent M-value phase-shift keying; and coherent phase-shift keying across two symbols and differential encoding for quadrature signaling within a single symbol.

Brief description of the drawings

The present invention can be more fully understood by the following detailed description in conjunction with the accompanying drawings, in the accompanying drawings:

Figure 1 is a schematic representation of a communication channel subject to multipath interference;

Figure 2 is a plot of time versus the logarithm of the measured impulse response of a typical short-range multipath channel exhibiting both intrasymbol and intersymbol interference;

Figure 3 is a block diagram of a spread spectrum transmitter and a time domain representation of the associated waveforms;

Figure 4 is a block diagram of a correlation processor used in a receiver to despread a line-of-sight (LOS) signal that has been DSSS encoded and then interfered with by communication channels, thermal noise and multipath The effect is degraded.

Figures 5A, 5B, and 5C show, respectively, a time-domain diagram of the line-of-sight and reflected signals, a block diagram, and a correlation processing output diagram, which together illustrate the correlation processing operation on the sum of the line-of-sight and reflected signals to produce the correlation output curve;

Figure 6 is a plot of time versus the logarithm of the measured impulse response illustrating the apparent cancellation of intersymbol interference given by DSSS encoding of each symbol.

Figure 7 is a table showing whether fast synchronization is required for various types of LANs.

Figure 8 is a block diagram of a diffuse transmitter;

Figure 9 is a block diagram of a diffuse spectrum receiver with a fast synchronization circuit providing a timing signal to a correlation demodulator;

Figure 10 is a schematic diagram of a spread spectrum receiver with a sliding serial correlator performing synchronization;

Figure 11 is a diagram of an example of a packet structure;

Figure 12 is a schematic diagram of a correlation demodulator utilizing bandpass filtering for direct sequence (DS) removal;

Fig. 13 is a schematic diagram of a non-phase coherent correlation demodulator for quadrature signaling using baseband DS removal and non-coherent DPSK;

Fig. 14 is a schematic diagram of a phase-coherent correlation demodulator for quadrature signaling using baseband DS removal and coherent DPSK;

15A-15H are waveform diagrams showing the first 8 Walsh function waveforms in increasing order of Walsh;

Fig. 16 is a relationship diagram between the correct demodulation probability and signal-to-interference ratio of 1024-bit data packets when DPSK signaling and orthogonal signaling under various data rates;

Fig. 17 is a partial enlarged view of the relationship diagram in Fig. 16;

Fig. 18 is an integrated circuit layout diagram realized by the charge transfer device of the receiver of the present invention;

Fig. 19 is a schematic diagram of a demodulator chip circuit for a coherent carrier-phase reference signal;

Figure 19A is a block diagram illustrating in detail the add/subtract module of Figure 18;

Fig. 20 is a schematic diagram of a demodulator chip circuit for a carrier signal of unknown phase, wherein both the in-phase channel and the quadrature phase channel are processed, and the combination circuit of the demodulator chip is schematically shown;

21A and 21B are schematic diagrams illustrating the preferred scheme of dividing the circuit of FIG. 20 into two chips or realizing a cascaded structure;

Figure 22 is a schematic diagram of the basic unit for calculating the Walsh coefficient; and

Fig. 23 is a schematic diagram of connecting multiple basic units in Fig. 22 into a tree structure to calculate Walsh coefficient.

Detailed Description of the Invention

The present invention provides an apparatus and method for reducing multipath effects while giving high data rates in a local area network data communication environment. The apparatus and method of the present invention combine high order signaling symbol tables, such as quadrature signal groups, with direct sequence spread spectrum (DSSS) modulation.

The present invention recognizes that an orthogonal signaling set that does not require a larger bandwidth than a spreading code for DSSS modulation is, for example, a set of Walsh function waveforms. As a high-order symbol table, these waveforms can be combined with pseudo-noise (PN) direct-sequence spread spectrum (DSSS) waveforms without increasing the occupied transmit bandwidth beyond that required for DSSS signaling alone bandwidth. The binary waveforms contained in the Walsh function signal group can be synchronously multiplied by the DSSS waveform so that all binary transitions of the Walsh function waveform occur at the same time as the transitions of the clock signal generating the DSSS waveform.

The bandwidth of a waveform is determined by the finest pulse structure possible for the waveform. Because each transition of the clock represents a possible signal transition, the clock rate determines the finest possible pulse structure of the signal waveform. Any signal transitions at the point where the clock transitions occur on the maximum bandwidth waveform will not require additional bandwidth beyond the bandwidth of the clock signal.

There are other ways to provide orthogonal sets of signals for use with diffusion spectroscopy techniques. Instead of implementing signaling using a separate set of multiplicative orthogonal signals such as Walsh functions combined with a single pseudonoise spreading code, the symbol waveform can also be derived from a set of approximately orthogonal pseudonoise (PN) spreading codes or from the phase shifts of these spreading codes. Various phase-shifted modulations that transmit the same code include, for example, pulse position modulation (PPM) and cyclic code shift keying modulation, but since the demodulation of these time-shifted modulations may be ambiguous when subjected to multipath delays, therefore Time shift modulation is not appropriate. Modulation that represents data by sending one of a set of PN spread waveforms also has a number of problems.

Only those PN waveforms of cyclical, non-data-modulated maximum-length sequences exhibit the desired near-orthogonal cross-correlation properties. Randomly selected PN waveforms exhibit an average cross-correlation value (between different pairs of waveforms) equal to the PN waveform processing gain. It is difficult to derive a subset of waveforms with good cross-correlation properties. The number of waveforms required increases exponentially with the number of bits per symbol that must be transmitted. Once these waveforms are determined, they must be generated by multiple independent PN generators because the individual waveforms in the structure are independent of each other.

In the receiver, since the individual waveforms are generally independent of each other, there must be a separate spread spectrum correlator for each transmitted waveform. Each correlator operates on the received signal in an attempt to present at its output a level representative of the degree of correlation between the received signal waveform and the reference waveform. Each possible transmitted waveform is provided in each correlator as a reference waveform. The data decision as to which waveform is actually transmitted is made by the correlator with the largest output signal.

On the contrary, according to the present invention, the Walsh function does not have these problems, and the regular waveform structure of the Walsh function makes it possible to easily synthesize a set of waveforms of any order. In the receiver, the present invention makes full use of the decomposition property of the Walsh function waveform, so that a correlator can be constructed with multiple identical components, which will be described later. Thus, according to the present invention, Walsh function quadrature data modulation is a preferred form of data modulation for use in combination with spread spectrum modulation.

However, any means that can give a correlation value to the first of the M Walsh function waveforms can also be used. Regarding the use in combination with spread spectrum modulation, as other examples such as the Fast Walsh Transform (also known as Fast Hadamard Transform) is also available.

A quadrature signal group is characterized by the property that the projection of any waveform on the other waveforms in the signal group is zero. Conversely, a positive and negative set of signals is characterized by the property that one waveform can have a negative projection on the other. Combining these two sets of signals forms a biorthogonal set of signals, in which there may be either a quadrature signal or a positive and negative signal. The benefit is that bi-orthogonal data modulation gives extra data bits per symbol without increasing transmit bandwidth or reducing processing gain. This will be accompanied by the need for a slightly increased signal-to-noise ratio, but this is not a big deal.

As illustrated in the exemplary embodiment of Fig. 14, the set of biorthogonal signals can be implemented in a Walsh function demodulator, where the positive and negative phases of any waveform can be used as additional possible waveforms in a symbol . In this way, phase shift keying (PSK) can be combined with quadrature signaling. Biorthogonal modulation can be processed coherently as long as the phase of the received signal is tracked.

Alternatively, biorthogonal modulation can also be processed non-coherently, using differential phase shift keying (DPSK) between symbols, as illustrated in the exemplary embodiment of FIG. 13 . If non-coherent DPSK is used, after the quadrature receivers have determined which waveform is most likely to be transmitted for each pair of adjacent symbols, the DPSK receiver determines whether there is a signal between the carriers of each pair of symbol waveforms. A phase reversal may have occurred. Just like binary DPSK, the next pair of symbols to be subjected to this operation will consist of the second symbol of the previous pair and a new symbol.

Just as coherent PSK can be used for each symbol if a phase reference is generated in the receiver, multiphase phase shift keying can also be used with quadrature signaling to increase the data rate. However, the bit error rate (BER) performance of this type of modulation degrades rapidly as the order of the signal group increases. In addition, multi-level DPSK can also be used, such as differential quadrature phase-shift keying (DQPSK), which sacrifices BER performance for improved data rate.

Several embodiments of the present invention provide fault-tolerant (robust) wireless LAN performance. One such embodiment uses a different PN spreading code for each successive symbol in the sequence of transmitted symbols. Errors due to high cross-correlation sidelobes in the multipath between transmitted symbols are thus randomized.

In a preferred implementation, in order to further reduce the bit error rate, error correction coding can also be used. Error correction coding can be used to compensate part of the bit error rate caused by high sidelobes at the output of the decoder that may occur under certain multipath delay conditions.

In other embodiments, the same PN code is repeated for each successive symbol. Using a repeating PN code can help reduce peak cross-correlation sidelobe levels, while changing the code will cause some randomization of the levels between symbols.

Another embodiment of the present invention employs pulse shaping filters in spread spectrum coded modulation to reduce the bandwidth required to achieve a given processing gain. It is well known in the art that a waveform having a square shape in the frequency domain, ie, having no frequency sidelobes, gives the greatest processing gain. Thus, the shape of the code pulse trades its higher time-domain sidelobes for lower frequency-domain sidelobes, ie, squareness in the frequency domain.

multipath environment

Referring to Figure 1, it is useful to distinguish between two main types of multipath interference. "Proximity" multipath interference is caused by the presence of a reflected signal 28 of the line-of-sight (LOS) signal 26, which travels only a small distance further than the direct line-of-sight signal 26, causing Coherent cancellation and deep attenuation of signal power, where the received signal is at least a combination of the reflected signal 28 and the LOS signal 26 . The delay of this type of reflected signal relative to the LOS signal 26 does not exceed the duration of one data symbol in the LOS signal 26, so the resulting interference is called "in-signal" interference. This type of multipath interference is caused when the propagation path of the reflected signal from a reflective surface has only a small angle to the LOS signal when it hits the receiver.

The various frequency components of the LOS signal 26 and the reflected signal 28 destructively interfere at the receiver, causing a null to appear in the received spectrum. For example, if a narrowband signal, that is, a signal occupying a relatively narrow frequency range (which is commonly used in traditional communications), is used to modulate a carrier signal whose frequency is at a zero point in the received spectrum, and the If the narrowband signal propagates to the receiver along both the LOS path and the reflection path, then the amplitude of the received modulated signal will be almost zero. It may even happen that the amplitude of the modulating signal will be reduced to less than the amplitude of the noise introduced by the communication channel, resulting in data errors. This effect is called multipath fading.

For example, assuming that the receiver is located 200m away from the transmitter, and another signal reflector is located at a vertical distance of 45m from the line of sight between the receiver/transmitter, a After being reflected by the receiver, the reflected signal sent to the receiver will travel 20m longer than the LOS signal. So in this example, the reflected signal is about 65 nanoseconds (ns) behind the LOS signal. If the reflection is a specular reflection, which is often the case, the amplitude of the reflected signal can be close to that of the LOS signal, thereby causing a deep attenuation.

"Far-type" multipath interference occurs in situations where the reflected signal travels a much greater distance than the LOS signal, so that the resulting delay is greater than the duration of one data symbol. The resulting interference is called "Inter-Symbol Interference" (ISI). The causes of reflections can be similar to those in "close-type" multipath, but the relative geometrical position of the transmitter/receiver with respect to the reflective surface is such that the reflected signal has sufficient reflection path length. The present invention removes this prior limitation imposed by far-type multipath interference on binary communication data rates.

Intersymbol interference (ISI) occurs when the reflected signal corresponding to the first data bit overlaps with the direct path signal corresponding to the second data bit. ISI can cause data recovery errors in the receiver. For example, if two transmitters/receivers are 200m apart, and the reflector is located at a vertical distance of 150m from the LOS path and equidistant from each transmitter/receiver, the reflected path will be 160m longer than the direct path that the LOS signal travels . Thus, the reflected signal arrives approximately 535ns later than the LOS signal. In this operating environment, binary signaling will be limited to bit rates much less than 2Mbps.

Figure 2 shows a typical filtered impulse response measurement for a wireless LAN communication channel. Here, T represents the symbol duration. The initial (filtered) pulse represents the LOS response to a transmitted pulse. All subsequent responses are due to reflection. For this value of T, both intra-symbol interference and inter-symbol interference are significant.

Advantages of Diffusion Spectroscopy Performance

Referring to Figure 3, Pseudo-Noise Direct Sequence Spread Spectrum (PN-DSSS) employs a multiplicative modulation step that distributes the transmitted signal over a frequency range (bandwidth) larger than that normally required to support a certain data rate. over the frequency range. For example, the carrier signal 32 is phase shift keyed modulated with the binary data 30 in the first modulator 34 . The frequency bandwidth of the output 36 of the first modulator 34 is on the order of the data rate of the binary data 30 . A sharp signal transition 38 in the modulated data signal 30 causes a phase inversion of the modulated signal 36 . According to Fourier transform theory, phase inversion 39 introduces high frequency signal components into the signal bandwidth.

The finest pulse structure in the PN-DSSS diffusion code 42 is usually called a chip 40 to distinguish it from a bit, and its meaning refers to the smallest possible pulse in the data signal. In a second modulator 44, the waveform 36 is phase shift keyed modulated with a PN-DSSS spreading code 42, causing much more phase inversion in each data symbol of the output waveform 45. The output waveform 45 of the second modulator 44 has the same bandwidth as the PN-DSSS code. The modulation sequence of modulators 34 and 44 may be reversed and the modulation may be in the form of minimum frequency shift keying or various other continuous phase shift keying waveforms as is well known in the art.

Referring to FIG. 4, in the receiver 46, the spreading code 42 is removed by correlation processing using a reference code 49, which can be implemented using a matched filter or a serial correlator 48, for example. The correlation process carried out by correlator 48 gives a linear decomposition 50 of the individual propagation path signals making up the received signal. This decomposition is inherent in signal processing. Feedback is not required. Thus, unlike adaptive balancing systems, wide-channel dynamics can be handled here without intensive calculations.

As shown in Figure 4, a correlation processor 48 in the receiver 46 performs a cross-correlation process between the local reference code 49 and the received signal 47 which has been impaired by passing through the communication channel. The output 50 of the correlation process describes the relative displacement range of the received signal with respect to the reference code signal. The spread coded signal 42 is chosen such that its autocorrelation function is close to zero everywhere except when the signals are aligned. When the signals are aligned, there will be a triangular pulse called the correlation peak 50 with a base width of 2/Tc, where Tc is the width of the chip.

When perfect alignment is achieved, the peak of the correlation peak 50 will appear. Recall that each bit of the diffusion code is called a chip to distinguish it from the data bits. Therefore, if there are 16 chips of the spreading sequence within a cross-correlation interval, say one symbol duration, then there are 16 possible ways that the spreading code can be aligned to the signal to be correlated, and the chip edge is also right for Ready. The fractional shift in chip timing is responsible for unknown chip edge timing. Correlation processing determines which relative positions cause significant signal energy (correlation peaks), while the remaining relative positions have negligible energies, ie, no signal peaks.

Referring to FIG. 5, the PN-DSSS spread spectrum modulation of the reflected signal 52 and the LOS signal 54 can be temporally resolved in the receiver using correlation processing 56, thereby eliminating multipath interference. After correlation processing 56, signals 52 and 54 will be represented by shifted correlation peaks 52a and 54a, respectively, each peak having an amplitude representative of the relative received signal strength. In fact, the output of the correlation process approximates the impulse response of the communications channel resolving the spread bandwidth, as it is a linear sum of the autocorrelation functions of all signal paths, as the relative code alignment is swept.

According to the present invention, one advantage of using PN-DSSS spread spectrum signaling is that severe far-type multipath ISI is alleviated. In a preferred embodiment, this is achieved by changing the spread spectrum waveform for each data symbol such that the ISI of each data symbol is no longer correlated with the DS code of any subsequent symbol.

FIG. 6 is a correlation processing output curve in the case of the channel impulse response of FIG. 2 . Because each data symbol is modulated by a different PN-DSSS waveform, the far multipath portion of the channel impulse response is truncated beyond the symbol time.

Correlation can be done with a serial correlator or a matched filter or something like both. A serial correlator (also known as a sliding correlator) is tested for signal detection after a processing period called a detection interval. Since probing a signal requires more signal energy than demodulating a signal to ensure acceptable wireless LAN performance, the probing interval is usually longer than the data symbol.

Longer detection intervals can be obtained by further integrating multiple coherent integration intervals (whether coherent or non-coherent), where each coherent integration interval is typically a period associated with a data symbol. After a detection interval, if signal detection is not achieved, the serial correlator slips the reference signal timing by a fraction of the PN-DSSS code chip. The number of probe intervals that must be checked is determined by the uncertainty in code timing and the amount of oversampling in chip timing. For example, if the timing is completely unknown, and the detection part of the leading part is a repetitive sequence of 16 chips, and correlation oversampling is performed every half chip to prevent crossing loss, then in order to achieve detection of the received signal The correct timing of , requires no more than 32 detection intervals. If the probing interval is 10 symbols in length, the transmitter must send a 320-symbol-length header before sending data.

Also, because the DSSS sequence is repeated in the preamble, and a detection success may occur on either repetition, synchronization must be obtained to determine which symbol is the start of the data stream before a signal detection success occurs. Since there is sufficient signal-to-noise ratio for detection, frame synchronization can be accomplished with a simple frame synchronization bit pattern structure that is easily recognized.

It is well known that a matched filter synchronizer or its equivalent is capable of detecting all code timing relationships within a single detection interval, so it can be used as a fast synchronizer. Unlike serial correlators, matched filter synchronizers are unambiguous in their timing. Various devices that approach a full-scale matched filter are: a binary quantized input matched filter, or a matched filter that contains some kind of non-coherent processing, or can be performed in a few steps (but not to the extent of a serial correlator) Matched filter for full timing search.

The choice of using a correlator or a matched filter for synchronization depends on the specific application. Correlators are much lower cost and less technology dependent. Matched filters have many operations. A correlator can be used if the application can tolerate long sync preamble sections, or has the means to aid in the detection process with an appropriate data link procedure. LAN Channel Access Protocol

A communication channel access protocol is a set of procedures that allow multiple users to access a common communication channel. For example, in certain communication environments where multiple transmitters use the same communication frequency band, the communication channel access protocol will require each transmitter to transmit on that channel in turn based on throughput requirements and communication delivery priorities. To send large chunks of data, computer communication protocols often divide the data into smaller chunks called packets and send these packets. In the receiver the packets are then reconnected. Dividing data into packets allows multiple users to share the communication channel fairly and efficiently.

Figure 7 compares six known protocol types with respect to the speed required by the synchronization circuit. The protocol used will affect how fast the synchronizer needs to be, since the sync header will affect the average data throughput. For example, signal detection in a serial correlator synchronizer is generally slow, but the speed of the serial correlator can be improved by utilizing previous timing information if the protocol can support the use of previous timing information. Timing information can be determined by tracking coarse-resolution timing over long periods of time to minimize the timing uncertainty of each packet. Alternatively, the timing information can also be determined by means of a central timing control broadcast by a timing center. This type of communication system will be referred to as "slotted" to indicate the synchronous nature of the control information.

If the channel is not slotted but randomly accessed, then the length of the data packets used will become critical. If the packet length is much longer than the preamble required for serial correlator synchronization, the preamble will not affect the efficiency of the communication channel throughput. However, if the duration of the data packet is expected to be shorter than the header, a fast synchronizer must be used in order to maintain channel efficiency. Sometimes it is necessary to use short data packets in order to optimize the transmission traffic according to the type of data to be sent, for retransmission control, or to work in a bursty interference environment.

It is known that a matched filter synchronizer or equivalent will detect all code timing relationships within a single detection interval, so it can be used as a fast synchronizer. When short packets are used, it is important that the synchronizer used be fast enough to achieve a low required sync preamble.

Another approach is a network that is based on message switching rather than packet switching. In message switching, the transmission of communication is packetized, and each user of the channel sends a message consisting of a series of packets, and no other user can interrupt this message. At this time, it is not necessary to synchronize each packet as in packet switching, which is needed because each successive packet may be sent by a different user. As can be seen in the table in Figure 7, fast synchronizers are only required for random access protocols that use short packets in packet switching.

If the transmission is information switched, or if the packet length is longer than the stability of the clock or the Doppler shift will allow, a timing tracking loop must be used in order to maintain synchronization throughout the transmission. As an example, assuming a data rate of 5Mbps and a packet length of 200kbit is used, the packet duration is 40ms. If the desired time alignment must be maintained within 20 ns of the initial sync timing (which must be significantly less than the duration of one code chip), then a net clock offset of 20 ppm is required between the transmitter and receiver. Alternatively, a delay-locked timing control loop can be used to maintain the alignment of the reference code to the received signal. Alternatively, an automatic frequency control (AFC) loop can be used to lock the clock frequency.

FIG. 8 shows an embodiment of a transmitter for a wireless LAN communication system of the present invention. Computer interface 60 provides a binary data stream which is first divided by a symbol grouping module 62 into a series of data words, each data word representing a symbol value. These symbol values may optionally be passed through an encoder 64 to add error correction encoding. For quadrature signaling, Reed-Solomon error correction codes with symbols matching the modulation symbol table can be used. For bi-orthogonal signaling, only Reed-Solomon codes can be used, or Reed-Solomon/binary coding techniques, in which Reed-Solomon coding is used to correct the quadrature demodulation process, and binary correction is used for one-by-one Sign-to-phase inversion demodulation. For quadrature signaling or bi-orthogonal signaling, erasure decoding can optionally also be used, whereby possible errors can be indicated in a decoder based, for example, on an amplitude signal. For example, a symbol error generated during quadrature decoding will cast doubt on the correctness of the phase inversion decision made with the corresponding erroneous symbol.

More specifically, error correction coding generally attempts to correct as many correctable errors as possible within a symbol group. This group is called a "coding block". A Reed-Solomon coded block consists of a set of raw data symbols concatenated with some "check" symbols, which are identical in form to the data symbols but actually contain encoded information. The more check symbols contained in the data, the more erroneous data symbols can be corrected. The ratio of the number of data symbols to the total number of symbols in the entire group is called the "coding" rate. A coding such as "1/2 rate" means that the number of data symbols and check symbols is equal. A rate of 1/2 is considered a low coding rate. The consequence of low rate coding is that the minimum signal-to-noise ratio required for efficient demodulation in a Gaussian noise environment is reduced and tolerance to burst errors can be obtained.

The apparatus and method of the present invention may use encoding for a variety of purposes, and it is therefore a feature of the present invention to incorporate an encoding method which would normally be considered inappropriate for more common encoding applications, Examples of such common applications are satellite communications or error correction of computer hard drives. Such applications typically require low rate codes and large code blocks to achieve the required performance. In practice, integrated circuits are already available which implement common encoding techniques, but they have been found to be unsuitable for the application here. A unique problem of wireless data communication systems based on direct sequence and Walsh quadrature signaling is that, depending on the direct sequence code used and the actual multipath delay, there may be interference caused by the multipath itself resulting in an irreducible error rate. This means that even with a very high signal-to-noise ratio, errors will still appear in the demodulated data.

To solve this problem, high ratio codes are used. That is, it is preferable to use a small number of check symbols for each data block. This unique use of encoding eliminates irreducible error rates while maintaining the throughput requirements of wireless data communication networks. It is also possible to eliminate the irreducible error rate if more common encoding methods are used, but at the cost of a severe decrease in data throughput and a considerable increase in hardware and software complexity. According to a feature of the present invention, although this penalty is often necessary for other applications, it is not desirable to use it to solve multipath problems in a wireless data communication network.

High-rate error-correcting codes can be aided by varying each symbol in the direct-sequence code, which can randomize the effects of multipath on each symbol, even when the multipath between symbols does not change. Again, it is better to use short encoding blocks. Short coding blocks enable high-rate codes to have the performance of highly error-tolerant packets even with only a small amount of correction within each block. There are other reasons for wishing to use smaller coding blocks: the direct-sequence code database from which codes are selected in order to change each symbol within a block can be smaller; the time delay required between the decoder and the computer can be smaller; There are fewer computational requirements; and less data storage is used to make the corrections.

For applications where bursty errors must be tolerated, only large code blocks can be used. On the other hand, for random errors, as long as the ratio of the number of check symbols to the number of block symbols is the same, different block sizes can be used to achieve a given code rate, so that a certain average error rate can be tolerated. Common conventional coding designs employ long code blocks because longer code blocks give varying degrees of better performance. The term "short code block" as used herein means that the size of the code block is so small that a given average random error rate can be tolerated only by the ability to correct one error. Realization of ordinary codes requires complicated iterative decoding processing in complex processors, while single error correction codes can be directly decoded using more general digital logic. Thus, the use of short code blocks enables high data rate error correction to be achieved with small delays and simple circuitry.

As a preferred embodiment, the high rate code is a single error correction Reed-Solomon code in which only one symbol can be corrected in each code block. Therefore, as will be explained in more detail later, a simple decoder can be constructed using a single symbol wide feedback shift register or a look-up table containing all decoding operations when an encoded signal is received. A code block 15 symbols long with 2 check symbols constitutes a single-error-correcting Reed-Solomon code block with a coding rate 13/15 (also written as RS(15,13)), which is capable of dealing with symbols The error rate is close to 1/15 of the cases and can be decoded in the receiver with minimum time and computational complexity.

This basic RS(15,13) code is only used in the Walsh quadrature part of the signaling (whether coherent or non-coherent demodulation). For Walsh biorthogonal signaling (coherent or non-coherent demodulation), then correction of the binary elements of the data must be provided in addition to the correction of the Reed-Solomon code. For the symbol-to-noise ratio required for quadrature modulation, the probability of error in the binary portion of the waveform is several orders of magnitude smaller than that of the quadrature signal, so it is tolerable. Even though transmitted packets can occasionally be lost due to random binary bit errors, this happens on average less frequently than with too many orthogonal transmit errors (more than with RS(15,13) A single quadrature error in a block of 15 symbols long) causes much less packet loss.

However, the influence of a quadrature signaling error on the binary signaling is not negligible, because quadrature demodulation is used to select the processing channel on which the demodulation of the binary part is based. For example, for the coherent biorthogonal case, an error in the quadrature waveform decision will have a 50% probability of causing an error in the corresponding binary bit. On the other hand, for the non-coherent bi-orthogonal case, the occurrence of quadrature signaling errors will result in a 50% probability of error for the two DPSK bits used to form the DPSK decision using the composite amplitude. Fortunately, the strong correlation between quadrature signaling errors and binary errors makes erasure decoding attractive, and erasure decoding requires fewer check bits than random error correction.

As a specific example, for Walsh bi-orthogonal signaling with 5 bits per symbol, the preferred code is a 15-symbol code block containing 13 5-bit information symbols. Two 5-bit check codes can be used to correct an arbitrary 4-bit quadrature decoding error that occurs. After RS FEC finds and corrects the 4-bit orthogonal transmission error, it knows the position of the pair of DPSK bits suspected to be wrong. The binary (fifth) bit of each 5-bit check symbol conveys the parity of the even and odd sets of demodulated binary bits, respectively. This means that adjacent binary DPSK bits are checked by bits of different parity, which makes parity checking useful for DPSK where pairwise errors may occur. Since random binary errors are negligible, when a quadrature signaling error has been detected it can be assumed that a single error may have occurred in either binary data set (even or odd) and the position of the suspected binary bit is known , so this pair of parity bits is sufficient to correct binary data.

Referring again to FIG. 8, data modulator 66 translates its input data into corresponding Walsh function symbol waveforms, and may then optionally introduce appropriate phase changes between symbols. Data modulator 66 translates its input symbol values into corresponding Walsh function symbol waveforms either by selecting from a set of pre-stored waveforms or by selecting corresponding logic in a digital waveform generator. For biorthogonal modulation or differential biorthogonal modulation, the control of phase inversion is realized as follows: the information capacity of symbols is increased by complementing or not complementing the binary Walsh function output, thereby increasing the data rate. An XOR gate 72 then combines the resulting waveform with a PN-DSSS waveform 69 produced by a direct sequence pseudonoise generator 70. The output of logic gate 72 drives an RF (radio frequency) modulator 74 to provide transmit signal 76, which is then amplified by RF amplifier 78 for transmission via antenna 80 as data packets.

The order of the modulations applied by modules 70, 72 and 74 is not critical and can therefore be reversed. Also, the RF modulator 74 can be implemented in stages, for example with corresponding filters, first employing an intermediate frequency modulation and then finally a transmit frequency modulation.

Data modulator 66 may apply any phase shift modulation in addition to the selected Walsh function. When the signal-to-noise ratio is high enough, coherent M-value PSK, or non-coherent differential phase shift between symbols, such as DPSK, DQPSK or differential M-value PSK, can be used to increase the data rate. Appropriate error correction coding can be used in conjunction with these modulation schemes.

Referring to Figure 9, in one embodiment of the present invention, a fast synchronizer 82 is included in the receiver 84. The output of the fast synchronizer 82 controls the timing of the Walsh function-PN joint correlator 86 and the PN reference generator 83 . Figures 12, 13 and 14 show various implementations of a Walsh function/direct sequence correlator such as the Walsh function/pseudo-noise correlator 86 shown in Figures 9 and 10 . Solutions for fast synchronization are well known in the art, and various forms can be used in the present invention. An example is a matched filter. Another example is to help get correlators. The fast synchronizer 82 must contain a detection circuit with a detection threshold. The threshold can be fixed, or it can be determined as a function of the received signal level.

Correlator 86 drives a demodulator 88, which performs a maximum similarity decision, or a decision that approximates maximum similarity. The correlator 86 has M outputs, the number M of which is equal to the order M of the M-valued signal 85 to be decoded. That particular output of the M outputs with the largest amplitude will most likely correspond to the reference waveform that matches the transmitted waveform. Thus, the M outputs of correlators 86 drive demodulator 88, which selects, among all the outputs of correlators 86, the output having the greatest magnitude.

Demodulation by correlating all possible waveforms in demodulator 88 is ideal for any phase shifted data modulation employed other than quadrature modulation. Alternatively, phase shift keying (coherent or non-coherent, within a symbol or between two symbols) can be independently demodulated by having the demodulator 88 operate only on selected quadrature values, which There will be an insignificant loss in performance.

In an exemplary embodiment, for DPSK combined with M-value quadrature signaling, the M-value quadrature waveform in each symbol pair is demodulated first. The output of the correlator containing the maximum output for successive symbols is then used in DPSK demodulation. In another exemplary embodiment, for coherent PSK combined with M-value quadrature signaling, the M-value quadrature waveform in each symbol is first demodulated. The output of the correlator containing the maximum output for each symbol is then compared with the phase reference in the PSK demodulator.

In demodulator 88, after demodulation is performed, each demodulated symbol is decoded for errors if error correction coding was employed in the transmitter. The decoded symbols 89 are then connected to the data interface 92 to form a binary data stream to be received by the computer.

Note that the delay-locked timing control loop is not included because it is assumed that the data packets are short enough to require fast synchronization. However, if the data packets are too long for the timing loop-shift specification, or if variable-length data packets are desired, a delay-locked loop or an AFC (automatic frequency control) loop can be included.

Referring to Figure 10, there is shown an embodiment of a receiver of the present invention which employs correlator synchronization and optionally includes a delay locked time tracking control loop 90. Any Walsh function can also be used as a synchronization signal for transmission at the beginning of the packet. As an illustrative example, the lowest order waveform Wo will be used. At this point, correlator 86 uses timing information from a timing control block 87 as its input to perform a serial correlation search timed to the PN code. The output signal Wo is detected by a comparator 93 which, depending on the implementation technology of the correlator 86, can be analog or digital. The output signal of the comparator 93 is received by a sync detector 95 . The sync detector 95 then prevents further searching for the signal and activates the demodulation process.

In an exemplary embodiment, the second input 94 of the comparator 93 is determined by a threshold estimation module 98 which sums the respective output magnitudes of one or more other channels 96 . Because these channels 96 perform a quadrature correlation of the transmitted synchronization signals, the channels 96 provide a measure of the noise level and interference power in the receiver. If there is no noise and interference, only one channel 96 is active. However, some degree of noise and interference is unavoidable, so each channel 96 has some degree of activation. Combining a number of such channels 96 allows non-coherent averaging of noise and interference in the received signal, thereby giving a detection threshold that is automatically adapted to maintain a near constant false alarm rate of Refers to the misinterpretation of noise and interference as real correlated signals. Using simultaneous correlation in each quadrature channel to establish the detection threshold is preferable to averaging the level of a single correlator over a period spanning multiple output samples because of the transient response problems of the latter.

The demodulator 88 of FIG. 10 is the same as the demodulator of FIG. 9 . Note that the optional time tracking function 90 for maintaining synchronization of long data packets is explicitly shown in FIG. 10 , whereas it is implicit in FIG. 9 . Methods of implementing the time tracking module 90 are well known and include early/late correlation and time jitter modulation, and AFC if the tracking of the timing loop shift is clock offset or Doppler effect.

An example of a packet structure that can be used in the present invention is shown in FIG. 11 . The packet structure 100 includes a header part 101 , a data part 102 and a trailer part 103 . The header section 101 contains a header section 104 , a source address 106 , a destination address 108 , and a packet length 110 . The preamble includes synchronization signals and, optionally, signals that the receiver can use to confirm the occurrence of a detection event. The length of the header portion 104 depends on the type of synchronizer used. The header part 104 may also be followed by other control information, such as error correction type or error checking of the control information itself. The body of the data packet is data 102 . The trailer 103 includes a cyclic redundancy check 112 for eventual error detection. The trailer may also include information received 114 regarding whether the previous packet was successfully received, this information is called a "piggybacked" message received.

Figures 12, 13 and 14 show detailed block diagrams of the combined Walsh function and PN correlator module 86 and the data demodulation module 88 in Figures 9 and 10 . For illustration purposes only, an 8-value Walsh modulation giving 3 bits per symbol will be used in these examples. However, it should be realized that the same circuitry can be used for quadrature signaling with any number of bits per symbol, including binary quadrature signaling.

As shown in FIG. 12, at least one mixer 115 and at least one bandpass filter 116 can be utilized to remove pseudo-noise (PN) directly at the intermediate frequency or at the transmit frequency. If the Walsh function encoding does not occupy the full spread spectrum bandwidth (i.e. if there are more than 1 PN chip per Walsh clock cycle), the bandpass filter 116 can filter down to only the Walsh function bandwidth, resulting in partial correlation. In this case, the bandpass filter 116, which can be implemented as a surface acoustic wave (SAW) filter, will give a square impulse response which filters the input waveform to fall within the bandwidth of the Walsh function modulation. The filtered signal 117 is then split into two channels, I and Q, and sampled by mixer 118, low-pass filter 120, and A/D (analog/digital) converter 122 therein, thereby forming signal 117 A complex representation of , where the I channel represents the real component of the signal 117 and the Q channel represents the imaginary component of the signal 117 . The output of A/D converter 122 is received by Walsh function demodulator 124 which correlates the signal with a reference Walsh function. The output of correlator 124 is envelope demodulated in combining circuit 126 which gives an envelope output for each of the 8 sets of complex (I and Q) channels modulated by 8 values. The eight envelope outputs are compared in eight comparators 130 to give a maximum amplitude index indicating which complex correlator 124 gave the maximum amplitude envelope output. The maximum magnitude index indicates the most probable transmitted data symbol as determined by the linear correlation process performed in correlator 124 . Data decoder 132 receives the maximum magnitude index and eight envelope outputs and performs a direct decoding process to obtain a binary data stream of the selected Walsh function correlator envelope output, or performs an optional Reed-Solomon error decoding, or perform hybrid error decoding of Reed-Solomon and binary codes in cases where bio-orthogonal signaling is also used.

Figure 13 shows an exemplary embodiment in which PN removal is performed after A/D conversion and immediately before Walsh function correlation. It is also possible to perform PN removal at baseband with an analog multiplication (not shown) prior to A/D conversion. The demodulators can be the same as the demodulators 130, 132 used in Figure 12, or DPSK can optionally be added between symbols. Because DPSK is used, this signaling form is called non-coherent dual-orthogonal signaling.

In order to perform DPSK demodulation, the output 152 of the 8-way amplitude comparison module 150 that determines the maximum correlator output is used in the selector 146 to select the complex amplitude 147 with the largest signal from the 8 complex amplitudes 145, the complex amplitude 147 Will be used for DPSK demodulation.

The DPSK decision is made in complex multiplier 158 using the outputs of the selected two consecutive symbols. In this process, a symbol delayer 154 is used to perform an inner product operation on the output of the maximum amplitude correlator and determine sign of the result. At the same time, the maximum index of each symbol is stored in the symbol delay module 156 as the correct value of the Walsh function signal. Data decoder 160 receives the Walsh demodulation result from symbol delay module 156 and the DPSK decoding result from complex multiplier 158 . These two results are combined in the data decoder by concatenating the single bit DPSK answer with the 3 bit Walsh correlator answer, resulting in a 4 bit per symbol (16 value symbol table) output. Alternatively, data decoder 160 may optionally incorporate an error correction algorithm. Data decoder 160 then converts each of the resulting symbols into an equivalent binary data sequence for processing by a computer (not shown). The function of data decoder 160 is the inverse of the operations performed by blocks 62, 64 and 66 in FIG. Note that symbol delayer 156 is optional depending on which particular symbol is aligned to the transmitted DPSK modulation. When signed delayer 156 is present, the DPSK result is aligned in data decoder 160 to that Walsh function symbol sent during the previous symbol period in the DPSK symbol pair.

FIG. 14 shows a single-pass decoder for the coherent phase reference signal 164 . The IF (intermediate frequency) signal 166 is filtered by a bandpass filter 168 . The filtered IF signal is multiplied with a coherent phase reference signal 164 provided by a carrier recovery loop (not shown). The resulting signal is low-pass filtered by a low-pass filter 170 and then converted into a digital signal by an A/D converter 172 . The resulting digital signal is despread by a PN correlator 176 using the PN reference code 174 and then the resulting despread signal is Walsh function demodulated in a Walsh correlator 178 . Any of the aforementioned PN removal techniques and Walsh function demodulation techniques can be applied here, and can be applied in any order. If the modulation rate of the PN spreading code is higher than the Walsh modulation rate, the despread PN may be reduced to the Walsh bandwidth in the PN correlator 176 . Due to the use of the phase reference signal 164, only one channel (channel I) is required in the correlator. A sign stripping module 180 strips the sign bit from the digital signal provided by the Walsh correlator 178, and then an 8-way comparison module 182 determines which correlation output of the correlator 178 is the largest. Because the phase reference signal 164 preserves coherence, PSK modulation can optionally be used to provide coherent biorthogonal signaling. Demodulation requires that the sign bit of the maximum value be selected from the sign register 184 . Data decoder 186 optionally performs error detection and correction, and decomposes the symbol groups of the signal provided by 8-way compare module 182 into a binary data stream for processing by a computer (not shown).

Walsh function send letter

Figures 15A-15H show the first 8 Walsh functions. The Walsh function of the lowest order is shown in Fig. 15A, and the other Walsh functions in order of increasing order are shown in Figs. 15B-15H, respectively. The lowest order Walsh function is written as I. Because the Walsh function is a function of time in the communication environment, the Walsh function can also be expressed as W(n, t) or WAL(n, t), where n is the order of the specific Walsh function, and t it's time.

Walsh functions are digitized waveforms, each of which is mutually orthogonal to any Walsh waveform of a different order. When they are multiplied, the integral of any two Walsh functions of different orders multiplied equals zero. The order of each Walsh function is equal to the number of binary transitions that the function exhibits. For example, WAL(o,t) does not have one binary transition, while WAL(2,t) has two binary transitions. Equivalently speaking, the Walsh function can be regarded as having one or more binary states during the duration of the waveform, where the duration of a binary state may not be longer than a certain minimum special duration called the Walsh chip.

For each symbol of a message, an XOR logic gate can be used to logically combine one such binary waveform with a direct sequence spread spectrum code to generate another signal that can be used to modulate the carrier wave that has been modulated by the message. Phase modulated digital waveform.

Figure 16 shows 4 probability curves. The curve labeled DPSK shows the probability of achieving correct demodulation of a 1024-bit data packet versus the normalized signal/interference (S/I) ratio in decibels (db) when signaling using the DPSK spread spectrum Functional relationship. The other three curves labeled data rates 8b/s (bits/symbol), 4b/s and 2b/s show the realization of a 1024-bit The probability of positive demodulation of the packet. It must be emphasized that M-value orthogonal signaling is a form of coding, and if the coding is combined with DPSK modulation, the required signal-to-interference ratio will move to a smaller direction.

Figure 17 shows the same curve on an enlarged scale. Note that signaling using 4-value quadrature (2 bits/symbol) is essentially equivalent to DPSK signaling, while higher signaling symbol tables (4b/s or 8b/s) will improve performance significantly. The above curve means that for an uncoded connection, under a given bandwidth, the S/I ratio that can be tolerated in the receiver when the M value (M>2) is combined with the PN-DSSS diffusion spectrum It is larger than the S/I ratio that can be tolerated when combining PN-DSSS diffusion spectrum with binary (M=2) signaling or DPSK signaling. Conversely, for example, when using 4b/s and PN-DSSS with a bandwidth of 80MHz, the interference that can be tolerated in the receiver will be the same as the interference that can be tolerated by using DPSK and a direct sequence with a bandwidth of 130MHz same size!

The rotation of the PN-DSSS code is called cyclic code shift keying (CCSK), which can give an orthogonal group, which has some advantages when using the Walsh function, for example, it has the property that the orthogonal The bandwidth required for sending a letter can be equal to the bandwidth of the direct sequence without extending the signal bandwidth beyond the bandwidth of the PN-DSSS code. Using CCSK will give a pulse position modulated (PPM) correlator output waveform. However, the PPM nature of CCSK can be problematic in multipath environments because an important characteristic of the signal, the delay judgment used for demodulation, can be misinterpreted as multipath effects. Therefore, in a multipath environment, using CCSK is no better than using Walsh function.

If the bandwidth expansion due to orthogonal signaling is much smaller than the direct sequence spread, then any orthogonal group can be used; in this case, a convenient choice is a tone group (i.e., M-value frequency shift keying), which is It is demodulated using Fast Fourier Transform (FFT) after stripping off the spreading code. However, if the bandwidth expansion due to quadrature signaling approaches that due to DSSS modulation, since direct sequence modulation and quadrature modulation are very dissimilar modulations, they cannot be synchronously superimposed by any means, so practical The transmit bandwidth of will depend on both direct sequence modulation and quadrature modulation.

Although both CCSK and Walsh functions have the characteristics that the bandwidth required for orthogonal signaling can be equal to the direct sequence bandwidth, and do not further expand the signal bandwidth beyond the PN-DSSS bandwidth, but CCSK cannot be effective in a multipath environment ground use. Thus, the Walsh function is superior to CCSK for both purposes of limiting bandwidth and enhancing performance in multipath environments.

Walsh function correlation processor

In this discussion it is assumed that the received signal is modulated with both PN-DSSS and Walsh functions. It is also assumed that the reference PN-DSSS code used to demodulate the received signal is correctly aligned to the received signal in the receiver, where synchronization is achieved, for example, using a matched filter or a time-slip serial correlator. Again, it is assumed that the received signal has been multiplied with a local reference signal to give a despread signal which is then low pass filtered to easily handle higher order Walsh functions. (For example, the highest order Walsh function can have a bandwidth containing only frequencies less than the DSSS chip rate.) The effect of this despreading operation is to remove the PN-DSSS code, leaving only the Walsh function modulation.

The following discussion considers in-phase baseband processing. In actual implementation, because the carrier phase is usually unknown, the signal is converted into two channels of in-phase and quadrature phase, and the following in-phase bit is performed in the middle of each channel, and then the corresponding The amplitudes are envelope combined.

One way to obtain the desired correlation in a Walsh function correlation processor (eg, modules 86, 124, 144, 178) is to implement a fully parallel Fast Walsh Transform. This approach is only advisable when the order of the Walsh function becomes large. A better way to perform fast Walsh transform is to make full use of the mathematical structure of the Walsh function, that is, to use multiple basic units shown in Figure 22 to calculate the coefficients of the Walsh function, and these basic units are shown in Figure 23 The manner shown is interconnected into a tree structure with successive stages. The clock rate of each subsequent stage is reduced by half compared with the previous stage, and the number of cells in each subsequent stage is doubled compared with the previous stage, thus keeping the calculation rate of each stage the same. The power consumption of each stage depends mainly on the calculation rate, so the power consumption of each stage is also close to the same. Also, the number of computation sheets is much smaller than that required in a fully parallel Fast Walsh Transform.

The output of the parallel fast Walsh transform for each M value requires M(logm) computing units. On the contrary, the tree structure shown in Fig. 23 only uses 2(M-1) calculation units for the output of each value of M. Thus, for larger values of M, the tree structure of Fig. 23 is superior to the parallel structure for computing the Walsh transform because the number of computational units in the tree structure for the output of each value of M is significantly smaller (not shown). For each symbol, the number of calculations performed by both structures is the same. The tree structure offers the possibility to trade the amount of hardware for the speed of hardware operation, which is advantageous when implementing such a structure with an integrated circuit.

Referring to FIG. 22 , base unit 250 receives serial input samples at input 252 at rate fin and produces two sets of output samples at output 254 and 256 in parallel at rate fin/2. In this way, a serial pair of input samples becomes a parallel pair of output samples. One output sample of the output pair is the sum of the current pair of serial input samples, and the other output sample of the output pair is the difference of these two input samples.

FIG. 23 shows a tree structure 252 of basic units 250 for decoding the first 8 Walsh functions Wo_W8. Note that each path through the tree structure performs the multiplication of the input sequence by a specific combination of (binary) square wave functions and the addition of the result by performing the arithmetic sum and arithmetic difference operations. In fact, the specific square wave function of each path is the product of some Lamach (Rademacher) functions, which are known to yield Walsh functions.

Note also that the tree structure naturally preserves power since each subsequent stage contains twice the number of cells as the previous stage but has half the clock rate of the previous stage. Also, since the distribution of higher fanout signals operates at proportionally lower rates, integrated circuit design layout is simplified. Thus, slower circuits are connected by longer signal paths, as desired in integrated circuits.

Walsh function dependent processors can also be implemented in field programmable gate arrays, and the details of the implementation technique are irrelevant. Field Programmable Gate Array implementations are facilitated by using a tree structure because the implementation has longer paths for higher fanout and thus can work slower. Alternatively, the processor may be implemented entirely in software using a digital signal processing microprocessor. For large bandwidth cases, the processor can be efficiently implemented with charge transfer devices (CTD).

Charge transfer device implementation

Charge transfer devices (CTD) include charge coupled devices (CCD), acoustic charge transfer (ACT) devices, and bucket device (BBD). These techniques all represent signals as charges and process the signals by manipulating the charges. CTD technology can perform both synchronization and demodulation. A CTD can take time-discrete analog samples as its input, perform all signal processing, and give the resulting digital data decisions at its output. Because the input to the CTD is a capacitive storage well, the analog signal is naturally sampled when the CTD input is clocked. This operation is similar to a sample capacitor in a sample-and-hold circuit.

On the other hand, digital methods require expensive high-speed D/A (digital/analog) converters. Conversely, the input linearity of the CTD can support much greater gain than the processing gain required for this application at a sampling rate of 50Msps (mega samples per second) for the CCD and 360Msps for the ACT device . These sampling rates take into account an oversampling ratio of 2 relative to the signal bandwidth to prevent excessive spanning losses. Higher sampling rates are possible by operating both devices in parallel and clock jittering. Signals can be processed with analog precision rather than that of a binary digital reference signal.

As shown schematically in the exemplary embodiment of FIG. 18 , a Walsh demodulator can be constructed using CTD 190 . The electrical input to the CCD 190 is connected to a signal charge injection lead 191 which is fixed to an input electrode 192 on the surface of the substrate. The clock signal on clock telegram 195 sequentially transfers the sampled charge packets along a row of charge storage wells 193 . During each clock cycle, each charge storage well receives the charge packet originally stored in the charge storage well to the left of it, and after each clock cycle, the signal sensing telegraph 194 reads out the amount of charge stored in each well.

Alternatively, in an ACT device, the processing of the signal samples is similar except that the CCD's clock telegram is replaced by a surface acoustic traveling potential. In a BBD, the clocking of the signal charge is accomplished through transistors that are clocked on, but the signal processing is similar.

The Walsh demodulator requires a sample delay to provide storage of waveform samples, as provided in the charge storage well 193 located in the substrate below the clock electrode 195 and below the sense telegram 194 . A Walsh combining circuit 198 performs a Walsh correlation on the signal provided by the electrical signal sensing electrodes 194, thereby giving a plurality of envelope outputs. A magnitude circuit and M comparison circuits 200 then provide a maximum magnitude index signal 201 indicating which correlator in the Walsh joint circuit 198 produced the envelope output with the largest magnitude. The maximum amplitude index signal 201 is provided to a detection/data decoding circuit 202 which data decodes the signal.

If the bandwidth of the PN-DSSS code is larger than the bandwidth supported by CTD, it can be removed by removing the PN in a pre-correlator before the received signal is processed by CTD and after the timing of the DS chip is established in the synchronization phase. - DSSS modulation to reduce the bandwidth of the received signal. The CTD is then ready for Walsh correlation, data demodulation and data decoding.

Synchronization can also be established in the CTD by rearranging the demodulation CTD channels, or by using a separate CTD channel operating in parallel. If it is preferable to use the same chip rate for synchronization and demodulation, and if the selected chip rate is greater than 25MHz (for 50Msps devices), it can be implemented with a number of parallel CCDs in combination with a multiplexing structure. matched filter.

Alternatively, ACT techniques can be used due to the inherently higher sampling rates of ACT devices. Alternatively, since there is no baud rate requirement for synchronization, longer symbols and lower PN-DSSS code rates can be used, thereby maintaining processing gain.

The number of code chips in the matched filter can be further increased to give an error-tolerant sync preamble. Precise timing can then be achieved in one serial operation. For example, in this way, a 25 MHz spread spectrum code rate can be used for synchronization while a 25 MHz Walsh chip rate is used to encode data modulated by a 75 MHz spread spectrum code which can be removed in the precorrelator.

An important advantage of CTD is that all relevant support circuits and storage wells can be integrated in the same device. Because modern CCDs use a storage technology similar to DRAM (Dynamic Random Access Memory), CCD technology directly benefits from the advancement of DRAM technology in terms of integration and speed.

Amplitude and 8-way comparison circuits 200 and detection/data decoding circuits 202 (and optional timing and frequency control loops) can, for example, be integrated directly at the output of the device, greatly simplifying output processing.

digital realization

The chip structure is arranged according to the basic unit and tree structure of Figs. 22 and 23 . Because this structure has dense registers and a tree-like shape, it can be efficiently implemented in the form of an integrated circuit (IC) or a field-programmable gate array (FPGA). One benefit of the tree structure is that although each stage contains twice the number of circuits as the previous stage, the latter stage only needs to operate at half the speed of the previous stage. Power distribution across the chip is thus even and wiring requirements for the most speed-critical circuits are reduced. As a result, optimized routing can be employed for higher speed input stages. Also, there are no placement constraints for the last stage, which works slower but requires many wire lanes due to having the highest adder fanout.

Communication on a non-Gaussian communication channel requires a digital signal processor capable of accepting wider input words than communication on a Gaussian communication channel. In a Gaussian channel, good signal normalization can be employed to reduce the number of bits per input word, even down to 1 bit, resulting in significant hardware savings.

Referring to Fig. 19, in order to adapt to non-Gaussian interference, also in order to reduce the accuracy required by the signal normalization circuit (such as automatic gain control), the embodiment of Fig. 19 uses 6 bits per word (5 bits plus a positive and negative number bits) of input samples 206. A series of clock dividers 205 provide a progressively slower clock signal. Input samples 206 are clocked into input register 207 . The details of the first stage add/subtract module 208 are shown in Fig. 19A, which operate on a 6-bit two's complement input 209 and produce a 7-bit output 211 after sign extension.

In order to support 10Mbps 8-value signaling, the add/subtract module 208 must work at a clock frequency of 26.67MHz. This is because in order to achieve 10 Mbps for 3 bits/symbol, a symbol rate of 3.333 Msps (megasymbols per second) is required for 8 Walsh chips/symbol (octet modulation).

Referring to FIG. 9A , clock signal A is twice as fast as clock signal B, which has been divided by two by clock signal divider 205 . As a result, adder 210A and subtractor 210B operate in parallel, providing a pair of outputs at the rate that half the input samples appear at the add/subtract block 208 input.

clock

After a pair of input samples is loaded into the input register 208A of the first add/subtract module 208, the results of the add and subtract operations performed by modules 210A and 210B, respectively, are latched until the arrival of the next input sample. Thus, although add/subtract module 208 operates on a pair of samples simultaneously, the result must be obtained within one sample period. Similarly, the add/subtract module 212 of the second stage operates on a pair of output samples 211 of the add/subtract module 208 of the first stage. And the result must be output to the next stage before the next input sample arrives.

The add/subtract module 214 of the third stage is revised, and its output register 216 is arranged behind the 8-way comparator 218, thus avoiding an extra frame delay, and also saving M-1 registers (in M=8 in this example). Both the third-stage add/subtract module 214 and the 8-way comparison circuit 218 operate at 1/4 of the input rate. If double-buffering is used at the input of each stage, the computation rate can be halved due to the need to store an extra set of samples while awaiting processing.

Typically, there is a clock skew (delay) between the arrival of the clock signal to the input and output latches of each stage. If the difference between the latest arrival time of the input clock and the earliest arrival time of the output clock is positive, this difference must be added to the maximum delay of the logic path to determine the clock frequency. If you notice that the minimum hold time satisfies the shortest possible logic delay path, you can increase the rate by adding additional delays to the output clock.

The 8-way comparison circuit 218 presents a reverse binary tree structure, and the number of cells in each subsequent stage is half of the number of the previous stage. Since only a single receiver channel is shown, a coherent carrier reference situation as shown in FIG. 14 is assumed. Thus, envelope detection is just a function of sign stripping. First, the magnitude of each 9-bit envelope signal from the add/subtract block 214 is determined in the sign strip block 220 . Then, pairwise magnitude comparisons are performed in each stage, resulting in a maximum byte magnitude from the winning correlator. The value of the largest byte of each comparison is transmitted to the next stage, while the index of the corresponding correlator is decoded by the 7-to-3 decoder 222 into an orthogonal data decoding result. Structure of I and Q full processing

In Fig. 20, the channel structure shown in Fig. 19 is copied once for the Q channel, and then the circuits of I and Q are combined together, and 8 comparison circuits are added to give full processing of I and Q. Fig. 20 shows how the combination of quadrature channels is realized: In the module 232 combining I and Q, the well-known method is used, that is, each output pair of the I channel and the Q channel is in the pair 230 and 231 The output of I or Q with the larger value is added to half of the output with the smaller value. Therefore, the sign stripping process as performed by the sign stripping module 220 still needs to be done for each channel.

According to the present invention, the circuit of FIG. 20 can be partitioned into a plurality of identical or near-identical integrated circuits, each integrated circuit having a cascadable structure suitable for combining with other similar integrated circuits to form a circuit for any value of M. M value Walsh demodulator.

The most straightforward way to achieve this partitioning is to place a Walsh correlator on each chip to make it possible to partition the circuit of Figure 20 into multiple FPGA chips, or into multiple dedicated or semi-dedicated integrated circuit. In addition, the I and Q combining circuits are provided on a third chip which also contains 8 comparison circuits. This partitioning method requires 64 output lines (8 channels of 8 bits per channel) per Walsh correlator chip and 128 input lines for the combiner chip. Such an I/O (input/output interface) amount is too large, resulting in high cost and reduced reliability.

Referring to Figures 21A and 21B, the division method taught by the present invention is to divide the circuit into an upper segment 240 as shown in Figure 21A and a lower segment 242 as shown in Figure 21B, and divide the I channel 244 and Q Channel 246 remains on the same chip. The upper section 240 and the lower section 242 are not connected until after the last comparison of the comparison tree structure 248 . The upper circuit 240 may be provided on one chip, and the lower circuit 242 may be provided on another chip. Only 24 data lines are needed to connect the two chips.

In the 8-value circuit shown in Figures 21A and 21B, after the first stage, each of the I and Q channels has 7 lines to be connected to another chip, and one chip contains 4 complex correlators (244, 246 ). The 4 I correlators 244 and 4 Q correlators 246 on each chip are the same as the correlators in FIG. 20 but only involve half of the tree structure shown in FIG. 20 . After the 4 I and Q results on each chip are combined, they are reduced to a maximum value in a 4-way compare block 248 . This maximum value (an 8-bit amplitude) is output along 2 decode lines to another chip where it will be compared with the result from the other half of the comparison tree structure whereby the larger of the two values are decoded. The final result is a 3-bit word representing the demodulated symbols.

The circuit can be broken down further by dividing each segment of 240 and 242 similarly into two smaller chips. Similarly, for higher order alphabets, ie for larger values of M, the chips can be cascaded. It is also possible to form a more symmetrical partition by having one chip act as a front-end source that can feed data to the various segments of the tree structure. To improve the speed of operation necessary for higher-order alphabets, the speed of a front-end optimized for speed can be traded at the expense of the number of signal lines between chips. The symmetrical front-end source can be obtained as follows: the output of the first-stage add/subtract module is separated, and the sum output is provided to the upper stage, and the difference output is provided to the lower stage. A single input line can determine whether this stage is an adder or a subtractor.

This approach makes it possible to use multiple FPGA technology chips, or to use multiple application-specific or semi-specific integrated circuits, while maintaining the appropriate size and interconnect complexity of each chip to increase yield and reliability. This method allows the user to generate arbitrarily large symbol tables by connecting single chips of the same circuit in series vertically and horizontally.

Other modifications and implementations will occur to those skilled in the art without departing from the spirit and scope of the invention as defined in the claims. Accordingly, it is not intended that the above description be limiting of the invention, except as expressly indicated by the following claims.

Claims (13)

1, a kind of method that sends data by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width, and use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, this method comprises the following steps:

Data are expressed as a series of digital waveform symbols of the phase place rotation with described direct sequence spread spectrum codes and four-phase differential phase shift keyi, wherein N data bit of each digital waveform symbology and be from one group at least 2 ^NSelect in the individual digital waveform symbol, wherein at least a portion of these digital waveform symbols is orthogonal;

Wherein, each digital waveform symbol in this group is unique each other, the uniqueness of this symbol is determined that by unique pulse structure the short pulse width of any digital waveform symbol has defined a symbol-modulated pulse duration in this group digital waveform symbol; And described four-phase differential phase shift keyi relates in the described series phase shift between the adjacent digital waveform symbol of the every pair of order;

According to have described direct sequence spread spectrum codes and described four-phase differential phase shift keyi phase place the rotation carrier signal of digital waveform symbol-modulated to produce a modulation signal;

Amplify and send a radiofrequency signal according to this modulation signal;

The known chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not.

2, be a pseudo noise direct sequence spread spectrum codes according to the direct sequence spread spectrum codes that the process of claim 1 wherein.

3, a kind of method that sends data by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width; And use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, this method comprises the following steps:

Data are expressed as a series of digital waveform symbols, and wherein each digital waveform symbol is from one group at least 2 ^NSelect in the individual digital waveform symbol, wherein at least a portion of these digital waveform symbols is orthogonal, and represent N data bit, each digital waveform symbol in this group is unique each other, and the uniqueness of this symbol be determine by unique pulse structure and in this group digital waveform symbol the short pulse width of any digital waveform symbol defined a symbol-modulated pulse duration;

Apply four-phase differential phase shift keyi and give each digital waveform symbol adjacent in this series, so that produce digital waveform symbol with one of four possibility four-phase differential phase shift keyi phase places rotation to order;

Make up described direct sequence spread spectrum codes and digital waveform symbol with the rotation of four-phase differential phase shift keyi phase place;

According to have described direct sequence spread spectrum codes and described four-phase differential phase shift keyi phase place the rotation carrier signal of digital waveform symbol-modulated to produce a modulation signal;

Amplify and send a radiofrequency signal according to this modulation signal;

The known chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not.

4, according to the method for claim 3, the step that wherein applies difference leggy phase shift keying comprises and applies the quarter-phase phase shift keying of just opposing.

5, according to the method for claim 3, digital waveform symbol sebolic addressing wherein comprises the walsh function waveform.

6, according to the method for claim 5, wherein the chip-rate of walsh function waveform equals the chip-rate of direct sequence spread spectrum codes.

7, according to the method for claim 3, integrating step wherein comprises the steps:

Synchronously multiply each other digital waveform symbol sebolic addressing and direct sequence spread spectrum codes are the bandwidth that its bandwidth is not more than direct sequence spread spectrum codes with the feature that guarantees to send data.

8, according to the method for claim 3, wherein direct sequence spread spectrum codes is periodic, and its yard cycle is longer than the symbol duration of each digital waveform symbol.

9, a kind of method that sends data by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width, and use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, this method comprises the following steps:

Data are expressed as a series of digital waveform symbols with described direct sequence spread spectrum codes, and each the digital waveform symbol that wherein has described direct sequence spread spectrum codes is from one group at least 2 ^NSelect in the individual digital waveform symbol with described direct sequence spread spectrum codes, wherein these at least a portion with digital waveform symbol of described direct sequence spread spectrum codes are orthogonal; Represent N data bit, each digital waveform symbol in this group is unique each other, and the uniqueness of this symbol be determine by unique pulse structure and in this group digital waveform symbol the short pulse width of any digital waveform symbol in the situation that the does not have described direct sequence spread spectrum codes symbol-modulated pulse duration of having given a definition;

Each digital waveform symbol adjacent to order in this series with described direct sequence spread spectrum codes is given in one of four possibility phase places rotation that applies four-phase differential phase shift keyi, and the four-phase differential phase shift keyi phase place is rotated and a series of digital waveform symbols of described direct sequence spread spectrum codes so that generation has;

According to have described direct sequence spread spectrum codes and described four-phase differential phase shift keyi phase place the rotation carrier signal of digital waveform symbol-modulated to produce a modulation signal;

Amplify and send a radiofrequency signal according to this modulation signal;

The unknown chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not.

10, a kind of method that sends data by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width, and use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, this method comprises the following steps:

Data are expressed as a series of digital waveform symbols, wherein have any one in four the four phase difference frequency shift keying phase places rotations between the digital waveform symbol that the every pair of order is adjacent in this series digit tilde, each digital waveform symbol is from one group at least 2 ^NSelect in the individual digital waveform symbol, wherein at least a portion of these digital waveform symbols is orthogonal; Represent N data bit, each digital waveform symbol in this group is unique each other, and the uniqueness of this symbol be determine by unique pulse structure and in this group digital waveform symbol the short pulse width of any digital waveform symbol defined a symbol-modulated pulse duration;

Make up described direct sequence spread spectrum codes and digital waveform symbol with described four-phase differential phase shift keyi phase place rotation;

According to have described direct sequence spread spectrum codes and described four-phase differential phase shift keyi phase place the rotation carrier signal of digital waveform symbol-modulated to produce a modulation signal;

Amplify and send a radiofrequency signal according to this modulation signal;

The known chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not.

11, a kind of method that sends data by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width, and use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, this method comprises the following steps:

Data are expressed as a series of digital waveform symbols, and wherein each digital waveform symbol takes place during symbol period, and is from one group at least 2 ^NSelect in the individual digital waveform symbol, wherein at least a portion of these digital waveform symbols is orthogonal, and represent N data bit, each digital waveform symbol in this group is unique each other, and the uniqueness of this symbol be determine by unique pulse structure and in this group digital waveform symbol the short pulse width of any digital waveform symbol defined a symbol-modulated pulse duration;

Described direct sequence spread spectrum codes is carried out four phase difference frequency shift keyings at each in to the order adjacent symbol cycle;

With described digital waveform series of symbols with passed through at each the order adjacent symbol cycle four mutually the described direct sequence spread spectrum codes of difference frequency shift keying make up a series of digital waveform symbols that have described direct sequence spread spectrum codes and the rotation of four-phase differential phase shift keyi phase place with generation;

According to have described direct sequence spread spectrum codes and described four-phase differential phase shift keyi phase place the rotation carrier signal of digital waveform symbol-modulated to produce a modulation signal;

Amplify and send a radiofrequency signal according to this modulation signal;

The known chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not.

12, a kind of method that is used to receive the data that send by the common radio-frequency communication channel, this communication channel forms wireless connections between any two data equipment of the local area network (LAN) that contains a plurality of data equipments, wherein each data equipment uses the same direct sequence spread spectrum codes of a known chip width, use the spread processing gain so that suppress unknown interference signal and unknown multipath signal, wherein data be as have described direct sequence spread spectrum codes with four mutually a series of digital waveform symbols of the phase place rotation of difference frequency shift keying send each digital waveform symbology N Bit data and be wherein from one group at least 2 ^NSelect in the individual digital waveform symbol, wherein at least a portion of these digital waveform symbols is orthogonal;

Wherein each the digital waveform symbol in this group is unique each other, the uniqueness of this symbol is determined that by unique pulse structure the short pulse width of any digital waveform symbol has defined a symbol-modulated pulse duration in this group digital waveform symbol; And this four-phase differential phase shift keyi relates to every pair of phase shift between the consecutive number character waveform symbol in proper order in institute's sending order; And the known chip width of wherein said direct sequence spread spectrum codes equals the symbol-modulated pulse duration of this group digital waveform symbol under the situation of this direct sequence spread spectrum codes not; This method comprises the steps:

Receive a radiofrequency signal so that provide an incoming signal from described this common radio-frequency communication channel according to the data that send by this communication channel and receive by this data equipment;

Carry out relevant this incoming signal and this group digital waveform symbol so that one first sequence of data bits of the digital waveform series of symbols of representing the most probable transmission is provided with direct sequence spread spectrum codes;

Provide one second sequence of data bits according to the differential phase shift between the every pair of order consecutive number character waveform symbol that has described direct sequence spread spectrum codes in the transmission series;

Convert described the one the second sequence of data bits to digital data bit sequence.

13, according to the method for claim 12, wherein said one group at least 2N possible digital waveform symbol comprise the walsh function waveform.

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