CN100474574C - Chip package - Google Patents

Abstract

A chip package comprises a flexible substrate, a plurality of conductive plugs, a circuit layer and a chip. The flexible substrate has a first surface and a second surface opposite to each other. The conductive plugs penetrate through the flexible substrate. The circuit layer is located on the first surface. The circuit layer is provided with a plurality of inner pins which are respectively and electrically connected with the conductive plugs. The chip is arranged on the second surface of the flexible substrate and is jointed with the conductive plugs through the bumps, each bump is completely or partially overlapped with the corresponding conductive plug, and the joint surface of each bump and the chip is completely or partially overlapped with the corresponding conductive plug. Based on the structure, when the bump on the chip is electrically connected to the conductive plug through the hot pressing process, the chip can be quickly and firmly electrically connected to the inner pin.

Description

chip package

technical field

The present invention relates to a package structure (chip package), and in particular to a package structure using a flexible substrate.

Background technique

In the current packaging technology, the chip is mainly connected to the chip carrier by wire bonding technology, flip chip bonding technology or tape automated bonding (TAB) technology. connect. Among these bonding technologies, the tape-and-roll automatic bonding technology has the following advantages: it can conduct electrical tests directly on flexible substrates, it can use flexible substrates to complete three-dimensional assembly of electronic components, and it can make thin And small chip package and other advantages, so the chip package made by automatic tape and roll bonding technology has been widely used in electronic products such as personal computers, LCD TVs, hearing aids and memory cards.

FIG. 1 is a schematic cross-sectional view of a known chip package. Referring to FIG. 1 , the chip package 100 includes a flexible substrate 110 , a circuit layer 120 , a chip 130 , a plurality of bumps 140 and an encapsulant 150 . The material of the flexible substrate 110 is polyimide. The circuit layer 120 is disposed on the surface 112 of the flexible substrate 110 . The wiring layer 120 has a plurality of inner pins 122 , a plurality of traces 124 and a plurality of outer pins 126 , wherein the inner pins 122 are respectively electrically connected to the corresponding outer pins 126 through the traces 124 .

The chip 130 is disposed on the circuit layer 120 and is electrically connected to the inner pins 122 through the bumps 140 . Generally speaking, the known technology is to press the pressure head (pressure head) 160 of the hot press on the surface 114 of the flexible substrate 110 opposite to the surface 112, and press the flexible substrate 110 by the pressure head 160. The applied pressure and heat make the chip 130 electrically connected to the inner pins 122 through the bumps 140 . The encapsulant 150 is disposed on the surface 112 . The encapsulant 150 is disposed on the periphery of the chip 130 and wraps the bumps 140 therein. In addition, the encapsulant 150 is also filled in the gap between the flexible substrate 110 and the chip 130 .

It should be noted that when the indenter 160 applies heat to the flexible substrate 110 , the heat transfer path is mainly transferred to the bumps 140 through the flexible substrate 110 and the circuit layer 120 . However, since the material of the flexible substrate 110 is polyacetamide, which has a relatively high thermal resistance, the conventional technology requires a relatively long time without damaging the flexible substrate 110. It takes time to raise the temperature of these bumps 140 to a temperature suitable for hot pressing. Therefore, the production efficiency of the chip package 100 is low.

In addition, the flexible substrate 110 with higher thermal resistance is likely to cause uneven heat transfer from the pressure head 160 to the bumps 140 , so that the bumps 140 are heated to different temperatures at the same time. As a result, some of the bumps 140 are easily bonded to the inner pins 122 at an improper hot-pressing temperature, thereby causing defects in the quality of the electrical connection between the circuit layer 120 and the chip 130 .

In addition, the internal leads 122 and traces 124 of the chip package 100 located on the surface 112 may also cause the encapsulant 150 to fail to fully fill the gap between the flexible substrate 110 and the chip 130 . Please refer to FIG. 2 , which is a schematic diagram showing that the encapsulant in FIG. 1 is not sufficiently filled in the gap between the flexible substrate and the chip, wherein the chip 130 is transparentized and the chip 130 is indicated by a dotted line for the convenience of illustration. contour. In the process of forming the encapsulant 150, when the liquid colloid flows into the gap between the flexible substrate 110 and the chip 130, since the surface 112 is provided with a plurality of internal pins 122 and a plurality of traces 124, the liquid colloid The colloid will be subject to greater flow resistance (flow resistance). In this way, the liquid colloid is not easy to fill the gap between the flexible substrate 110 and the chip 130 , so it is easy to generate voids (voids) A in the packaging colloid 150 .

FIG. 3 is a schematic cross-sectional view of another known chip package. The chip package 200 includes a flexible substrate 210 , a circuit layer 220 , a circuit layer 230 , a plurality of conductive plugs 240 , a chip 250 , a plurality of bumps 260 and an encapsulant 270 . The flexible substrate 210 is made of polyacetamide, and has a surface 212 and a surface 214 opposite to each other. The circuit layer 220 is disposed on the surface 212 , and the circuit layer 220 has a plurality of external pins 222 and a plurality of traces 224 . The circuit layer 230 is disposed on the surface 214 , and the circuit layer 230 has a plurality of inner pins 232 and a plurality of traces 234 . The conductive plugs 240 respectively penetrate through the flexible substrate 210 and electrically connect the circuit layer 220 to the circuit layer 230 . In this way, the inner pins 232 can be electrically connected to the outer pins 222 through the traces 234 , the conductive plugs 240 and the traces 224 . The chip 250 is electrically connected to the internal pins 232 through the bumps 260 . The encapsulant 270 is disposed on the surface 214 , wherein the encapsulant 270 is disposed on the periphery of the chip 130 and encapsulates the bumps 140 therein. In addition, the encapsulant 270 also fills the gap between the flexible substrate 210 and the chip 250 .

For the same reason as above, since the material of the flexible substrate 210 is polyacetamide, under the condition that the flexible substrate 210 is not damaged, it takes a long time for the conventional technology to remove the bumps 260. The temperature is raised to a temperature suitable for hot pressing. Therefore, the production efficiency of the chip package 200 is relatively low. Moreover, the flexible substrate 210 with high thermal resistance may easily cause uneven heat transfer from the indenter 160 to the bumps 260 , and the quality of the electrical connection between the inner pins 232 and the chip 250 may also be easily flawed.

In addition, since the surface 214 is provided with a plurality of inner pins 232 and a plurality of traces 234, when forming the encapsulant 270, it is easy to make the liquid encapsulant 270 not be able to fully fill the gap between the flexible substrate 210 and the chip 250. However, after the liquid encapsulant 270 solidifies, a problem similar to the hole A in FIG. 2 occurs between the flexible substrate 210 and the chip 250 .

Contents of the invention

The purpose of the present invention is to provide a chip package, wherein there is a more reliable electrical connection between the chip and the inner pins.

Another object of the present invention is to provide a chip package, wherein the encapsulant can fully fill the gap between the flexible substrate and the chip.

The invention provides a chip package, which includes a flexible substrate, a plurality of conductive plugs, a circuit layer and a chip. The flexible substrate has a first surface and a second surface opposite to each other. These conductive plugs run through the flexible substrate. The circuit layer is located on the first surface. The circuit layer has a plurality of internal pins, and these internal pins are respectively electrically connected to the conductive plugs. The chip has an active surface and a plurality of bumps on the active surface, wherein the chip is arranged on the second surface of the flexible substrate, and is bonded to the conductive plugs through the bumps, and each bump is connected to its corresponding The conductive plugs are completely or partially overlapped, and the bonding surface of each bump and the chip is completely or partially overlapped with the corresponding conductive plugs.

According to the chip package described in a preferred embodiment of the present invention, the circuit layer further includes a plurality of traces and a plurality of external leads, and the traces are connected between the internal leads and the external leads.

The chip package according to a preferred embodiment of the present invention further includes anisotropic conductive paste (ACP) or anisotropic conductive film (ACF). The anisotropic conductive adhesive is disposed between the flexible substrate and the chip to electrically connect the bumps and the conductive plugs.

The chip package according to the preferred embodiment of the present invention further includes a two-stage characteristic (Bstage) adhesive material disposed between the flexible substrate and the chip, so that the bumps and the conductive plugs are electrically connected to each other. connect.

In the chip package according to a preferred embodiment of the present invention, the bumps are two-stage (B stage) conductive bumps.

The chip package according to the preferred embodiment of the present invention may further include conductive glue or metal disposed between the bumps and the conductive plugs, through which the bumps and the conductive plugs are electrically connected. connect.

The chip package according to a preferred embodiment of the present invention further includes a non-conductive polymer material. The non-conductive polymer material is disposed between the flexible substrate and the chip, so that the bumps are electrically connected to the conductive plugs through the solidification of the non-conductive polymer material.

The chip package according to a preferred embodiment of the present invention further includes a primer. The primer is disposed between the flexible substrate and the chip to cover the bumps.

According to the chip package described in the preferred embodiment of the present invention, the above-mentioned conductive plugs are more protruded from the second surface.

The chip package according to a preferred embodiment of the present invention further includes an encapsulant disposed on the second surface to cover the chip. In addition, the encapsulant may also have an opening, and the opening exposes the backside of the chip opposite to the active surface.

According to the chip package described in a preferred embodiment of the present invention, the material of the flexible substrate is a polymer material, wherein the polymer material is, for example, polyacetamide.

Since the chip and the inner pins of the present invention are respectively located on opposite sides of the flexible substrate, and since the conductive plugs are in direct electrical contact with the bumps, when the chip passes through the bumps and electrically When connected to the conductive plug, the temperature of the bump can be raised to a temperature suitable for hot pressing more quickly. Therefore, under the condition of not damaging the flexible substrate, the present invention can quickly and surely electrically connect the chip to the inner pin. In addition, since there are only a plurality of bumps between the chip and the flexible substrate of the present invention, when forming the encapsulant, the liquid encapsulant can fully fill the gap between the chip and the flexible substrate.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a known chip package.

FIG. 2 is a schematic diagram showing that the encapsulant in FIG. 1 is not fully filled in the gap between the flexible substrate and the chip.

FIG. 3 is a schematic cross-sectional view of another known chip package.

FIG. 4 is a schematic cross-sectional view of a chip package according to an embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view of a chip package according to another embodiment of the present invention.

FIG. 6 is a schematic cross-sectional view of a chip package according to another embodiment of the present invention.

FIG. 7 is a schematic cross-sectional view of a chip package according to yet another embodiment of the present invention.

Description of main component marking

100: chip package

110: Flexible substrate

112: surface

114: surface

120: line layer

122: inner pin

124: trace

126: External pin

130: chip

140: Bump

150: encapsulation colloid

160: pressure head

200: chip package

210: Flexible substrate

212: surface

214: surface

220: Line layer

222: External pin

224: trace

230: Line layer

232: inner pin

234: trace

240: Conductive plug

250: chips

260: Bump

270: encapsulation colloid

300: chip package

301: chip package

302: chip package

303: chip package

310: Flexible substrate

320: Conductive plug

322: semi-circular protrusion

324: welding pad

330: line layer

332: inner pin

334: trace

336: external pin

340: chip

342: Active Surface

344: bump

346: back

312: First Surface

314: second surface

350: encapsulation colloid

352: opening

360: Anisotropic conductive adhesive

362: Conductive particles

370: Non-conductive polymer material

380: primer

390: Conductive adhesive

A: hole

Detailed ways

FIG. 4 is a schematic cross-sectional view of a chip package according to an embodiment of the present invention. Referring to FIG. 4 , the chip package 300 mainly includes a flexible substrate 310 , a plurality of conductive plugs 320 , a circuit layer 330 and a chip 340 . The flexible substrate 310 has a first surface 312 and a second surface 314 opposite to each other. The material of the flexible substrate 310 is, for example, polyacetamide or other kinds of flexible polymer materials. These conductive plugs 320 penetrate through the flexible substrate 310 and the material of the conductive plugs 320 is, for example, metal. In this embodiment, the conductive plug 320 has a semicircular protrusion 322 protruding from the second surface 314 .

The circuit layer 330 is formed of metal material and disposed on the first surface 312 , and the circuit layer 330 includes a plurality of inner pins 332 , a plurality of traces 334 and a plurality of outer pins 336 . The conductive plugs 320 are electrically connected to the inner pins 332 respectively, and the outer pins 336 are adapted to be electrically connected to other circuit elements through appropriate external connection terminals.

The chip 340 has an active surface 342, and the chip 340 also has a plurality of bumps 344 on the active surface 342, wherein these bumps 344 are, for example, gold bumps, two-stage (B stage) conductive bumps, or other conductive bumps. piece. These bumps 344 are electrically connected with these conductive plugs 320 respectively, so that the chip 340 can communicate with other parts of the chip package 300 through the bumps 344, the conductive plugs 320, the inner pins 332, the traces 334 and the outer pins 336. The circuit elements are electrically connected.

Based on the above, the method for electrically connecting the chip 340 to the conductive plug 320 in this embodiment is to firstly press the pressure head 160 of the heat press onto the inner pin 332 . The chip 340 is electrically connected to the conductive plug 320 through the pressure and heat applied by the indenter 160 to the inner pin 332 . In more detail, since the inner pin 332 and the conductive plug 320 are both made of metal material, and the bump and the conductive plug are directly completely overlapped or partially overlapped, the heat output from the pressure head 160 can pass through The inner pin 332 and the conductive plug 320 are more quickly and directly conducted to the bump 344 . In this way, the temperature of the conductive plug 320 and the bump 344 can be rapidly increased to the temperature required by the thermal pressing, and the connection between the conductive plug 320 and the bump 344 is completed.

In addition, the chip package 300 may further include an encapsulant 350 , wherein the material of the encapsulant 350 is resin or other types of protective resin. The encapsulant 350 is disposed on the second surface 314 and surrounds the chip 340 . In addition, the encapsulant 350 also fills the gap between the chip 340 and the flexible substrate 310 . The encapsulant 350 has an opening 352 , wherein the opening 352 exposes the backside 346 of the chip 340 opposite to the active surface 342 . In this way, part of the heat emitted by the chip 340 can exchange heat with the external environment through the opening 352 . The method of forming the encapsulant 350 in this embodiment is to place the liquid encapsulant 350 around the chip 340 by a dispensing tool, so that the encapsulant 350 fills the gap between the chip 340 and the flexible substrate 310 . Afterwards, the liquid encapsulant 350 is cured to obtain a solid encapsulant 350 . It should be noted that since the circuit layer 330 of this embodiment is located on the first surface 312, and there is no trace or lead on the second surface 314, compared with the known technology, the circuit layer 330 of this embodiment When the encapsulant 350 flows in the gap between the chip 340 and the flexible substrate 310 , it will not be hindered by traces or leads. Therefore, the encapsulant 350 will experience less flow resistance.

FIG. 5 is a schematic cross-sectional view of a chip package according to another embodiment of the present invention. Please refer to FIG. 4 and FIG. 5 together. The main difference between the chip package 301 and the chip package 300 is that the protruding portion of the conductive plug 320 of the chip package 301 protruding from the second surface 314 is a solder pad 324 . In detail, the main spirit of the present invention lies in the complete overlap or partial overlap between the conductive plug and the bump, so in the above-mentioned embodiment, the protruding part of the conductive plug 320 protruding from the second surface 314 can be The semicircular protruding part 322 , the welding pad 324 or other types of protruding structures. In the case that the conductive plug 320 and the bump 344 completely overlap or partially overlap and are electrically connected to each other, the conductive plug 320 may not protrude from the second surface 314 .

In addition, the chip package 301 can also include a layer of anisotropic conductive paste (ACP) or anisotropic conductive film (ACF) 360, so that the bumps 344 can pass through the conductive particles 362 in the anisotropic conductive paste 360. It is electrically connected to the pad 324 .

Of course, the chip package proposed by the present invention can not only have a layer of anisotropic conductive adhesive between the chip and the flexible substrate, but also a layer of non-conductive polymeric material or a layer of primer between the two. The schematic diagrams are shown in Figure 6 and Figure 7 respectively. First please refer to FIG. 6 , the main difference between the chip package 302 and the chip package 301 is that a layer of non-conductive polymer material 370 is disposed between the chip 340 and the flexible substrate 310 of the chip package 302 . In this way, in this embodiment, the volume of the non-conductive polymer material 370 shrinks after being heated and solidified, so that the bond between the solder pad 324 and the bump 344 is tighter.

Please refer to FIG. 7 , the main difference between the chip package 303 and the chip package 301 is that a layer of primer 380 is provided between the chip 340 of the chip package 303 and the flexible substrate 310, wherein the primer 380 covers these The bump is covered inside. In this way, the primer 380 can serve as a buffer between the chip 340 and the flexible substrate 310, so as to prevent the electrical connection between the chip 340 and the flexible substrate 310 from being damaged by thermal stress. . In addition, in this embodiment, a layer of conductive glue or metal 390 may be disposed between the pad 324 and the bump 344 , so that the pad 324 is electrically connected to the bump 344 through the conductive glue 390 . Of course, the above-mentioned embodiments are not intended to limit the present invention. In other embodiments of the present invention, a layer of two-stage glue or other types of interposer (interposer) can also be provided between the chip 340 and the flexible substrate 310. ).

Since the chip and the inner pins of the present invention are respectively located on opposite sides of the flexible substrate, and since the conductive plugs are in direct electrical contact with the bumps, when the chip passes through the bumps and electrically When connected to the conductive plug, the temperature of the bump can be quickly raised to the temperature required for thermal pressing. Therefore, under the condition of not damaging the flexible substrate, the present invention can quickly and surely electrically connect the chip to the inner pin.

In addition, since there are only a plurality of bumps between the chip and the flexible substrate of the present invention, when forming the encapsulant, the liquid encapsulant can fully fill the gap between the chip and the flexible substrate.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Claims (14)

1. A chip package, characterized in that it comprises: A flexible substrate has a first surface and a second surface opposite to each other; a plurality of conductive plugs running through the flexible substrate; a circuit layer located on the first surface, the circuit layer has a plurality of inner pins, and the inner pins are respectively electrically connected to the conductive plugs; and A chip has an active surface and a plurality of bumps on the active surface, wherein the chip is disposed on the second surface of the flexible substrate, and is bonded to the conductive plugs through the bumps, the above-mentioned Each bump completely or partially overlaps with its corresponding conductive plug, and the joint surface of each bump and the chip overlaps with its corresponding conductive plug completely or partially. 2. The chip package according to claim 1, wherein the circuit layer also includes a plurality of traces and a plurality of external leads, and the traces are connected to the internal leads and the external leads. between the feet. 3. The chip package according to claim 1, further comprising anisotropic conductive adhesive disposed between the flexible substrate and the chip, so that the bumps and the conductive plugs electrical connection. 4. The chip package according to claim 1, further comprising an anisotropic conductive film disposed between the flexible substrate and the chip, so that the bumps and the conductive plugs electrical connection. 5. The chip package according to claim 1, further comprising a two-stage characteristic adhesive material disposed between the flexible substrate and the chip, so that the above-mentioned bumps and the above-mentioned conductive plugs electrical connection. 6. The chip package as claimed in claim 1, wherein the bumps are two-stage conductive bumps. 7. The chip package according to claim 1, further comprising conductive glue or metal, disposed between the bump and the conductive plug, through the conductive glue or metal to make the above-mentioned bumps and the above-mentioned conductive plugs Plug electrical connection. 8. The chip package according to claim 1, further comprising a non-conductive polymer material disposed between the flexible substrate and the chip, so as to pass the shrinkage property of the non-conductive polymer material after heat curing , so that the bumps are electrically connected to the conductive plugs. 9 . The chip package according to claim 1 , further comprising a primer disposed between the flexible substrate and the chip to cover the bumps. 10 . 10. The chip package as claimed in claim 1, wherein the conductive plugs protrude from the second surface. 11. The chip package according to claim 1, further comprising an encapsulant disposed on the second surface to cover the chip. 12 . The chip package as claimed in claim 11 , wherein the encapsulant has an opening, and the chip has a back surface opposite to the active surface, and the opening exposes the back surface of the chip. 13 . 13. The chip package as claimed in claim 1, wherein the material of the flexible substrate is a polymer material. 14. The chip package as claimed in claim 13, wherein the material of the flexible substrate is polyacetamide.

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