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CN100473062C - Filtering device and method for saving memory space in eight-phase shift keying device - Google Patents

Filtering device and method for saving memory space in eight-phase shift keying device Download PDF

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CN100473062C
CN100473062C CNB031423493A CN03142349A CN100473062C CN 100473062 C CN100473062 C CN 100473062C CN B031423493 A CNB031423493 A CN B031423493A CN 03142349 A CN03142349 A CN 03142349A CN 100473062 C CN100473062 C CN 100473062C
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CN1567911A (en
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叶裕敏
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MediaTek Shanghai Inc
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Abstract

The invention relates to a filtering device for an eight-phase-shift keying system. The filtering device comprises a pi/16 phase rotation module, a weight distribution module and a combination module. The pi/16 phase rotation module is used for rotating a second vector generated by a 3 pi/8 phase rotation module at present by an angle of pi/16 again to generate a corresponding third vector. The weight distribution module performs weight distribution on a preset distribution waveform by using a plurality of selected weights and stores the weight distribution waveform as a plurality of corresponding weight distribution waveforms. The combination module determines which weight distribution waveforms to select from the weight distribution module according to the currently generated third vector, and combines the selected weight distribution waveforms to generate a set of modulation signals. The filtering device and the method can greatly save the memory space required in the filtering program.

Description

于八相移相键控装置中节省存储器空间的滤波装置及方法 Filter device and method for saving memory space in eight-phase phase-shift keying device

技术领域 technical field

本发明是关于一种滤波装置及方法,特别是有关于一种应用于行动通讯装置的滤波装置及方法。The present invention relates to a filtering device and method, in particular to a filtering device and method applied to mobile communication devices.

背景技术 Background technique

为了提高现有行动电话与基地台数据处理能力,无线系统研发人员朝向所谓2.5G技术的发展,使无线通讯经营者可以无需更换整个电讯基础设施就能向用户提供语音和高速数据服务。In order to improve the data processing capabilities of existing mobile phones and base stations, wireless system developers are developing so-called 2.5G technology, which enables wireless communication operators to provide voice and high-speed data services to users without replacing the entire telecommunication infrastructure.

引发2.5G系统研发人员兴趣的一项重要技术就是增强数据率GSM(Enhanced Data for GSM Evolution,EDGE)规范,它采用了改良的八相移相键控(8PSK)调制方式。EDGE对当前GSM系统来说是一项革新性技术,它可提供高达384kbps数据传输率,使系统能同时提供语音、数据、因特网连接以及其它互连解决方案。而GSM5.04提供了对于八相移相键控调制方式的规范。An important technology that has aroused the interest of 2.5G system developers is the enhanced data rate GSM (Enhanced Data for GSM Evolution, EDGE) specification, which uses an improved eight-phase phase-shift keying (8PSK) modulation method. EDGE is an innovative technology for the current GSM system, which can provide data transmission rates up to 384kbps, enabling the system to simultaneously provide voice, data, Internet connection and other interconnection solutions. And GSM5.04 provides the specification for eight-phase phase-shift keying modulation mode.

请参考依据GSM5.04(V8.0.8)协议对于EDGE中八相移相键控(8PSK)调制方式的规定,依照此一协议,所谓八相移相键控的信号调制方法一般可分为三个步骤:首先,要将输入经由一格雷码映射(Gray mapping),接着进行一3π/8相位旋转,最后再经过一滤波程序以得到一输出,提供予后续一射频系统来产生一相对应的射频信号。Please refer to the provisions of the GSM5.04 (V8.0.8) protocol for the eight-phase phase-shift keying (8PSK) modulation method in EDGE. According to this agreement, the signal modulation method of the so-called eight-phase phase-shift keying can generally be divided into three types: One step: first, the input is to be mapped by a Gray code (Gray mapping), then a 3π/8 phase rotation is performed, and finally an output is obtained through a filtering process, which is provided to a subsequent radio frequency system to generate a corresponding RF signal.

请参阅图1及图2,图1为熟知数字位经雷码映像转换成第一向量的示意图,图2为图1的第一向量经3π/8相位旋转转换成第二向量的示意图。八相移相键控系统的输入是一连串的数字位,每三个一组的数字位(d3i,d3i+1,d3i+2)会被当成为一个信号处理单元来加以处理。八相移相键控系统会将三个一组的数字位,经格雷码映射后转换成一第一向量(Si=ej2πl8),此第一向量会再经过3π/8相位旋转转换成一第二向量 ( S ^ i = S i · e ji 3 π / 8 ) , 此第二向量经过滤波程序输出为一组调制信号(Ii,Qi)。这组调制信号即为八相移相键控系统的输出,可视为一基频信号。基频信号可提供予一射频系统进行信号调制,目的是产生一适合无线通讯传输之用的射频信号。这组调制信号(Ii,Qi)亦可称为y(t′),其可简单表示为:Please refer to FIG. 1 and FIG. 2. FIG. 1 is a schematic diagram of conversion of well-known digital bits into a first vector through Ray code mapping, and FIG. 2 is a schematic diagram of conversion of the first vector in FIG. 1 into a second vector through 3π/8 phase rotation. The input of the eight-phase PSK system is a series of digital bits, and each group of three digital bits (d 3i , d 3i+1 , d 3i+2 ) will be processed as a signal processing unit. The eight-phase phase-shift keying system converts a group of three digital bits into a first vector (S i =e j2πl8 ) after Gray code mapping, and this first vector is converted into a first vector through 3π/8 phase rotation two vector ( S ^ i = S i · e the ji 3 π / 8 ) , The second vector is output as a set of modulated signals (Ii, Qi) through a filtering process. This group of modulated signals is the output of the eight-phase phase-shift keying system, which can be regarded as a base frequency signal. The baseband signal can be provided to a radio frequency system for signal modulation in order to generate a radio frequency signal suitable for wireless communication transmission. This group of modulation signals (Ii, Qi) can also be called y(t′), which can be simply expressed as:

Figure C03142349D00071
其中,T为一个符号周期。
Figure C03142349D00071
Wherein, T is a symbol period.

上述表示方式可将y(t′)理解为多个第二向量与相对应事先选定的分配波形或称滤波系数Co(t)相乘后,再进行加总的结果。In the above representation, y(t′) can be understood as the result of multiplying multiple second vectors by corresponding pre-selected allocation waveforms or filter coefficients Co(t), and then summing them up.

发明内容 Contents of the invention

本发明是一种用于八相移相键控(8PSK)装置的滤波装置与方法。The invention is a filtering device and method for an eight-phase phase-shift keying (8PSK) device.

该八相移相键控(8PSK)装置包含一格雷码映像模块、一3π/8相位旋转模块以及一滤波装置。该格雷码映像模块是用来将每三个一组的数字位经过一预定的映像程序映像为一相对应的第一向量。该3π/8相位旋转模块是用来将该格雷码映像模块目前所产生的第一向量的相位,经过一预定的相位旋转程序加以旋转,以产生一相对应的第二向量。该滤波装置是用来执行滤波程序,并将该3π/8相位旋转模块目前所产生的第二向量进行滤波,以产生该多组中的一组相对应的调制信号。The eight-phase phase-shift keying (8PSK) device includes a Gray code mapping module, a 3π/8 phase rotation module and a filtering device. The Gray code mapping module is used to map each triplet of digital bits into a corresponding first vector through a predetermined mapping program. The 3π/8 phase rotation module is used to rotate the phase of the first vector currently generated by the Gray code mapping module through a predetermined phase rotation procedure to generate a corresponding second vector. The filtering device is used to perform a filtering procedure, and filter the second vector currently generated by the 3π/8 phase rotation module to generate a set of corresponding modulation signals in the plurality of sets.

本发明的滤波装置包含一π/16相位旋转模块、一权值分配模块以及一组合模块(combiner)。该π/16相位旋转模块用来将该3π/8相位旋转模块所产生的第二向量,再次旋转π/16的角度,以产生一相对应的第三向量。该权值分配模块以多个选定的权值对于一预定的分配波形进行权重分配并储存为相对应的多个权值分配波形。该组合模块是依据目前所产生的第三向量,而产生该组调制信号(Ii,Qi)。The filter device of the present invention includes a π/16 phase rotation module, a weight distribution module and a combiner module. The π/16 phase rotation module is used to rotate the second vector generated by the 3π/8 phase rotation module by an angle of π/16 again to generate a corresponding third vector. The weight distribution module performs weight distribution on a predetermined distribution waveform with a plurality of selected weights and stores them as a plurality of corresponding weight distribution waveforms. The combination module generates the set of modulation signals (Ii, Qi) according to the currently generated third vector.

本发明是一种关于八相移相键控(8PSK)装置与方法的改良。由于滤波程序的改良,使得本发明相对于先前技术而言,可以大量节省滤波程序中所需的存储器空间。The invention relates to an improvement on an eight-phase phase-shift keying (8PSK) device and method. Due to the improvement of the filtering program, compared with the prior art, the present invention can greatly save the memory space required in the filtering program.

关于本发明的优点与精神可以藉由以下的发明详述及所附附图得到进一步的了解。The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings.

附图说明 Description of drawings

图1为熟知数字位经格雷码映像转换成第一向量的示意图。FIG. 1 is a schematic diagram of conversion of well-known digital bits into a first vector through Gray code mapping.

图2为图1的第一向量经3π/8相位旋转转换成第二向量的示意图。FIG. 2 is a schematic diagram of converting the first vector in FIG. 1 into a second vector through 3π/8 phase rotation.

图3为本发明的滤波装置20及应用本发明的八相移相键控系统的示意图。FIG. 3 is a schematic diagram of the filtering device 20 of the present invention and the eight-phase PSK system applying the present invention.

图4为图3所示的π/16相位旋转模块旋转π/16的角度示意图。FIG. 4 is a schematic diagram of an angle of π/16 rotation of the π/16 phase rotation module shown in FIG. 3 .

图5为本发明滤波装置中组合模块的示意图。Fig. 5 is a schematic diagram of a combined module in the filtering device of the present invention.

图6为图5的滤波装置中该预定的分配波形示意图。FIG. 6 is a schematic diagram of the predetermined allocation waveform in the filtering device of FIG. 5 .

图7为滤波系数Co(t)对5T的一分配波形。FIG. 7 is a distribution waveform of filter coefficient Co(t) to 5T.

图8为滤波系数Co(t)对4T的分配波形。Figure 8 is the distribution waveform of the filter coefficient Co(t) to 4T.

图9为本发明另一实施例的滤波装置中一组合模块示意图。FIG. 9 is a schematic diagram of a combination module in a filter device according to another embodiment of the present invention.

表一为图5所示的编码器进行的编码程序的一实施例所使用的编码表。Table 1 is an encoding table used in an embodiment of the encoding process performed by the encoder shown in FIG. 5 .

附图标号说明Explanation of reference numbers

10:八相移相键控系统       11:格雷码映像模块10: Eight-phase PSK system 11: Gray code image module

12:3π/8相位旋转模块       20:滤波装置12: 3π/8 phase rotation module 20: Filter device

13:π/16相位旋转模块       33:权值分配模块13: π/16 phase rotation module 33: Weight distribution module

3:组合模块                33b:记忆单元3: Combination module 33b: Memory unit

33a:存储器                30:编码表33a: memory 30: code table

30a:第三向量

Figure C03142349D00081
的实部       30b:第三向量
Figure C03142349D00082
的虚部30a: Third vector
Figure C03142349D00081
Real part 30b of : the third vector
Figure C03142349D00082
the imaginary part of

30c:编码信号              34:控制器30c: Coded signal 34: Controller

35:符号指定器             36:加总器控制器35: Symbol designator 36: Adder controller

37:符号指定单元           60:射频系统37: Symbol Designation Unit 60: Radio Frequency System

具体实施方式 Detailed ways

请参阅图3,图3为本发明的滤波装置20及应用本发明的八相移相键控系统10的示意图。本发明为一种用于一八相移相键控系统10的滤波装置20。八相移相键控系统10是用来将一连串的数字位(d3i,d3i+1,d3i+2)进行编码,以输出多组相对应的调制信号(Ii,Qi)。八相移相键控系统10包含有一格雷码映像模块11、一3π/8相位旋转模块12以及一滤波装置20。Please refer to FIG. 3 . FIG. 3 is a schematic diagram of the filtering device 20 of the present invention and the eight-phase PSK system 10 applying the present invention. The present invention is a filtering device 20 for an eight-phase PSK system 10 . The eight-phase PSK system 10 is used to encode a series of digital bits (d 3i , d 3i+1 , d 3i+2 ) to output multiple sets of corresponding modulation signals (Ii, Qi). The eight-phase PSK system 10 includes a Gray code mapping module 11 , a 3π/8 phase rotation module 12 and a filtering device 20 .

格雷码映像模块11是用来将每三个一组的数字位经过一预定的映像程序映像为一相对应的第一向量Si。3π/8相位旋转模块12是用来将格雷码映像模块11目前所产生的第一向量Si的相位,经过一预定的相位旋转程序加以旋转,以产生一相对应的第二向量

Figure C03142349D00083
滤波装置20是用来将该3π/8相位旋转模块12目前所产生的第二向量
Figure C03142349D0008102944QIETU
进行一滤波程序,以产生一组调制信号(Ii,Qi)。该组调制信号为一基频信号,可提供予一射频系统60以产生一相对应的射频信号。The gray code mapping module 11 is used to map each triplet of digital bits into a corresponding first vector S i through a predetermined mapping program. The 3π/8 phase rotation module 12 is used to rotate the phase of the first vector S i currently generated by the Gray code mapping module 11 through a predetermined phase rotation procedure to generate a corresponding second vector
Figure C03142349D00083
The filtering device 20 is used to rotate the 3π/8 phase of the second vector currently generated by the module 12
Figure C03142349D0008102944QIETU
A filtering process is performed to generate a set of modulation signals (Ii, Qi). The group of modulated signals is a baseband signal, which can be provided to a radio frequency system 60 to generate a corresponding radio frequency signal.

由于上述每三个一组的数字位共仅有八种不同的排列,因而形成八种不同的数字字节,分别是(1,1,1)、(0,1,1)、(0,1,0)、(0,0,0)、(0,0,1)、(1,0,1)、(1,0,0)以及(1,1,0)。格雷码映像模块11中所使用的预定映像程序,是将每一种数字字节映像为具有相同幅度(magnitude)但是不同相位(phase)的相对应第一向量Si(Si=ej2πl/8),这些第一向量Si之间,相邻两者的相位差为π/4。如图1所示,二相邻的第一向量的相位差

Figure C03142349D0009103019QIETU
1为π/4。Since there are only eight different permutations of the above-mentioned digital bits in groups of three, eight different digital bytes are formed, which are (1, 1, 1), (0, 1, 1), (0, 1,0), (0,0,0), (0,0,1), (1,0,1), (1,0,0), and (1,1,0). The predetermined mapping program used in the gray code mapping module 11 is to map each digital byte as having the same magnitude (magnitude) but the corresponding first vector S i (S i =e j2πl/ 8 ), among these first vectors S i , the phase difference between the two adjacent ones is π/4. As shown in Figure 1, the phase difference of two adjacent first vectors
Figure C03142349D0009103019QIETU
1 is π/4.

请参阅图2B,图2B为图1所示的3π/8相位旋转模块12中所使用的相位旋转程序。3π/8相位旋转模块12所使用的预定的相位旋转程序如下:3π/8相位旋转模块12每次旋转目前的第一向量Si的相位,较3π/8相位旋转模块12旋转前一次的第一向量Si的相位多3π/8的角度,因而产生相对应的第二向量

Figure C03142349D00091
第二向量 S ^ i ( S ^ i = S i · e ji 3 π / 8 ) 共仅有十六种可能性,且这些第二向量
Figure C03142349D00093
之间相邻两者的相位差为π/8。如图2所示,二相邻的第二向量的相位差
Figure C03142349D0009103043QIETU
为π/8。格雷码映像模块11中所使用的预定映像程序以及3π/8相位旋转模块12中所使用的相位旋转程序,是定义于GSM5.04(V8.0.8)协议中,为八相移相键控系统中的标准程序,在此不多加详述。Please refer to FIG. 2B . FIG. 2B is a phase rotation program used in the 3π/8 phase rotation module 12 shown in FIG. 1 . The predetermined phase rotation program used by the 3π/8 phase rotation module 12 is as follows: the 3π/8 phase rotation module 12 rotates the phase of the current first vector S i each time, compared with the 3π/8 phase rotation module 12 that rotates the previous phase of the first vector S i The phase of a vector S i is more than 3π/8 angle, thus producing the corresponding second vector
Figure C03142349D00091
second vector S ^ i ( S ^ i = S i &Center Dot; e the ji 3 π / 8 ) There are only sixteen possibilities, and these second vectors
Figure C03142349D00093
The phase difference between the adjacent two is π/8. As shown in Figure 2, the phase difference of two adjacent second vectors
Figure C03142349D0009103043QIETU
is π/8. The predetermined mapping program used in the gray code mapping module 11 and the phase rotation program used in the 3π/8 phase rotation module 12 are defined in the GSM5.04 (V8.0.8) protocol, which is an eight-phase phase shift keying system The standard procedures in , will not be described in detail here.

如图3所示,滤波装置20包含有一π/16相位旋转模块13、一权值分配模块33、以及一组合模块(combiner)3。π/16相位旋转模块13是用来将3π/8相位旋转模块12目前所产生的第二向量

Figure C03142349D00094
再次旋转π/16的角度后,产生一相对应的第三向量 S ′ ^ i ( S ^ ′ i = S i ^ · e jπ / 16 ) . 权值分配模块33以多个选定的权值对于一预定的分配波形进行权重分配并储存为相对应的多个权值分配波形。该预定的分配波形可分割为多段次分配波形。权值分配模块33包含一具有多个记忆单元33b的存储器33a,而每个记忆单元33b可用来储存经过权重分配后的多个权值次分配波形。组合模块3则依据目前所产生的第三向量
Figure C03142349D0009103103QIETU
,决定自权值分配模块33中要选择出哪些权值分配波形,并将所选出的权值分配波形组合起来,以产生调制信号(Ii,Qi)。As shown in FIG. 3 , the filtering device 20 includes a π/16 phase rotation module 13 , a weight distribution module 33 , and a combiner module (combiner) 3 . The π/16 phase rotation module 13 is used to convert the second vector currently produced by the 3π/8 phase rotation module 12
Figure C03142349D00094
After rotating the angle of π/16 again, a corresponding third vector is generated S ′ ^ i ( S ^ ′ i = S i ^ &Center Dot; e jπ / 16 ) . The weight allocation module 33 performs weight allocation on a predetermined allocation waveform with multiple selected weights and stores them as corresponding multiple weight allocation waveforms. The predetermined distribution waveform can be divided into multiple distribution waveforms. The weight allocation module 33 includes a memory 33a with a plurality of memory units 33b, and each memory unit 33b can be used to store a plurality of weight sub-allocation waveforms after weight allocation. Combination module 3 is based on the third vector generated at present
Figure C03142349D0009103103QIETU
, decide which weight distribution waveforms to be selected from the weight distribution module 33, and combine the selected weight distribution waveforms to generate modulation signals (Ii, Qi).

请参阅图4,图4为图3所示的π/16相位旋转模块13旋转π/16的角度示意图。π/16相位旋转模块13可将每一第二向量

Figure C03142349D0009103121QIETU
转成相对应的第三向量
Figure C03142349D00096
以便让组合模块3处理成一定的编码信号,借着该编码信号找到适当的滤波方式。第三向量 S ′ ^ i ( S ^ ′ i = S i ^ · e jπ / 16 ) 共仅有十六种可能性,且相邻第三向量之间的相位差为π/8。如图4所示,二相邻的第三向量的相位差
Figure C03142349D0009103133QIETU
为π/8。Please refer to FIG. 4 . FIG. 4 is a schematic diagram of the π/16 phase rotation module 13 shown in FIG. 3 rotating by π/16. π/16 phase rotation module 13 can convert each second vector
Figure C03142349D0009103121QIETU
into the corresponding third vector
Figure C03142349D00096
In order to allow the combination module 3 to process a certain coded signal, and find an appropriate filtering method by means of the coded signal. third vector S ′ ^ i ( S ^ ′ i = S i ^ &Center Dot; e jπ / 16 ) There are only sixteen possibilities, and the phase difference between adjacent third vectors is π/8. As shown in Figure 4, the phase difference of two adjacent third vectors
Figure C03142349D0009103133QIETU
is π/8.

每一第三向量

Figure C03142349D00101
是由一实部与一虚部所组成。该实部是由一实部幅度与一实部符号所组成,其中该实部幅度是代表该实部的大小,该实部符号是代表该实部的正负值。该虚部是由一虚部幅度与一虚部符号所组成,其中该虚部幅度是代表该虚部的大小,该虚部符号是代表该虚部的正负值。而这些实部幅度与虚部幅度是取值于下列组合之一,该组合为cos(π/16)、cos(3π/16)、cos(5π/16)与cos(7π/16)。Every third vector
Figure C03142349D00101
It is composed of a real part and an imaginary part. The real part is composed of a real part magnitude and a real part sign, wherein the real part magnitude represents the magnitude of the real part, and the real part sign represents the positive and negative values of the real part. The imaginary part is composed of an imaginary part amplitude and an imaginary part sign, wherein the imaginary part amplitude represents the size of the imaginary part, and the imaginary part sign represents the positive and negative values of the imaginary part. These real part magnitudes and imaginary part magnitudes are selected from one of the following combinations, which are cos(π/16), cos(3π/16), cos(5π/16) and cos(7π/16).

请参阅图5,图5为本发明滤波装置20中组合模块3的示意图。组合模块3是依据目前所产生的第三向量,经过一组合程序后,以产生该组调制信号。组合模块3包含一编码器31、以及一位移缓存器32。编码器31是依据每一第三向量

Figure C03142349D00102
的相位,将该第三向量
Figure C03142349D00103
进行一编码程序,用以产生一相对应的编码信号,所产生的编码信号将在稍后进行的该组合程序中被使用。位移缓存器32包含有多个缓存单元(未显示),用来暂存目前以及先前编码器31所编码产生的该等编码信号。权值分配模块33亦包含于组合模块3中,而权值分配模块33所选定的该等权值是取值于下列组合之一,该组合为cos(π/16)、cos(3π/16)、cos(5π/16)与cos(7π/16)。Please refer to FIG. 5 . FIG. 5 is a schematic diagram of the combination module 3 in the filter device 20 of the present invention. The combination module 3 generates the set of modulated signals after a combination procedure according to the currently generated third vector. The combination module 3 includes an encoder 31 and a shift register 32 . Encoder 31 is based on each third vector
Figure C03142349D00102
the phase of the third vector
Figure C03142349D00103
An encoding process is performed to generate a corresponding encoded signal, and the generated encoded signal will be used in the combining process performed later. The shift register 32 includes a plurality of buffer units (not shown) for temporarily storing the encoded signals generated by the current and previous encoders 31 . The weight distribution module 33 is also included in the combination module 3, and the weights selected by the weight distribution module 33 are taken in one of the following combinations, the combination being cos(π/16), cos(3π/ 16), cos(5π/16) and cos(7π/16).

如图5所示,组合模块3另包含一控制器34、一符号指定器35以及一加总器36。控制器34以依据该等缓存单元中所暂存的该等实部幅度编码,而分别自权值分配模块33中选择出相对应的权值分配波形。权值分配波形为目前编码信号以及先前4组编码信号分别依据多个选定的权值而成。As shown in FIG. 5 , the combination module 3 further includes a controller 34 , a symbol designator 35 and an adder 36 . The controller 34 selects corresponding weight distribution waveforms from the weight distribution module 33 according to the real part amplitude codes temporarily stored in the buffer units. The weight distribution waveforms are formed based on multiple selected weights for the current coded signal and the previous four groups of coded signals.

符号指定器35包含有多个符号指定单元37。符号指定器35是在控制器34的控制下,依据该等实部符号编码或虚部符号编码,分别将控制器34所选择出的该等权值分配波形,加以指定相对应的正负符号。加总器36是将符号指定器35所指定完符号的该等权值分配波形相加起来,以产生该组调制信号。The symbol designator 35 includes a plurality of symbol designating units 37 . The symbol designator 35 is under the control of the controller 34, according to the real part symbol code or the imaginary part symbol code, respectively assigns the waveforms of the weights selected by the controller 34 to specify the corresponding positive and negative symbols . The adder 36 adds up the equal weight distribution waveforms of the symbols assigned by the symbol assigner 35 to generate the group of modulation signals.

控制器34另依据该等缓存单元中所暂存的该等虚部幅度编码,而分别自权值分配模块33中选择出相对应的权值分配波形。经由控制器34的控制,由符号指定器35依据该等虚部符号编码,分别将控制器34所选择出的该等权值分配波形指定相对应的正负符号。最后再由加总器36来将符号指定器35所指定完符号的该等权值分配波形相加起来,以产生该虚部调制信号。调制信号包含一实部调制信号Ii与一虚部调制信号Qi。The controller 34 further selects corresponding weight distribution waveforms from the weight distribution module 33 according to the imaginary part amplitude codes temporarily stored in the buffer units. Through the control of the controller 34 , the sign designator 35 assigns corresponding positive and negative signs to the weight distribution waveforms selected by the controller 34 according to the imaginary part sign codes. Finally, the adder 36 adds up the equal weight distribution waveforms of the symbols assigned by the symbol assigner 35 to generate the imaginary part modulation signal. The modulation signal includes a real part modulation signal Ii and an imaginary part modulation signal Qi.

本发明滤波装置20所进行的滤波程序系是将目前与之前预定数目的输入向量分别乘上预定的分配波形,最后再经过累加求合以得出该组调制信号以成为输出。滤波程序的实际作法有很多种,本发明则将仅有的16种输入向量与事先给定的分配波形相乘积后所得出的多个权值分配波形,事先就算出而预先储存在之存储器中。The filtering procedure performed by the filtering device 20 of the present invention is to multiply the current and previous predetermined number of input vectors by the predetermined distribution waveform, and finally accumulate and sum to obtain the group of modulated signals as output. There are many kinds of actual practice of the filter program. In the present invention, multiple weight distribution waveforms obtained by multiplying only 16 kinds of input vectors with the distribution waveforms given in advance are calculated in advance and stored in the memory in advance. .

因此,当有一输入向量输入滤波装置20时,滤波装置20可直接从存储器33a预存的数据所形成的查找表(look-up table)中选取出一组相对应的数据,再经过简单的累加求和以输出该组调制信号。相较于熟知技术,原本进行相乘所需要昂贵的乘法器就可以被取代而省下。而在存储器33a中的预存数据则可以进一步因本发明特殊的信号处理,而依据三角函数对称性的规律加以简化,最高可以较原先须储存数据减少8~10倍,如此一来,可大量节省八相移相键控系统中的存储器空间。Therefore, when an input vector is input to the filter device 20, the filter device 20 can directly select a group of corresponding data from the look-up table (look-up table) formed by the data prestored in the memory 33a, and then through simple accumulation and calculation and to output the set of modulated signals. Compared with the known technology, expensive multipliers originally required for multiplication can be replaced and saved. The prestored data in the memory 33a can be further simplified according to the law of trigonometric function symmetry due to the special signal processing of the present invention, and the highest can be reduced by 8 to 10 times compared with the original data to be stored. In this way, a large amount of savings can be achieved. Memory space in an eight-phase phase-shift keying system.

此外,π/16相位旋转模块13执行了本发明的滤波装置20中特殊的信号处理方式。π/16相位旋转模块13是用来将3π/8相位旋转模块12目前所产生的第二向量,再次旋转π/16的角度后,产生一相对应的第三向量,目的是要使不同的第三向量之间具有更优越的对称性,以便后续能进一步更加简化,达到节省存储器空间的效果。In addition, the π/16 phase rotation module 13 implements a special signal processing method in the filtering device 20 of the present invention. The π/16 phase rotation module 13 is used to rotate the second vector currently generated by the 3π/8 phase rotation module 12 by an angle of π/16 to generate a corresponding third vector, the purpose of which is to make different The third vector has superior symmetry, so that it can be further simplified in the future to achieve the effect of saving memory space.

请参阅表一,表一为图5所示的编码器31进行的编码程序的一实施例所使用的编码表30。Please refer to Table 1. Table 1 is the encoding table 30 used in an embodiment of the encoding process performed by the encoder 31 shown in FIG. 5 .

表一Table I

Figure C03142349D00111
Figure C03142349D00111

Figure C03142349D00121
Figure C03142349D00121

该编码程序为依据目前第三向量的实部30a与虚部30b,从编码表30中查得其编码信号30c。每一该等编码信号30c包含一实部幅度编码Eci、一实部符号编码Sci、一虚部幅度编码Esi与一虚部符号编码Ssi。本发明的一较佳实施例中,实部与虚部幅度编码各仅需2位,而实部与虚部符号编码各仅需1位。也就是说每一编码信号共为6位。依据三角函数规则,该等第三向量相对应的该等实部幅度与该等虚部幅度是取值于下列组合之一,该组合为:cos(π/16)、cos(3π/16)、cos(5π/16)与cos(7π/16)。因此,可发现表一中的任一实部幅度与虚部幅度均为上述其中一组。而这四组实部幅度编码Eci分别为cos(π/16):(00,1)、cos(3π/16):(01,1)、cos(5π/16):(10,1)与cos(7π/16):(11,1)。The encoding procedure is based on the current third vector The real part 30a and the imaginary part 30b of , and its encoded signal 30c is found from the encoding table 30 . Each of the encoded signals 30c includes a real amplitude code Eci , a real sign code Sc i , an imaginary amplitude code Es i and an imaginary sign code Ss i . In a preferred embodiment of the present invention, only 2 bits are required for the amplitude encoding of the real part and the imaginary part, and only 1 bit is required for the sign encoding of the real part and the imaginary part. That is to say, each encoded signal has 6 bits in total. According to the rules of trigonometric functions, the magnitudes of the real parts and the magnitudes of the imaginary parts corresponding to the third vectors are in one of the following combinations: cos(π/16), cos(3π/16) , cos(5π/16) and cos(7π/16). Therefore, it can be found that any amplitude of the real part and amplitude of the imaginary part in Table 1 is one of the above groups. And these four groups of real part amplitude codes Eci are respectively cos(π/16): (00, 1), cos(3π/16): (01, 1), cos(5π/16): (10, 1) with cos(7π/16): (11, 1).

举例说明第三向量编码为相对应编码信号的过程,请参阅图4。首先,于图4中选定一编号12的第三向量,也就等同于表一中的p为12。再依据一实部换算式cos(π(2p+1)/16)以及一虚部换算式sin(π(2p+1)/16),得到cos(25π/16)以及sin(25π/16)。但依据三角函数规则可推导出cos(25π/16)=cos(7π/16)以及sin(25π/16)=-cos(π/16)。因此,可得到该实部幅度编码Eci为11(二进制)、该实部符号编码Sci为1(二进制)、该虚部幅度编码Esi为00(二进制)与该虚部符号编码Ssi为0(二进制),因此编号12的第三向量相对应的编码信号为(11,1,00,0)。其中,实部符号编码Sci或虚部符号编码Ssi为0时表示为一负数。For an example illustrating the process of encoding the third vector into a corresponding encoded signal, please refer to FIG. 4 . First, a third vector numbered 12 is selected in FIG. 4 , which is equivalent to p being 12 in Table 1. Then according to a real part conversion formula cos(π(2p+1)/16) and an imaginary part conversion formula sin(π(2p+1)/16), cos(25π/16) and sin(25π/16) are obtained . However, cos(25π/16)=cos(7π/16) and sin(25π/16)=-cos(π/16) can be deduced according to the rules of trigonometric functions. Therefore, it can be obtained that the real part magnitude code Eci is 11 (binary), the real part sign code Sc i is 1 (binary), the imaginary part magnitude code Esi is 00 (binary) and the imaginary part sign code Ssi is 0 (binary), so the coded signal corresponding to the third vector numbered 12 is (11, 1, 00, 0). Wherein, when the real part sign code Sc i or the imaginary part sign code Ss i is 0, it represents a negative number.

基于GSM5.04(V8.0.8)协议规定,在本发明中相当于输出的该组调制信号的产生,与目前输入向量以及先前输入向量有关联编码信号以及先前4组编码信号有关联。例如:图5所示的Eci-1表示前一组编码信号的实部幅度编码。因此需要暂存目前以及先前的编码信号,以利组合模块于后续的组合程序中加以利用而产生该组调制信号。Based on the GSM5.04 (V8.0.8) protocol, in the present invention, the generation of the output modulation signal is related to the current input vector and the previous input vector associated coded signals and the previous 4 groups of coded signals. For example: Ec i-1 shown in FIG. 5 represents the real part amplitude coding of the previous group of coded signals. Therefore, the current and previous coded signals need to be temporarily stored, so that the combining module can use them in subsequent combining procedures to generate the set of modulated signals.

权值分配模块33是以多个选定的权值对于一预定的分配波形进行权重分配并储存为相对应的多个权值分配波形。权值分配模块33中所选定的多个权值,即为表一中所有第三向量的实部与虚部可能的大小,也就是分别为cos(π/16)、cos(3π/16)、cos(5π/16)与cos(7π/16)。The weight distribution module 33 performs weight distribution on a predetermined distribution waveform with a plurality of selected weights and stores them as a plurality of corresponding weight distribution waveforms. The multiple weights selected in the weight distribution module 33 are the possible sizes of the real part and the imaginary part of all the third vectors in Table 1, which are respectively cos(π/16), cos(3π/16 ), cos(5π/16) and cos(7π/16).

请参阅图6,图6为图5的滤波装置20中该预定的分配波形示意图。依据GSM5.04(V8.0.8)协议规定,滤波系数Co(t)的定义如下:Please refer to FIG. 6 , which is a schematic diagram of the predetermined allocation waveform in the filtering device 20 of FIG. 5 . According to the GSM5.04 (V8.0.8) protocol, the filter coefficient Co(t) is defined as follows:

cc 00 (( tt )) == ΠΠ ii == 00 33 SS (( tt ++ iTi )) ,, forfor 00 ≤≤ tt ≤≤ 55 TT 00 ,, elseelse

wherewhere

Figure C03142349D00133
Figure C03142349D00133

andand

依据GSM5.04(V8.0.8)协议对于八相移相键控系统的输出(该组调制信号)的规定:

Figure C03142349D00135
输出的产生与目前输入向量以及先前四组输入向量有关(i=0~4),因此本发明的位移缓存器32中原则上暂存有包含目前以及先前四组共五组的编码信号(Eci,Sci,Esi,Ssi)。而分配波形也原则上分割为五段次分配波形Coi(t),(i=0~4),以分别搭配代表五个输入向量的五组编码信号。According to the GSM5.04 (V8.0.8) protocol, the output of the eight-phase phase-shift keying system (the group of modulation signals) is specified:
Figure C03142349D00135
The generation of output is related to the current input vector and the previous four groups of input vectors (i=0~4), so in principle, the shift register 32 of the present invention temporarily stores five groups of encoded signals (Ec i , Sc i , Es i , Ss i ). In principle, the allocation waveform is divided into five segments of allocation waveform Co i (t), (i=0˜4), so as to match five sets of coded signals representing five input vectors respectively.

权值分配模块33则包含一具有五个记忆单元33b的存储器,每个记忆单元33b可用来储存经过权重分配后的多个权值次分配波形。举例而言,图3最右侧所示意的记忆单元是用来储存次分配波形Co4(t)与不同权值相乘后的数据:cos(π/16)*Co4(t)、cos(3π/16)*Co4(t)、cos(5π/16)*Co4(t)与cos(7π/16)*Co4(t)。而实际上每一段权值次分配波形中要取样多少点来储存,则视系统实际的需由与记忆单元容量大小而定,一般而言,每一段权值次分配波形中取样率应至少有16点,才不会造成失真。The weight allocation module 33 includes a memory with five memory units 33b, and each memory unit 33b can be used to store multiple weight sub-allocation waveforms after weight allocation. For example, the memory unit shown on the far right of Fig. 3 is used to store the multiplied data of the sub-allocation waveform Co 4 (t) and different weights: cos(π/16)*Co 4 (t), cos (3π/16)*Co 4 (t), cos(5π/16)*Co 4 (t) and cos(7π/16)*Co 4 (t). In fact, how many points need to be sampled in each section of weight sub-allocation waveform for storage depends on the actual needs of the system and the capacity of the memory unit. Generally speaking, the sampling rate of each section of weight sub-allocation waveform should be at least 16 points, it will not cause distortion.

请参阅图7及图8,图7为滤波系数Co(t)对5T的一分配波形,图8为滤波系数Co(t)对4T的分配波形。由图7可以清楚地看出图上所标示的I的前半部与V的后半部趋近于零,因此,可以认为是可以忽略掉这两部分。基于分配波形图所分的每一段落长度仍为T,因此,忽略掉图7所示的I的前半部与V的后半部后,而剩下未忽略的部分,改分成4个T段落,如图8所示。换句话说,于由省略的段落对于滤波过程影响极小,因此改成使用4个记忆单元对应剩下未忽略段落,不但不会影响滤波结果的正确性,也能节省存储器的使用。其中,本发明较佳实施例的4个记忆单元所预先储存的数据分别为:Please refer to FIG. 7 and FIG. 8 , FIG. 7 is a distribution waveform of the filter coefficient Co(t) to 5T, and FIG. 8 is a distribution waveform of the filter coefficient Co(t) to 4T. It can be clearly seen from Fig. 7 that the first half of I and the second half of V marked on the figure are close to zero, therefore, it can be considered that these two parts can be ignored. The length of each paragraph divided based on the distribution waveform diagram is still T, therefore, after ignoring the first half of I and the second half of V shown in Figure 7, and the remaining unignored part, it is divided into 4 T paragraphs, As shown in Figure 8. In other words, since the omitted paragraphs have little effect on the filtering process, changing to use 4 memory units corresponding to the remaining un-ignored paragraphs will not only not affect the correctness of the filtering results, but also save memory usage. Wherein, the pre-stored data of the 4 memory units of the preferred embodiment of the present invention are respectively:

ROMROM 44 (( kk )) == coscos (( ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( 33 ·&Center Dot; OVSOVS ++ kk )) ;; 00 ≤≤ kk ≤≤ OVSOVS -- 11 coscos (( 33 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( 22 ·&Center Dot; OVSOVS ++ kk )) ;; OVSOVS ≤≤ kk ≤≤ 22 OVSOVS -- 11 coscos (( 55 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( 11 ·&Center Dot; OVSOVS ++ kk )) ;; 22 OVSOVS ≤≤ kk ≤≤ 33 OVSOVS -- 11 coscos (( 77 ππ // 1616 )) ·· CC 00 ′′ (( kk )) ;; 33 OVSOVS ≤≤ kk ≤≤ 44 OVSOVS -- 11

ROMROM 33 (( kk )) == coscos (( ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( 22 ·&Center Dot; OVSOVS ++ kk )) ;; 00 ≤≤ kk ≤≤ OVSOVS -- 11 coscos (( 33 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( OVSOVS ++ kk )) ;; OVSOVS ≤≤ kk ≤≤ 22 OVSOVS -- 11 coscos (( 55 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( kk )) ;; 22 OVSOVS ≤≤ kk ≤≤ 33 OVSOVS -- 11 coscos (( 77 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( kk -- OVSOVS )) ;; 33 OVSOVS ≤≤ kk ≤≤ 44 OVSOVS -- 11

ROMROM 22 (( kk )) == coscos (( ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( OVSOVS ++ kk )) ;; 00 ≤≤ kk ≤≤ OVSOVS -- 11 coscos (( 33 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( kk )) ;; OVSOVS ≤≤ kk ≤≤ 2020 VSvs. -- 11 coscos (( 55 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( kk -- OVSOVS )) ;; 22 OVSOVS ≤≤ kk ≤≤ 33 OVSOVS -- 11 coscos (( 77 ππ // 1616 )) ·· CC 00 ′′ (( kk -- 22 OVSOVS )) ;; 33 OVSOVS ≤≤ kk ≤≤ 44 OVSOVS -- 11

ROMROM 11 (( kk )) == coscos (( ππ // 1616 )) ·· CC 00 ′′ (( kk )) ;; 00 ≤≤ kk ≤≤ OVSOVS -- 11 coscos (( 33 ππ // 1616 )) ·· CC 00 ′′ (( kk -- OVSOVS )) ;; OVSOVS ≤≤ kk ≤≤ 22 OVSOVS -- 11 coscos (( 55 ππ // 1616 )) ·· CC 00 ′′ (( kk -- 22 OVSOVS )) ;; 22 OVSOVS ≤≤ kk ≤≤ 33 OVSOVS -- 11 coscos (( 77 ππ // 1616 )) ·&Center Dot; CC 00 ′′ (( kk -- 33 OVSOVS )) ;; 33 OVSOVS ≤≤ kk ≤≤ 44 OVSOVS -- 11

其中,采样率OVS(oversampling rate)为16点。Among them, the sampling rate OVS (oversampling rate) is 16 points.

请参阅图9,图9为本发明另一实施例的滤波装置中一组合模块3示意图。由于预存在权值分配模块33(图5)的分配波形可忽略部分段落,因此,组合模块3的权值分配模块33所使用的记忆单元减为4组,以达到省节存储器的效果。同理,本发明较佳具体图9所示的实施例中所产生的一组调制信号,只与目前编码信号以及先前3组编码信号有关联。因此,目前滤波程序只处理4组信号。以下将依据本实施条件,说明本发明的滤波方法。Please refer to FIG. 9 . FIG. 9 is a schematic diagram of a combination module 3 in a filter device according to another embodiment of the present invention. Since the allocation waveform of the pre-existing weight allocation module 33 ( FIG. 5 ) can ignore some paragraphs, the memory units used by the weight allocation module 33 of the combination module 3 are reduced to 4 groups to achieve the effect of saving memory. Similarly, a group of modulated signals generated in the preferred embodiment of the present invention shown in FIG. 9 is only related to the current coded signal and the previous 3 groups of coded signals. Therefore, currently the filtering procedure only processes 4 sets of signals. The filtering method of the present invention will be described below based on the present implementation conditions.

如图9所示,本发明的滤波装置预先以多个选定的权值对于一预定的分配波形进行权重分配,以得出相对应的多个权值分配波形,并加以储存于一权值分配模块33中。接着,以编码器31借着表一的编码表所提供的数据进行编码,以产生一相对应于前述所产生的第三向量的编码信号(Eci,Sci,Esi,Ssi)。而每一编码信号包含一实部幅度编码Eci、一实部符号编码Sci、一虚部幅度编码Esi与一虚部符号编码Ssi。然后,将目前以及先前该编码器31所编码产生的该等编码信号(Eci,Sci,Esi,Ssi)暂存在位移缓存器32。然后,依据所暂存的该等实部幅度编码Eci或虚部幅度编码Esi,而分别自该权值分配模块33中选择出相对应的权值分配波形。接着,以符号指定器35依据前述该等编码信号(Eci,Sci,Esi,Ssi)的实部符号编码Sci或虚部符号编码Ssi,分别将所选择出的该等权值分配波形指定相对应的正负符号。最后,以加总器36将所选出的权值分配波形组合起来,以产生包含实部调制信号与虚部调制信号的调制信号(Ii,Qi)。As shown in Figure 9, the filter device of the present invention performs weight distribution on a predetermined distribution waveform with a plurality of selected weights in advance, so as to obtain a plurality of corresponding weight distribution waveforms, and store them in a weight Assignment module 33. Next, the encoder 31 encodes the data provided by the encoding table in Table 1 to generate an encoded signal (Ec i , Sc i , Es i , Ss i ) corresponding to the third vector generated above. Each coded signal includes a real amplitude code Eci , a real sign code Sc i , an imaginary amplitude code Es i and an imaginary sign code Ss i . Then, the encoded signals (Ec i , Sci , Es i , Ss i ) encoded by the encoder 31 at present and previously are temporarily stored in the shift register 32 . Then, according to the temporarily stored real-part amplitude codes Eci or imaginary-part amplitude codes Es i , corresponding weight distribution waveforms are respectively selected from the weight distribution module 33 . Then, according to the real part symbol code Sc i or the imaginary part symbol code Ss i of the aforementioned coded signals (Eci , Sci , Esi , Ssi) with the symbol designator 35, the selected equal weight The value assignment waveform specifies the corresponding positive and negative signs. Finally, the selected weight distribution waveforms are combined by the adder 36 to generate modulation signals (Ii, Qi) including real part modulation signals and imaginary part modulation signals.

藉由以上较佳具体实施例的详述,是希望能更加清楚描述本发明的特征与精神,而并非以上述所揭露的较佳具体实施例来对本发明的范畴加以限制。相反地,其目的是希望能涵盖各种改变及具相等性的安排于本发明所欲申请的权利要求的范围的范畴内。因此,本发明所申请的权利要求的范围的范畴应该根据上述的说明作最宽广的解释,以致使其涵盖所有可能的改变以及具相等性的安排。Through the above detailed description of the preferred embodiments, it is hoped that the characteristics and spirit of the present invention can be described more clearly, and the scope of the present invention is not limited by the preferred embodiments disclosed above. On the contrary, the intention is to cover various changes and equivalent arrangements within the scope of the appended claims of the present invention. Therefore, the scope of the claims for the application of the present invention should be interpreted in the broadest way based on the above description, so as to cover all possible changes and equivalent arrangements.

Claims (24)

1. filter that is used for one or eight phase phase-shift keying (8PSK) systems, this eight phases phase shift keyed system is to be used for a series of digit order number is encoded, to export the corresponding modulation signals of many groups, this eight phases phase shift keyed system comprises:
One Gray code image module, being used for every ternary digit order number is a corresponding primary vector through a predetermined map program reflection;
One 3 π/8 phase place rotary modules are used for phase place with the present primary vector that produces of this Gray code image module, are rotated through a predetermined phase place rotation program, to produce a corresponding secondary vector; And
One filter is used for this 3 π/present secondary vector that produces of 8 phase place rotary modules is carried out filtering, to produce one group of corresponding modulation signal in these many groups;
This filter comprises in addition:
One π/16 phase place rotary modules is used for this 3 π/present secondary vector that produces of 8 phase place rotary modules is rotated the angle of π/16 once more, to produce corresponding the 3rd vector;
One weights distribution module carries out weight allocation for a predetermined distribution waveform and saves as corresponding a plurality of weights distributing waveform with a plurality of selected weights; And
One composite module, according to present the 3rd vector that produces, which weights decision will select in this weights distribution module distributes waveform, and distributes waveform combination to get up selected weights, to produce this group modulation signal.
2. filter as claimed in claim 1, wherein above-mentioned every ternary digit order number has eight kinds of different arrangements, therefore form eight kinds of different digital bytes, map program that should be predetermined is as follows: but with the corresponding primary vector of each digital byte reflection for having the same magnitude out of phase, adjacent both phase difference is π/4 between these primary vectors.
3. filter as claimed in claim 1, wherein phase place rotation program that should be predetermined is as follows: the phase place of the primary vector that the each rotation of this 3 π/8 phase place rotary modules is present, be the angle of rotating many 3 π of phase place/8 of previous primary vector than this 3 π/8 phase place rotary modules, therefore produce this corresponding secondary vector.
4. filter as claimed in claim 2 wherein only has 16 kinds of possibilities altogether through this 3 π/8 phase place rotary modules rotate these a plurality of secondary vectors that produce, and adjacent both phase difference is π/8 between these secondary vectors.
5. filter as claimed in claim 1, wherein through this π/16 phase place rotary modules rotate produce should be a plurality of the 3rd vectorially common 16 kinds of possibilities be only arranged, and adjacent both phase difference is π/8 between this grade in an imperial examination three-dimensional amount.
6. filter as claimed in claim 5, wherein each this grade in an imperial examination three-dimensional amount is made up of a real part and an imaginary part, this real part is made up of a real part amplitude and a real part of symbol, and this real part amplitude is to represent the size of this real part, and this real part of symbol is to represent the positive negative value of this real part; And this imaginary part is made up of an imaginary part amplitude and an imaginary part of symbol, and this imaginary part amplitude is to represent the size of this imaginary part, and this imaginary part of symbol is a positive negative value of representing this imaginary part.
7. filter as claimed in claim 6, wherein corresponding these real part amplitudes of all these grade in an imperial examination three-dimensional amounts and these imaginary part amplitudes be value in one of following combination, this is combined as: cos (π/16), cos (3 π/16), cos (5 π/16) and cos (7 π/16).
8. filter as claimed in claim 1, wherein this weights distribution module is to be contained in this composite module, and these selected weights of this weights distribution module be value in one of following combination, this is combined as: cos (π/16), cos (3 π/16), cos (5 π/16) and cos (7 π/16).
9. filter as claimed in claim 8, wherein these selected weights are to derive all these grade in an imperial examination three-dimensional amounts via the trigonometric function rule in this weights distribution module.
10. filter as claimed in claim 1, wherein this composite module comprises in addition:
One encoder is encoded the 3rd vector to produce a corresponding code signal with the phase place according to each the 3rd vector; And
One bit shift register includes a plurality of buffer units, is used for keeping at present and these code signals of the coded generation of this encoder before.
11. filter as claimed in claim 10, wherein each these code signal comprises a real part amplitude coding, real part of symbol coding and an imaginary part amplitude coding and imaginary part of symbol coding.
12. filter as claimed in claim 11, wherein this group modulation signal comprises a real part modulation signal and an imaginary part modulation signal.
13. filter as claimed in claim 12, wherein this composite module comprises in addition:
One controller with according to these real part amplitude codings of being kept in these buffer units, distributes waveform and select corresponding weights respectively in this weights distribution module;
One symbol is specified device, under the control via this controller, with according to these reals part of symbol codings, distributes waveforms to specify corresponding sign symbol selected these weights that go out of this controller respectively; And
One adds up device, is used for specifying these weights of the specified intact symbol of device to distribute waveform adder this symbol, to produce this real part modulation signal.
14. filter as claimed in claim 13, wherein this controller distributes waveform in addition according to these imaginary part amplitude codings of being kept in these buffer units and select corresponding weights respectively in this weights distribution module; And under the control via this controller, specify device according to these imaginary parts of symbol codings by this symbol, distribute waveforms to specify corresponding sign symbol selected these weights that go out of this controller respectively; Specify these weights of the specified intact symbol of device to distribute waveform adder to get up this symbol by this totalling device more at last, to produce this imaginary part modulation signal.
15. filter as claimed in claim 13, wherein this symbol specifies device to include a plurality of symbol designating unit, each this symbol designating unit is according to this real part of symbol coding and this imaginary part of symbol coding, the sign symbol of coming selected these weights of this controller of corresponding appointment to distribute waveform.
16. filter as claimed in claim 11, wherein this code signal has 6 altogether, and this real part amplitude coding is 2, and this real part of symbol is encoded to 1, and this imaginary part amplitude coding is 2, and this imaginary part of symbol is encoded to 1.
17. filter as claimed in claim 1, wherein should may be partitioned into multistage sub-distribution waveform by predetermined distribution waveform, this weights distribution module then comprises a memory with a plurality of mnemons, and each mnemon can be used to store a plurality of weights sub-distribution waveforms through after the weight allocation.
18. filter as claimed in claim 1, wherein this group modulation signal is a fundamental frequency signal, can provide to give a radio system to produce a corresponding radio frequency signal.
19. a filtering method that is used for one or eight phase phase-shift keying (8PSK) systems, this eight phases phase shift keyed system is to be used for a series of digit order number is encoded, and to export the corresponding modulation signal of many groups, this eight phases phase shift keyed system comprises:
One Gray code image module, being used for every ternary digit order number is a corresponding primary vector through a predetermined map program reflection;
One 3 π/8 phase place rotary modules are used for phase place with the present primary vector that produces of this Gray code image module, are rotated through a predetermined phase place rotation program, to produce a corresponding secondary vector; And
One filter is used for this 3 π/present secondary vector that produces of 8 phase place rotary modules is carried out filtering, to produce one group of corresponding modulation signal in these many groups;
This filtering method comprises:
With this 3 π/present secondary vector that produces of 8 phase place rotary modules, rotate the angle of π/16 once more, to produce corresponding the 3rd vector;
Carry out weight allocation with a plurality of selected weights for a predetermined distribution waveform, distribute waveform to draw corresponding a plurality of weights, and be stored in the weights distribution module; And
According to present the 3rd vector that produces, decision to select above-mentioned in which weights distribute waveform, and weights that will be selected distribution waveform combination gets up, to produce this group modulation signal.
20. filtering method as claimed in claim 19, wherein this filtering method comprises in addition:
Phase place according to each the 3rd vector encodes the 3rd vector to produce a corresponding code signal; And
Temporary at present and these code signals of the coded generation of this encoder before.
21. filtering method as claimed in claim 20, wherein each these code signal comprises a real part amplitude coding, real part of symbol coding and an imaginary part amplitude coding and imaginary part of symbol coding.
22. filtering method as claimed in claim 21, wherein this group modulation signal comprises a real part modulation signal and an imaginary part modulation signal.
23. filtering method as claimed in claim 22, wherein this filtering method comprises in addition:
According to these real part amplitude codings of being kept in, distribute waveform and in this weights distribution module, select corresponding weights respectively;
According to these reals part of symbol coding, these weights distribution waveforms that respectively will be selected go out are specified corresponding sign symbol; And
Distribute waveform adder to get up these weights of specified intact symbol, to produce this real part modulation signal.
24. filtering method as claimed in claim 23, wherein this filtering method comprises in addition:
According to these imaginary part amplitude codings of being kept in, distribute waveform and in this weights distribution module, select corresponding weights respectively;
According to these imaginary parts of symbol coding, these weights distribution waveforms that respectively will be selected go out are specified corresponding sign symbol; And
Distribute waveform adder to get up these weights of specified intact symbol, to produce this imaginary part modulation signal.
CNB031423493A 2003-06-13 2003-06-13 Filtering device and method for saving memory space in eight-phase shift keying device Expired - Fee Related CN100473062C (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4628297A (en) * 1984-02-01 1986-12-09 Hitachi, Ltd. Code modulation system
US4725844A (en) * 1985-06-27 1988-02-16 Trw Inc. Fiber optical discrete phase modulation system
WO2001060004A1 (en) * 2000-02-08 2001-08-16 Ericsson, Inc. 8-psk transmission filtering using reduced look-up tables
CN1340975A (en) * 2000-08-31 2002-03-20 华为技术有限公司 Eight-phase phase-shift keying (PSK) modulation method and device
CN1394049A (en) * 2001-07-04 2003-01-29 华为技术有限公司 Eight-phase PSK modulation method and device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4628297A (en) * 1984-02-01 1986-12-09 Hitachi, Ltd. Code modulation system
US4725844A (en) * 1985-06-27 1988-02-16 Trw Inc. Fiber optical discrete phase modulation system
WO2001060004A1 (en) * 2000-02-08 2001-08-16 Ericsson, Inc. 8-psk transmission filtering using reduced look-up tables
CN1340975A (en) * 2000-08-31 2002-03-20 华为技术有限公司 Eight-phase phase-shift keying (PSK) modulation method and device
CN1394049A (en) * 2001-07-04 2003-01-29 华为技术有限公司 Eight-phase PSK modulation method and device

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