CN100468513C - Liquid crystal display panel and driving method thereof - Google Patents

Abstract

The invention relates to a liquid crystal display panel and a driving method thereof, comprising a liquid crystal unit array, a plurality of grid driving integrated circuits, a plurality of first source driving integrated circuits, a plurality of second source driving integrated circuits and a time sequence control circuit. The liquid crystal unit array is provided with a first display area and a second display area. The first and second source driving integrated circuits are electrically connected with the first and second display regions, respectively, and the timing control circuit is electrically connected with the source and gate driving integrated circuits. The driving of the liquid crystal display panel is to write data into the first display area in sequence in a first data receiving and sending mode through the first source electrode driving integrated circuit, and to write data into the second display area in sequence in a second data receiving and sending mode through the second source electrode driving integrated circuit. The first data receiving and sending mode is a first sending and then receiving mode, and the second data receiving and sending mode is a first receiving and then sending mode. The invention can effectively reduce the manufacturing cost and the power consumption of the liquid crystal display panel.

Description

Liquid crystal display panel and driving method thereof

technical field

The present invention relates to a liquid crystal display panel and its driving method, and in particular to a display panel of a source driver integrated circuit with different data sending and receiving modes and its driving method.

Background technique

With the increasing maturity of optoelectronic technology and semiconductor manufacturing technology, flat panel displays (Flat Panel Displays) are booming, and liquid crystal displays are gradually replacing traditional ones based on their advantages of low voltage operation, no radiation scattering, light weight and small size. Cathode ray tube displays have become the mainstream of display products in recent years. In addition, because the liquid crystal display has the characteristics of power saving, light weight and small size, the liquid crystal display is more widely used in portable personal electronic devices. Therefore, how to make the liquid crystal display thinner and lighter and save power is an important topic that various display manufacturers pay attention to.

FIG. 1 is a schematic diagram of a conventional liquid crystal display panel. Please refer to FIG. 1 , an existing liquid crystal display device 100 includes a display panel 110, a plurality of source driver integrated circuits SD0˜SDm, a plurality of gate driver integrated circuits GD0˜GDn, and a printed circuit board 120; where m and n are both is a positive integer greater than 0. A plurality of pixels (not shown) are disposed on the display panel 110 . The printed circuit board 120 has a control circuit 121 , and the printed circuit board 120 is disposed on the upper side of the display panel 110 , and is electrically connected to the display panel 110 through the flexible circuit board 123 . The data signals generated by the control circuit 121 are transmitted to the source driver integrated circuits SD0 -SDm through the flexible circuit board 123 . In addition, since the source driver integrated circuits SD0-SDm are connected in series and usually transmit data in one direction, the first source driver integrated circuit SD0 will first collect the data signal, and the rest of the data will be transmitted through SD1 and then transmitted by The second source driver integrated circuit SD1 collects the corresponding data. After completion, SD2 collects the data in this order until SDm completes the action of collecting data, and then all the source drivers do the action of writing data to the pixel. It can be seen from FIG. 1 that the flexible printed circuit board 123 is usually arranged at the corner of the display panel 110 to facilitate connection with the first source driver integrated circuit SD0. Therefore, the designer cannot further reduce the length of the printed circuit board 120 .

In addition, the printed circuit board 120 is disposed on the upper side or the lower side of the display panel 110 due to actual design requirements of the display panel 110 . Since the data sending and receiving modes of the source driver ICs SD0˜SDm are all in the same mode (receive first and send later), if the printed circuit board 120 originally arranged on the upper side of the display panel 110 is changed to be arranged on the display panel 110 On the lower side, the picture displayed on the display panel 110 will be reversed left and right. At this time, the designer needs to add a linebuffer on the printed circuit board 120 to temporarily store all the data signals, and then output them to the source driver integrated circuits SD0˜SDm in reverse order. Although such a method helps liquid crystal display devices 100 of different designs to share the same printed circuit board 120, adding a temporary register on the printed circuit board 120 will not only increase the overall power consumption of the liquid crystal display device 100, but also increase manufacturing cost.

Contents of the invention

The invention provides a liquid crystal display panel with source driving integrated circuits in different data sending and receiving modes.

The invention provides a driving method, which drives a liquid crystal display panel through source driving integrated circuits of different data sending and receiving modes, so as to reduce power consumption.

The present invention proposes a liquid crystal display panel, which includes a liquid crystal cell array (Liquid Crystal CellArray), a plurality of gate driver integrated circuits, a plurality of first source driver integrated circuits, a plurality of second source driver integrated circuits and timing control circuit. The aforementioned liquid crystal cell array has a first display area and a second display area. The first and second display areas further include a plurality of scan lines, a plurality of data lines and a plurality of pixel units, and each pixel unit is electrically connected to the corresponding scan lines and data lines respectively. In addition, the gate driving integrated circuit is electrically connected to the scanning line, and the first and second source driving integrated circuits are electrically connected to the data lines of the first and second display areas respectively, wherein the first source driving integrated circuit is connected with The first data transmission mode transmits and receives data, and the second source driver integrated circuit transmits and receives data in the second data transmission mode. In addition, the timing control circuit is electrically connected with the gate driver integrated circuit and the source driver integrated circuit.

In an embodiment of the present invention, the above-mentioned first data sending mode is a send-before-receive mode, and the second data sending mode is a receive-before-send mode.

In an embodiment of the present invention, the above-mentioned first source driver integrated circuit and the second source driver integrated circuit are flip-chip packages (Flip-Chip Package) or tape carrier packages (TapeCarrier Package, TCP). In other words, the first source driver integrated circuit and the second source driver integrated circuit are connected to the data line through the chip-on-glass bonding (Chip-on-Glass, COG) technology or the tape automated bonding (Tape Automated Bonding, TAB) technology. connect.

In an embodiment of the present invention, the data transmission directions of the above-mentioned first data sending mode and the second data sending mode are opposite.

In an embodiment of the present invention, each first source driver integrated circuit outputs a first control signal to a next-stage first source driver integrated circuit before completing the temporary storage of the data signal.

In an embodiment of the present invention, each second source driver integrated circuit outputs a second control signal to a next-stage second source driver integrated circuit before the temporary storage of the data signal is completed.

In an embodiment of the present invention, the first source driver integrated circuit that has completed the temporary storage of the data signal stops receiving the timing signal provided by the timing control circuit.

In an embodiment of the present invention, the second source driver integrated circuits that have not yet started to collect data signals do not receive the timing signals provided by the timing control circuit temporarily.

In an embodiment of the present invention, the above-mentioned first and second source driver integrated circuits respectively have a register for temporarily storing data signals.

In an embodiment of the present invention, the above-mentioned liquid crystal display panel may further include a flexible circuit board for electrically connecting with the timing control circuit and part of the source driver integrated circuit. In a preferred embodiment, the flexible circuit board is electrically connected to the first source driver integrated circuit closest to the second display area, and is electrically connected to the second source driver integrated circuit closest to the first display area. connect.

In an embodiment of the present invention, the flexible circuit board is disposed at the intersection of the first display area and the second display area.

The present invention proposes a driving method suitable for driving a liquid crystal display panel having a first display area and a second display area, and the liquid crystal display panel includes a plurality of gate drive integrated circuits and a plurality of first source drive integrated circuits and a plurality of second source driver integrated circuits, the first and second source driver integrated circuits are electrically connected to the first and second display regions respectively. The driving method of the present invention includes the following steps. The data is sequentially written into the first display area by the first source driver integrated circuit in the first data transmission mode, and the data is sequentially written in the second display area by the second source driver integrated circuit in the second data transmission mode zone, wherein the first data sending mode is the send-before-receive mode, and the second data sending mode is the receive-before-send mode. In addition, the data transmission directions of the first data sending mode and the second data sending mode are opposite.

In an embodiment of the present invention, the first source driver integrated circuit outputs the first control signal to the first source driver integrated circuit of the next stage before the temporary storage of the data signal is completed.

In an embodiment of the present invention, the second source driver integrated circuit outputs the second control signal to the second source driver integrated circuit of the next stage before the collection of the data signal is completed.

In an embodiment of the present invention, the first source driver integrated circuit that has completed the temporary storage of the data signal stops receiving the timing signal provided by the timing control circuit.

In an embodiment of the present invention, the second source driver integrated circuits that have not yet started to collect data signals do not receive the timing signals provided by the timing control circuit temporarily.

Since the present invention adopts the first and second data sending and receiving modes to temporarily store data signals, the present invention does not need to add a line buffer for temporarily storing data signals in the timing control circuit, and can still avoid The left and right side of the screen is reversed caused by the change of the position of the printed circuit board. Accordingly, the present invention can effectively reduce the manufacturing cost and the power consumption of the liquid crystal display panel.

Description of drawings

FIG. 1 is a schematic diagram of a conventional liquid crystal display panel.

FIG. 2 is a schematic diagram of a liquid crystal display panel according to an embodiment of the invention.

3A and 3B are flowcharts of the steps of the first and second data sending modes, respectively.

4A to 4G are schematic diagrams of data transmission in this embodiment.

FIG. 5 is a schematic diagram of the first and second source driver integrated circuits.

Reference number

100: liquid crystal display device

110: display panel

120: printed circuit board

121: Control circuit

123: Flexible printed circuit board

SD0～SDm: source drive integrated circuit

GD0～GDn: gate drive integrated circuit

220: printed circuit board

221: Timing control circuit

231: Flexible circuit board

233: Left flexible circuit board

235: Right flexible circuit board

240: LCD cell array

241: The first display area

243: Second display area

251: pixel unit

253: data line

255: scan line

260: The first source driver integrated circuit

270: Second source driver integrated circuit

280: Gate Drive Integrated Circuit

S311: the source driver integrated circuit transmits the data signal to the adjacent source driver integrated circuit

S313: The data signal collection and temporary storage of adjacent source driver integrated circuits are completed

S315: The source driver integrated circuit starts to collect subsequent data signals

S321: The source driver integrated circuit collects and temporarily stores the data signal

S323: The data signal collection and temporary storage of the source driver integrated circuit is completed

S325: The source driver integrated circuit sends the subsequently received data signal to the adjacent source driver integrated circuit

410: timing control circuit

421, 423, 425, 427: first source driver integrated circuit

431, 433, 435, 437: second source driver integrated circuit

V1: the first control signal

V3: Second control signal

500: Source driver integrated circuit

511: left receiver

513: Left Teleporter

521: Right receiver

523: Right Teleporter

530: scratchpad

541: The first setting pin position

543: Second setting pin position

Detailed ways

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.

In order to make the technical characteristics of the present invention clear to those who are familiar with this technology, in the following embodiments, it is assumed that the specification of the liquid crystal display panel is the WXGA specification of the Video Electronics Engineering Standards Association (Video Electronics Standards Association, referred to as VESA) standard, and 8 A 480-channel bidirectional series source driver integrated circuit, but the following embodiments are not intended to limit the scope of the present invention.

FIG. 2 is a schematic diagram of a liquid crystal display panel according to an embodiment of the invention. The liquid crystal display panel 200 includes a liquid crystal cell array 240 , a plurality of gate driver integrated circuits 280 , a plurality of first source driver integrated circuits 260 , a plurality of second source driver integrated circuits 270 and a timing control circuit 221 . The liquid crystal cell array 240 has a first display area 241 and a second display area 243 . The areas of the first display area 241 and the second display area 243 may be substantially the same. The first and second display areas 241, 243 may further include a plurality of scan lines 255, a plurality of data lines 253, and a plurality of pixel units 251, and each pixel unit 251 is electrically connected to the corresponding scan lines 255 and data lines 253, respectively. . In addition, the gate driver integrated circuit 280 is electrically connected to the scan line 255, and the first and second source driver integrated circuits 260, 270 are electrically connected to the data line 253 in the first and second display regions 241, 243 respectively. . In addition, the timing control circuit 221 is electrically connected to the gate driving integrated circuit 280 and the first and second source driving integrated circuits 260 and 270 through a flexible printed circuit 231 , for example.

In particular, the first source driver integrated circuit 260 transmits and receives data signals in the first data transmission mode, and the second source driver integrated circuit 270 transmits and receives data signals in the second data transmission mode. The data transmission directions of the first data sending mode and the second data sending mode are different.

In addition, the first source driver integrated circuit 260 and the second source driver integrated circuit 270 may be a flip-chip package (Flip-Chip Package) or a tape carrier package (Tape Carrier Package, TCP). In other words, the first source driver integrated circuit 260 and the second source driver integrated circuit 270 are connected to each other through the chip-on-glass bonding (Chip-on-Glass, COG) technology or the tape automated bonding (Tape Automated Bonding, TAB) technology. Data cable connection.

Please refer to FIG. 2 , the flexible circuit board 231 is disposed at the junction of the first display area and the second display area. In more detail, the flexible circuit board 231 is electrically connected to the first source driver integrated circuit 260 closest to the second display area, and is electrically connected to the second source driver integrated circuit 270 closest to the first display area. connect. The liquid crystal display panel 200 of this embodiment further includes left and right flexible circuit boards 233, 235 to provide a booster voltage source to the first and second source driver integrated circuits 260, 270 and the gate driver integrated circuit 280 , to avoid the voltage source delivered by the flexible circuit board 231 in the middle, because the distance between the first and second source driver integrated circuits 260, 270 delivered to the two corners is too far, and the RC Delay effect occurs , making the voltage source level drop. The left flexible circuit board 233 is electrically connected to the first source driver integrated circuit 270 , and the right flexible circuit board 231 is electrically connected to the second source driver integrated circuit 260 .

3A and 3B are flowcharts of the steps of the first and second data sending modes, respectively. The first data transmission mode is to sequentially send the received data signals to the previous first source driver integrated circuit, as described in step S311 . Wait until the previous data signal collection of the first source driver integrated circuit is completed, as described in step S313. The first source driver integrated circuit starts to collect and temporarily store subsequent received data signals, as described in step S315. In the second data sending mode, the second source driver integrated circuit temporarily stores the received data signals sequentially, as described in step S321. Wait for the temporary storage of the data signal of the second source driver integrated circuit to be completed, as described in step S323. The second source driver integrated circuit then sends the subsequently received data signal to the next second source driver integrated circuit, as described in step S325.

4A to 4G are schematic flowcharts of data transmission in this embodiment. Please refer to FIG. 4A , the timing control circuit 410 outputs data signals and timing signals to the first source driver integrated circuit 427 . Please refer to FIG. 4B. The first source driver integrated circuit 427 sequentially transmits the data signal to the left first source driver integrated circuit 425, 423, and then to the leftmost first source driver integrated circuit. 421 , then the leftmost first source driver integrated circuit 421 starts to collect and temporarily store data signals.

Referring to FIG. 4C, when the data signal of the first source driver integrated circuit 421 is about to be collected, for example, when the 478th or 479th data signal is collected, the first source driver integrated circuit 421 will output the first control signal V1 For the first source driver integrated circuit 423, let the first source driver integrated circuit 423 start preparing for the collection of data signals. When the first source driver integrated circuit 423 starts to collect data signals, the first source driver integrated circuit 423 stops outputting timing and data signals to the first source driver integrated circuit 421 . A more detailed explanation is that the first source driver integrated circuits 421, 423, 425, 427 that have completed the temporary storage of data signals do not receive the timing signals provided by the timing control circuit, which can reduce the number of first source driver integrated circuits 421. , 423, 425, 427 power consumption.

Please refer to FIG. 4D, before the data signal of the first source driver integrated circuit 423 is about to be collected and temporarily stored, the first control signal V1 will be output to the first source driver integrated circuit 425, so that the first source driver integrated circuit 425 to start preparing for the collection of data signals. When the first source driver integrated circuit 425 starts to collect data signals, the first source driver integrated circuit 425 stops outputting timing and data signals to the first source driver integrated circuit 423 . And so on until the data signal collection of the first source driver integrated circuit 427 is completed.

In particular, during the above data signal transmission process, the second source driver integrated circuits 431, 433, 435, 437 have no timing and data signal output and reception, which can reduce the number of second source driver integrated circuits 431. , 433, 435, 437 power consumption.

Please refer to FIG. 4E, when the data signal of the first source driver integrated circuit 427 is about to be collected and temporarily stored, the timing control circuit 410 will output a signal to the second source driver integrated circuit 431, so that the second source driver integrated circuit 431 starts to receive the picture signal on the right half. When the second source driver integrated circuit 431 starts to receive data signals, the timing control circuit 410 stops outputting timing and data signals to the first source driver integrated circuit 427 on the left, that is, the first source driver integrated circuit 421 on the left. , 423, 425, and 427 do not receive timing and data signals, so as to reduce the overall power consumption of the liquid crystal display panel.

Please refer to FIG. 4F. When the data signal of the second source driver integrated circuit 431 is about to be collected, for example, when the 478th or 479th data signal is collected, the second gate driver integrated circuit 431 will output a second The control signal V3 is sent to the second source driver integrated circuit 433, so that the second source driver integrated circuit 433 starts to collect data signals until the data signal collection is completed. And so on, until the data signals of the second source driver integrated circuits 431 , 433 , 435 , 437 on the right half are all collected and temporarily stored, as shown in FIG. 4G . The second source driver integrated circuits 431, 433, 435, 437 that have not yet started to collect data signals do not receive the timing signals provided by the timing control circuit, thereby reducing the timing of the second source driver integrated circuits 431, 433, 435, 437. power consumption.

FIG. 5 is a schematic diagram of the first and second source driver integrated circuits. The first and second source driver integrated circuits 500 may further include a temporary register 530, a first setting pin 541, a second setting pin 543, a left data receiving terminal 511, a right data receiving terminal 521, The left data transmission end 513 and the right data transmission end 523 .

Please continue to refer to FIG. 5 , the first setting pin 541 and the second setting pin 543 are used to determine the data sending and receiving modes of the first and second source driver integrated circuits 500 . In more detail, the first setting pin 541 is used to determine the direction of data signal transmission and reception. The data signal can be received 511 by the data receiving end on the left side and transmitted 523 by the data transmitting end on the right side, that is, receiving from the left and sending from the right. mode; it can also be received by the data receiving end 521 on the right side and transmitted by the data transmitting end 513 on the left side, which is the mode of receiving right and sending left. The second setting pin 543 is used to determine the order of sending and receiving data signals. The first and second source driver integrated circuits 500 may also first transmit the received data signals to the previous first and second source drivers. The integrated circuit 500 starts to collect data signals after the previous first and second source driver integrated circuits 500 have received all the data signals, that is, the first data transmission mode; and the first and second source driver integrated circuits 500 It may be that the data signal is fully received first, and then the subsequent received data signal is transmitted to the next first and second source driver integrated circuits 500 , that is, the second data sending and receiving mode.

In addition, the register 530 is used for temporarily storing the data signal before the data signal collection of the first and second source driver integrated circuits 500 is completed. The left and right data transmitting ends and the left and right data receiving ends 511, 513, 521, 523 are respectively electrically connected to the register 530, and are controlled by the first setting pin 541 to determine the first and The data sending and receiving mode of the second source driver integrated circuit 500 is receiving from the left and sending to the right or receiving from the right and sending to the left.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone who is familiar with this technology can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, this The scope of protection of the invention should be defined by the scope of the claims.

Claims (19)

1. display panels comprises:

One array of lc cells, have one first viewing area and one second viewing area, wherein said array of lc cells comprises multi-strip scanning line, many data lines and a plurality of pixel cell, and each described pixel cell electrically connects with corresponding scanning line and data line respectively;

A plurality of grid-driving integrated circuits electrically connect with described these sweep traces;

A plurality of first source electrode driven integrated circuits are with described these data lines electric connections of described first viewing area;

A plurality of second source electrode driven integrated circuits, electrically connect with described these data lines of described second viewing area, wherein said these first source electrode driven integrated circuits transmit with one first data sending and receiving pattern and receive data, and described these second source electrode driven integrated circuits transmit with one second data sending and receiving pattern and receive data; And

One sequential control circuit electrically connects with described these grid-driving integrated circuits and described these first, second source electrode driven integrated circuits.

2. display panels as claimed in claim 1, the wherein said first data sending and receiving pattern is for sending back receipts pattern earlier, and the described second data sending and receiving pattern is for receiving earlier the pattern of afterwards sending.

3. display panels as claimed in claim 1, wherein said these first source electrode driven integrated circuits and described these second source electrode driven integrated circuits are flip chip packaging body or coil type carrier packaging body.

4. display panels as claimed in claim 1, the wherein said first data sending and receiving pattern is opposite with the data transfer direction of the described second data sending and receiving pattern.

5. display panels as claimed in claim 1, wherein each described first source electrode driven integrated circuit was exported one first control signal does not begin to collect data-signal as yet to next stage first source electrode driven integrated circuit before being about to finish data-signal temporary.

6. display panels as claimed in claim 1, wherein each described second source electrode driven integrated circuit was exported one second control signal does not begin to collect data-signal as yet to next stage second source electrode driven integrated circuit before being about to finish data-signal temporary.

7. display panels as claimed in claim 1 has wherein been finished the first temporary source electrode driven integrated circuit of data-signal and has been stopped receiving the clock signal that described sequential control circuit provides.

8. display panels as claimed in claim 1, second source electrode driven integrated circuit that does not wherein begin to collect data-signal as yet wouldn't receive the clock signal that described sequential control circuit provides.

9. display panels as claimed in claim 1, wherein said these first and second source electrode driven integrated circuits have a working storage respectively, with the temporal data signal.

10. display panels as claimed in claim 1 also comprises a flexible circuit board, electrically connects with described sequential control circuit and described these first, second source electrode driven integrated circuits of part.

11. display panels as claimed in claim 10, first source electrode driven integrated circuit of wherein said flexible circuit board and the most close described second viewing area electrically connects, and electrically connects with second source electrode driven integrated circuit of the most close described first viewing area.

12. display panels as claimed in claim 10, wherein said flexible circuit board are arranged at described first viewing area and the described second viewing area intersection.

13. driving method, be suitable for driving a display panels, described display panels has one first viewing area and one second viewing area, and described display panels comprises second source electrode driven integrated circuit that first source electrode driven integrated circuit that a plurality of grid-driving integrated circuits, a plurality of and described first viewing area are connected and a plurality of and described second viewing area are connected, and described driving method comprises:

With one first data sending and receiving pattern data are write described first viewing area in regular turn by described these first source electrode driven integrated circuits; And

With one second data sending and receiving pattern data are write described second viewing area in regular turn by described these second source electrode driven integrated circuits.

14. driving method as claimed in claim 13, the wherein said first data sending and receiving pattern is for sending back receipts pattern earlier, and the described second data sending and receiving pattern is for receiving earlier the pattern of afterwards sending.

15. driving method as claimed in claim 13, the wherein said first data sending and receiving pattern is opposite with the data transfer direction of the described second data sending and receiving pattern.

16. driving method as claimed in claim 13, wherein each described first source electrode driven integrated circuit was exported first source electrode driven integrated circuit that one first control signal is given next stage before being about to finish data-signal temporary.

17. driving method as claimed in claim 13, wherein each described second source electrode driven integrated circuit was exported second source electrode driven integrated circuit that one second control signal is given next stage before soon collecting of data-signal finished.

18. driving method as claimed in claim 13 has wherein been finished the first temporary source electrode driven integrated circuit of data-signal and has been stopped receiving the clock signal that described sequential control circuit provides.

19. driving method as claimed in claim 13, second source electrode driven integrated circuit that does not wherein begin to collect data-signal as yet wouldn't receive the clock signal that described sequential control circuit provides.

Images