CN100461994C - Heat Gain Type Thin Electronic Structure - Google Patents

Abstract

The present invention provides a heat-gain type thin electronic assembly structure and its forming method. The main design of the electronic assembly structure of the present invention is to arrange at least one electronic component on a metal layer between two dielectric material layers, and The two dielectric material layers are fixed therein by pressing; the electronic assembly structure thus formed not only has excellent signal transmission performance, but also has remarkable heat gain effect.

Description

Heat Gain Type Thin Electronic Structure

【Technical field】

The present invention relates to a thinned electronic assembly, in particular to a thinned electronic assembly structure with heat gain effect and a forming method thereof.

【Prior Technology】

The improvement of electronic packaging technology is very important for the development of electronic industry technology; with the demand for miniaturization and thinning of electronic component products, electronic packaging technology must also continue to innovate to meet the needs of electronic component products. It can further exert its power transmission, signal transmission, heat dissipation and protection circuit functions.

The demand for miniaturization of electronic component products also means that the density of interconnect circuits in the electronic component must be increased to achieve the same signal processing capacity in a smaller component volume. At present, many documents have successively proposed the construction structure and method of high-density interconnection (HDI, high density circuit) circuits; for example, in U.S. Patent No. 6,242,282, a high-density chip construction structure is disclosed method of formation; please refer to Figure 1, which shows a side view of the structure formed by this method. In this method, the circuit chip 10 and its chip pad 14 are placed on an interconnection layer 12 on which a via 122 and metal wiring 124 have been preformed, and the circuit chip 10 is aligned with the via 122 on the interconnection layer 12 , and then use an adhesive layer 16 to stick a construction material 18 on the circuit chip 10 to form a complete construction structure 1 .

In U.S. Patent No. 5,567,657 and No. 5,703,400, a kind of construction structure and manufacturing method of a double-sided structure circuit module with a flexible inner connection layer are also proposed respectively; A construction material is placed between the two possible interconnection layers to package the circuit chip therein, and then channels and metal wiring are formed on the interconnection layer to complete the complete construction structure.

In addition, the applicant of the present application also filed a Taiwan patent application (Application No. 93135698) on November 19, 1993 for "Thinned electronic packaging structure and manufacturing method thereof", using an organic substrate manufacturing process and using two substrates Compared with the pressing method, the wiring and assembly of electronic components are completed at the same time when the overall substrate is formed, which simplifies the related manufacturing processes in conventional assembly technologies such as wire bonding, tape-and-roll automatic bonding technology, and flip-chip bonding technology; The electronic assembly structure formed by it does not have a core layer and a bump (bump), thus reducing the overall volume of the assembly structure, and preventing the signal from being generated due to the conversion of the contact interface during transmission. The phenomenon of loss of signal strength, so it can provide better performance.

However, the above-mentioned related technologies of various high-density and thinner structures only meet the requirements for current density and volume in the structure structure; and with the increase of current density in electronic components and the reduction of component volume, more attention needs to be paid to The heat dissipation problem inside the structure derived from it can avoid affecting the overall performance of the electronic component due to the inability to dissipate the heat generated when the signal is transmitted between the circuit chip and the assembly structure.

This is the reason for the invention of this application; in view of the needs of the trend of the times, the applicant finally created this application "heat gain type thin electronic structure" after careful experimentation and research, and a persistent spirit. The present invention is a novel technology further developed on the basis of the related previous application-thinned electronic assembly structure and its manufacturing method proposed by the applicant. The electronic assembly structure formed by it not only has excellent signal transmission performance , has a more significant heat gain effect; in other words, the heat dissipation effect of the electronic assembly structure provided by the present invention is obviously better than that formed by the above-mentioned prior art, so that the electronic assembly structure and its related electronic components can be further improved. Component performance.

【Content of invention】

The first idea of the present invention is to provide an electronic assembly structure, the electronic assembly structure includes a first dielectric material layer, which has a first upper surface and a first lower surface; a second dielectric material layer, It has a second upper surface and a second lower surface; a metal layer is partially located between the first lower surface and the second upper surface, and at least one electronic component is located between the first lower surface and the metal layer and fixed therein by pressing the first dielectric material layer and the second dielectric material layer; a plurality of passages (Vias) penetrate the first dielectric material layer and connect to the electronic component; and a wiring layer located on part of the first upper surface, wherein the second dielectric material layer further has a plurality of grooves, and the positions of the grooves correspond to the positions of the electronic components.

The second idea of the present invention is to provide an electronic assembly structure, the electronic assembly structure includes a first dielectric material layer, which has a first upper surface and a first lower surface; a second dielectric material layer, It has a second upper surface and a second lower surface; a leadframe-like carrier is located between the first lower surface and the second upper surface, wherein the leadframe has a plurality of grooves (channel), and the grooves separate the lead frame into a plurality of lead carriers; at least one electronic component is located between the first lower surface and the lead frame in positions corresponding to those of the carriers, and The first dielectric material layer and the second dielectric material layer are fixed therein by pressing; a plurality of channels (Vias) penetrate the first dielectric material layer and connect to the electronic component; and a wiring layer on the first upper surface of the portion.

According to the above idea, the metal layer further includes a leadframe-like carrier, and the leadframe-like carrier has a plurality of channels, thereby separating the leadframe-like carrier into a plurality of leadframe-like carriers.

According to the above idea, the first dielectric material layer and the second dielectric material layer are made of a dielectric material.

According to the above idea, the first dielectric material layer includes a resin coated copper foil (Resin Coated Copper-foil, RCC) substrate, an ABF build-up film (Ajinomoto Build-up Film, ABF) substrate and a flexible substrate. one.

According to the above idea, the material of the second dielectric material layer is the same as that of the first dielectric material layer.

According to the above idea, the electronic component is one of an active electronic component and a passive electronic component.

According to the above idea, the electronic assembly structure includes a plurality of the electronic components, wherein the electronic components are selected from one of active electronic components, passive electronic components and combinations thereof.

According to the above idea, the active electronic component is one of a chip, a semiconductor, a transistor and an integrated circuit.

According to the above idea, the passive electronic component further includes one of a separate passive component and an embedded passive component.

According to the above idea, the discrete passive element is one of a capacitor, a resistor and an inductor.

According to the above idea, the embedded passive element is one of a capacitive material, an inductive material and a resistive material.

According to the above concept, the wiring layer further includes a plurality of solder balls (Ball).

According to the above idea, the electronic component is further fixed on the lead carrier of the lead frame through a metal wire.

According to the above idea, the wire carrier further has a groove, and the electronic component is located in the groove.

The third idea of the present invention is to provide an electronic assembly method, which includes the steps of: providing a first dielectric material layer; providing a lead frame (Leadframe-like Carrier) on the first dielectric material layer, wherein the lead frame has a plurality of grooves, and the grooves separate the lead frame into a plurality of lead carriers; an electronic component is provided on the lead carriers; a second dielectric material layer is provided on the lead carrier On the electronic component, to cover the first dielectric material layer and the electronic component to form a sandwich structure; press the sandwich structure so that the electronic component is fixed therein; form a plurality of channels (Vias) in the pressing On the sandwich structure, the channels are connected to the electronic component through the second dielectric material layer in the sandwich structure; filling the channels; and forming wiring patterns (patterning) on the sandwich structure, so as to further Wiring is performed on a sandwich structure.

According to the above idea, the method further includes a step of forming a plurality of grooves on the wire carriers respectively.

According to the above concept, wherein the method utilizes a punching method (punching) or an etching method (etching) to form the grooves on the lead carriers.

According to the above idea, the electronic component is located in the grooves.

According to the above concept, the method utilizes a build-up process to form the second dielectric material layer on the electronic device.

According to the above concept, wherein the method utilizes one of an ultraviolet (UV) laser process, a carbon dioxide (CO ₂ ) gas laser process and a chemical etching process to form the channels.

According to the above idea, the method further includes a step of covering the sandwich structure with a green paint (Solder Mask).

According to the above idea, the method further includes a step of performing a ball mounting process (Ball Mounting) on the sandwich structure.

According to the above idea, the method further includes a step of cutting the sandwich structure to form a required electronic component.

According to the above concept, wherein the method fills the channels with a conductive material.

According to the above concept, the first dielectric material layer and the second dielectric material layer comprise one of an adhesive-backed copper foil substrate, an ABF build-up film substrate, and a flexible substrate.

This application can gain a deeper understanding through the following illustrations and detailed descriptions:

【Description of drawings】

Fig. 1 is a sectional view of a construction structure formed by utilizing known technology;

Fig. 2 (a) to Fig. 2 (h) are the flow charts of making an electronic assembly structure according to one embodiment of the method of the present invention;

Fig. 3 is a cross-sectional view of an electronic assembly structure according to a first preferred embodiment of the present invention;

Fig. 4 is a cross-sectional view of an electronic assembly structure according to a second preferred embodiment of the present invention;

Fig. 5 is a cross-sectional view of an electronic assembly structure according to a third preferred embodiment of the present invention;

Fig. 6 (a)-(c), is the sectional view of the electronic assembly structure according to the fourth preferred embodiment of the present invention; And

7 and 7(a) to (c) illustrate the cross-sectional views of the metal layer and the lead frame in the electronic assembly structure of the present invention.

【Detailed ways】

Please refer to FIGS. 2( a ) to ( h ), which illustrate the manufacturing method of the heat-gaining thinned electronic package of the present invention. First, the electronic component 20 to be assembled is placed on a leadframe-like carrier 22 provided, wherein the electronic component 20 is a chip (die); as shown in the top view of Figure 2 (a), There are a plurality of grooves 221 on the lead frame 22 , and the grooves 221 separate the lead frame 22 into a plurality of lead carriers 220 , and the electronic component 20 is placed on the lead carriers 220 .

Next, a first dielectric material layer 24 and a second dielectric material layer 26 are respectively provided on the outside of the electronic component 20 and the lead frame 22, whereby the electronic component 20 and the lead frame 22 are located in the first dielectric A sandwich structure 2 is formed between the electrical material layer 24 and the second dielectric material layer 26, as shown in FIG. 2(b), wherein the first dielectric material layer 24 and the second dielectric material layer 26 It is made of dielectric material for the substrate; and then the sandwich structure 2 is pressed (shown in the direction of the arrow in the figure).

As shown in FIG. 2( c), the second dielectric material layer 26 in the laminated sandwich structure 2 is then removed, so that the dielectric material layer 26 has a plurality of grooves 261, thereby The wire carrier 220 is exposed to the grooves 261 to facilitate heat dissipation of components.

Then, a plurality of channels (Vias) are formed on the first dielectric material layer 24 in the laminated sandwich structure, generally speaking, whether it is ultraviolet (UV) laser, CO ₂ gas laser, or chemical etching , can be used to form these channels; however, compared with the other two, the use of UV laser can form finer pitching (fine pitching), so in this example, under the premise of not damaging the underlying structure, UV laser Forming such channels is a better option. The channels pass through the first dielectric material layer 24 in the sandwich structure to connect to the electronic component 20, and fill the channels with a conductive material to form a plurality of conductive channels 28, as shown in FIG. 2(d) shown.

After the conduction passages 28 are formed, the surface of the first dielectric material layer 24 on which the conduction passages 28 have been formed is patterned to form a wiring layer 21, which is beneficial to the sandwich structure 2 further. Perform wiring and form traces, as shown in Figure 2(e).

So far, the electronic assembly structure formed by the method of the present invention has been preliminarily formed; and in order to protect the internal structure of the above-mentioned electronic assembly structure and prevent the electronic assembly structure from being subjected to process conditions (such as high temperature) in subsequent processes influence, the method of the present invention can also cooperate with a conventional green paint (SolderMask) covering process, respectively covering the first dielectric material layer 24 and the second dielectric material layer 26 with a solder resist layer 23, 25, to provide a complete protection of the electronic assembly structure, as shown in FIG. 2(f).

In order to maintain the pitch of the electronic assembly structure formed, the method of the present invention also includes a ball mounting process (ball mounting) to form a plurality of solder balls 27 on the electronic assembly. On the position of the pre-configured solder balls in the structure, as shown in Figure 2(g); then, according to the needs, use the cutting device 1 to perform the cutting process (isolating/singulating) on the above-mentioned electronic assembly structure that has been completed. , to form the desired single electron assembly structure 200, as shown in FIG. 2(h).

In the method of the present invention, the electronic component 20 is formed on the wire carrier 220 in a placement manner without performing a bonding (Bonding) procedure with the wire carrier 220; however, in a preferred embodiment, in order to avoid The electronic component 20 is displaced by the disturbance of the surrounding environment, and the wire carrier 220 and the electronic component 20 placed thereon can also be bonded by further cooperating with other bonding methods, such as wire bonding (Wire Bonding). The electronic component 20 is connected to the lead carrier 220 by metal wires, and the leads are extended to the outside of the overall electronic assembly structure, so as to facilitate connection with other electronic components.

In addition, the construction method of the present invention is also applicable to dielectric materials for various substrates; for example: RCC (Resin Coated Copper-foil) substrate, ABF (ABF, Ajinomoto Build-up Film) substrate , and organic compounds containing such as polyamide (Polymide, PI), polydimethylsiloxane (Polydimethylsiloxane, PDMS), liquid crystal polymer (Liquid Crystal Polymer, LCP) or polyethylene terephthalate (Polyethylene Terephthalate) The flexible substrate of the material to form a flexible electronic component will further expand its application level.

Please refer to FIG. 3 , which is a cross-sectional view of an electronic assembly structure according to a first preferred embodiment of the present invention. The electronic assembly structure 300 is mainly used to assemble an electronic component 30, and the electronic component 30 is pre-set on a lead frame 32; the lead frame 32 is formed by a plurality of grooves 321 and a plurality of lead carriers separated therefrom. 320 , and the electronic component 30 is located on the wire carriers 320 . The electronic assembly structure 300 fixes the electronic component 30 therein by pressing a dielectric material layer 34 and the lead frame 32 . In order to enable the electronic assembly structure 300 to be connected to an external circuit or electronic device (not shown in the figure), it further has a plurality of conductive channels 38, and the conductive channels 38 penetrate through the dielectric material layer 34 and connect to the The electronic component 30 inside the electronic assembly structure 300 has a wiring layer 31 and a plurality of solder balls 37 on the outer surface of the conductive channels 38 and the dielectric material layer 34, so as to facilitate the connection of the circuit and the The line spacing between the conductive channels 38 is maintained; in addition, a solder resist layer 33 is also covered on the outer surface of the conductive channels 38 and the dielectric material layer 34 to protect the components and circuits inside the electronic assembly structure 300 , so that it is free from interference from external moisture, pollutants or subsequent high-temperature treatment.

Please refer to FIG. 4, which is a cross-sectional view of an electronic assembly structure according to a second preferred embodiment of the present invention; it is different from the first embodiment (as shown in FIG. 3 ) in that the electronic component 30 and the lead frame 32 is fixed between a first dielectric material layer 34 and a second dielectric material layer 36 by pressing the first dielectric material layer 34 and a second dielectric material layer 36 . In addition, the second dielectric material layer 36 is partially removed to have a plurality of grooves 361, so that the wire carrier 320 is exposed to the grooves 361, so as to facilitate heat dissipation of the components and achieve thermal gain. Effect. Of course, in order to avoid adverse effects of external moisture or pollutants on one side of the second dielectric material layer 36 in the electronic assembly structure 300 , a solder resist layer 35 is also coated on this side.

Please refer to FIG. 5 , which is a cross-sectional view of an electronic assembly structure according to a third preferred embodiment of the present invention; this embodiment is designed to further enhance the heat gain effect of the electronic assembly structure. The difference from the previous two embodiments (as shown in FIG. 3 and FIG. 4 ) is that the use of the lead frame is replaced by a part of the thickened metal layer 52, wherein the electronic component 30 is located on the thickened metal layer 52 part 520, and the thickened part 520 protrudes from part of the surface of the second dielectric material layer 36 and the solder resist layer 35, thereby directing the heat generated by the electronic component 30 out of the electronic structure. Install structure 300.

Please refer to FIG. 6(a)-(c), which are cross-sectional views of an electronic assembly structure according to a fourth preferred embodiment of the present invention; in this electronic assembly structure 600, an electronic component 60 is pre-set on a metal On the layer 62 ; the electronic component 60 is thus fixed therein by pressing and welding between the dielectric material layer 64 made of a dielectric material and the metal layer 62 . The electronic assembly structure 600 further has a plurality of conduction channels 68 a and 68 b, wherein the conduction channel 68 a is connected to the electronic component 60 , and the conduction channel 68 b passes through the dielectric material layer 64 and is connected to the electronic assembly structure 300 There are a plurality of solder balls 67 at the bottom; similarly, there are wiring layers 61 and the solder balls 67 on the outside of the conduction channels 68a, 68b to facilitate circuit connection. In addition, a solder resist layer 63 is also covered on the outer surfaces of the conduction channels 68a, 68b and the dielectric material layer 64 to protect the components and circuits inside the electronic assembly structure 600 from the outside world. Interference from moisture, pollutants, or subsequent high-temperature processing.

In this embodiment, the solder balls 67 are formed on the side of the electronic assembly structure 600 close to the metal layer 62, and the electronic assembly structure 600 is further connected to a system or quasi-system through the solder balls 67. system on the substrate 650 (as shown in Figure 6(b) and Figure 6(c)); because the metal layer 62 is in direct contact with the substrate 650 and the metal has high thermal conductivity, the electronic assembly structure can be The heat generated in 600 is exported to the electronic assembly structure 600 by direct conduction (as shown by the arrow in FIG. 6( c ), thereby producing obvious heat gain and achieving superior heat dissipation effect.

Of course, the above-mentioned embodiments are only used to illustrate the present invention, but the structure of the components inside the electronic package of the present invention can be designed and changed according to the actual functional requirements, for example, using multiple layers of dielectric materials, lead frames and Electronic components are stacked and laminated in multiple layers to form a two-dimensional chip stacking structure and a three-dimensional chip stacking structure as mentioned in the applicant's previous application, and even more layers of chip stacking with diverse functions structure, and provide a better structural size and heat dissipation effect than conventional ones.

In addition, please refer to FIG. 7 and FIG. 7 (a) to (c), in the present invention, in order to avoid placing the electronic component 70 on the metal layer or the lead carrier 72 of the lead frame, it will be affected by external interference and deviate from its position. A corresponding groove 725 can be first formed on the metal layer or the lead carrier 72 by means of punching or etching (etching/half etching), and the electronic component 70 can be placed in the groove 725 ; Such a design can not only prevent the electronic component 70 from being displaced due to interference, but also reduce the overall height of the formed electronic assembly structure, thereby reducing its overall volume and improving its performance.

What's more, as shown in FIG. 7( c), the electronic component 70 and the lead carrier 72 can be directly connected with the metal wire 724 by wire bonding, which not only improves the fixing degree of the electronic component 70, but also The metal wire 724 can be directly extended to the outside of the electronic assembly structure 700 to form an input/output wire (Lead I/O) 726, so as to facilitate connection with other electronic components.

In the present invention, the dielectric material layer formed by the used construction material-dielectric material is used to construct the electronic components to be assembled in it by pressing, so as to exert its power transmission, signal transmission, and heat dissipation. And protection circuit and other functions; In addition to the above-mentioned dielectric material layer, also can use back adhesive copper foil (RCC, Resin Coated Copper-foil) substrate, ABF build-up film (ABF, Ajinomoto Build-upFilm) substrate, and Other organic materials such as Polymide (PI), Polydimethylsiloxane (PDMS), Liquid Crystal Polymer (LCP) or Polyethylene Terephthalate flexible substrate.

In addition, the types of electronic components applicable to the present invention are also quite extensive. In addition to common chips (die), other commonly used electronic components such as active electronic components and passive electronic components can also be constructed in the present invention alone or in combination. In the electronic assembly structure 6 of the invention. For example, commonly used active components include semiconductors, transistors, and integrated circuits (ICs); passive electronic components include discrete passive components such as capacitors, resistors, and inductors. Components, and built-in passive components formed by capacitive materials, inductive materials or resistive materials, etc.

Compared with the ball grid array (BGA, Ball Grid Array) construction technology that is valued in the industry at present, in the electronic construction structure formed by the present invention, because no core layer (core layer) is needed, and its The required package size (PKG size) is relatively small, so that the electronic package structure of the present invention can have a small volume; in addition, because the present invention relates to direct lamination between electronic components and two dielectric material layers, therefore The formed electronic assembly structure has a relatively small input/output distance and can exhibit better performance and applicability.

On the other hand, the present invention combines the design of the metal layer and the lead frame to form a heat-gain electronic assembly structure. Due to the excellent thermal conductivity of the metal layer and the lead frame, the electronic components constructed by the present invention can be operated The generated heat can be directly exported to the electronic assembly structure through the metal layer and the lead frame to achieve a superior heat dissipation effect; and the electronic assembly structure of the present invention is formed in a simple and easy-to-implement manner, which is suitable for the current commonly used multiple A dielectric material for a substrate has industrial applicability. Therefore, the present invention is a novel, progressive and industrially applicable invention, which has great development value.

The present invention can be modified in various ways by those who are familiar with the art, so as not to deviate from the intended protection of the scope of the attached application.

Claims (10)

1. An electronic assembly structure, comprising: a first dielectric material layer having a first upper surface and a first lower surface; a second dielectric material layer having a second upper surface and a second lower surface; a metal layer partially located between the first lower surface and the second upper surface, At least one electronic component is located between the first lower surface and the metal layer, and is fixed therein by laminating the first dielectric material layer and the second dielectric material layer; a plurality of vias connecting to the electronic component through the first layer of dielectric material; and a wiring layer located on part of the first upper surface, Wherein the second dielectric material layer further has a plurality of grooves, and the positions of the grooves correspond to the positions of the electronic components. 2. The structure according to claim 1, wherein the metal layer further comprises a lead frame, and the lead frame has a plurality of grooves, whereby the lead frame is divided into a plurality of lead carriers, in: the position of the electronic component corresponds to the position of the carrier; or the electronic component is further affixed to the lead carrier of the lead frame by a metal wire; or The wire carrier further has a groove, and the electronic component is located in the groove. 3. The structure according to claim 1, characterized in that: The first dielectric material layer includes one of an adhesive-backed copper foil substrate, an ABF build-up film substrate, and a flexible substrate; and The material of the second dielectric material layer is the same as that of the first dielectric material layer. 4. The structure according to claim 1, characterized in that: The electronic component is one of an active electronic component and a passive electronic component, wherein: the active electronic component is one of a chip, a semiconductor, a transistor and an integrated circuit; and The passive electronic component further includes one of a separate passive component and an embedded passive component, wherein: the discrete passive element is one of a capacitor, a resistor and an inductor; and The embedded passive element is one of a capacitive material, an inductive material and a resistive material. 5. The structure of claim 1, further comprising a plurality of solder balls on the wiring layer. 6. A method for electronic assembly comprising the steps of: (a) providing a first layer of dielectric material; (b) providing a lead frame on the first dielectric material layer, wherein the lead frame has a plurality of grooves, and the grooves separate the lead frame into a plurality of lead carriers; (c) providing an electronic component on the lead carrier; (d) providing a second dielectric material layer on the electronic component to cover the first dielectric material layer and the electronic component to form a sandwich structure; (e) pressing the sandwich structure so that the electronic component is fixed therein; (f) forming a plurality of vias on the laminated sandwich structure, the vias extending through the second layer of dielectric material in the sandwich structure to connect to the electronic component; (g) filling the channel; and (h) forming a wiring pattern on the sandwich structure, so as to perform wiring on the sandwich structure. 7. The method according to claim 6, characterized in that: The step (b) further includes a step (b1): respectively forming a plurality of grooves on the wire carrier, and the step (b1) uses a stamping method or an etching method to form the grooves on the wire carrier on; and The electronic component is located in the groove. 8. The method of claim 6, wherein: The step (d) forms the second dielectric material layer on the electronic component using a build-up process; or the step (f) forming the channel using one of an ultraviolet laser process, a carbon dioxide gas laser process, and a chemical etching process; or After the step (h), a step is further included: performing a green paint covering treatment on the sandwich structure. 9. The method according to claim 6, further comprising a step after step (h): performing a bumping process on the sandwich structure; and/or cutting the sandwich structure to form a required electronic component. 10. The method of claim 6, wherein: the step (g) filling the channel with a conductive material; and/or The first dielectric material layer and the second dielectric material layer include one of an adhesive-backed copper foil substrate, an ABF build-up film substrate, and a flexible substrate.

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