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CN100459077C - Method for manufacturing substrate - Google Patents

Method for manufacturing substrate Download PDF

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Publication number
CN100459077C
CN100459077C CNB200610057443XA CN200610057443A CN100459077C CN 100459077 C CN100459077 C CN 100459077C CN B200610057443X A CNB200610057443X A CN B200610057443XA CN 200610057443 A CN200610057443 A CN 200610057443A CN 100459077 C CN100459077 C CN 100459077C
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insulating layer
layer
core board
forming
manufacturing
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CN101038880A (en
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王永辉
洪清富
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Abstract

The invention discloses a method for manufacturing a substrate. The substrate manufacturing method includes: providing a core board with inner layer circuits on the upper side and the lower side; forming an accommodating space at the core plate; embedding an element in the accommodating space and forming an insulating layer to cover the element, the core board and the inner circuit on the upper side and the lower side of the core board; forming a plurality of holes on the insulating layer to expose a plurality of electrodes of the device; forming a plurality of Through holes to penetrate the insulating layer and the core plate; forming a conductive film on the surface of the insulating layer and the side wall of the through hole; forming a conductive layer on the conductive film; patterning the conductive layer to form an outer layer circuit; and forming a solder mask layer on the outer layer circuit.

Description

基板的制造方法 Substrate manufacturing method

技术领域 technical field

本发明涉及一种基板的制造方法,特别是涉及一种内埋有无源元件的基板制造方法。The invention relates to a method for manufacturing a substrate, in particular to a method for manufacturing a substrate embedded with passive components.

背景技术 Background technique

随着通讯电子产品日益进步,轻薄短小和高功能化产品已是市场主流趋势,缩小零部件的体积和使用数目逐渐成为产品设计与应用的重点。系统封装(System in Package)具有缩小封装面积、高速化、开发时程短及生产成本低等优势,已成为取代传统个别封装系统的主流技术。整个系统封装分为整合型基板与高密度互连二大主轴,其中整合型基板强调基板With the advancement of communication and electronic products, thin, light, small and high-functional products have become the mainstream trend in the market. Reducing the size and number of components used has gradually become the focus of product design and application. System in Package (System in Package) has the advantages of reduced packaging area, high speed, short development time and low production cost, and has become the mainstream technology to replace traditional individual packaging systems. The whole system packaging is divided into two main axes of integrated substrate and high-density interconnection, among which the integrated substrate emphasizes the substrate

高功能及整合特性,将无源元件内埋入基板,以归根到底希望能将有源元件及光传导通路也一起埋入基板。高密度互连技术则在强调透过特殊的材料(例如纳米材料)及制造工艺,将互连间距由现有的160微米下降到100微米以下。With high functionality and integration features, passive components are embedded in the substrate. In the final analysis, it is hoped that active components and light transmission channels can also be embedded in the substrate. High-density interconnection technology is emphasizing the use of special materials (such as nanomaterials) and manufacturing processes to reduce the interconnection pitch from the existing 160 microns to below 100 microns.

在有限的基板空间内,通过缩小或埋入无源元件创造更多空间来设计有源元件是目前厂商视为模块化的重要技术。一般而言,内埋元件基板技术的封装整合,可以用来取代传统离散式无源元件(例如电容、电阻及电感等),利用新的功能性高分子复合材料技术,将无源元件通过涂布、网印、压合、蚀刻…等方式,从而埋藏在电路板的内层中。可以按照实际应用时的电路特性与需求对内层的材料与叠层结构进行选择。In the limited substrate space, designing active components by shrinking or embedding passive components to create more space is an important technology that manufacturers currently regard as modularization. Generally speaking, the package integration of embedded component substrate technology can be used to replace traditional discrete passive components (such as capacitors, resistors, and inductors, etc.), and use new functional polymer composite technology to coat passive components Cloth, screen printing, lamination, etching, etc., so as to be buried in the inner layer of the circuit board. The material and stacked structure of the inner layer can be selected according to the circuit characteristics and requirements of the actual application.

传统将无源元件堆叠在基板外侧(可能是基板的上下两侧),可想而知,这样会存在整体组件厚度相当大的缺点。而相比之下,将无源元件内埋到基板则具有很多的优点,除了可省下基板表面的空间使得基板所需的表面积缩小和整体组件厚度成倍减少之外,还会因为无源元件埋入基板内而大幅减少电路板的焊锡接点,降低由高频所产生的不必要的寄生效应,进而提升射频模块在高频的电气响应,并增加模块制作和组装的效率及可靠度;同样由于上述优点,制造成本也大幅度降低。Traditionally, the passive components are stacked on the outside of the substrate (possibly on the upper and lower sides of the substrate). It is conceivable that this will have the disadvantage of a relatively large overall component thickness. In contrast, embedding passive components into the substrate has many advantages. In addition to saving the space on the surface of the substrate, the required surface area of the substrate is reduced and the thickness of the overall component is doubled. The components are embedded in the substrate to greatly reduce the solder joints of the circuit board, reduce the unnecessary parasitic effects generated by high frequency, and then improve the electrical response of the RF module at high frequency, and increase the efficiency and reliability of module manufacturing and assembly; Also due to the above advantages, the manufacturing cost is also greatly reduced.

在目前无源零件的数量每年增长30%,同时在基板面积以每年缩小30%的发展情势下,传统离散式无源零件的更新替换势在必行。因此,如何将元件精确地埋入基板内形成一种稳定的基板结构,已成为相关业界努力研发的重要目标之一。With the current number of passive components increasing by 30% per year and the substrate area shrinking by 30% per year, it is imperative to update and replace traditional discrete passive components. Therefore, how to accurately embed components into the substrate to form a stable substrate structure has become one of the important research and development goals of related industries.

发明内容 Contents of the invention

本发明的目的在于提供一种基板的制造方法,该基板制造方法包括:提供一个上下侧具有内层线路的芯板(Core);在芯板处形成一容置空间(Receiving Cavity);在容置空间中埋入元件,并形成绝缘层以包覆元件、芯板及其上下侧的内层线路;在绝缘层处形成复数个孔洞,以裸露出元件的复数个电极;形成复数个贯穿绝缘层与芯板的通孔(Through Hole);在绝缘层表面和通孔的侧壁形成导电薄膜;在导电薄膜上形成导电层;图案化导电层以形成外层线路;以及在外层线路上形成防焊层The object of the present invention is to provide a method for manufacturing a substrate, which includes: providing a core board (Core) with inner layers of circuits on the upper and lower sides; forming a receiving cavity (Receiving Cavity) at the core board; Embed the components in the space, and form an insulating layer to cover the components, the core board and the inner circuit on the upper and lower sides; form a plurality of holes in the insulating layer to expose the plurality of electrodes of the component; form a plurality of through insulation layer and core plate through hole (Through Hole); form a conductive film on the surface of the insulating layer and the sidewall of the through hole; form a conductive layer on the conductive film; pattern the conductive layer to form the outer layer circuit; and form the outer layer circuit Solder mask

本发明所提供的基板制造方法可将元件,特别是无源元件稳定地埋入基板内。内埋有无源元件的基板具有诸多优点,例如:在有限的基板空间内埋入无源元件,不但可降低整体模件的厚度,还可增加更多空间来设置有源元件,从而提升模块的多功能性。再者,由于无源元件埋入基板内而大幅度减少电路板的焊锡接点,降低由于高频所产生的不必要寄生效应,进而提升射频模块在高频的电气响应,并增加模块制作与组装的效率及可靠度,也由于上述这些优点,使得制造成本大幅降低。The substrate manufacturing method provided by the invention can stably embed components, especially passive components, into the substrate. Substrates with embedded passive components have many advantages. For example, embedding passive components in a limited substrate space can not only reduce the thickness of the overall module, but also increase more space for active components, thereby improving the module versatility. Furthermore, because the passive components are embedded in the substrate, the solder joints of the circuit board are greatly reduced, and the unnecessary parasitic effects caused by high frequencies are reduced, thereby improving the electrical response of the RF module at high frequencies, and increasing the number of module fabrication and assembly. High efficiency and reliability, and because of the above advantages, the manufacturing cost is greatly reduced.

附图说明 Description of drawings

第1A至1K图表示依照本发明一优选实施例之内埋元件的基板制造方法。1A to 1K illustrate a method of manufacturing a substrate with embedded components according to a preferred embodiment of the present invention.

其中,附图标记说明如下:Wherein, the reference signs are explained as follows:

10   芯板            101  第一表面10 core board 101 first surface

102  第二表面        11   芯板上的导电层102 Second surface 11 Conductive layer on core board

12   内层线路        13   容置空间12 Inner layer circuit 13 Accommodating space

14   元件            142  电极14 Components 142 Electrodes

15   第一绝缘层      16   第二绝缘层15 first insulating layer 16 second insulating layer

17   第一离形纸      18   第二离形纸17 The first release paper 18 The second release paper

19   孔洞            21   通孔19 hole 21 through hole

23   导电薄膜        24   第一导电层23 Conductive film 24 First conductive layer

25   第二导电层      26   外层线路25 Second conductive layer 26 Outer layer circuit

27   防焊层          27a  第一焊料层27 Solder mask layer 27a The first solder layer

27b  第二焊料层27b Second solder layer

具体实施方式 Detailed ways

请参考第1A~1K图,其表示了依照本发明一优选实施例的内埋元件的基板制造方法。首先,提供芯板(Core)10,如第1A图所示。然后,在芯板10的上下侧形成一内层线路,如第1B图所示。在此实施例中,可以在芯板的第一表面101和第二表面102分别镀上导电层11,导电层11的材料可以是任何金属,这里则可以选用铜膜作为导电层,并利用曝光、显影和蚀刻等方式使导电层11图案化,从而形成内层线路12。芯板的材质可以是玻璃纤维布或非玻璃纤维布(如ABF)等。Please refer to FIGS. 1A-1K , which illustrate a manufacturing method of a substrate with embedded components according to a preferred embodiment of the present invention. First, a core board (Core) 10 is provided, as shown in FIG. 1A. Then, an inner circuit is formed on the upper and lower sides of the core board 10, as shown in FIG. 1B. In this embodiment, a conductive layer 11 can be plated on the first surface 101 and the second surface 102 of the core board respectively, and the material of the conductive layer 11 can be any metal. Here, a copper film can be selected as the conductive layer, and exposed , development and etching to pattern the conductive layer 11 to form the inner layer circuit 12 . The material of the core board can be glass fiber cloth or non-glass fiber cloth (such as ABF).

接着,在芯板10处形成容置空间(Receiving Cavity)13,如第1C图所示。形成容置空间13的方法有很多种,例如是利用机械钻孔(Machine Drilling)的方式形成。而容置空间13的实际大小则视打算埋入基板的元件尺寸而确定。Next, a receiving cavity (Receiving Cavity) 13 is formed at the core board 10, as shown in FIG. 1C. There are many ways to form the accommodating space 13 , such as forming by using machine drilling. The actual size of the accommodating space 13 depends on the size of the components to be embedded in the substrate.

然后,将一元件(例如是电容、电感或电阻等无源元件)14埋入容置空间13中,并形成绝缘部(即后面所提到的第一绝缘层15和第二绝缘层16)以包覆元件14、芯板10及芯板10上下侧的内层线路12。其中一种可实施方法如下:Then, an element (for example, a passive element such as a capacitor, an inductor, or a resistor) 14 is buried in the accommodating space 13, and an insulating part (ie, the first insulating layer 15 and the second insulating layer 16 mentioned later) is formed. The components 14 , the core board 10 , and the inner circuit 12 on the upper and lower sides of the core board 10 are covered. One of the possible implementation methods is as follows:

首先,将元件14设置在芯板10的下方,使容置空间13与元件14的位置相对应,并在元件14的下方提供第一绝缘层15,在芯板10的上方提供第二绝缘层16,如第1D图所示。一般可选用还未完全硬化的材料(尚有部分流动性)做为第一绝缘层15和第二绝缘层16,以使元件14在压合后可完全被芯板10、第一绝缘层15及第二绝缘层16包围。也因为在堆叠过程中,第一、第二绝缘层仍有部分流动性,因此可优选在第一绝缘层15与第二绝缘层16的上方提供第一离形纸17与第二离形纸18,以避免在随后的压合过程中,尚未完全硬化的第一、第二绝缘层对压合机台造成污染。Firstly, the element 14 is arranged under the core board 10, so that the accommodating space 13 corresponds to the position of the element 14, and a first insulating layer 15 is provided under the element 14, and a second insulating layer is provided above the core board 10 16, as shown in Fig. 1D. Generally, materials that have not yet fully hardened (still have some fluidity) can be used as the first insulating layer 15 and the second insulating layer 16, so that the element 14 can be completely covered by the core board 10 and the first insulating layer 15 after pressing. And surrounded by the second insulating layer 16. Also because during the stacking process, the first and second insulating layers still have partial fluidity, it is therefore preferable to provide the first release paper 17 and the second release paper above the first insulating layer 15 and the second insulating layer 16 18, to avoid contamination of the lamination machine by the first and second insulating layers that have not yet fully hardened during the subsequent lamination process.

之后,通过压合步骤对上述堆叠体进行压合,使元件14埋入容置空间13内,如第1E图所示。压合步骤一般是在高温高压下进行,从而固化第一绝缘层15与第二绝缘层16。完成压合步骤后,可移除第一离形纸17与第二离形纸18。其中,第一绝缘层15与第二绝缘层16构成一绝缘层,在压合步骤后绝缘层包覆元件14、芯板10及内层线路12。Afterwards, the above-mentioned stacked body is pressed through a pressing step, so that the element 14 is embedded in the accommodating space 13 , as shown in FIG. 1E . The pressing step is generally performed under high temperature and high pressure, so as to cure the first insulating layer 15 and the second insulating layer 16 . After the pressing step is completed, the first release paper 17 and the second release paper 18 can be removed. Wherein, the first insulating layer 15 and the second insulating layer 16 constitute an insulating layer, and the insulating layer covers the component 14 , the core board 10 and the inner circuit 12 after the pressing step.

接着,在绝缘层处形成复数个孔洞19,以裸露出元件14的复数个电极142,如第1F图所示。在此实施例中,可使用激光钻孔(Laser Drilling)的方式在第二绝缘层16上形成孔洞19,从而裸露出元件14的电极142。Next, a plurality of holes 19 are formed in the insulating layer to expose a plurality of electrodes 142 of the device 14, as shown in FIG. 1F. In this embodiment, the hole 19 can be formed on the second insulating layer 16 by means of laser drilling, so as to expose the electrode 142 of the device 14 .

然后,形成复数个通孔(Through Hole)21,以贯穿第二绝缘层16、芯板10与第一绝缘层15,如第1G图所示。在实际应用中可采用机械钻孔(MachineDrilling)的方式形成通孔21。Then, a plurality of through holes (Through Holes) 21 are formed to penetrate through the second insulating layer 16, the core board 10 and the first insulating layer 15, as shown in FIG. 1G. In practical application, the through hole 21 can be formed by machine drilling.

接着,在绝缘层表面和通孔21的侧壁形成导电薄膜23,如第1H图所示。在实际应用中可对如第1G图所示的元件进行溅镀(Sputter),除了在第一绝缘层15和第二绝缘层16上会形成一层导电薄膜23外,通孔21的侧壁上也会覆盖一层导电薄膜23。导电薄膜的材料可以是金属铜。Next, a conductive thin film 23 is formed on the surface of the insulating layer and the sidewall of the through hole 21, as shown in FIG. 1H. In practical application, the element shown in Fig. 1G can be sputtered (Sputter), except that a layer of conductive film 23 will be formed on the first insulating layer 15 and the second insulating layer 16, the sidewall of the through hole 21 It will also be covered with a layer of conductive film 23. The material of the conductive film can be metallic copper.

然后,在导电薄膜23上形成第一导电层24和第二导电层25,如第1I图所示。在此实施例中,可利用电镀方式(Plating)形成第一导电层24和第二导电层25,而且通孔21侧壁上的导电薄膜23也会同时增厚。第一导电层24和第二导电层25的材料可以是金属铜。Then, a first conductive layer 24 and a second conductive layer 25 are formed on the conductive film 23, as shown in FIG. 1I. In this embodiment, the first conductive layer 24 and the second conductive layer 25 can be formed by plating, and the conductive film 23 on the sidewall of the through hole 21 will also be thickened at the same time. The material of the first conductive layer 24 and the second conductive layer 25 may be metal copper.

接着,图案化第一导电层24和第二导电层25,以形成外层线路26,如第1J图所示。其中,可利用曝光、显影、蚀刻等步骤形成基板的外层线路26。Next, the first conductive layer 24 and the second conductive layer 25 are patterned to form the outer circuit 26, as shown in FIG. 1J. Wherein, the outer circuit 26 of the substrate can be formed by steps such as exposure, development, and etching.

最后,在外层线路26上形成一层防焊层(Solder Mask),如第1K图中所示,第一焊料层27a和第二焊料层27b分别形成在图案化的第一导电层24与图案化的第二导电层25上。Finally, a layer of solder mask (Solder Mask) is formed on the outer circuit 26. As shown in the 1K figure, the first solder layer 27a and the second solder layer 27b are formed on the patterned first conductive layer 24 and the pattern respectively. on the second conductive layer 25.

根据上述实施例所述的制造方法,可将元件,特别是无源元件(如电容、电感或电阻)稳定地埋入基板内。内埋有无源元件的基板具有诸多优点,例如:在有限的基板空间内埋入无源元件,不但可降低整体模件的厚度,还可增加更多空间来设置有源元件,从而提升模块的多功能性。此外,由于无源元件埋在基板内会大幅度减少电路板的焊锡接点,降低因高频所产生的不必要的寄生效应,从而提升射频模块在高频的电气响应,并增加模块制作与组装的良率与可靠度;也由于上述这些优点,使制造成本大幅降低。According to the manufacturing method described in the above embodiments, components, especially passive components (such as capacitors, inductors or resistors) can be stably embedded in the substrate. Substrates with embedded passive components have many advantages. For example, embedding passive components in a limited substrate space can not only reduce the thickness of the overall module, but also increase more space for active components, thereby improving the module versatility. In addition, since the passive components are buried in the substrate, the solder joints of the circuit board will be greatly reduced, and unnecessary parasitic effects caused by high frequencies will be reduced, thereby improving the electrical response of the RF module at high frequencies, and increasing the number of module manufacturing and assembly. High yield and reliability; also because of the above advantages, the manufacturing cost is greatly reduced.

以上所述仅为本发明其中的较佳实施例而已,并非用来限定本发明的实施范围;即凡依本发明权利要求所作的均等变化与修饰,皆为本发明专利范围所涵盖。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the implementation scope of the present invention; that is, all equivalent changes and modifications made according to the claims of the present invention are covered by the patent scope of the present invention.

Claims (7)

1.一种基板的制造方法,其特征在于,该方法包括以下步骤:1. A method for manufacturing a substrate, characterized in that the method comprises the following steps: 提供一芯板,该芯板的上下侧具有一内层线路;providing a core board, the upper and lower sides of the core board have an inner circuit; 在该芯板处形成一容置空间;forming an accommodating space at the core plate; 在该容置空间埋入一元件,并形成一绝缘层以包覆该元件、该芯板及其上下侧的所述内层线路,其中,在该容置空间埋入该元件的步骤包括将该元件对应地设置在该芯板下方且与该容置空间对应;在该元件的下方提供一第一绝缘层;在该芯板的上方提供一第二绝缘层;分别在该第一绝缘层与该第二绝缘层远离该元件的一侧提供一第一离形纸与一第二离形纸,以形成一堆叠体;及压合该堆叠体,使该元件埋入该容置空间内;于压合该堆叠体后,进一步包括移除该第一离形纸与该第二离形纸的步骤;并且该第一绝缘层与该第二绝缘层构成该绝缘层,在压合步骤后包覆该元件、该芯板及所述内层线路;Embedding an element in the accommodating space, and forming an insulating layer to cover the element, the core board and the inner layer circuits on the upper and lower sides, wherein the step of embedding the element in the accommodating space includes The element is correspondingly disposed under the core board and corresponds to the accommodating space; a first insulating layer is provided below the element; a second insulating layer is provided above the core board; providing a first release paper and a second release paper on the side away from the component from the second insulating layer to form a stack; and pressing the stack to embed the component in the accommodating space ; after pressing the stacked body, further comprising the step of removing the first release paper and the second release paper; and the first insulating layer and the second insulating layer constitute the insulating layer, in the pressing step Then coating the element, the core board and the inner circuit; 在该绝缘层处形成复数个孔洞,以裸露出该元件的复数个电极;forming a plurality of holes at the insulating layer to expose a plurality of electrodes of the element; 形成复数个通孔以贯穿该绝缘层与该芯板;forming a plurality of through holes to penetrate the insulating layer and the core board; 在该绝缘层的表面和所述通孔的侧壁形成一导电薄膜;forming a conductive film on the surface of the insulating layer and the sidewall of the through hole; 在该导电薄膜上形成一导电层;forming a conductive layer on the conductive film; 图案化该导电层,以形成一外层线路;及patterning the conductive layer to form an outer circuit; and 在该外层线路上形成一防焊层。A solder resist layer is formed on the outer circuit. 2.如权利要求1所述的基板的制造方法,其特征在于,在该芯板的上下侧分别形成一金属层,再对该金属层进行曝光、显影、蚀刻以形成该内层线路。2 . The manufacturing method of the substrate according to claim 1 , wherein a metal layer is respectively formed on the upper and lower sides of the core board, and then the metal layer is exposed, developed, and etched to form the inner circuit. 3.如权利要求1所述的基板的制造方法,其特征在于,以机械钻孔的方式形成所述通孔,以贯穿该绝缘层与该芯板。3 . The manufacturing method of the substrate according to claim 1 , wherein the through hole is formed by mechanical drilling to penetrate through the insulating layer and the core board. 4 . 4.如权利要求1所述的基板的制造方法,其特征在于,以溅镀的方式在所述通孔的侧壁上形成该导电薄膜。4. The manufacturing method of the substrate according to claim 1, wherein the conductive thin film is formed on the sidewall of the through hole by sputtering. 5.如权利要求1所述的基板的制造方法,其特征在于,以电镀的方式在该导电薄膜上形成该导电层。5 . The manufacturing method of the substrate according to claim 1 , wherein the conductive layer is formed on the conductive film by electroplating. 6.如权利要求1所述的基板的制造方法,其特征在于,该元件为一无源元件。6. The manufacturing method of the substrate according to claim 1, wherein the component is a passive component. 7.如权利要求6所述的基板的制造方法,其特征在于,该无源元件为一电容、一电感或一电阻。7. The manufacturing method of the substrate according to claim 6, wherein the passive element is a capacitor, an inductor or a resistor.
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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101599438B (en) * 2008-06-05 2012-05-23 欣兴电子股份有限公司 Circuit structure and manufacturing method thereof
CN102548229A (en) * 2010-12-29 2012-07-04 陆富强 A implanted circuit layout method and its structure
KR20130079857A (en) * 2012-01-03 2013-07-11 삼성테크윈 주식회사 Forming method of via hole on circuit board
WO2014188945A1 (en) * 2013-05-22 2014-11-27 三菱製紙株式会社 Manufacturing method for wiring board
US9911715B2 (en) * 2013-12-20 2018-03-06 Cyntec Co., Ltd. Three-dimensional package structure and the method to fabricate thereof
TWI655884B (en) 2017-09-15 2019-04-01 欣興電子股份有限公司 Carrier structure
CN111415813B (en) 2019-01-07 2022-06-17 台达电子企业管理(上海)有限公司 Preparation method of inductor with vertical winding and injection mold thereof
CN111415909B (en) 2019-01-07 2022-08-05 台达电子企业管理(上海)有限公司 Multi-chip packaged power module
US11676756B2 (en) 2019-01-07 2023-06-13 Delta Electronics (Shanghai) Co., Ltd. Coupled inductor and power supply module
CN111415908B (en) 2019-01-07 2022-02-22 台达电子企业管理(上海)有限公司 Power module, chip embedded type packaging module and preparation method
US11063525B2 (en) 2019-01-07 2021-07-13 Delta Electronics (Shanghai) Co., Ltd. Power supply module and manufacture method for same
CN111415925B (en) * 2019-01-07 2023-01-24 台达电子企业管理(上海)有限公司 Power module and preparation method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6582991B1 (en) * 2000-12-14 2003-06-24 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
JP2003204154A (en) * 2002-01-08 2003-07-18 Shin Kobe Electric Mach Co Ltd Manufacturing method of multilayer printed wiring board
CN1537331A (en) * 2002-04-05 2004-10-13 ������������ʽ���� Circuit module and method for mfg. the same
WO2004091266A1 (en) * 2003-04-02 2004-10-21 Matsushita Electric Industrial Co., Ltd. Circuit board and process for producing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6582991B1 (en) * 2000-12-14 2003-06-24 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
JP2003204154A (en) * 2002-01-08 2003-07-18 Shin Kobe Electric Mach Co Ltd Manufacturing method of multilayer printed wiring board
CN1537331A (en) * 2002-04-05 2004-10-13 ������������ʽ���� Circuit module and method for mfg. the same
WO2004091266A1 (en) * 2003-04-02 2004-10-21 Matsushita Electric Industrial Co., Ltd. Circuit board and process for producing the same

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