CN100440951C - Picture-in-picture processing device and processing method thereof - Google Patents

Abstract

A picture-in-picture processing device is used for processing a picture-in-picture image and a picture-in-picture image. The picture-in-picture processing device includes a scaling circuit, a storage circuit, a first selection circuit and a processing circuit. The scaling circuit is used to reduce the sub-picture image to output a reduced sub-picture image. The storage circuit is used for storing the main picture image and the sub-picture image which has been shrunk. The first selection circuit is connected to the control circuit to receive a picture selection signal, and connected to the storage circuit to select the reduced sub-picture image or the main picture image as an output according to the picture selection signal. The processing circuit is connected to the first selection circuit to process the master picture image or the reduced image.

Description

Picture-in-picture processing device and processing method thereof

technical field

The present invention relates to an image processing device and a processing method thereof, in particular to a picture-in-picture processing device and a processing method thereof.

Background technique

With the advent of the information and audio-visual age, image display methods and image processing technologies are also developing vigorously. Among them, picture-in-picture is a widely used display technology, which usually facilitates users to watch multiple channels at the same time, or to view different sections of playing videos at the same time.

Take broadcasting a TV channel as an example, as shown in FIG. 1 . During broadcasting of a known picture-in-picture channel on a TV, a first channel picture 1 is displayed in a video frame 2 . Then, the user can divide the video frame 2 into a main picture area 21 and a sub picture area 22 according to personal requirements or a default value. At this time, a second channel picture 3 is reduced to cover and replace the first channel picture 1 in the sub-picture area 22 . Therefore, the user can watch the first channel screen 1 and the second channel screen 3 at the same time. As mentioned above, if it is desired to perform the above-mentioned picture-in-picture playing process, the known TV needs to be equipped with a picture-in-picture processing device to process the image data for subsequent playing of the picture-in-picture channel.

Referring to FIG. 2 , the known picture-in-picture processing device 4 can cooperate with a display 5 , wherein the picture-in-picture processing device 4 includes a first processing circuit 41 , a second processing circuit 42 and an overlay circuit 43 .

The first processing circuit 41 can receive and process a master image 61 to generate a first image 62 to be displayed. The second processing circuit 42 can receive and process a sprite image 63 to generate a second image 64 to be displayed. At this time, when the display 5 wishes to present the second channel image 3 in the sub-screen area 22 (as shown in FIG. 1 ), the overlay circuit 43 receives the first image to be displayed 62 and the second image to be displayed 64, and passes the second image to be displayed. The image to be displayed 64 covers and replaces the first image to be displayed 62 to output the second image to be displayed 64 to the display 5 .

However, as can be seen from the above discussion, the known picture-in-picture processing device 4 needs to provide two processing circuits (comprising the first processing circuit 41 and the second processing circuit 42), so that when the display 5 wishes to present the second picture in the picture-in-picture area 22 When the channel screen 3 (as shown in FIG. 1 ) is used for processing the main screen image 61 and the sub-screen image 63 respectively, this not only increases the product size, but also increases the product cost. As shown in Figure 1 again, when the second channel picture 3 is reduced to replace the first channel picture 1 displayed in the sub-picture area 22, the internal memory needs to provide the storage bandwidth of the main picture image 61 and the sub-picture image 63 simultaneously as Subsequent sub-picture area 22 is used for displaying. In other words, in the known picture-in-picture processing device 4 , redundant storage bandwidth must be provided for the part of the mother picture image 61 originally located in the sub picture area 22 (while the sprite area 22 is now covered by the sub picture image 63 ).

Therefore, how to provide a picture-in-picture processing device and processing method thereof, which can solve the above-mentioned problems, is one of the important problems at present.

Contents of the invention

According to the above problems, the object of the present invention is to provide a picture-in-picture processing device and processing method thereof which reduce the usage of storage circuits.

Therefore, in order to achieve the above object, the picture-in-picture processing device according to the present invention can process a picture-in-picture image and a picture-in-picture image, and the picture-in-picture processing device includes a scaling circuit, a storage circuit, a first selection circuit and a processing circuit. The scaling circuit is used for reducing the sub-picture image to output a reduced sub-picture image. The storage circuit is used for storing the main picture image and the reduced sub-picture image. The first selection circuit is connected to the control circuit to receive the picture selection signal, and connected to the storage circuit, so as to select the reduced sub-picture image or the main picture image as output according to the picture selection signal. The processing circuit is connected to the first selection circuit to process the reduced sprite image or the master image.

In addition, to achieve the above purpose, the present invention also discloses a picture-in-picture processing method, which is used to process a picture-in-picture image and a picture-in-picture image. The picture-in-picture processing method includes the following steps: first reducing the picture of the picture to output a reduced picture of the picture. Next, the main picture image and the reduced sub picture image are stored in a storage circuit. Then, according to a picture selection signal, the reduced sub-picture image or the main picture image is selected from the storage circuit for processing.

As mentioned above, according to the picture-in-picture processing device and the picture-in-picture processing method of the present invention, when processing the picture-in-picture image, the reduced picture picture of the picture-in-picture is read from the storage circuit for processing, instead of processing the picture-in-picture image as the known technology. All image data is read out from the memory for processing. Therefore, the access amount of the storage circuit in the present invention is not only less than that of the prior art, but also more efficient.

Description of drawings

Fig. 1 is a schematic diagram, which shows the image display of the picture-in-picture of known TV;

FIG. 2 is a schematic diagram showing a known picture-in-picture processing device;

FIG. 3 is a schematic diagram showing a picture-in-picture processing device according to a preferred embodiment of the present invention;

Fig. 4 is a schematic diagram showing the main picture area and the sub picture area defined by the control circuit;

Fig. 5 is a schematic diagram, which shows the control circuit of the picture-in-picture processing device shown in Fig. 3;

FIG. 6 is a schematic diagram showing another picture-in-picture processing device according to a preferred embodiment of the present invention; and

FIG. 7 is a flow chart showing the flow of a picture-in-picture processing method according to a preferred embodiment of the present invention.

Description of component symbols

1 first channel screen

2 video frames

21 master screen area

21'～29'area

22 sub-picture areas

3Second channel screen

4 Picture-in-picture processing device

41 first processing circuit

42 second processing circuit

43 covered circuits

5 monitors

61 master picture images

62 The first image to be displayed

63 sprite images

64 second image to be displayed

65 downscaled sprite images

7 Picture-in-picture processing device

71 scaling circuit

72 control circuit

721～725 comparator

726 registers

73 first choice circuit

74 processing circuits

75 memory circuits

76 second selection circuit

761 first multiplexer

762 second multiplexer

C0 position comparison value

C0'corresponding code

C 1, C2, C3, C4 comparison value

hcnt level signal

SIG1 screen selection signal

SIG2 image selection signal

SOC1 first image source

SOC2 second image source

Steps of S1～S3 picture-in-picture processing method

vcnt vertical signal

WIPE_HA, WIPE_HB horizontal coordinate value

WIPE_VA, WIPE_VB vertical coordinate value

Detailed ways

The picture-in-picture processing device and picture-in-picture processing method according to preferred embodiments of the present invention will be described below with reference to the relevant drawings, wherein the same components will be described with the same reference numerals.

In multimedia video application technology, in order to increase the vividness of picture transitions, technicians in related fields have developed several transition effects, such as Dissolve, Split, and Wipe. The picture-in-picture processing device and picture-in-picture processing method of the preferred embodiments of the present invention use the above-mentioned switching special effect method to display images in a picture-in-picture area or a picture-in-picture area of a video frame. With reference to shown in Figure 3, according to the picture-in-picture processing device 7 of the first preferred embodiment of the present invention, it is used for processing a mother picture image 61 and a child picture image 63, and the mother picture image 61 and the child picture image 63 are displayed respectively In the main picture area 21 and the sub picture area 22 in the video frame 2 of FIG. 1 .

The picture-in-picture processing device 7 includes a scaling circuit 71 , a control circuit 72 , a first selection circuit 73 , a processing circuit 74 and a storage circuit 75 . The scaling circuit 71 is used for receiving the sub-picture image 63 and reducing the sub-picture image 63 to output a reduced sub-picture image 65 . The storage circuit 75 is used for storing the main picture image 61 and the reduced sub picture image 65 . The control circuit 72 is used for judging whether the current processing circuit 74 should process the main picture area or the sub picture area, and output a picture selection signal SIG1 according to the judgment result. The first selection circuit 73 is connected to the control circuit 72 to receive the image selection signal SIG1, and connected to the storage circuit 75 to select the reduced sub image 65 or the mother image 61 as an output according to the image selection signal SIG1. The processing circuit 74 is connected to the first selection circuit 73 to process the main picture image 61 or the reduced sub-picture image 65, so that the main picture image 61 and the reduced sub-picture image 65 can be correctly displayed in the video frame 2 as shown in FIG. 1 In the parent picture area 21 and the child picture area 22 of the

As shown in Figure 4, a video frame 2 is divided into multiple areas 21'-29' by two horizontal coordinate values WIPE_HA, WIPE_HB and two vertical coordinate values WIPE_VA, WIPE_VB, and these areas can be used as the main picture area respectively Or sub-picture area. For example, the area 21' can be used as a sub-picture area for displaying the reduced sub-picture image 65, and the areas 22'-29' can be used as the main picture area for displaying the main picture image 61.

In addition, each pixel in the video frame 2 is processed according to the order from top to bottom and from left to right. The control circuit 72 in FIG. As a result of the determination, a screen selection signal SIG1 is output. The screen selection signal SIG1 is used to control the first selection circuit 73 to select the main screen image 61 or the reduced sub screen image 65 as an output. The image output from the first selection circuit 73 is input to the processing circuit 74 . When the current pixel to be processed is located in the mother picture area, the picture selection signal SIG1 controls the first selection circuit 73 to output the mother picture image 61 to the processing circuit 74, and the processing circuit 74 processes the mother picture image 61, so that the mother picture image 61 is displayed on The parent picture areas 22 ′˜ 29 ′ in the video frame 2 . Conversely, when the current pixel to be processed is located in the sub-picture area 21', the picture selection signal SIG1 controls the first selection circuit 73 to output the reduced sub-picture image 65 to the processing circuit 74, and the processing circuit 74 processes the reduced sub-picture image 65 , so that the reduced sprite image 65 is displayed in the sprite area 21 ′ in the video frame 2 . In this way, the parent picture image 61 and the reduced sub-picture image 65 can be displayed in the main picture areas 22'-29' and the sub-picture area 21' of the video frame 2, respectively.

As shown in FIG. 5 , the control circuit 72 includes a plurality of comparators 721 - 725 and a register 726 . The comparators 721 - 724 are used to determine the position of the current pixel to be processed, so as to output a position comparison value C0. The buffer 726 is used to record a corresponding code C0' of the sub-picture area 21'. The comparator 725 is connected to the comparators 721-724 and the register 726 to receive the position comparison value C0 and the corresponding code C0' respectively. The comparator 725 compares the position comparison value C0 with the corresponding code C0' to determine whether the current pixel to be processed falls in the sub-picture area 21', so as to output the picture selection signal SIG1. The horizontal position and vertical position of the current pixel to be processed are represented by a horizontal signal hcnt and a vertical signal vcnt, and the corresponding information of the sub-picture area 21' and each area 21'-29' in the video frame 2 is stored in the buffer 726 in.

The comparators 721 and 723 are used to determine the horizontal position of the current pixel to be processed, and the comparators 722 and 724 are used to determine the vertical position of the current pixel to be processed. The comparator 721 is used to compare the horizontal signal hcnt and the horizontal coordinate value WIPE_HA to output a comparison value C1. When the horizontal signal hcnt is larger than the horizontal coordinate value, the comparator 721 sets the comparison value C1 to 1. The comparator 723 is used for comparing the horizontal signal hcnt with the horizontal coordinate value to output a comparison value C3. When the horizontal signal hcnt is larger than the horizontal coordinate value WIPE_HB, the comparator 723 sets the comparison value C3 to 1. The comparator 722 is used for comparing the vertical signal vcnt with the vertical coordinate value WIPE_VA to output a comparison value C2. When the vertical signal vcnt is greater than the vertical coordinate value WIPE_VA, the comparator 722 sets the comparison value C2 to 1. The comparator 724 is used for comparing the vertical signal vcnt with the vertical coordinate value WIPE_VB to output a comparison value C4. When the vertical signal vcnt is greater than the vertical coordinate value WIPE_VB, the comparator 724 sets the comparison value C4 to 1.

The comparison values C1 - C4 have different values because the current pixel to be processed corresponds to different video frame regions. The comparison values C1~C4 can be combined into a four-bit position comparison value C0 to represent, when the position comparison value C0 is "0000", "0010", "1010", "0100", "0110", "1110", " 0101", "0111" or "1111", they can correspond to the regions 21'-29' of the video frame 2 respectively.

The buffer 726 is used to record the corresponding code C0' of the sub-picture area 21', the corresponding code C0' is a four-digit value, and the corresponding relationship between the value of the corresponding code C0' and the areas 21'～29' of the video frame 2 Same as position comparison value C0. The comparator 725 is used to compare whether the position comparison value C0 is the same as the corresponding code C0', so as to output the frame selection signal SIG1. When the position comparison value C0 is the same as the corresponding code C0', the comparator 725 sets the picture selection signal SIG1 to a high level "1", otherwise the picture selection signal SIG1 is set to a low level "0". In addition, the corresponding code C0' can also be set by the user to change the area used to display the sub-picture in the video frame 2.

Referring to FIG. 3 again, the first selection circuit 73 may be a multiplexer. When the picture selection signal SIG1 is 0, the first selection circuit 73 selects the mother picture image 61 as an output. The processing circuit 74 processes and displays the parent image 61 . When the picture selection signal SIG1 is 1, the first selection circuit 73 selects the reduced sub-picture image 65 as an output, and the processing circuit 74 processes and displays the reduced sub-picture image 65 .

Compared with the conventional technology, the known picture-in-picture processing device 4 must provide two processing circuits (the first processing circuit 41 and the second processing circuit 42 ) to process the data of the main picture and the sub-picture respectively. However, the picture-in-picture processing device 7 of this embodiment only needs one processing circuit 74 , and the main picture and sub-picture can share the processing circuit 74 for processing.

As shown in Figure 6, it differs from Figure 3 in that the picture-in-picture processing device 7 further includes a second selection circuit 76, and the second selection circuit 76 includes a first multiplexer 761 and a second multiplexer 762 , the first multiplexer 761 receives an image selection signal SIG2. When the image selection signal SIG2 is at a high level (1), it selects a first image of a first image source SOC1 as the parent image 61 . When the image selection signal SIG2 is at a low level (0), it selects a second image of a second image source SOC2 as the parent image. The second multiplexer 762 receives the image selection signal SIG2. When the image selection signal SIG2 is at a high level (1), it selects the second image of the second image source SOC2 as the sub-picture image 63 . When the image selection signal SIG2 is at low level (0), it selects the first image of the first image source SOC1 as the sub-picture image 63 .

Therefore, this means that the image source can be used as the main picture or the sub-picture after being switched.

As shown in FIG. 7 , the picture-in-picture processing method according to a preferred embodiment of the present invention is used to process a picture-in-picture image and a picture-in-picture image, wherein the method includes steps S1 to S3.

Step S1 is to reduce the sprite image to output a reduced sprite image.

Step S2 is to store the main picture image and the reduced sub picture image in a storage circuit.

Step S3 is to select the reduced sub-picture image or the main picture image from the storage circuit for processing according to a picture selection signal.

The picture-in-picture processing method of this embodiment can be applied to the aforementioned picture-in-picture processing device 7, since the aforementioned picture-in-picture processing device 7 has been discussed in the embodiments of Fig. 3, Fig. 4, Fig. 5 and Fig. 6, Therefore, the picture-in-picture processing method of this embodiment will not be described again.

In summary, according to the picture-in-picture processing device and picture-in-picture processing method of the present invention, when processing the picture-in-picture image, the reduced picture-in-picture image is read from the storage circuit for processing. All image data is read out from the memory for processing. Therefore, the access amount of the storage circuit in the present invention is not only less than that of the prior art, but also more efficient.

The purposes of the foregoing are examples only and not limiting. Equivalent modifications or changes made without departing from the spirit and scope of the present invention shall be included in the appended claims.

Claims (10)

1. A picture-in-picture processing device, which is used to process a picture-in-picture image and a picture-in-picture image, and the picture-in-picture processing device comprises: A scaling circuit for reducing the sub-picture image to output a reduced sub-picture image; a storage circuit connected to the scaling circuit to store the main picture image and the reduced sub picture image; A first selection circuit, which is connected to a control circuit to receive a picture selection signal, and connected to the storage circuit, to select the reduced sub-picture image or the main picture image as output according to the picture selection signal ;as well as A processing circuit connected to the first selection circuit to process the reduced sprite image or the master image. 2. The picture-in-picture processing device according to claim 1, wherein the control circuit is used to judge whether a current pixel to be processed belongs to a sub-picture area or a mother picture area in a video frame, so as to output the picture Select a signal. 3. The picture-in-picture processing device according to claim 2, wherein: When the current pixel to be processed is located in the mother picture area, the picture selection signal controls the first selection circuit to output the mother picture image to the processing circuit; and When the current pixel to be processed is located in the area of the sub-picture, the picture selection signal controls the first selection circuit to output the reduced sub-picture image to the processing circuit. 4. The picture-in-picture processing device according to claim 1, wherein the control circuit comprises: A plurality of first comparators, which are used to determine the position of the current pixel to be processed in a video frame to output a position comparison value; a buffer for recording a corresponding code of a sprite region in the video frame; and a second comparator, which is connected to the first comparator and the buffer to respectively receive the position comparison value and the corresponding code, and the second comparator is used to compare the position comparison value with the The corresponding code is used to output the picture selection signal. 5. The picture-in-picture processing device according to claim 4, wherein the video frame is divided into a plurality of regions according to at least one horizontal coordinate value and at least one vertical coordinate value, and the regions can be respectively used as the video frame One of the main picture areas or the sub-picture area. 6. The picture-in-picture processing device according to claim 4, wherein the first comparator compares a horizontal position and a vertical position of the current pixel to be processed with the horizontal coordinate value and the vertical coordinate value respectively value comparison to output the position comparison value. 7. The picture-in-picture processing device according to claim 1, further comprising a second selection circuit, wherein the second selection circuit comprises: A first multiplexer, which receives an image selection signal, when the image selection signal is at a high level, selects a first image as a mother picture image, and when the image selection signal is at a low level, selecting a second image as the parent image; and A second multiplexer, which receives the image selection signal, selects the second image as a sub-picture image when the image selection signal is at the high level, and selects the second image as a sub-picture image when the image selection signal is at the low level level, the first image is selected as the sub-picture image. 8. A picture-in-picture processing method, which is used to process a picture-in-picture image and a picture-in-picture image, the picture-in-picture processing method comprising: reducing the sprite image to output a reduced sprite image; storing the parent picture image and the reduced sub picture image in a memory circuit; and The reduced sub-picture image or the main picture image is selected from the storage circuit according to a picture selection signal to be processed in a processing circuit. 9. The picture-in-picture processing method according to claim 8, further comprising: judging whether a current pixel to be processed belongs to a sub-picture area or a main picture area in a video frame, so as to output the picture selection signal. 10. The picture-in-picture processing method according to claim 9, wherein when the current pixel to be processed is located in the area of the mother picture, the picture selection signal selects the picture of the mother picture for processing, and when the When the current pixel to be processed is located in the area of the sub-picture, the picture selection signal selects the reduced sub-picture image for processing.

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