CN100438019C - Vertical electrostatic discharge protection device structure - Google Patents
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Abstract
Description
技术领域 technical field
本发明涉及一种静电放电保护的元件结构,且特别是涉及一种可提供静电放电垂直路径的保护元件结构。The invention relates to a component structure for electrostatic discharge protection, and in particular to a protection component structure that can provide a vertical path for electrostatic discharge.
背景技术 Background technique
随着半导体技术的进步,各种电子元件的体积愈来愈小,各种物理现象也随着电子元件尺寸的缩小而造成问题,静电放电(electrostatic discharge,ESD)效应便是其中一个例子。With the advancement of semiconductor technology, the volume of various electronic components is getting smaller and smaller, and various physical phenomena are also causing problems as the size of electronic components shrinks. Electrostatic discharge (ESD) effect is one example.
由于静电放电所造成的能量释放可能损害电路结构,例如在平面显示器中的薄膜晶体管,可能在极小的静电流下便会造成严重损害。故传统上已经有各种静电保护电路的设计,其功用类似避雷针。目前此类ESD保护电路多为平面式设计,仅少数设计有垂直式保护电路。但是此类保护元件为平板式设计,其静电放电的放电电压(breakdown voltage)取决于绝缘层材料的厚度,适用范围小且效用不大。The release of energy due to electrostatic discharge may damage circuit structures, such as thin film transistors in flat panel displays, which may cause serious damage at very small electrostatic currents. Therefore, there have been various designs of electrostatic protection circuits traditionally, and their functions are similar to lightning rods. At present, most of these ESD protection circuits are planar designs, and only a few are designed with vertical protection circuits. However, this type of protective element is designed in a flat plate, and its electrostatic discharge discharge voltage (breakdown voltage) depends on the thickness of the insulating layer material, so the application range is small and the effect is not great.
发明内容 Contents of the invention
有鉴于此,本发明的目的就是在提供一种垂直式静电放电保护的元件结构,利用光学光刻技术(俗称黄光工艺)的曝光极限,形成所需要的放电结构。由于是于金属元件上形成尖端或形成较薄介电层,可以较小的放电电压进行尖端放电,提供静电宣泄的路径。In view of this, the purpose of the present invention is to provide a vertical electrostatic discharge protection element structure, which utilizes the exposure limit of optical lithography technology (commonly known as yellow light process) to form the required discharge structure. Since the tip is formed on the metal element or a thinner dielectric layer is formed, the tip discharge can be performed with a smaller discharge voltage, providing a path for static electricity to drain.
根据本发明的目的,提出一种垂直式静电放电保护的元件结构,至少包括第一金属层、介电层及第二金属层。第一金属层设置于基板上,第一金属层具有多个第一金属缺口。且此些第一金属缺口中至少包括金属尖角。介电层设置于第一金属层上,第二金属层设置于介电层上。第一金属层的金属尖角和第二金属层之间,形成静电放电的垂直路径。According to the purpose of the present invention, a vertical electrostatic discharge protection device structure is proposed, which at least includes a first metal layer, a dielectric layer and a second metal layer. The first metal layer is disposed on the substrate, and the first metal layer has a plurality of first metal gaps. And the first metal notches at least include metal sharp corners. The dielectric layer is disposed on the first metal layer, and the second metal layer is disposed on the dielectric layer. A vertical path for electrostatic discharge is formed between the sharp metal corner of the first metal layer and the second metal layer.
根据本发明的目的,提出另一种垂直式静电放电保护的元件结构,至少包括第一金属层、介电层及第二金属层。第一金属层设置于基板上,介电层设置于第一金属层上,且介电层具有多个介电缺口。第二金属层设置于介电层上,对应介电缺口形成向下的尖端。通过介电层的介电缺口提供比周围较低的放电电压,以利元件结构进行垂直的静电放电。According to the object of the present invention, another vertical electrostatic discharge protection device structure is proposed, which at least includes a first metal layer, a dielectric layer and a second metal layer. The first metal layer is disposed on the substrate, the dielectric layer is disposed on the first metal layer, and the dielectric layer has a plurality of dielectric gaps. The second metal layer is disposed on the dielectric layer, and a downward point is formed corresponding to the dielectric gap. The dielectric gap through the dielectric layer provides a lower discharge voltage than the surrounding area, so as to facilitate the vertical electrostatic discharge of the device structure.
根据本发明的目的,提出又一种垂直式静电放电保护的元件结构,至少包括第一金属层、介电层及第二金属层。第一金属层设置于基板上,且第一金属层的侧缘处具有第一指状图形。介电层设置于第一金属层上,第二金属层设置于介电层上,且第二金属层的侧缘处具有第二指状图形。第一指状图形与第二指状图形错位,以提供至少一个静电放电的垂直路径。According to the object of the present invention, another vertical electrostatic discharge protection device structure is proposed, which at least includes a first metal layer, a dielectric layer and a second metal layer. The first metal layer is disposed on the substrate, and the side edge of the first metal layer has a first finger pattern. The dielectric layer is disposed on the first metal layer, the second metal layer is disposed on the dielectric layer, and the side edge of the second metal layer has a second finger pattern. The first finger pattern and the second finger pattern are misaligned to provide at least one vertical path for electrostatic discharge.
根据本发明的目的,提出一种垂直式静电放电保护元件结构的制造方法,包括下列步骤:首先,形成第一金属层于基板上;接着,形成介电层于第一金属层上;然后,形成第二金属层于介电层上。第一金属层及介电层至少其中之一具有多个缺口,当缺口形成于第一金属层上时,此些缺口至少包括一金属尖角。第一金属层及第二金属层之间形成至少一个静电放电的垂直路径通过此些缺口其中之一或金属尖角。According to the purpose of the present invention, a method for manufacturing a vertical electrostatic discharge protection device structure is proposed, comprising the following steps: first, forming a first metal layer on the substrate; then, forming a dielectric layer on the first metal layer; then, A second metal layer is formed on the dielectric layer. At least one of the first metal layer and the dielectric layer has a plurality of gaps, and when the gaps are formed on the first metal layer, the gaps at least include a sharp metal corner. At least one static discharge vertical path is formed between the first metal layer and the second metal layer through one of the gaps or metal sharp corners.
为让本发明的上述目的、特征、和优点能更明显易懂,以下配合附图以及优选实施例,以更详细地说明本发明。In order to make the above objects, features, and advantages of the present invention more comprehensible, the present invention will be described in more detail below in conjunction with the accompanying drawings and preferred embodiments.
附图说明 Description of drawings
图1A绘示实施例一的第一种薄膜晶体管的俯视图;FIG. 1A shows a top view of the first thin film transistor of Embodiment 1;
图1B绘示绘示图1A中沿剖面线AA’的第一种薄膜晶体管的元件结构的垂直剖面图;Fig. 1B is a vertical cross-sectional view showing the device structure of the first thin film transistor along section line AA' in Fig. 1A;
图1C绘示实施例一的第二种薄膜晶体管的俯视图;FIG. 1C shows a top view of the second thin film transistor of Embodiment 1;
图1D绘示图1C中沿剖面线AA’的第二种薄膜晶体管的元件结构的垂直剖面图;Figure 1D shows a vertical cross-sectional view of the device structure of the second thin film transistor along section line AA' in Figure 1C;
图1E绘示实施例一的第三种薄膜晶体管的俯视图;FIG. 1E shows a top view of the third thin film transistor of Embodiment 1;
图1F绘示图1E中沿剖面线AA’的第三种薄膜晶体管的元件结构的垂直剖面图;Figure 1F shows a vertical cross-sectional view of the element structure of the third thin film transistor along section line AA' in Figure 1E;
图2绘示具有垂直式静电放电保护元件结构的薄膜晶体管的形成流程图;FIG. 2 shows a flow chart of forming a thin film transistor with a vertical ESD protection device structure;
图3绘示薄膜晶体管及其形成光致抗蚀剂的示意图;3 shows a schematic diagram of a thin film transistor and a photoresist for forming it;
图4A绘示实施例二的一种薄膜晶体管的俯视图;以及FIG. 4A shows a top view of a thin film transistor of Embodiment 2; and
图4B绘示图4A中沿剖面线BB’的一种薄膜晶体管的元件结构的垂直剖面图。FIG. 4B is a vertical cross-sectional view of an element structure of a thin film transistor along the section line BB' in FIG. 4A.
简单符号说明simple notation
10:基板10: Substrate
20、110、110a、410:第一金属层20, 110, 110a, 410: first metal layer
30:正型光致抗蚀剂层30: Positive photoresist layer
35:凹口35: notch
35a:尖角35a: sharp corner
100a、100b、100c、400:薄膜晶体管100a, 100b, 100c, 400: thin film transistors
112a:金属缺口112a: Metal notch
115a:金属尖角115a: Metal sharp corners
120、120a、420:介电层120, 120a, 420: dielectric layer
122、422:绝缘层122, 422: insulating layer
124、124a、424:通道层124, 124a, 424: channel layer
130、430:第二金属层130, 430: second metal layer
135:尖端135: tip
412、432:侧缘412, 432: side edge
415:第一指状图形415: First Finger Graphics
416:第一凸出部416: first protrusion
435:第二指状图形435: Second Finger Graphics
436:第二凸出部436: second protrusion
具体实施方式 Detailed ways
实施例一Embodiment one
请参照图1A,其绘示实施例一的第一种薄膜晶体管的俯视图。第一种薄膜晶体管100a包括第一金属层110a、介电层120及第二金属层130。第一金属层110a及第二金属层130由介电层120隔开。请再参照图1B,其绘示图1A中沿剖面线AA’的第一种薄膜晶体管的元件结构的垂直剖面图。第一金属层110a设置于基板10上,第一金属层110a具有多个金属缺口112a。且这些金属缺口112a之间包括金属尖角115a。介电层120设置于第一金属层110a上,介电层120包括绝缘层122及通道层124,第二金属层130设置于介电层120上。第一金属层110a的金属尖角115a和第二金属层130之间,形成静电放电的垂直路径p1,如图中虚线所示。Please refer to FIG. 1A , which shows a top view of a first thin film transistor according to Embodiment 1. Referring to FIG. The first
请同时参照图1C及图1D,其分别绘示实施例一的第二种薄膜晶体管的俯视图,以及图1C中沿剖面线AA’的第二种薄膜晶体管的元件结构的垂直剖面图。第二种薄膜晶体管100b与第一种薄膜晶体管100a的主要不同之处在于:第二种薄膜晶体管100b的介电层120a具有介电缺口,例如在通道层124a具有通道缺口125a,且第二种薄膜晶体管100b的第一金属层110上不具有金属尖角。如图1D所示,介电层120a包括绝缘层122及通道层124a,通道层124a并具有通道缺口125a。通道缺口125a提供一较薄的介电层区域,使得第一金属层110及第二金属层130于通道缺口125a之处的放电电压较低,而形成通过通道缺口125a的放电路径p2。而第二金属层130对应另一通道缺口形成向下的尖端135,经由介电层120a较薄之处与第一金属层110之间形成另一放电路径。Please refer to FIG. 1C and FIG. 1D at the same time, which respectively depict a top view of the second thin film transistor of Embodiment 1, and a vertical cross-sectional view of the device structure of the second thin film transistor along the section line AA' in FIG. 1C. The main difference between the second type
请同时参照图1E及图1F,其分别绘示实施例一的第三种薄膜晶体管的俯视图,以及图1E中沿剖面线AA’的第三种薄膜晶体管的元件结构的垂直剖面图。第三种薄膜晶体管100c与第一种薄膜晶体管100a的主要不同之处在于:第三种薄膜晶体管100c的介电层120a的通道层124a具有通道缺口125a,而第二金属层130对应通道另一通道缺口形成向下的尖端135。如图1F所示,介电层120a的通道缺口125a位于第一金属层110a的金属尖角115a之上,因此可垂直地形成一放电路径p3通过金属尖角115a及通道缺口125a。同样的尖端135经由介电层120a的另一介电缺口与第一金属层110a之间形成另一放电路径。Please refer to FIG. 1E and FIG. 1F at the same time, which respectively depict the top view of the third thin film transistor of Embodiment 1, and the vertical cross-sectional view of the device structure of the third thin film transistor along the section line AA' in FIG. 1E. The main difference between the third type of
至于本发明的垂直式静电放电保护元件结构的制造方式,请参照图2,其绘示具有垂直式静电放电保护元件结构的薄膜晶体管的流程图。并请同时参照图3,其绘示薄膜晶体管及其形成光致抗蚀剂的示意图。As for the manufacturing method of the vertical ESD protection device structure of the present invention, please refer to FIG. 2 , which shows a flow chart of a thin film transistor with a vertical ESD protection device structure. Please also refer to FIG. 3 , which shows a schematic diagram of a thin film transistor and its formation photoresist.
首先,如步骤1所示,形成第一金属层20于基板10上。接着,如步骤2所示,形成介电层(未绘示)于第一金属层20上,介电层包括绝缘层及通道层。其中绝缘层的材料例如是包括氮化硅或氧化硅,通道层的材料例如是包括非晶硅或多晶硅、或硅。First, as shown in step 1, a
然后,如步骤3所示,形成第二金属层(未绘示)于介电层上。第一金属层20及介电层至少有一个具有多个缺口。当缺口形成于第一金属层20上时,缺口至少包括金属尖角,而第一金属层20及第二金属层之间所形成的一静电放电的垂直路径则通过金属尖角。以图3为例,是将正型光致抗蚀剂层30形成于第一金属层20上。接着,提供光掩模于正型光致抗蚀剂层30上,光掩模上具有多个开口,开口的宽度可以是随机、由小至大或是由大至小。通过光光刻工艺(黄光工艺)本身曝光分辨率的限制,对于不同宽度的开口下的正型光致抗蚀剂层30产生不同的曝光深度。然后,进行曝光,在光致抗蚀剂层30上形成多个凹口35。该多个凹口35中至少包括尖角35a。最后,蚀刻正型光致抗蚀剂层30及第一金属层20,以形成例如图1B的多个金属缺口112a。由于蚀刻图形会对应正型光致抗蚀剂层30的形状,因此会在尖角35a对应第一金属层20处,形成例如图1B中的金属尖角115a,使第一金属层110与第二金属层130之间形成通过金属尖角115a的放电路径。利用同样的制作方式,也可以在介电层上,形成如图1D中的较薄介电层,即通道缺口125a(P2放电路径)。Then, as shown in step 3, a second metal layer (not shown) is formed on the dielectric layer. At least one of the
但本发明所属的技术领域具有通常知识者,可知本发明的技术并不限于仅在第一金属层形成缺口和尖角。介电层(未绘示)上也同样可以上述的方式形成如图1D的通道缺口125a。当缺口形成于介电层上时,第一金属层20及第二金属层(未绘示)之间形成静电放电的垂直路径通过缺口。另外,本发明亦可使用负型光致抗蚀剂材料形成类似的缺口图案。However, those skilled in the technical field of the present invention can understand that the technology of the present invention is not limited to forming notches and sharp corners only on the first metal layer. The
实施例二Embodiment two
实施例二的薄膜晶体管是在第一、第二金属层侧缘处的垂直方向上形成略微错位的图形,例如指状图形,进而产生静电放电的垂直路径。请参照图4A,其绘示实施例二的一种薄膜晶体管的俯视图。实施例二的薄膜晶体管400包括第一金属层410、介电层420及第二金属层430。且第一金属层410的侧缘412处具有第一指状图形415,第二金属层430的侧缘432处具有第二指状图形435。第一指状图形415与第二指状图形435分别包括多个第一凸出部416及多个第二凸出部436,多个第一凸出部416及多个第二凸出部436在垂直方向上产生错位。In the thin film transistor of the second embodiment, a slightly dislocated pattern, such as a finger pattern, is formed in the vertical direction at the side edges of the first and second metal layers, thereby generating a vertical path for electrostatic discharge. Please refer to FIG. 4A , which shows a top view of a thin film transistor according to the second embodiment. The thin film transistor 400 of the second embodiment includes a
请参照图4B,其绘示图4A中沿剖面线BB’的一种薄膜晶体管的元件结构的垂直剖面图。第一金属层410设置于基板10上,介电层420形成于第一金属层410上,且介电层420包括绝缘层422及通道层424。第二金属层430则设置于介电层420上,且第一金属层410的第一指状图形415的多个第一凸出部416与第二金属层430的第二指状图形435的多个第二凸出部436在垂直方向上产生错位,以产生静电放电的垂直路径p4。Please refer to FIG. 4B, which shows a vertical cross-sectional view of a thin film transistor device structure along the section line BB' in FIG. 4A. The
但本发明所属的技术领域中具有通常知识者,可知本发明的技术不限于此。实施例一与实施例二的结构可互相搭配并同时实现于薄膜晶体管上。也就是说在同一薄膜晶体管上,第一金属层可以同时具有金属尖角及第一指状图形,介电层上具有介电缺口,第二金属层上可以具有第二指状图形。若上述实施例的元件结构搭配实施,更能发挥静电放电保护的功效。However, those who have ordinary knowledge in the technical field to which the present invention belongs can understand that the technology of the present invention is not limited thereto. The structures of the first embodiment and the second embodiment can be matched with each other and implemented on the thin film transistor at the same time. That is to say, on the same thin film transistor, the first metal layer can have metal sharp corners and the first finger pattern at the same time, the dielectric layer can have dielectric gaps, and the second metal layer can have the second finger pattern. If the element structures of the above embodiments are combined and implemented, the effect of electrostatic discharge protection can be further exerted.
本发明上述实施例所揭露的垂直式静电放电保护的元件结构,主要是在第一金属层上形成金属尖角,或/和在介电层上形成较薄区域的介电缺口。或是在第一金属层和第二金属层的侧缘处形成错位的指状图形,使得两金属层之间可以透过金属尖角或介电缺口或错位的指状图形形成放电路径以释放电荷,避免当电荷累积超过放电电压时,产生静电放电而造成元件损毁。The device structure of the vertical ESD protection disclosed in the above-mentioned embodiments of the present invention is mainly to form a sharp metal corner on the first metal layer, or/and form a thin dielectric gap on the dielectric layer. Or form dislocation finger patterns at the side edges of the first metal layer and the second metal layer, so that a discharge path can be formed between the two metal layers through metal sharp corners or dielectric gaps or dislocation finger patterns to release Charge, to avoid when the charge accumulation exceeds the discharge voltage, electrostatic discharge will be generated and the components will be damaged.
综上所述,虽然本发明以优选实施例揭露如上,然而其并非用以限定本发明,本领域的技术人员在不脱离本发明的精神和范围内,可作些许的更动与润饰,因此本发明的保护范围应当以权利要求所界定者为准。In summary, although the present invention is disclosed above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention should be defined by the claims.
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US5656530A (en) * | 1993-03-15 | 1997-08-12 | Hewlett-Packard Co. | Method of making electric field emitter device for electrostatic discharge protection of integrated circuits |
US5913137A (en) * | 1993-07-07 | 1999-06-15 | Actel Corporation | Process ESD protection devices for use with antifuses |
CN1540396A (en) * | 2003-04-25 | 2004-10-27 | 胜华科技股份有限公司 | Method and device for arranging conductive metal wires of display panel with point discharge |
TWM378920U (en) * | 2009-12-08 | 2010-04-21 | Chong-Wei He | Bicycle carrier and fastening device thereof |
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US5656530A (en) * | 1993-03-15 | 1997-08-12 | Hewlett-Packard Co. | Method of making electric field emitter device for electrostatic discharge protection of integrated circuits |
US5913137A (en) * | 1993-07-07 | 1999-06-15 | Actel Corporation | Process ESD protection devices for use with antifuses |
CN1540396A (en) * | 2003-04-25 | 2004-10-27 | 胜华科技股份有限公司 | Method and device for arranging conductive metal wires of display panel with point discharge |
TWM378920U (en) * | 2009-12-08 | 2010-04-21 | Chong-Wei He | Bicycle carrier and fastening device thereof |
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