CN100435461C - High-speed pulse width modulation control device and method capable of automatically adapting to voltage positioning - Google Patents

Abstract

The invention discloses a high-speed Pulse Width Modulation (PWM) control device automatically adapting to voltage positioning and a driving signal generation method thereof, which can achieve the purposes of stabilizing and saving the output power of a load timely by automatically detecting the change of the load and adjusting the voltage positioning at any time. Meanwhile, the invention does not need to use the frequency of the periodic signal as the proof for generating the driving signal and does not need an error amplifier as the control of modulation, so the invention has quick response time and can reflect the load change in real time to achieve the stable effect. When the Continuous Conduction Mode (CCM) is operated in a stable state, even if the input voltage Vin and the output voltage Vout are changed, the switching frequency of the controller can still be kept close to constant, so that the effect of electromagnetic noise interference (EMI) is improved.

Description

High-speed pulse width modulation control device and method for automatically adapting to voltage positioning

technical field

The present invention relates to a high-speed pulse width modulation control device that automatically adapts to voltage positioning and a method for generating a driving signal thereof, in particular to a switchable DC-DC power conversion device that can detect load changes in real time. Quick response, to achieve the purpose of maintaining the stability of the power system controller and its drive signal generation method

Background technique

There are generally two types of technologies for controlling switching DC-DC power conversion. One is to use a periodic signal (clock signal) as the frequency of control switching, and the other is to achieve control switching without using a periodic signal. For techniques using periodic signals, the frequency of the switching signal for DC-DC power conversion is fixed and equal to the frequency of the periodic signal. The duty cycle (D) of the switching signal is usually leading-edge modulation (leading-edge) or trailing-edge modulation (trailing-edge) to achieve pulse width modulation, the duty cycle:

$\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; on</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; off</span>}}}$

Like this kind of modulation that generates switching signals based on fixed-period signals, the modulation of switching signals at this time is limited by the response time of the periodic signals. Since the periodic signals respond once a cycle, if the load changes rapidly, the switching signals will not be able to Real-time response does not achieve a stable effect.

Therefore, there are other technologies that can achieve control switching without using periodic signals. Among these technologies, the switching technologies using hysteretic control and constant on-time control are the main ones.

Referring to FIG. 1 , it is a schematic diagram of a known DC-DC power conversion circuit with hysteresis control. The DC-DC power conversion circuit 1 with hysteresis control is mainly composed of a hysteresis comparison unit 10 connected to a drive unit 12 and an energy storage inductor L and an energy storage capacitor C. The hysteresis comparison unit 10 obtains a feedback signal Vfb from the output terminal of the DC-DC power conversion circuit 1, and performs a hysteresis comparison operation with the hysteresis critical value VH to output a drive signal Vdriver, which can control the drive The switching switch (not shown) in the unit 12 generates a stable output voltage Vout according to the input voltage Vin.

Referring to FIG. 1, referring to FIG. 2, it is a schematic diagram of the waveform of a known DC-DC power conversion circuit with hysteresis control. When the feedback signal Vfb in decline reaches the lower limit value -VH of the hysteresis critical value VH, the drive signal Vdriver changes from When the low level (low) is pulled to the high level (high), when the rising feedback signal Vfb reaches the upper limit +VH of the hysteresis threshold value VH, the driving signal Vdriver drops from the high level to the low level, The driving signal Vdriver is generated by means of the hysteresis comparison operation. In this hysteresis control mode, the feedback signal Vfb will be affected by the equivalent series resistance (Effective Series Resistor; ESR) and the equivalent series inductance (Effective Series Inductance; ESL) of the output capacitor to generate ripples. The generation of waves will affect the hysteresis comparison operation, and the switching frequency of the driving signal Vdriver will change greatly. Especially when the level of the ripple signal is small, the noise interference will be more serious, which increases the difficulty of circuit design.

Referring to FIG. 3 , it is a schematic diagram of a conventional DC-DC power conversion circuit in a fixed on-time manner. Most DC-DC conversion circuits adopt voltage mode control, and the step-down DC-DC conversion circuit 2 is taken as an example for illustration. The characteristic of the control circuit 20 in the conversion circuit 2 is that the error amplifier 23 obtains a feedback voltage signal V _FB in the DC-DC conversion circuit, and calculates it with a reference voltage Vref to amplify and output an error signal VE. A pulse width modulation comparator compares the error signal VE with an integral output signal Vramp, and then outputs a pulse width modulation setting signal PWMset to the flip-flop 26 to trigger the flip-flop 26 to output a drive signal PWMDRV.

The enabled output drive signal PWMDRV controls an on-time control unit 28 so that it can be delayed for a fixed period of time before outputting the delay signal DelayOn, and the delay signal DelayOn controls the reset of the flip-flop 26 through an OR gate (OR) 27 ( PWMreset), and then obtain an output driving signal PWMDRV with a fixed conduction time from the output terminal Q of the flip-flop 26 . The output driving signal PWMDRV outputs a pair of complementary driving signals DrvH and DrvL through the driving unit 29, and the complementary driving signals DrvH and DrvL are used to drive the switching of the transistors Q1 and Q2, and the output of the power output circuit 22 is made The voltage Vout reaches a steady state.

In the control circuit 20, there is an overcurrent protection unit 24 which receives a current detection signal Vs and a critical signal Vthocp for comparison operation, and outputs an overcurrent signal OCPen, and the overcurrent signal OCPen and the delay signal DelayOn are controlled by the OR gate (OR) 27 The flip-flop 26 is reset (PWMreset) to obtain the output driving signal PWMDRV with a constant conduction time.

Referring to FIG. 4 , it is a schematic waveform diagram of the circuit illustrated in FIG. 3 . The error signal VE is compared with the integral output signal Vramp to output the pulse width modulation setting signal PWMset, so as to drive the signal PWMDRV. The PWM set signal PWMset activates the on-time control unit 28, and after a fixed delay time Ton, the on-time control unit 28 resets the driving signal PWMDRV.

Referring to Figure 3 again, in this fixed on-time control mode, the on-time of the driving signal for each switching cycle is fixed, while the off-time is controlled by the error amplifier. 23 modulations. That is to say, the fixed on-time will make the modulation of the off-time easily affected by the change of the output or input voltage of the conversion circuit 2 and change the switching frequency. In a step-down (buck) conversion circuit, when the on-time Ton When fixed, the switching frequency fs is affected by the output voltage Vout and the input voltage Vin, please refer to the following formula (1):

$\mathrm{<span\; class="notranslate">\; fs</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; Vout</span>}}{\mathrm{<span\; class="notranslate">\; ton</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Vin</span>}}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

In addition, the fixed on-time control method requires the use of the error amplifier 23 to achieve modulation control. This method will affect the transient response time of the control signal due to the limitation of the bandwidth of the error amplifier 23 itself. response).

Contents of the invention

The technical problem to be solved by the present invention is to provide a high-speed pulse width modulation control device that automatically adapts to voltage positioning and its driving signal generation method. By automatically detecting changes in the load and adjusting the voltage positioning at any time to achieve the purpose of stability, such as When the heavy load returns to light load, it can avoid the generation of over-shoot. It can also save the cost of parts by reducing parts such as inductors, power crystals or other related circuit parts, and save the output power of the load in time.

At the same time, the present invention does not need to use the frequency of the periodic signal as the evidence for the generation of the driving signal, and does not need the error amplifier as the control of the modulation, so the present invention has a fast response time and can respond to load changes in real time to achieve a stable effect. When working in steady state CCM (continuous conduction mode), even if the input voltage Vin and output voltage Vout change, the switching frequency of the controller can still remain close to the same, thereby improving the effect of electromagnetic noise interference.

In order to achieve the above object, the present invention provides a high-speed pulse width modulation control device that automatically adapts to voltage positioning, used in DC-DC power conversion devices, including an automatic load voltage positioning slope compensation unit, used to obtain a current detection signal, and according to the current detection signal, automatically adjust and output a feedback voltage adjustment signal; an error signal comparison unit is connected to the automatic load voltage positioning slope compensation unit, and is used to compare and calculate the feedback voltage adjustment signal and a reference signal to Outputting a modulation output signal; a logic control unit is connected to the error signal comparison unit, receives the modulation output signal and outputs a pulse width modulation setting signal. A turn-on time delay control unit, connected to the logic control unit, generates a pulse width modulation reset signal according to the pulse width modulation setting signal, input voltage Vin and reference voltage Vref; a flip-flop is connected to the The logic control unit and the on-time delay control unit output a pulse width modulation driving signal according to the pulse width modulation setting signal and the pulse width modulation reset signal, and the pulse width modulation driving signal passes through a driving unit , used to output a pair of complementary drive signals DrvH, DrvL; a cut-off time delay control unit, connected to the flip-flop and the logic control unit, generates a pulse-width-modulated cut-off signal for transmission according to the pulse-width-modulated drive signal to the logic control unit; a zero current detection unit, which detects the current flowing through the inductor. When the current is zero, output a zero current enable signal to the drive unit to cut off the drive signal DrvL of the drive unit, thereby avoiding the occurrence of unstable output voltage drop caused by reverse current flowing through the crystal. Therefore, when the load changes, the pulse width modulation control device immediately generates the pulse width modulation setting signal to quickly respond to the load change and achieve stable power supply.

In order to achieve the above object, the present invention provides a driving signal generation method for a high-speed pulse width modulation control device that automatically adapts to voltage positioning, which is used for DC-DC power conversion device control. The steps are to first detect the change of the load and use the Automatic adjustment generates a feedback voltage adjustment signal; then compares the feedback voltage adjustment signal with a reference signal to generate a modulated output signal; then logically operates the modulated output signal and a pulse width modulation cut-off signal to generate A pulse width modulation setting signal, the pulse width modulation setting signal can enable to generate a driving signal; finally, according to the pulse width modulation setting signal, an input voltage and a reference voltage, a delay generates a pulse width modulation Change the reset signal to reset the drive signal.

The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

Description of drawings

1 is a schematic diagram of a known DC-DC power conversion circuit with hysteresis control;

FIG. 2 is a schematic diagram of a conventional DC-DC power conversion circuit with hysteresis control;

3 is a schematic diagram of a known DC-DC power conversion circuit in a fixed on-time mode;

Fig. 4 is the schematic diagram of the waveform of the circuit block in Fig. 3;

5 is a schematic diagram of the circuit structure of the high-speed pulse width modulation control device automatically adapting to voltage positioning used in the step-down DC-DC conversion circuit of the present invention;

Fig. 6 is a circuit schematic diagram of a high-speed pulse width modulation control device automatically adapting to voltage positioning according to the present invention;

Fig. 7 is a schematic diagram of a circuit waveform of a high-speed pulse width modulation control device automatically adapting to voltage positioning in the present invention;

FIG. 8 is a schematic block diagram of a turn-on time delay control unit circuit used in the present invention;

9 is a schematic diagram of the circuit waveform of the on-time delay control unit used in the present invention;

10 is a schematic circuit diagram of the automatic load voltage positioning slope compensation unit of the present invention;

11 is a schematic diagram of the internal circuit of the overcurrent protection unit;

12 is a schematic diagram of the circuit waveform of the automatic load voltage positioning slope compensation unit of the present invention; and

Fig. 13 is a schematic diagram of the slope of the load line of the present invention.

Among them, reference signs:

1 DC-DC power conversion circuit with hysteresis control

10 hysteresis comparison unit

12 drive units

2 Step-down DC-DC conversion circuit

20 control circuit

22 power output circuit

23 error amplifier

24 overcurrent protection unit

25 comparators

26 flip-flops

27 OR gates

28 on-time control units

29 drive units

3 Pulse Width Modulation Control Device

30 automatic load voltage positioning slope compensation unit

31 Zero current detection unit

302 amplifier

32 error signal comparison unit

34 logic control unit

36 turn-on time delay control unit

362 integral state controller

364 resettable integrating amplifier

366 adjustable reference signal generator

3660 voltage to current conversion circuit

368 Comparator

37 cut-off time delay control unit

38 flip-flops

39 overcurrent protection unit

40 drive unit

Rs detection resistor

Rfadj adjustable resistor

Rilimit Overcurrent Variable Resistors

Vin input voltage

Vref reference voltage

Detailed ways

Referring to FIG. 5 , it is a schematic diagram of the circuit architecture of the high-speed pulse width modulation control device for automatically adapting to voltage positioning used in a step-down DC-DC conversion circuit according to the present invention. The high-speed pulse width modulation control device 3 that integrates active load detection and automatic voltage positioning adjustment of the present invention obtains the current detection signal from the detection resistor Rs through two signal input terminals CSN and CSP, and then obtains the current detection signal from the output branch through the FB feedback terminal. The voltage feedback signal Vfb is obtained from the piezoresistor R2 (when the output voltage Vout is low, the voltage feedback signal Vfb can be directly obtained from the output voltage Vout). In the pulse width modulation control device 3, the voltage feedback signal Vfb plus a compensation voltage signal Vslope generates a feedback voltage adjustment signal Vfb', and an adjustable resistor Rfadj is connected to the FAdj terminal of the pulse width modulation control device 3 , which is used to adjust the on-time signal inside the pulse width modulation control device 3 , that is, to change the switching frequency.

According to the above detection, feedback and adjustment, the output terminals DrvH and DrvL of the control device 3 respectively output driving signals SH and SL to control the switching action of the transistors MH and ML to provide a stable output voltage Vout. The control device 3 of the present invention can not only be used to control the step-down (Buck Voltage) DC-DC conversion circuit, but also can be used to control the boost (Boost Voltage) DC-DC conversion circuit, in addition, it can also be used for synchronous or asynchronous and Single-phase or multi-phase DC-DC conversion circuits.

Referring to FIG. 6 , it is a schematic circuit block diagram of a high-speed pulse width modulation control device for automatically adapting to voltage positioning according to the present invention. The pulse width modulation control device 3 at least includes an automatic load voltage positioning slope compensation unit 30 that can be used to obtain the current detection signal V _CS and the feedback voltage signal V _FB . The automatic load voltage positioning slope compensation unit 30 is based on the current detection signal. V _CS and the feedback voltage signal V _FB are automatically adjusted to output a feedback voltage adjustment signal Vfb′. The feedback voltage adjustment signal Vfb′ is sent to an error signal comparison unit 32 , and the error signal comparison unit 32 compares the feedback voltage adjustment signal Vfb′ with a reference signal Vref to output a modulated output signal PWMout. A logic control unit 34 receives the modulated output signal PWMout to output a PWM set signal PWMset.

A turn-on time delay control unit 36 is connected to the logic control unit 34, the input voltage Vin and the reference voltage Vref, and generates a PWM weight according to the PWM set signal PWMset, the input voltage Vin and the reference voltage Vref. Set signal PWMreset. A flip-flop 38 is connected to the logic control unit 34 and the conduction time delay control unit 36, and outputs a pulse width modulation drive according to the pulse width modulation setting signal PWMset and the pulse width modulation reset signal PWMreset Signal PWMDRV. The pulse width modulation driving signal PWMDRV outputs a pair of complementary driving signals DrvH and DrvL through a driving unit 40 . An off-time delay control unit 37 is connected to the flip-flop 38 and the logic control unit 34 , and generates a PWM off-signal PWMoff to send to the logic control unit 34 according to the PWM drive signal PWMDRV. A zero current detection unit 31 is connected to the automatic load voltage positioning slope compensation unit 30 and the drive unit 40, compares and calculates the amplified current detection signal Vsense and a zero current threshold Vthzcd, and outputs a zero current enable Signal ZCDen to the drive unit 40 . The zero-current enabling signal ZCDen can control and adjust the driving signal DrvL output by the driving unit 40 to avoid the situation that the reverse current causes the output voltage to drop.

Thus, when the load changes, the PWM control device 3 detects the changing load and adjusts the slope of the feedback voltage adjustment signal Vslope, and the PWM comparator 32 can perform the comparison operation to generate the pulse width modulation in real time. Change the set signal PWMset to enable the pulse width modulation driving signal PWMDRV to enter the conduction time. After a period of on-time, the on-time delay control unit 36 resets the pulse width modulation driving signal PWMDRV to enter the cut-off time, so as to quickly respond to changes in the load and achieve stable power supply. After the PWM reset signal PWMreset is generated, the off-time delay control unit 37 controls the logic control unit 34 to delay a period of time until the enable signal PWMset is generated again, as the off-time of the PWM driving signal PWMDRV.

Referring to FIG. 6, the pulse width modulation control device 3 further includes an overcurrent protection unit 39 connected to the automatic load voltage positioning slope compensation unit 30 and the logic control unit 34. Please also refer to FIG. 11, which is inside the overcurrent protection unit 39 Circuit schematic. A voltage-to-current converter 392 obtains a maximum current critical value Vref of 1.0v, and converts the maximum current critical value Vref 1.0v into a current signal _IS4 , and the current signal _IS4 flows through an overcurrent variable resistor RCLadj to thereby Obtain a voltage value Vilimit for overcurrent comparison. The voltage-to-current converter 392 obtains the current detection signal Vsense through the automatic load voltage positioning slope compensation unit 30, and the current detection signal Vsense is compared with the voltage value Vilimit for overcurrent through a comparator 390 to output an overcurrent protection signal OCPen to the logic control unit 34 .

Referring to FIG. 7 , it is a schematic diagram of a circuit waveform of a high-speed pulse width modulation control device for automatically adapting to voltage positioning according to the present invention. Please also refer to FIG. 6 , after the circuit is started, the feedback voltage adjustment signal Vfb' is compared with the reference signal Vref to generate the modulated output signal PWMout. At time t0-t1, assuming that the circuit has not yet reached the overcurrent, the overcurrent protection signal OCPen is at low potential, and the PWM off signal PWMoff and the modulation output signal PWMout are also at low potential. At time t1, the modulating output signal PWMout rises from a low potential to a high potential, at this time, the enabling signal PWMset is generated to enable the pulse width modulation driving signal PWMDRV.

After the enabling signal PWMset is generated, the PWM driving signal PWMDRV is turned on for a period of time Ton, and then turned off at time t2 by the PWM reset signal PWMreset. After the PWM reset signal PWMreset is generated, a high potential PWM off signal PWMoff is generated for several hundreds of nanoseconds (ns) and then returns to a low potential again.

At time t3, the enable signal PWMset is generated again, and at time t4, after another on-time Ton, the PWM reset signal PWMreset is generated, and the PWM off signal PWMoff is output again for about hundreds of nanoseconds ( ns) time high potential, during the period of t4-t5, although the modulated output signal PWMout maintains a high potential, but the pulse width modulation cut-off signal PWMoff is at a high potential and delays the output of the enabling signal PWMset until The pulse width modulation cut-off signal PWMoff is output only when it returns to a low level. Such a design can make the load under heavy load, and the pulse width modulation driving signal PWMDRV still has an off time (off time), so as to prevent the controlled transistors from being turned on at the same time to cause burning. At time t5, the zero-current enable signal ZCDen is generated to cut off the driving signal DrvL, so as to avoid the situation that the reverse current flows through the crystal and causes the output voltage to drop and become unstable.

Referring to FIG. 8 , it is a schematic circuit block diagram of a turn-on time delay control unit used in the present invention. The on-time delay control unit 36 includes: a resettable integral amplifier 364; an integral state controller 362 connected to the logic control unit 34 and the resettable integral amplifier 364, according to the pulse width modulation setting signal PWMset, A control signal Control is output to control the resettable integral amplifier 364 to perform integral operation, so that it outputs an integral output signal Vramp.

An adjustable reference signal generator 366 is used to output a reference signal Vtop. A comparator 368 is connected to the resettable integral amplifier 364, the adjustable reference signal generator 366 and the integral state controller 362 for comparing the integral output signal Vramp with the reference signal Vtop, and outputting the pulse width modulation Change the reset signal PWMreset to the integral state controller 362. The integral state controller 362 disables the integral operation of the resettable integral amplifier 364 according to the pulse width modulation reset signal PWMreset.

The adjustable reference signal generator 366 is composed of a voltage-to-current conversion circuit 3660 connected with an adjustable resistor Rfadj. The voltage-to-current conversion circuit 3660 converts a reference voltage Vref into a reference current _IS3 for output. The reference current _IS3 flows through the adjustable resistor Rfadj, and generates the reference signal Vtop on the adjustable resistor Rfadj.

Referring to FIG. 8 , refer to FIG. 9 , which is a schematic diagram of circuit waveforms of the on-time delay control unit used in the present invention. At time t1, the pulse width modulation setting signal PWMset is generated, and the pulse width modulation setting signal PWMset is used to control the integral state controller 362 to generate a low-level control signal Control, so that the resettable integral amplifier 364 can start the integral operation , generating the integral output signal Vramp.

When the integral output signal Vramp rises and reaches the reference signal Vtop, that is, at time t2, the comparator 368 generates a pulse width modulation reset signal PWMreset, which is used to control the integral state controller 362 to generate a high level The control signal Control enables the resettable integral amplifier 364 to reset the integral operation. At time t3, the PWM set signal PWMset controls the integral state controller 362 again, so that the resettable integral amplifier 364 performs the integral operation again to generate the integral output signal Vramp. In the above, the on-time Ton of the pulse width modulation driving signal PWMDRV occurs at time t1-t2, and the off-time Toff occurs at time t2-t3. The on-time Ton can be obtained from the following formula (2):

$\mathrm{<span\; class="notranslate">\; ton</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; Rfadj</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Cint</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Vref</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="G\; m"\; filenames="C20051010267800181.png"\; state="\{\{state\}\}">G\; m</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; Vin</span>}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="G\; m"\; filenames="C20051010267800161.png,C20051010267800251.png"\; state="\{\{state\}\}">G\; m</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

In the formula (2), Rfadj is the resistance value of the adjustable resistor; Cint is the capacitance value; Vref is the reference voltage value; Gm1 is the gain value of the resettable integral amplifier 364; Vin is the input voltage value; Gm2 is the voltage-to-current conversion circuit A gain value of 3660. From the above formula (2), it can be known that the on-time Ton is due to the direct feed-forward of the input voltage Vin and the reference voltage Vref, so that the switching frequency can be maintained under the change of the input voltage Vin and the output voltage Vout. Can maintain almost constant output frequency.

Referring to FIG. 10 , it is a schematic circuit diagram of the automatic load voltage positioning slope compensation unit of the present invention. The automatic load voltage positioning slope compensation unit 30 includes: an amplifier 302, whose input terminal obtains a current detection signal Vcs from the detection resistor _RS through a first compensation resistor Rcsn to generate an amplified current detection signal Vsense; a first adjustable current source I _S1 is connected to the output terminal and input terminal of the amplifier 302, and is used as feedback compensation for the output of the amplifier 302 according to the amplified current detection signal Vsense; a second adjustable current source I _S2 is connected to the amplifier 302 and a second compensation resistor Ravp, which provides current for the second compensation resistor Ravp according to the output signal of the amplifier 302, and generates a compensation voltage signal Vslope on the second compensation resistor Ravp to compensate The voltage signal Vslope is added to the voltage feedback signal Vfb to generate a feedback voltage adjustment signal Vfb′.

In conjunction with FIG. 12 , it is a schematic diagram of circuit waveforms of the automatic load voltage positioning slope compensation unit of the present invention. The feedback voltage adjustment signal Vfb' produced by the automatic load voltage positioning slope compensation unit 30 can be known by the following formula (3):

$\mathrm{<span\; class="notranslate">\; V</span>}{\mathrm{<span\; class="notranslate">\; b</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; V\; slope</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Vfb</span>}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; sense</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; avp</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="C20051010267800161.png,C20051010267800251.png"\; state="\{\{state\}\}">R</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="C20051010267800181.png"\; state="\{\{state\}\}">R</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; Vout</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

Wherein, Vslope is a compensation voltage signal; Vfb is a feedback voltage value; i _sense is a current flowing through the second compensation resistor; Ravp is a resistance value of the second compensation resistor; Vout is an output voltage.

The current i _sense flowing through the second compensation resistor can be obtained from the following formula (4):

${\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; sense</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; \&times;</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; csn</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

Wherein, Rs is the resistance value of the detection resistor; i _L is the current value flowing through the detection resistor RS; Rcsn is the resistance value of the first compensation resistor.

From the above formula (3) and formula (4), it can be known that the value of the compensation voltage signal Vslope and its slope value Rdroop (that is, the slope of the load line), the value of Vslope and the slope value Rdroop can be obtained from formula (5) and formula (6) Know:

$\mathrm{<span\; class="notranslate">\; Vslpoe</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; L</span>}}<span\; class="notranslate">\; \&times;</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; csn</span>}}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; avp</span>}}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; Rdroop</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; avp</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; csn</span>}}}{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}<span\; class="notranslate">\; )</span>$

Therefore, the slope value Rdroop of the feedback voltage adjustment signal Vslope can be changed by adjusting the first compensation resistor Rcsn, the second compensation resistor Ravp, and the detection resistor Rs, so as to achieve the function of automatic load voltage positioning adjustment. The slope Rdroop of the load line is shown in Figure 13. By adjusting the resistance values of the first compensation resistor Rcsn and the second compensation resistor Ravp, the relative proportion of the load line slope value Rdroop can be easily obtained instead of an absolute value The value of the second compensation resistor Ravp is obtained to make it easier to integrate into an integrated circuit (IC).

To sum up, the present invention uses a high-speed pulse width modulation control device that automatically adapts to voltage positioning and its driving signal generation method. By automatically detecting changes in the load and simultaneously adjusting the voltage positioning to achieve stability and timely load saving Output Power. For example, when the heavy load returns to light load, it can avoid the occurrence of excessive load. Part cost can also be saved by reducing parts such as inductors, power crystals or other related circuit parts.

At the same time, the present invention does not need to use the frequency of the periodic signal as the evidence for the generation of the driving signal, nor does it need the error amplifier as the modulation control, so the present invention has a fast response time and can respond to load changes in real time to achieve a stable effect. When working in steady state CCM (continuous conduction mode), even if the input voltage Vin and output voltage Vout change, the switching frequency of the controller can still remain close to the same, thereby improving the effect of electromagnetic noise interference.

Certainly, the present invention also can have other multiple embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these corresponding Changes and deformations should all belong to the protection scope of the appended claims of the present invention.

Claims (13)

1, the high-speed pulsewidth modulation controller of a kind of automatic adapting voltage location is used in the DC-DC power supply change-over device, comprising:

A current sense signal and a feedback voltage signal are obtained by a detecting resistance in slope-compensation unit, one automatic load voltage location, adjust output one feedback voltage automatically and adjust signal;

One error signal comparing unit is connected in this slope-compensation unit, automatic load voltage location, is used for this feedback voltage of comparison operation and adjusts a signal and a reference signal, exports a modulation output signal;

One logic control element is connected in this error signal comparing unit, is used to receive this modulation output signal, exports a pulse-width modulation setting signal;

One ON time delay control unit is connected in this logic control element, an input voltage and a reference voltage, and it produces a pulse-width modulation reset signal according to this pulse-width modulation setting signal, input voltage and this reference voltage;

One flip-flop is connected in this logic control element and this ON time delay control unit, and it exports a pulse-width modulation drive signal according to this pulse-width modulation setting signal and this pulse-width modulation reset signal;

One driver element is connected in this flip-flop, is used to receive this pulse-width modulation drive signal, exports the drive signal of a pair of complementation; And

One deadline delay control unit, be connected in this flip-flop and this logic control element, it produces a pulse-width modulation pick-off signal according to this pulse-width modulation drive signal, is sent to this logic control element.

2, the high-speed pulsewidth modulation controller of locating according to the described automatic adapting voltage of claim 1; it is characterized in that; further comprise an overcurrent protection unit; be connected in this automatic load voltage slope-compensation unit, location and this logic control element; it obtains the amplified current detection signal by this slope-compensation unit, automatic load voltage location; and the current sense signal and a maximum current critical value of amplification are somebody's turn to do in comparison operation, to export an overcurrent protection signal.

3, according to the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 2 location, it is characterized in that this maximum current critical value is obtained by an overcurrent variable resistance modulation.

4, the high-speed pulsewidth modulation controller of locating according to the described automatic adapting voltage of claim 1, it is characterized in that, further comprise a zero current detecting unit, be connected in this automatic load voltage slope-compensation unit, location and this driver element, it obtains the amplified current detection signal by this slope-compensation unit, automatic load voltage location, and the current sense signal and a zero current critical value of amplification are somebody's turn to do in comparison operation, to export a zero current enable signal to this driver element.

According to the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 1 location, it is characterized in that 5, this slope-compensation unit, automatic load voltage location comprises again:

One amplifier, its input are to obtain this current sense signal by one first compensating resistance, the current sense signal after generation one is amplified;

One first adjustable current source is connected in the output and the input of this amplifier, and the current sense signal after amplifying according to this is as the feedback compensation of amplifier output; And

One second adjustable current source, be connected in this amplifier and one second compensating resistance, it is according to the output signal of this amplifier, provide current to this second compensating resistance, and on this second compensating resistance, produce a compensation voltage signal, this compensation voltage signal adds this voltage feedback signal, produces this feedback voltage and adjusts signal.

6, according to the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 5 location, it is characterized in that this detecting resistance, this first compensating resistance and this second compensating resistance can determine the slope value of a load line.

7, according to the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 6 location, it is characterized in that the slope value of this load line equals this second compensating resistance and takes advantage of this detecting resistance, again divided by first compensating resistance.

8, according to the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 1 location, it is characterized in that this ON time delay control unit comprises again:

One integral amplifier of can resetting;

One integration state controller is connected in this logic control element and this integral amplifier of can resetting, and it is controlled this integral amplifier of can resetting and carry out integral operation according to this pulse-width modulation setting signal, makes it export an integral output signal;

One can adjust the reference signal generator, its exportable reference signal; And

One comparator is connected in this integral amplifier of can resetting, this can adjust reference signal generator and this integration state controller, is used for this integral output signal of comparison operation and this reference signal, exports this pulse-width modulation reset signal to this integration state controller;

Wherein, this integration state controller can be by the integral operation of this integral amplifier of can resetting according to this pulse-width modulation reset signal.

9, the high-speed pulsewidth modulation controller of described according to Claim 8 automatic adapting voltage location is characterized in that this can adjust the reference signal generator, comprises again:

One voltage changes current converter circuit, and a reference voltage is converted into reference current output; And

One adjustable resistor, being connected in this voltage changes current converter circuit, and it is produced this reference signal according to this reference current.

10, the driving signal generating method of the high-speed pulsewidth modulation controller of a kind of automatic adapting voltage location is used for the control of DC-DC power supply change-over device, may further comprise the steps:

Step 1: see through a detecting resistance, the variation of detecting load, adjustment produces a feedback voltage and adjusts signal automatically;

Step 2: relatively this feedback voltage is adjusted a signal and a reference signal, produces a modulation output signal;

Step 3: this a modulation output signal of logical operation and a pulse-width modulation pick-off signal, produce a pulse-width modulation setting signal, this pulse-width modulation setting signal can activation produce a drive signal; And

Step 4: according to this pulse-width modulation setting signal, an input voltage and a reference voltage, postpone to produce a pulse-width modulation reset signal, this drive signal is used for resetting.

11, according to the driving signal generating method of the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 10 location, it is characterized in that this drive signal can produce this pulse-width modulation pick-off signal after resetting.

12, according to the driving signal generating method of the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 10 location; it is characterized in that; in the logical operation step; further an overcurrent protection signal and this modulation output signal, this pulse-width modulation pick-off signal are carried out logical operation, produce this pulse-width modulation setting signal.

13, according to the driving signal generating method of the high-speed pulsewidth modulation controller of the described automatic adapting voltage of claim 10 location, it is characterized in that, further include zero current detecting step, an one amplified current detection signal and a zero current critical value are compared computing, export a zero current enable signal then to a driver element, be used for controlling the drive signal of adjusting this driver element output.

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