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CN100435279C - A method for fabricating a large-area self-supporting wide-bandgap semiconductor material - Google Patents

A method for fabricating a large-area self-supporting wide-bandgap semiconductor material Download PDF

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CN100435279C
CN100435279C CNB2006101051129A CN200610105112A CN100435279C CN 100435279 C CN100435279 C CN 100435279C CN B2006101051129 A CNB2006101051129 A CN B2006101051129A CN 200610105112 A CN200610105112 A CN 200610105112A CN 100435279 C CN100435279 C CN 100435279C
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CN1959933A (en
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郝跃
张进城
陈军峰
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Xidian University
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Abstract

本发明公开了一种基于双缓冲柔性衬底的大面积、自支撑宽禁带半导体材料制作方法。主要解决现有技术制作的宽禁带半导体材料存在高缺陷密度、大量裂纹、外延材料厚度过小,无法剥离等技术问题。其技术方案是:首先在硅片上制作SOI结构;接着在SOI结构的SOL上利用光刻、外延工艺制作岛状缓冲层,形成双缓冲柔性衬底;接着在该双缓冲柔性衬底上外延生长半导体材料;最后将所生长半导体材料下面的双缓冲柔性衬底或SOI结构层剥离掉,最终形成所需的大面积、自支撑宽禁带半导体材料。本发明具有能够释放外延材料与硅片材料之间因晶格失配、热失配产生高应力的优点,可用于进行炭化硅SiC、氮化镓GaN等材料的制作。

Figure 200610105112

The invention discloses a large-area, self-supporting wide bandgap semiconductor material manufacturing method based on a double-buffer flexible substrate. It mainly solves technical problems such as high defect density, a large number of cracks, too small thickness of epitaxial material and inability to peel off the wide bandgap semiconductor material produced by the prior art. The technical solution is: firstly fabricate an SOI structure on a silicon wafer; then use photolithography and epitaxial processes to fabricate an island-shaped buffer layer on the SOL of the SOI structure to form a double-buffered flexible substrate; then epitaxially Growth of semiconductor materials; finally, the double-buffered flexible substrate or SOI structure layer under the grown semiconductor materials is peeled off to finally form the required large-area, self-supporting wide-bandgap semiconductor material. The invention has the advantage of being able to release high stress caused by lattice mismatch and thermal mismatch between the epitaxial material and the silicon wafer material, and can be used for making silicon carbide SiC, gallium nitride GaN and other materials.

Figure 200610105112

Description

一种大面积自支撑宽禁带半导体材料的制作方法 A method for fabricating a large-area self-supporting wide-bandgap semiconductor material

技术领域 technical field

本发明属于微电子技术领域,涉及半导体材料、器件制作技术,具体的说是一种大面积、自支撑的宽禁带半导体材料制作方法,可用于进行炭化硅SiC、氮化镓GaN等薄膜材料的制作。The invention belongs to the technical field of microelectronics, relates to semiconductor materials and device manufacturing technology, specifically a large-area, self-supporting wide-bandgap semiconductor material manufacturing method, which can be used for thin film materials such as silicon carbide SiC and gallium nitride GaN production.

背景技术 Background technique

近年来以SiC、GaN为代表的第三代宽禁带半导体材料由于具有大禁带宽度、高临界场强、高热导率、高载流子饱和速率、异质结界面二维电子气浓度高等优良特性,使其受到了人们广泛的关注。在理论上,利用这些材料制作的高电子迁移率晶体管HEMT、异质结双极晶体管HBT、发光二极管LED、激光二极管LD等器件将具有现有器件无法比拟的优异性能,因此近年来国内外对其进行了广泛而深入的研究并相继取得了令人瞩目的成果。In recent years, the third-generation wide-bandgap semiconductor materials represented by SiC and GaN have large bandgap width, high critical field strength, high thermal conductivity, high carrier saturation rate, and high concentration of two-dimensional electron gas at the heterojunction interface. Its excellent characteristics have attracted widespread attention from people. In theory, high electron mobility transistor HEMT, heterojunction bipolar transistor HBT, light-emitting diode LED, laser diode LD and other devices made of these materials will have excellent performance that cannot be compared with existing devices. It has conducted extensive and in-depth research and has achieved remarkable results.

然而,目前第三代宽禁带半导体材和相关器件面临的一个重大障碍就是没有天然的单晶材料,难以人工制备获得高质量、大尺寸的单晶材料。与此同时,随着以第三代宽禁带半导体材料为基础的大功率器件以及微波功率器件的集成度、功率密度越来越高,其散热问题也越来越严重,对衬底的尺寸、散热能力、绝缘性能的要求越来越苛刻。However, a major obstacle facing the third-generation wide-bandgap semiconductor materials and related devices is that there is no natural single-crystal material, and it is difficult to artificially prepare high-quality, large-size single-crystal materials. At the same time, as the integration and power density of high-power devices based on third-generation wide-bandgap semiconductor materials and microwave power devices are getting higher and higher, the problem of heat dissipation is becoming more and more serious. , cooling capacity, insulation performance requirements are becoming more and more stringent.

以GaN材料为例。80年代末Nakamura等人提出了利用二步法在蓝宝石衬底上外延生长GaN材料的方案,参见Nakamura S.GaN Growth UsingGaN Buffer L ager.Jpn.J Appl Phys.30(10),L 1705~L 1707,1991。该方案是在蓝宝石衬底上首先生长一层GaN缓冲层,以降低由蓝宝石与GaN晶格失配所引起的高缺陷密度,然后在缓冲层上再生长GaN材料。该方案虽然能够获得比采用单步工艺质量更好的GaN材料,但是由于GaN材料(0001)生长面与蓝宝石衬底(0001)晶面的晶格失配高达约13.8%,所以即使采用了此方案生长的GaN材料的缺陷密仍高达108-1010/cm2以上。Take GaN material as an example. In the late 1980s, Nakamura et al. proposed a two-step method to epitaxially grow GaN materials on sapphire substrates, see Nakamura S.GaN Growth Using GaN Buffer Lager.Jpn.J Appl Phys.30(10), L 1705~L 1707, 1991. The solution is to first grow a GaN buffer layer on the sapphire substrate to reduce the high defect density caused by lattice mismatch between sapphire and GaN, and then re-grow GaN material on the buffer layer. Although this solution can obtain GaN materials with better quality than the single-step process, the lattice mismatch between the (0001) growth plane of the GaN material and the (0001) crystal plane of the sapphire substrate is as high as about 13.8%. The defect density of the GaN material grown by the scheme is still as high as 10 8 -10 10 /cm 2 or more.

1993年Detchprohm和Amano等人进一步提出了在ZnO衬底上生长GaN材料的方案,参见Detchprohm T,Amano H,Hiramatsu K,et al.J Cryst Growth.128,384,1993。该方案是在蓝宝石衬底上首先外延一层ZnO材料用作GaN材料外延生长的衬底;然后利用ZnO材料的晶格结构和晶格常数与GaN材料相近的特性在ZnO材料的表面外延一层GaN材料。虽然ZnO材料与GaN材料具有相近的晶体结构和晶格常数,但是由于ZnO材料与蓝宝石材料之间较大的晶格失配导致通过外延生长的ZnO材料自身就具有较高的缺陷密度,因此在ZnO衬底上生长出的GaN材料的缺陷密度仍然很高。In 1993, Detchprohm and Amano et al. further proposed a plan to grow GaN materials on ZnO substrates, see Detchprohm T, Amano H, Hiramatsu K, et al.J Cryst Growth.128, 384, 1993. The scheme is to first epitaxially layer a layer of ZnO material on the sapphire substrate as the substrate for the epitaxial growth of GaN material; GaN material. Although ZnO material and GaN material have similar crystal structures and lattice constants, due to the large lattice mismatch between ZnO material and sapphire material, the ZnO material grown by epitaxy itself has a high defect density, so in The defect density of GaN material grown on ZnO substrate is still high.

1999年Hersee等人提出了使用纳米异质外延的方案,参见Zubia D,Hersee S D.J Appl Phys Lett.49,140,1996。该方案首先在Si衬底上制作Si纳米柱状阵列,然后在其上直接外延GaN材料。Si纳米柱由于纳米尺寸效应能够在一定程度上释放GaN与衬底间晶格失配产生的应力,但是因为Si衬底的范性较差导致GaN材料的厚底仍然不能较大。In 1999, Hersee et al proposed the scheme of using nanometer heterogeneous epitaxy, see Zubia D, Hersee S D.J Appl Phys Lett.49, 140, 1996. In this scheme, Si nano-column arrays are fabricated on Si substrates first, and then GaN materials are directly epitaxy on them. Due to the nano-size effect, Si nanopillars can release the stress caused by the lattice mismatch between GaN and the substrate to a certain extent, but the thickness of the GaN material still cannot be large because of the poor norm of the Si substrate.

以SiC材料为例,由于SiC材料在常压下难以形成熔体,温度达到2400度时会直接升华,因而很难使用传统的熔融法进行制备。1983年Nishino等人提出了在Si衬底上生长3C-SiC的方案,参见Nishino S,Powell J A,Will H A.Appl Phys Lett.42,460,1983。采用该方案在Si上通过CVD技术在高温下生长出了质量较好的立方相3C结构的SiC薄膜。但是,由于SiC与Si衬底的晶格失配高达20%、热失配亦达到8%,导致SiC薄膜内的残余应力较大,很难生长大厚度的SiC材料。由此可见,要解决高质量宽禁带半导体材料的生长问题就只有寻找新的技术途径。Taking SiC material as an example, because SiC material is difficult to form a melt under normal pressure, it will directly sublimate when the temperature reaches 2400 degrees, so it is difficult to use the traditional melting method to prepare. In 1983, Nishino et al. proposed a plan to grow 3C-SiC on Si substrates, see Nishino S, Powell J A, Will H A. Appl Phys Lett. 42, 460, 1983. Using this scheme, a SiC film with better quality cubic phase 3C structure was grown on Si by CVD technology at high temperature. However, since the lattice mismatch between SiC and the Si substrate is as high as 20%, and the thermal mismatch is also up to 8%, the residual stress in the SiC film is large, and it is difficult to grow SiC materials with large thickness. It can be seen that to solve the growth problem of high-quality wide-bandgap semiconductor materials, we must find new technical approaches.

发明的内容content of the invention

本发明的目的在于克服上述现有技术的不足,提供一种制作高质量、大尺寸、自支撑宽禁带半导体材料的方法。以解决目前第三代宽禁带半导体材料异质外延生长技术由于没有合适衬底造成的晶格失配与热失配导致的高应力问题,以用于各种宽禁带半导体材料的生长。The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a method for producing high-quality, large-size, self-supporting wide-bandgap semiconductor materials. To solve the problem of high stress caused by lattice mismatch and thermal mismatch caused by the lack of suitable substrates in the current third-generation wide-bandgap semiconductor material heteroepitaxial growth technology, it is used for the growth of various wide-bandgap semiconductor materials.

实现本发明目的的技术方案是:在硅片上制作绝缘层上的硅结构,即SOI结构,再在该SOI上制作岛状阵列缓冲层,最终在岛状缓冲层之上外延生长所需的大面积、自支撑宽禁带半导体材料。The technical solution for realizing the object of the present invention is: on the silicon chip, make the silicon structure on the insulating layer, that is, the SOI structure, then make the island-shaped array buffer layer on the SOI, and finally epitaxially grow the required components on the island-shaped buffer layer. Large-area, self-supporting wide-bandgap semiconductor materials.

其具体制作过程如下:Its specific production process is as follows:

(1)根据自支撑外延层的应用选择硅片的晶向和尺寸;(1) Select the crystal orientation and size of the silicon wafer according to the application of the self-supporting epitaxial layer;

(2)利用常规的注氧隔离SIMOX、硅片键合BESOI、智能剥离UNIBOND在所选的硅片上制作掩埋氧化层BOX、表层硅SOL,形成SOI结构;(2) Use conventional oxygen injection isolation SIMOX, silicon wafer bonding BESOI, and intelligent peeling UNIBOND to make buried oxide layer BOX and surface silicon SOL on the selected silicon wafer to form an SOI structure;

(3)在SOI结构的表层硅SOL上利用光刻、外延工艺制作岛状缓冲层,形成双缓冲柔性衬底;(3) Make an island-shaped buffer layer on the surface silicon SOL of the SOI structure by photolithography and epitaxial technology to form a double buffer flexible substrate;

(4)在所述双缓冲柔性衬底上利用常规的外延工艺生长半导体材料;(4) Utilize conventional epitaxial process to grow semiconductor material on described double-buffered flexible substrate;

(5)利用常规的剥离工艺将所述半导体材料下面的双缓冲柔性衬底或SOI结构层剥离掉,形成大面积、自支撑的宽禁带半导体材料。(5) The double-buffer flexible substrate or SOI structure layer under the semiconductor material is peeled off by a conventional stripping process to form a large-area, self-supporting wide-bandgap semiconductor material.

上述半导体材料的制作方法中,其中所述的利用光刻工艺制作岛状缓冲层的过程如下:In the manufacturing method of the above-mentioned semiconductor material, the process of making the island-shaped buffer layer by photolithography process is as follows:

第一步,根据设计的单个岛尺寸和间距制作掩模板;The first step is to make a mask according to the designed single island size and spacing;

第二步,将制作的掩模板置于涂有光刻胶的SOL上进行光刻、显影;The second step is to place the fabricated mask on the SOL coated with photoresist for photolithography and development;

第三步,先使用腐蚀液对SOL进行刻蚀,以保证每个岛的高度,再使用有机溶剂去除光刻胶并清洗表面,在SOL上形成岛状缓冲层。The third step is to etch the SOL with an etching solution to ensure the height of each island, and then use an organic solvent to remove the photoresist and clean the surface to form an island-shaped buffer layer on the SOL.

上述半导体材料的制作方法中,其中所述的利用外延工艺制作岛状缓冲层的过程是:选择与所要生长的宽禁带半导体材料相近的材料作为制作SOL上岛状缓冲层的外延材料,通过控制外延时的温度、压力使得外延处于岛状生长模式,调整生长时间控制单个岛的尺寸与间距,在SOL上形成岛状缓冲层。In the manufacturing method of the above-mentioned semiconductor material, wherein the process of making the island-shaped buffer layer by using the epitaxial process is: selecting a material close to the wide-bandgap semiconductor material to be grown as the epitaxial material for making the island-shaped buffer layer on the SOL, by Control the temperature and pressure during epitaxy to make the epitaxy in the island growth mode, adjust the growth time to control the size and spacing of a single island, and form an island buffer layer on the SOL.

本发明由于采用了基于SOI结构与岛状缓冲层组成的双缓冲柔性衬底结构,能够释放外延材料与硅片材料之间因晶格失配、热失配产生的高应力,克服了基于硅衬底外延技术存在的高缺陷密度、大量裂纹、外延材料厚度过小无法剥离等技术难题,可制作高质量的自支撑宽禁带半导体材料。同时由于本发明制作的宽禁带半导体材料尺寸主要取决于所用硅片的尺寸,因此可实现大尺寸外延材料的制作。目前,硅片的尺寸已达8~12英寸,远大于现有宽禁带半导体材料常用衬底的2~4英寸。Because the present invention adopts the double-buffer flexible substrate structure based on SOI structure and island-shaped buffer layer, it can release the high stress caused by lattice mismatch and thermal mismatch between the epitaxial material and the silicon wafer material, and overcomes the problem based on silicon Substrate epitaxy technology has technical problems such as high defect density, a large number of cracks, and the thickness of the epitaxial material is too small to be peeled off. High-quality self-supporting wide-bandgap semiconductor materials can be produced. At the same time, since the size of the wide-bandgap semiconductor material produced by the present invention mainly depends on the size of the silicon wafer used, the production of large-scale epitaxial materials can be realized. At present, the size of silicon wafers has reached 8 to 12 inches, which is much larger than the 2 to 4 inches commonly used substrates of existing wide bandgap semiconductor materials.

基于本发明制作的宽禁带半导体材料能够构造各种高性能的半导体器件,这些器件对于大功率的微波功率器件而言,其散热能力优于传统的蓝宝石及硅衬底的器件,且器件的栅长大于常用的SiC衬底的器件。对于光电器件而言,由于能够在一片外延材料上集成更多的器件,因而极大地提高了器件的产量,降低了单个器件的成本。Various high-performance semiconductor devices can be constructed based on the wide-bandgap semiconductor material produced by the present invention. For high-power microwave power devices, the heat dissipation capability of these devices is better than that of traditional sapphire and silicon substrate devices, and the device's The gate length is larger than that of commonly used SiC substrate devices. For optoelectronic devices, because more devices can be integrated on a piece of epitaxial material, the yield of devices is greatly improved and the cost of a single device is reduced.

附图说明Description of drawings

图1是本发明的制作过程图Fig. 1 is the making process figure of the present invention

图2是本发明基于双缓冲层柔性衬底的六方相6H结构SiC材料制作过程图,该双缓冲层柔性衬底是由(100)晶面SOI与Si岛状缓冲层构成。Fig. 2 is a diagram of the manufacturing process of the hexagonal 6H structure SiC material based on the double buffer layer flexible substrate of the present invention, the double buffer layer flexible substrate is composed of (100) crystal plane SOI and Si island buffer layer.

图3是本发明基于双缓冲层柔性衬底的立方相3C结构GaN材料制作过程图,该双缓冲层柔性衬底是由(111)晶面SOI与AlN岛状缓冲层构成。Fig. 3 is a diagram of the manufacturing process of the cubic phase 3C structure GaN material based on the double buffer layer flexible substrate of the present invention, the double buffer layer flexible substrate is composed of (111) crystal plane SOI and AlN island buffer layer.

具体实施方式 Detailed ways

以下参照附图详细说明本发明的过程与实施例。The process and embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

参照图1,本发明的制作过程如下:With reference to Fig. 1, the manufacturing process of the present invention is as follows:

第一步,根据自支撑外延层的应用选择一定尺寸的硅片。In the first step, a silicon wafer of a certain size is selected according to the application of the self-supporting epitaxial layer.

该硅片晶面的选择:根据外延材料的晶向选择不同晶面的硅片,例如,形态为六方相的6H结构SiC可选择(100)晶面的硅片;而立方相为3C结构的SiC可选择(111)晶面的硅片。The selection of the crystal plane of the silicon wafer: choose silicon wafers with different crystal planes according to the crystal orientation of the epitaxial material, for example, the silicon wafer with the (100) crystal plane can be selected for the 6H structure SiC with the hexagonal phase; and the silicon wafer with the 3C structure for the cubic phase SiC can choose (111) crystal plane silicon wafer.

该硅片尺寸的选择:根据外延材料的外延技术和用途选择硅片的尺寸。例如,对于GaN使用的金属有机物化学气相淀积MOCVD外延技术,硅片的尺寸取决于MOCVD反应室尺寸的大小。此外,对于试验用外延材料,为了降低单次试验的成本可使用小尺寸的硅片;对于生产用外延材料,为了降低单个器件的成本可选择大尺寸的硅片。总之,硅片尺寸的选择必须同时考虑反应室尺寸和材料用途两方面的因素。The selection of the size of the silicon wafer: select the size of the silicon wafer according to the epitaxy technology and application of the epitaxial material. For example, for the metal organic chemical vapor deposition MOCVD epitaxy technology used for GaN, the size of the silicon wafer depends on the size of the MOCVD reaction chamber. In addition, for experimental epitaxial materials, small-sized silicon wafers can be used in order to reduce the cost of a single test; for production epitaxial materials, large-sized silicon wafers can be selected in order to reduce the cost of a single device. In short, the choice of silicon wafer size must take into account both the size of the reaction chamber and the use of materials.

第二步,在上述硅片上制作BOX、SOL形成SOI结构。In the second step, BOX and SOL are fabricated on the silicon wafer to form an SOI structure.

该SOI结构的工艺:根据实际条件可选用注氧隔离SIMOX、硅片键合BESOI、智能剥离UNIBOND等常规SOI工艺。The process of the SOI structure: According to actual conditions, conventional SOI processes such as oxygen injection isolation SIMOX, silicon wafer bonding BESOI, and intelligent stripping UNIBOND can be selected.

该SOI各层的厚度:SOL厚度小于200纳米,BOX的厚度在10~200纳米之间。The thickness of each layer of the SOI: the thickness of the SOL is less than 200 nanometers, and the thickness of the BOX is between 10 and 200 nanometers.

第三步,在上述SOI结构上制作岛状缓冲层,形成双缓冲柔性衬底结构。In the third step, an island-shaped buffer layer is fabricated on the above-mentioned SOI structure to form a double-buffered flexible substrate structure.

该岛状缓冲层的制作工艺:根据外延材料与设备情况可选用光刻、外延、纳米自组织生长等不同的工艺,例如,对于GaN材料可选用MOCVD外延工艺,对于SiC材料可选用光刻工艺,对于ZnO材料可选用纳米自组织工艺。The manufacturing process of the island-shaped buffer layer: different processes such as lithography, epitaxy, and nano-self-organized growth can be selected according to the epitaxial material and equipment conditions. For example, the MOCVD epitaxial process can be used for GaN materials, and the photolithography process can be used for SiC materials. , Nano self-organization process can be selected for ZnO material.

所述的利用光刻工艺制作岛状缓冲层的过程如下:The process of making the island-shaped buffer layer by photolithography is as follows:

1、根据设计的单个岛尺寸和间距制作掩模板;1. Make a mask according to the designed single island size and spacing;

2、使用甩胶机将光刻胶均匀的黏附在硅片上;2. Use the adhesive machine to evenly adhere the photoresist to the silicon wafer;

3、将涂抹好光刻胶的硅片放入恒温干燥箱中进行烘烤;3. Put the silicon wafer coated with photoresist into a constant temperature drying oven for baking;

4、将制作好的掩模板与硅片压紧,在紫外高压水银灯下曝光;4. Press the prepared mask and the silicon wafer tightly, and expose it under the ultraviolet high-pressure mercury lamp;

5、首先将曝光后的硅片放入显影液中进行显影。然后将硅片放入清洗液中进行漂洗,得到所需的图形;5. First put the exposed silicon wafer into the developing solution for development. Then put the silicon wafer into the cleaning solution for rinsing to get the desired pattern;

6、首先,将显影后的硅片放入烤箱中。然后,用红外灯从背面烘烤;6. First, put the developed silicon wafer into the oven. Then, bake it from the back with an infrared lamp;

7、使用HF酸和HNO3酸溶液对硅片进行腐蚀,以保证每个岛的高度,在SOL上形成岛状缓冲层。7. Use HF acid and HNO3 acid solution to etch the silicon wafer to ensure the height of each island and form an island-shaped buffer layer on the SOL.

所述的利用外延工艺制作岛状缓冲层的过程如下:The process of making the island-shaped buffer layer by using the epitaxial process is as follows:

首先选择与所要生长的宽禁带半导体材料相近的材料作为制作SOL上岛状缓冲层的外延材料,再通过控制外延时的温度、压力使得外延处于岛状生长模式,然后调整生长时间控制单个岛的尺寸与间距,使其在SOL上形成岛状缓冲层。First, select a material similar to the wide-bandgap semiconductor material to be grown as the epitaxial material for making the island-shaped buffer layer on the SOL, and then control the temperature and pressure of the epitaxy to make the epitaxy in the island-shaped growth mode, and then adjust the growth time to control a single The size and spacing of the islands are such that they form an island-like buffer layer on the SOL.

第四步,在双缓冲柔性衬底结构上外延生长宽禁带半导体材料。The fourth step is to epitaxially grow a wide bandgap semiconductor material on the double buffer flexible substrate structure.

该外延生长技术:根据材料类型选用不同的外延技术。例如:SiC材料可使用化学气相淀积CVD方法;GaN材料可使用金属有机物化学气相淀积MOCVD方法。此步骤使用的工艺流程与传统的外延工艺相同。The epitaxial growth technology: different epitaxial technologies are selected according to the type of material. For example: SiC material can use chemical vapor deposition CVD method; GaN material can use metal organic compound chemical vapor deposition MOCVD method. The process flow used in this step is the same as the conventional epitaxy process.

第五步,对双缓冲柔性衬底进行剥离。The fifth step is to peel off the double-buffered flexible substrate.

首先,使用比例为1∶10的HF酸和HNO3酸溶液剥离掉SOI结构最下面的体硅层;接着,使用HF酸剥离BOX;最后,使用比例为1∶10的HF酸和HNO3酸溶液剥离掉SOL和岛状缓冲层。First, use HF acid and HNO3 acid solution at a ratio of 1:10 to peel off the bulk silicon layer at the bottom of the SOI structure; then, use HF acid to peel off the BOX; finally, use HF acid and HNO3 acid at a ratio of 1:10 The solution strips off the SOL and the island buffer layer.

通过以上的工艺步骤得到了高质量的大面积、自支撑宽禁带半导体材料。A high-quality large-area, self-supporting wide-bandgap semiconductor material is obtained through the above process steps.

实施例1Example 1

本发明制作6英寸自支撑80微米六方相6H结构的SiC材料。The invention produces 6-inch self-supporting 80-micron SiC material with hexagonal phase 6H structure.

衬底选用:商业上可买到的6寸(100)晶面Si片。Substrate selection: commercially available 6-inch (100) crystal-faced Si wafer.

SOI制作工艺:采用注氧隔离SIMOX。SOI manufacturing process: use oxygen injection to isolate SIMOX.

岛状缓冲层制作:采用光刻。Fabrication of the island-shaped buffer layer: photolithography is used.

参照图2,本实施例1的制作过程如下:With reference to Fig. 2, the manufacturing process of present embodiment 1 is as follows:

1.在6英寸(100)晶面的Si片上制作SOI结构,即使用SIMOX工艺制作厚度为100纳米的SOL层,厚度为100纳米的BOX层。1. An SOI structure is fabricated on a 6-inch (100) Si wafer, that is, a SOL layer with a thickness of 100 nanometers and a BOX layer with a thickness of 100 nanometers are fabricated using the SIMOX process.

2.在SOI上通过光刻制作Si岛状缓冲层,形成双缓冲柔性衬底。2. Fabricate a Si island buffer layer on the SOI by photolithography to form a double buffer flexible substrate.

首先设计单个岛的尺寸为150纳米、间距为200纳米,根据这些数据制作曝光用掩模板;First design a single island with a size of 150 nanometers and a pitch of 200 nanometers, and make a mask for exposure based on these data;

接着,使用甩胶机将聚乙烯醇肉桂酸酯KPR光刻胶均匀的黏附在6英寸(100)晶面的Si片上;Next, use a glue spinner to evenly adhere the polyvinyl alcohol cinnamate KPR photoresist to the Si wafer on the 6-inch (100) crystal plane;

接着,将涂抹好光刻胶的6英寸(100)晶面的Si片放入80℃的恒温干燥箱中进行烘烤12分钟后取出;Next, put the 6-inch (100) Si wafer with the photoresist coated in a constant temperature drying oven at 80°C for 12 minutes and then take it out;

接着,将制作好的掩模板与6英寸(100)晶面的Si片压紧,在紫外高压水银灯下曝光;Next, press the fabricated mask with a 6-inch (100) Si wafer, and expose it under an ultraviolet high-pressure mercury lamp;

接着,将曝光后的硅片放入丁酮溶液中进行显影,去掉未感光的光刻胶保留感光部分。然后将6英寸(100)晶面的Si片放入丙酮和去离子水中进行漂洗后取出;Next, put the exposed silicon wafer into a methyl ethyl ketone solution for development, remove the unphotosensitive photoresist and keep the photosensitive part. Then put the Si sheet of 6 inches (100) crystal face into acetone and deionized water and take out after rinsing;

接着,将漂洗后的6英寸(100)晶面的Si片放入烤箱中,在150℃下烘烤20分钟,再用红外灯从背面烘烤15分钟;Next, put the rinsed 6-inch (100) silicon wafer into an oven, bake it at 150°C for 20 minutes, and then bake it with an infrared lamp from the back for 15 minutes;

最后,使用比例为1∶10,浓度为49%的HF酸和浓度为70%的HNO3酸溶液在25℃时对硅片进行腐蚀,刻蚀深度为70~80纳米,形成岛状缓冲层与SOI组成的双缓冲柔性衬底。Finally, use a ratio of 1:10, 49% HF acid and 70% HNO3 acid solution to etch the silicon wafer at 25 ° C, and the etching depth is 70-80 nanometers to form an island-shaped buffer layer Double-buffered flexible substrate with SOI composition.

3.在双缓冲柔性衬底上使用硅烷、甲烷分别作为硅源和碳源,利用CVD方法,控制温度为1400℃,在双缓冲柔性衬底上外延生长厚度为80微米的SiC材料。3. Using silane and methane as silicon source and carbon source respectively on the double-buffered flexible substrate, using CVD method, controlling the temperature to 1400°C, and epitaxially growing SiC material with a thickness of 80 microns on the double-buffered flexible substrate.

4.对外延生长的SiC材料下面的双缓冲柔性衬底,按如下过程进行剥离:4. The double-buffered flexible substrate under the epitaxially grown SiC material is peeled off according to the following process:

首先,使用比例为1∶10浓度为49%的HF酸和浓度为70%的HNO3酸溶液在25℃时对SOI的体硅层进行剥离,该腐蚀速率为每秒5.5微米,时间为45秒钟,该体硅层位于BOX之下;First, the bulk silicon layer of SOI was stripped at 25°C using 49% HF acid at a ratio of 1:10 and 70% HNO3 acid at a rate of 5.5 microns per second for 45 seconds, the bulk silicon layer is located under the BOX;

然后,使用浓度为12%的HF酸溶液在25℃度时对BOX进行腐蚀,该腐蚀速率为每秒32埃,时间为40秒;Then, use a concentration of 12% HF acid solution to corrode the BOX at 25° C., the corrosion rate is 32 Angstroms per second, and the time is 40 seconds;

最后,使用比例为1∶10,浓度为49%的HF酸和浓度为70%的HNO3酸溶液在25℃时,对SOL与Si岛状缓冲层进行剥离,时间为5秒钟,最后形成6英寸自支撑80微米六方相6H结构的SiC材料。Finally, using a ratio of 1:10, 49% HF acid and 70% HNO3 acid solution at 25 ° C, the SOL and Si island buffer layer were stripped for 5 seconds, and finally formed 6-inch self-supporting 80-micron hexagonal phase 6H SiC material.

实施例2Example 2

本发明制作4英寸自支撑100微米立方相3C结构的GaN材料。The invention produces 4-inch self-supporting 100-micron cubic phase 3C GaN material.

衬底选用:商业上可买到的4英寸(111)晶面的Si片。Substrate selection: commercially available 4-inch (111) crystal plane Si wafer.

SOI制作工艺:采用注氧隔离SIMOX。SOI manufacturing process: use oxygen injection to isolate SIMOX.

岛状缓冲层制作:采用外延。Island-shaped buffer layer production: using epitaxy.

参照图3,本实施例2的制作过程如下:With reference to Fig. 3, the manufacturing process of present embodiment 2 is as follows:

1.在硅片上利用SIMOX工艺注氧,制作厚度为30纳米的SOL层,厚度为120纳米的BOX层,形成SOI结构;1. Using the SIMOX process to inject oxygen on the silicon wafer, make a SOL layer with a thickness of 30 nanometers, and a BOX layer with a thickness of 120 nanometers to form an SOI structure;

2.在SOL上使用三甲基铝、高纯氨气作为铝源于氮源,利用MOCVD方法在温度为450℃,压力为40托的条件下,通过外延方法制作AlN岛状缓冲层,以形成双缓冲柔性衬底;2. Use trimethylaluminum and high-purity ammonia gas as the source of aluminum and nitrogen on the SOL, and use the MOCVD method at a temperature of 450 ° C and a pressure of 40 torr to make an AlN island-shaped buffer layer by epitaxy. forming a double-buffered flexible substrate;

3.在双缓冲柔性衬底上使用三乙基镓、高纯氨气作为镓源与氮源,采用MOCVD方法在温度为950℃,压力为40托的条件下,在双缓冲柔性衬底上外延生长厚度为100微米的GaN材料。3. Using triethylgallium and high-purity ammonia gas as gallium and nitrogen sources on a double-buffered flexible substrate, using MOCVD method at a temperature of 950°C and a pressure of 40 Torr, on a double-buffered flexible substrate The GaN material is epitaxially grown to a thickness of 100 micrometers.

4.按如下过程对所生长的GaN材料的SOI结构进行剥离:4. The SOI structure of the grown GaN material is peeled off according to the following process:

首先,使用比例为1∶10浓度为49%的HF酸和浓度为70%的HNO3酸溶液,在25℃时对SOI的体硅层进行剥离,其腐蚀速率为每秒5.5微米,时间为45秒钟,该体硅层位于BOX层之下;First, using 49% HF acid and 70% HNO3 acid solution at a ratio of 1:10, the bulk silicon layer of SOI was stripped at 25°C, with an etching rate of 5.5 microns per second for For 45 seconds, the bulk silicon layer is located under the BOX layer;

然后,使用浓度为12%的HF酸溶液,在25℃时对BOX进行腐蚀,腐蚀速率为每秒32埃,时间为40秒,以剥离掉BOX;Then, use a 12% HF acid solution to corrode the BOX at 25° C. at a corrosion rate of 32 angstroms per second for 40 seconds to peel off the BOX;

最后,使用比例为1∶10浓度为49%的HF酸和浓度为70%的HNO3酸溶液,在25℃时对SOL进行剥离,时间为3秒钟,最终形成4英寸自支撑100微米立方相3C结构的GaN材料。Finally, the SOL was stripped using a 1:10 ratio of 49% HF acid and 70% HNO3 acid solution at 25°C for 3 seconds to form a 4-inch self-supporting 100-micron cube GaN material with phase 3C structure.

此外,除光刻与外延技术外还可以使用纳米自组织技术制作本发明的的岛状缓冲层。In addition, in addition to photolithography and epitaxy techniques, nanometer self-organization techniques can also be used to fabricate the island-shaped buffer layer of the present invention.

对于本领域的专业人员来说,在了解了本发明内容和原理后,能够在不背离本发明的原理和范围的情况下,根据本发明的方法进行形式和细节上的各种修正和改变,但是这些基于本发明的修正和改变仍在本发明的权利要求保护范围之内。For those skilled in the art, after understanding the content and principles of the present invention, they can make various amendments and changes in form and details according to the methods of the present invention without departing from the principles and scope of the present invention. But these amendments and changes based on the present invention are still within the protection scope of the claims of the present invention.

Claims (3)

1. the manufacture method of a large area, self-supporting semiconductor material with wide forbidden band, carry out according to the following procedure:
The first step is according to the crystal orientation and the size of the application choice silicon chip of self-supporting epitaxial loayer;
Second step, utilize the isolation of notes oxygen SIMOX, wafer bonding BESOI, smart peeling UNIBOND on selected silicon chip, to make buried oxide layer BOX, surface silicon SOL, form soi structure;
The 3rd step, on the surface silicon SOL of soi structure, utilize photoetching, epitaxy technique to make the island resilient coating, form the double buffering flexible substrate that island resilient coating and SOI constitute;
In the 4th step, on described double buffering flexible substrate, utilize epitaxy technique growing semiconductor material;
The 5th step, utilize conventional stripping technology that double buffering flexible substrate or soi structure layer below the described semi-conducting material are peeled off, form the semiconductor material with wide forbidden band of large tracts of land, self-supporting.
2. the manufacture method of semi-conducting material according to claim 1 is characterized in that the process of utilizing photoetching process to make the island resilient coating is as follows:
The first step is made mask plate according to the single island size and the island spacing of design;
Second goes on foot, and the mask plate of making is placed carry out photoetching, development on the SOL that scribbles photoresist;
The 3rd step, use corrosive liquid that SOL is carried out etching earlier, to guarantee the height on each island, re-use organic solvent and remove photoresist and clean surface, on SOL, form the island resilient coating.
3. the manufacture method of semi-conducting material according to claim 1, it is characterized in that the process of utilizing epitaxy technique to make the island resilient coating is: select GaN or AlN material as making the epitaxial material that SOL goes up the island resilient coating, make extension be in the island growth pattern by temperature, the pressure of controlling outer time-delay, adjust growth time and control the size and the spacing on single island, on SOL, form the island resilient coating.
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