CN100433672C - A multi-rate synchronous digital network convergence and de-convergence method and its equipment - Google Patents

Abstract

The invention relates to a multi-rate aggregation and de-aggregation method and equipment. The convergence method includes the following steps: receiving each branch signal, and extracting the clock and data; completing frame search and frame tracking according to the frame alignment byte of the SDH/SONET frame; processing the signal overhead, extracting all overhead signals and storing them and explanation; perform byte interleaving for each signal to form several management units; insert overhead signals into the formed management units; form new line overhead and complete high-speed signals through byte interleaving and multiplexing. The de-aggregation method is the reverse process of the aggregation method. The equipment adopting the convergence and de-convergence method can converge multiple low-speed optical signals into one high-speed optical signal, or de-converge a high-speed optical signal into multiple low-speed optical signals. Through the use of the method and equipment, multiple branch signals can be transparently transmitted on one wavelength at the same time, the fault location is more convenient, the networking is more flexible, and the investment is greatly saved.

Description

A multi-rate synchronous digital network convergence and de-convergence method and its equipment

technical field

The present invention relates to a multi-rate synchronous digital network convergence and de-convergence method and convergence and de-convergence equipment, in particular to a multi-rate synchronous digital system SDH/synchronous optical network SONET convergence and de-convergence method and convergence and de-convergence equipment in an optical communication system.

Background technique

In today's optical communication system, network technology is developing day by day, and various services are increasing, especially on the access side, various low-speed services are increasing, such as STM-1/4 (also including SONET services, such as STS-3/12) , if only one channel service is transmitted in one optical fiber, it will inevitably cause a waste of optical fiber bandwidth resources. For transmission systems, bandwidth resources are very precious, because the size of the bandwidth directly limits the transmission capacity of the transmission system. In order to increase the transmission rate, on the one hand, the bandwidth is expanded, and on the other hand, the utilization rate of the bandwidth is increased. However, the expansion and use of bandwidth is limited, and with the increase of bandwidth, the cost of networking will increase, making the compatibility and maintainability of the system worse. The expansion of bandwidth utilization is to increase the effective utilization of unit bandwidth under the condition of constant bandwidth, so that the system has better compatibility and maintainability, and the networking is more flexible.

When multiple low-speed SDH/SONET services appear on the Internet, the existing solutions are basically the following two:

First, the SDH signals of each STM-1 or STM-4 service rate are directly uploaded to the DWDM ring network, and one STM-1 or STM-4 signal occupies one wavelength;

Second, use SDH equipment to synthesize several STM-1 or STM-4 signals into STM-16 for transmission.

The solutions of the prior art have the following disadvantages:

1. If the first solution is adopted, the SDH signals of each STM-1 or STM-4 service rate are directly uploaded to the DWDM (Dense Wavelength-division Multiplexing) ring network, and one STM-1 or STM- 4 The signal occupies one wavelength, which inevitably wastes a lot of wavelength resources;

2. If the second solution is adopted, the STM-1 or STM-4 signal is synthesized into STM-16 for transmission. Although this effectively solves the problem of wavelength utilization, this solution has the disadvantages of complex processing and expensive equipment. At the same time, the overhead of STM-1 or STM-4 will be completely terminated, and various functions of the original network management system cannot be implemented.

Contents of the invention

The purpose of the present invention is to provide a synchronous digital network aggregation and de-aggregation method, which aggregates several low-speed wavelength service signals into one high-speed service signal, while maintaining the transparency of overhead transmission, thereby solving the problem that existing technical solutions occupy a large number of wavelength resources , The defect of low bandwidth utilization.

The purpose of the present invention is to provide a converging and de-converging device, which aggregates several low-speed service signals into one high-speed service signal for transmission, while maintaining the transparency of overhead transmission, thereby solving the problem that existing technical solutions occupy too many wavelengths and utilize bandwidth The defects of low rate, high networking cost, and poor flexibility.

In order to realize the purpose of the present invention, we provide a kind of multi-rate synchronous digital network convergence method, and it comprises the following steps: a1) receive each branch signal after photoelectric conversion, extract clock and data; b1) according to SDH/SONET frame The frame alignment byte completes frame search and frame tracking; c1) processes signal overhead, extracts and stores all overhead signals, and explains them at the same time; The SONET standard interprets the pointer of the management unit, locates the payload signal of the virtual container of each branch according to the pointer information, and then generates a new pointer value according to the relationship between the input and output clock phase and the frame header, and performs each branch signal phase alignment to form several management units; e1) insert overhead signals into the formed management unit signals; f1) form new line overhead and complete high-speed signals through byte interleaved multiplexing.

According to another aspect of the present invention, we provide a multi-rate synchronous digital network de-convergence method, comprising the following steps: a2) receiving a high-speed signal converted into an electrical signal, searching for frame alignment bytes to complete frame search and frame tracking; b2) Extract the line overhead, and extract the overhead signal of each branch client side signal from the undefined overhead bytes according to the aggregation rules; c2) interpret the signal according to the SDH/SONET pointer interpretation rules, and locate the virtual container net load signal, and form a new pointer value according to the clock and phase relationship of the signal, and form a plurality of management unit signals; d2) put the overhead bytes and management unit signals into the corresponding overhead bytes of each branch according to the defined order, Form a complete low-speed signal.

According to another aspect of the present invention, we provide a multi-rate synchronous digital network aggregation device, the aggregation module of which includes: a frame structure processing unit for receiving electrical signals of each branch, extracting clock and data, according to SDH The frame alignment byte completes frame search and frame tracking; the tributary transmission overhead (TOH) monitoring and extraction unit receives the tributary signal, is used to process the signal overhead, extracts all overhead signals and outputs them; the tributary transmission overhead ( TOH) remapping unit, used to receive and store the extracted overhead signal, and then output it; the pointer processing unit receives another signal output by the frame structure processing unit, performs byte interpolation and insertion on each signal, and manages them according to the SDH standard The unit pointer interprets the pointer, locates the virtual container payload signal of each branch according to the pointer information, and then generates a new pointer value according to the phase relationship between the input and output clocks and the frame header, and aligns the phases of the signals of each branch to form Several management units are output together; the synthesis unit is used to receive the overhead extracted by the branch TOH remapping unit, and insert the overhead signal into the management unit signal output by the pointer processing unit; the framing module is multiplexed by byte interleaving , forming a new line overhead.

According to another aspect of the present invention, we provide a multi-rate synchronous digital network de-convergence device, wherein the de-convergence module includes: a de-framing module, which is used to receive high-speed signals converted into electrical signals, and search for frame alignment bytes to complete frames Search and frame tracking; the line transmission overhead (TOH) monitoring and extraction module receives the signal output of the deframing module for extracting the line overhead, and extracts the client-side signal of each branch from the undefined overhead bytes according to the aggregation rule The overhead signal of the tributary transmission overhead (TOH) recovery module is used to receive and store the overhead signal of the tributary client side signal; the pointer processing module interprets the signal according to the SDH pointer interpretation rules, and locates the payload of the virtual container signal, and form a new pointer value according to the clock and phase relationship of the signal, and form a plurality of management unit signals, and then output; the synthesis module receives the management unit signal output by the pointer processing module and the overhead signal output by the branch TOH recovery module, Put the overhead byte and the management unit signal into the corresponding overhead byte of each branch according to the defined order; the framing module receives the signal output by the synthesis unit to form a complete low-speed signal frame.

In summary, the aggregation and de-aggregation method and the aggregation and de-aggregation device provided by the present invention support transparent multiplexing of n (n≤16) STM-1s or m (m≤4) STM-4s into one STM-16 signals, while the overhead bytes of STM-1 or STM-4 will be transmitted through the unused bytes in the STM-16 overhead bytes to maintain the transparency of overhead transmission, and each STM-1 or STM-4 signal can continue to be implemented Its existing functions ensure the transparent transmission of STM-1 or STM-4 signals, while only occupying one channel, its bandwidth utilization rate is 100%, and multiple STM-1 or STM-4 signals can be transmitted on one wavelength at the same time (Supporting SONET services), and does not cause any damage to the STM-1 or STM-4 signals, making fault location more convenient, networking more flexible, and greatly saving investment.

Description of drawings

Fig. 1 is the position schematic diagram of multi-rate SDH/SONET convergence de-convergence equipment in the transmission system of the present invention;

Fig. 2 is the internal structural diagram of multi-rate SDH/SONET convergence deconvergence equipment of the present invention;

Fig. 3 is a schematic diagram of signal flow in the direction of convergence where multiple low-speed signals of the device of the present invention converge into one high-speed signal;

Fig. 4 is a schematic diagram of the signal flow in the deconverging direction of the deconverging high-speed signal of the device of the present invention into multiple low-speed signals;

Fig. 5 is a clock processing module diagram of the present invention.

Detailed ways

Below in conjunction with accompanying drawing, technical scheme of the present invention is described in detail:

The position of the device of the present invention in the transmission system is shown in FIG. 1 : where the dotted line part is the convergence and de-convergence device of the present invention. In the aggregation direction, several low-speed service signals transmitted from the client side, such as n STM-1 and m STM-4 service signals, are connected to the aggregation device (in the present invention, the aggregation and de-aggregation functions are synthesized into a single board equipment), aggregated into a high-speed optical signal with a standard wavelength, sent to the multiplexer for long-distance transmission, and then split the original optical wavelength through the demultiplexer, sent to the de-aggregation device, de-aggregated the original low-speed service signal, During the whole process, the transparent transmission of the client-side access service overhead is guaranteed.

Referring to FIG. 2 , it is a schematic diagram of the internal structure of the device of the present invention. The arrows in the dotted box in FIG. 2 indicate electrical signals, and the shaded arrows outside the dotted box indicate optical signals. The upper part in the dotted box indicates the direction of convergence, and the lower part indicates the direction of de-convergence.

In the convergence direction, the low-speed service signal from the client side is received, converted into an electrical signal through the photoelectric conversion of the transceiver integrated module, sent to the convergence module for processing into a high-speed signal, and then converted into an optical signal of a standard wavelength by the electro-optic conversion module, and then passed through A splitter is divided into two ways to send out, realizing double sending.

In the direction of de-aggregation, the device receives two high-speed optical signals, and then goes through the photoelectric conversion module to the selector to realize the selective receiving function. One of the electrical signals is selected to be connected to the de-aggregation module for processing, and finally de-aggregated into multiple low-speed signals for transmission. The input and receiving transceiver integrated module is converted into an optical signal and sent out.

The following is a detailed introduction to the key module inside the device of the present invention - the aggregation and de-aggregation module, which is divided into two parts: aggregation and de-aggregation:

Convergence direction signal processing:

Referring to Fig. 3, Fig. 3 is a schematic diagram of the signal flow in the direction of convergence where multiple low-speed signals of the device of the present invention are converged into one high-speed signal. It can be seen from Figure 3 that after the clock and data are extracted from the optically converted signal from the client side, it is sent to the frame structure processing unit 31, and the frame search is first completed internally according to the frame alignment bytes A1 and A2 of the SDH frame , Frame tracking, that is, completing frame fixing, and then descrambling each branch signal. The signal processed by the frame structure processing unit 31 is divided into two paths, one path is processed by the branch TOH (Transmission Overhead, transmission overhead) monitoring and extraction unit 36, and the other path is sent to the pointer processing unit 32 for processing. In the branch TOH monitoring and extraction unit 36, it is divided into two steps. The first step is to process the signal overhead, extract all overhead signals, and store them in the branch TOH remapping unit 37; the second step is to process the overhead Explain that the transmission performance of these client-side receiving signals and LOS (Loss Of Signal, loss of signal), LOF (Loss of Frame, frame loss), OOF (Out-of-Frame, frame out of sync), LOC ( Loss ofClock, clock loss), B1, B2 and other alarms to the software. In the tributary TOH monitoring and extracting unit 36, all overheads can be output to the outside through overhead serial lines for software processing, monitoring and extraction. In the pointer processing unit 32, carry out byte interleaving (reverse process of byte interleaving) to each route signal, and carry out pointer explanation to AU (AdministrativeUnit, management unit) pointer according to SDH standard rule, according to pointer information, locate out The VC-4 (Virtual Container, virtual container) payload signal of each branch, and then according to the relationship between the input and output clock phase and the frame header, generate new pointer values H1, H2, H3, and transfer each signal from the client side Perform phase alignment to form 16 AU-4s and send them to the synthesis unit 34 . In the POH (Path Overhead, channel overhead) monitoring unit 33, it is specially to monitor the channel overhead of the VC-4 signal in the pointer processing unit 32, such as bytes such as J1, B3, C2, and G1.

The AU-4 signal processed by the pointer processing unit 32 is inserted into the overhead sent by the tributary TOH remapping unit 37 in the combining unit 34 . The 16 AU-4 signals enter the framing module 35 after being processed by the synthesis unit 34, and internally, through byte interleaved multiplexing (industry standard rules), an STM-16 frame (or STS-48 frame) is formed, and To generate a new STM-16 (or STS-48) line overhead, of course, the line overhead provided by the line TOH regeneration unit 38 can also be received. The signal that finally forms a complete STM-16 (or STS-48) frame structure is converted into an optical signal required by the standard DWDM system through electro-optical conversion, and transmitted in the DWDM system.

De-aggregation direction signal processing:

Referring to Fig. 4, Fig. 4 is a schematic diagram of the signal flow in the de-aggregation direction of the de-aggregation of the high-speed signals issued by the present invention into multiple low-speed signals, and the de-aggregation direction is the reverse direction of the aggregation. As can be seen from Fig. 4, the 2.5G high-speed signal is converted into an electrical signal through photoelectricity, and sent to the deframing module 41, and the A1A2 byte is searched inside to complete the frame search and frame tracking, that is, the frame is completed, and the STM-16 ( or STS-48) signal for descrambling. The descrambled signal is divided into two paths, one is processed by the line TOH monitoring and extraction module 42, and the other is processed by the pointer processing module 43. In the line TOH monitoring and extraction module 42, the line overhead is extracted, and the necessary performance and alarm information such as LOS, LOF, OOF, LOC, B1, B2 are reported to the software by the alarm output line according to the overhead information, and undefined overhead words are not used. In the section, the overhead signal of each tributary client side signal is extracted according to the aggregation rule, and put into the buffer in the tributary TOH recovery module 45 . At the same time, the overhead extracted in the line TOH monitoring and extraction module 42 can be output to the outside through the overhead serial port line for software monitoring and extraction. In the pointer processing module 43, according to the SDH pointer interpretation rule, the signal is interpreted as a pointer, and the VC-4 payload signal is located, and new pointer values H1, H2, H3 are formed according to the clock and phase relationship of the signal, forming 16 AUs -4. At the same time, the POH monitoring and pointer module 44 monitors POH (such as J1, B3, C2, G1 and other bytes) and pointer counts, which can be read by external software. After the 16 AU-4 signals processed by the pointer processing module 43, at the synthesizing module 46, and the overhead bytes transmitted from the DWDM side taken out from the buffer of the branch TOH recovery module 45, put them into each branch according to the defined order The corresponding overhead bytes of STM-1 or STM-4 are finally sent to the framing module 47 to form a signal with a complete STM-1 or STM-4 structure for each branch to realize transparent transmission of services.

The aggregation and de-aggregation modules can support SONET and SDH formats, as well as cascade formats, and support OC-3c (Optical Carrier Level 3, STS-3 frame optical signal), OC-12c (Optical Carrier Level 12, STS-12 frame optical signal ), OC-48c, VC4-4c.

The overhead and pointer handling are described in detail below:

The aggregation and de-aggregation device provided by the present invention realizes the overhead transparent transmission function for the accessed branch service, interleaves the branch overhead into the idle bytes of the 2.5G overhead, and can regenerate the 2.5G overhead at the same time.

For example, 16 branch STM-1 signals are multiplexed into the STM-16 frame structure, see Table 1 below, Table 1 is a schematic diagram of the 16-way STM-1 overhead remapping of the present invention, indicating that 16 branch STM-1 signals are multiplexed to the frame structure of STM-16; it can be seen from the table that the unshaded part in the table is the Remap (remap) position of the branch STM-1, and the 16 branch overhead parts are multiplexed to the STM-16 through byte interleaving. 16 positions. The shaded part is the section overhead of STM-16 regeneration.

Table 1

Another example is to multiplex 4 channels of STM-4 signals into the frame structure of STM-16. Referring to Table 2, Table 2 is a schematic diagram of the 4-way STM-4 overhead remapping of the present invention, as can be seen from Table 2, the shaded part in the table is the Remap position of the branch STM-4, and the 4 branch overheads are partially passed through the word Internode multiplexing to STM-16 positions. The unshaded part is the segment overhead of STM-16 regeneration.

Table 2

By inserting the overhead of the tributary into the free bytes in the overhead of the STM-16 frame structure, the transparent transmission of the overhead of the tributary is realized.

Since the 4 tributary SDH signals come from different clocks, after clock retiming, the tributary clock is not synchronized with the local clock, and pointer adjustment will inevitably occur. The adjusted pointer count value will be provided upon reception.

For the overhead on the line side (DWDM port), the module of the present invention provides overhead generation. 1. Provide B1 and B2 bit error counts. 2. The J0 byte provides 1 byte, 16 byte, and 64 byte formats. 3. Provide data communication channel DCC channel interface (D1~D12) to provide in-band management for the system. 4. Fill in the S1 byte according to the synchronization of the sending clock. 5. Other byte insertion and extraction, such as: E1, E2, F1, F2, X1, etc.

Clock processing:

Referring to Fig. 5, Fig. 5 is a clock processing module diagram of the present invention, as can be seen from the figure, the device of the present invention provides at least 6 clock sources: 4 branch signal recovery clocks, 1 line recovery clock, and 1 local clock source clock.

When the device is powered on, the default state is to operate on the local clock (free running). After running, configure the clock of the device on the network management system according to the network conditions. The configuration provides port priority table query and query SSM (synchronization status message), and the synchronization status message is transmitted through the S1 byte.

Clock index requirements ensure that the single-board device of the present invention can use the internal clock source when the external synchronization is lost, and the frequency accuracy is required to be ±20ppm (based on the internal timing requirements of the regenerator network element).

The description of the invention, the detailed description and the above-mentioned drawings are not intended to limit the invention. For those of ordinary skill in the art, various corresponding modifications can be made under the teaching of the present invention without departing from the spirit and scope of the present invention, but this change should be included in the claims of the present invention and its equivalent scope within.

Claims (10)

1. A multi-rate synchronous digital network convergence method is characterized in that comprising the following steps: a1) Receive the signals of each branch after the photoelectric conversion, and extract the clock and data; b1) Complete frame search and frame tracking according to the frame alignment byte of the SDH/SONET frame; c1) Process signal overhead, extract and store all overhead signals, and interpret them at the same time; d1) Carry out byte insertion and insertion of each branch signal, and perform pointer interpretation on the management unit pointer according to the SDH/SONET standard, locate the virtual container payload signal of each branch according to the pointer information, and then according to the input clock phase and frame header The relationship between the output clock phase and the frame header, generate a new pointer value, and align the phases of each branch signal to form several management units; e1) inserting said overhead signal into the formed management unit; f1) Forming a new line overhead and a complete high-speed signal by performing byte interleaving multiplexing on the management unit. 2. The multi-rate synchronous digital network convergence method as claimed in claim 1, characterized in that said step c1) also includes reporting transmission performance and signal loss of received signals, frame loss, frame out-of-sync, clock loss, and bit interleaving Steps for parity codes B1 and B2. 3. The multi-rate synchronous digital network aggregation method according to claim 1, characterized in that said step d1) further comprises the step of monitoring the channel overhead of the virtual container signal. 4. A multi-rate synchronous digital network deconvergence method, comprising the following steps: a2) Receive high-speed signals converted into electrical signals, search for frame alignment bytes to complete frame search and frame tracking; b2) Extracting the line overhead, and extracting the overhead signal of each branch client-side signal from the undefined overhead bytes according to the aggregation rule; c2) According to the SDH/SONET pointer interpretation rules, perform pointer interpretation on the high-speed signal, locate the virtual container payload signal, and form a new pointer value according to the clock and phase relationship of the signal, and form a plurality of management unit signals; d2) Put the overhead signal and the management unit signal into the corresponding overhead byte of each branch according to the defined order to form a complete low-speed signal. 5. The multi-rate synchronous digital network de-convergence method according to claim 4, characterized in that said step b2 also includes reporting necessary transmission performance and signal loss, frame loss, frame loss, and clock loss according to said overhead signal , the step of bit checking the parity codes B1 and B2. 6. The multi-rate synchronous digital network de-convergence method according to claim 4, characterized in that said step c2 also includes the step of monitoring channel overhead and pointer counting. 7. A multi-rate synchronous digital network convergence device, characterized in that the convergence module includes: The frame structure processing unit is used to receive the electrical signals of each branch, extract the clock and data, and complete the frame search and frame tracking according to the SDH frame alignment byte; A branch transmission overhead monitoring and extraction unit, configured to process the overhead of each branch electrical signal, extract and output all overhead signals; A tributary transmission overhead remapping unit, configured to receive and store the extracted overhead signal, and then output it; The pointer processing unit receives another signal output by the frame structure processing unit, performs byte insertion and insertion on the circuit signals of each branch, and performs pointer interpretation on the pointer of the management unit according to the SDH standard, and locates the location of each branch according to the pointer information The payload signal of the virtual container, and then according to the relationship between the input clock phase and the frame header and the relationship between the output clock phase and the frame header, a new pointer value is generated, and the phases of each branch signal are aligned to form several management units and output; a synthesis unit, configured to receive the overhead extracted by the branch transmission overhead remapping unit, and insert the overhead signal into the management unit output by the pointer processing unit; The framing module forms a new line overhead and a complete high-speed signal by interleaving and multiplexing the bytes of the management unit. 8. The multi-rate synchronous digital network convergence device according to claim 7, further comprising a line regeneration unit for outputting line overhead to the framing module to form a complete frame structure signal. 9. A multi-rate synchronous digital network de-convergence device, characterized in that the de-convergence module includes: The de-framing module is used to receive high-speed signals converted into electrical signals, and search for frame alignment bytes to complete frame search and frame tracking; The line transmission overhead monitoring and extraction module receives the high-speed signal output by the deframing module, and extracts the line overhead, and extracts the overhead signal of each branch client side signal from the undefined overhead bytes according to the convergence rule; The branch transmission overhead recovery module is used to receive and store the overhead signal of the branch client side signal; The pointer processing module performs pointer interpretation on the high-speed signal according to the SDH pointer interpretation rules, locates the virtual container payload signal, and forms a new pointer value according to the clock and phase relationship of the tributary client side signal, and forms multiple management unit signal, then output; A synthesis module, receiving the management unit signal output by the pointer processing module and the overhead signal output by the branch transmission overhead recovery module, and putting the overhead signal and the management unit signal into the corresponding overhead bytes of each branch according to the defined order; The framing module receives the signal output by the synthesis module to form a complete low-speed signal. 10. The multi-rate synchronous digital network de-convergence device according to claim 9, wherein the de-convergence and de-convergence module further includes a channel overhead monitoring and pointer counting module, which is used to monitor pointer counting in the pointer processing module.

Images